Inventec Piaget P09C1U 6050A2252201 Schematic

PIAGET

P09C1U

MV Build

2009/03/17

DATE

DRAWER DESIGN CHECK RESPONSIBLE

3SIZE =

XXXX-XXXXXX-XXFILE NAME :

REVCHANGE NO.

XXXXXXXXXXXXP/N

POWERDATEEE

DATE

TITLE

VER : REVDOC. NUMBERCODESIZE

A3

INVENTEC

PIAGET-UMA

1310A2252201 A01

CS

SHEET

OF

561

TABLE OF CONTENTS

PAGE 5- DC& BATTERY CHARGER

6- SELECT & BATTERY CONN 7- +V5A,+V3A & +V2.5S

8- OCP 9- +VCC_NB & +V1.2A 10- +VCC_CORE

11- POWER

12- DDR2 POWER 13- POWER(SLEEP) 14- POWER(SEQUENCE)

PAGE 15- CLOCK_GENERATOR

16- CPU-1 17- CPU-2

18- CPU-3 19- CPU-4

20- THERMAL&FAN CONTROLLER 21- DDR2-DIMM0 22- DDR2-DIMM1 23- DDR2-DAMPING

24- RS780-1

25- RS780-2 26- RS780-3

27- RS780-4 28- CRT 29- LED PANEL CONN 30- SB700-1 31- SB700-2 32- SB700-3 33- SB700-4 34- KBC

PAGE

35- KB & TP CONN 36- SPI & ACCELEROMETER 37- HDD & ODD CONN

38- USB CONN 39- TCM CONN 40- FLASH MEDIA CARD

41- AZALIA CODEC 42- Earphone & MIC JACK 43- AUDIO AMP & HP CONN

44- MDC CNTR 45- NIC GIGA LAN- CONTROLLER 46- NIC 10/100/1000- RJ45 CONN 47- MINICARD & BT CONN 48- NEW CARD

49- SIM CONN

50- Wireless SW & SW/B & LED/B CONN

51- SCREW 52- LED 53- Power Plane Cap 54- SW BOARD & LID Switch 55- ODD Extension Board 56- BLANK

CHANGE by

Kevin Hsiao 17-Jan-2009

INVENTEC

TITLE

PIAGET_UMA

Table OF Content

DOC. NUMBER

CODE

SIZE

A3

1310A2252201 A01

CS

SHEET

REV

OF

562

Inventec Confidential

Clock Generator

ICS9LPR476E

MAIN BATT

System Charger &

DC/DC System power

4 in 1

Slot

USB0

Left Side Conn

USB2

Left Side Conn

USB4

Right Side Conn

USB5

Right Side Conn

USB3

Flash media

ALCOR AU6433

LCM

CRT

HDMI

USB11

Bluetooth

LVDS

CRT

PCIE

USB2.0

(480Mb/s)

Azalia interface

AMD Griffin

Turion/Athlon/Sempron

S1g2 Socket 638-pin

AMD

RS780MN

(FCBGA)

AMD

SB700

(FCBGA)

(24MHz)

Hyper Transport

(20.8Gb/s)

PCIE0 PCIE2 PCIE3

ALINK

(5Gb/s/per lane)

DDR2

(800MHz)

DDR2

SATA

(3Gb/s)

SATA

(3Gb/s)

SM bus

LPC interface

(33MHz)

DDR II _SODIMM0

DDR II _SODIMM1

Giga-bit LAN

Marvell 8072

MINI CARD

PCIE CARD

USB1

FIXED ODD

HDD

Accelerometer

LIS302DL

RJ45

(WLAN)

CONN

SIM

USB7

CAMERA

USB6

WWAN

MDC V1.5/V3

Vulcan

RJ11

MIC

AUDIO CODEC

ADI_1984A

Headphone

Speaker

Keyboard

CHANGE by

KBC

SMSC KBC1091

TouchPad

Kevin Hsiao 12-Feb-2009

SPI

SPI ROM

2MB

INVENTEC

TITLE

PIAGET_UMA

Block Diagram

CODE

SIZE

A3

DOC. NUMBER

1310A2252201 A01

CS

SHEET

REV

OF

563

Adapter

+VBAT

OCP

OCP_OC#

+VBATR

KBC_PW_ON

ADP_PRES

5/3.3V

(TPS51120)

+V5A +V3A

+V5AL

+V3AL

+V3S

+V5S

GMT

(G916)

+V2.5S

Charger

(BQ24740)

CHGCTRL_3

ADP_PRES

AC_AND_CHG

POWER_GOOD_3

PWR_GOOD_3

NB_SKIP

NBV_BUF

SYS_PWRGD

SLP_S5#_5R

V18_GOOD

+VCC_NB&+V1.2

(TPS51124)

DDR2 POWER

(TPS51117)

VCC_CORE

(MAX17009)

SLP_S3#_3R

+V1.8

+V1.25S

CHANGE by

LR

(G2997)

LR

(APL5913)

+VCCP

+V1.8S

+VCC_CORE

+VCC_CORE_VDD1

Kevin Hsiao 17-Jan-2009

+V0.9S

V1.5S_PG

M_VREF

+V1.5S

INVENTEC

TITLE

PIAGET_UMA

CODE

SIZE

A3

CS

DOC. NUMBER

1310A2252201 A01

SHEET

REV

OF

564

1

R28

15K_5%

2

+VADPBL

+VBDC

5-,6-

100K_1%

1

R46

14.3K_1%

2

5-

R526

12

100K_1%

ADP_EN#

12

R47

1

R44

8.25K_1%

2

2VREF

7-,14-

R527

12

100K_1%

R530

12

24K_1%

BATCAL#

8-

D507

1SS355W

C33

1 2

0.022uF_16v

1

R529

2

23.7K_1%

8-

R557

12

21

12

270K_5%

3

+

2

-

5 6

2

100K_5%

R558

+V5AL

5-,7-

8

1

OUT

TI_LMV393IDGKR_SOP_8P

U508-A

4

R45

1M_5%

12

+V5AL

5-,7-

8

+

7

OUT

-

TI_LMV393IDGKR_SOP_8P

U508-B

4

CHGCTRL_3

R528

12

1M_5%

1 2

C515

0.1uF_16v

1

+

3

-

R522

12

100K_5%

U504

5

OUT

2

TI_LMV331IDBVR_SOT23_5P

1

R520

220K_5%

2

1

G

S

D

Q511

2N7002W

6-,34-,45-

4

3

6-

AC_AND_CHG

Q510 1

2N7002W

+V5AL

0.1uF_25V

ADP_PRES

+V3AL

G

5-,7-

1 2

C44

12

R48

220K_5%

1 2 3

Q508

12

FAIR_FDMC4435BZ_8P

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

22K_5%

R559

1

R521

10K_5%

2

3

D

S

2

R43

12

6-,34-

280K_1%

R567

200K_1%

VCTRL_3

5-

ADPDRV#

Q506

3

D

1

G

S

2

2N7002W

C514

0.1uF_16V

3.42(135mils)

+VADPBL

D

S

8 7 6 54

G

12

SLP_S3#_3R

8-

P2U

1

C539

1

1uF_6.3v

2

1

34-

422K_1%

+VADP

8-

C533

1

1 2

2

10pF_50v

5-

FAIR_FDMC4435BZ_8P

BQREF

7-,9-,13-,14-,31-,32-,33-,35-,45-,47-,50-,53-

CELLS

D8

B140_SMA

21

Q507

D

S

8

1

7

2

6

3

54

G

R561

12

47K_5%

12

300K_5%

8-

8-,13-,32-,34-,43-,45-,48-

34-

1

R523

100K_5%

2

I_SET

1

R564

453K_1%

2

R563

2

P2U

C536

1uF_6.3V

1

R565

1

1M_1%

2

NFM60R30T222

12

C531

0.1uF_25V

R30

12

47K_5%

R560

+V3A

1uF_6.3v

L502

4

12

R562

20K_5%

C535

3

1 2

+VADPTR

C534

1 2

10pF_50v

7A(280mils)

R16

1

2

4.7K_5%

2

3

5

9

13

16

6

10

8

21

4

20

1

11

12

15

1

C537

2

100pF_50v

P2U

+VADPTR

3.42(135mils)

C532

1

0.1uF_25V

2

+VBAT

5-

ADPDRV#

1 2

U503

ACN

ACP

ACDET

AGND

EXTPWR

SRSET

ACSET

VREF

IADSLP

DPMDET

LPMD

CELLS

CHGEN

VDAC

VADJ

IADAPT

TI_BQ24740_QFN_28P

8-

PVCC

HIDRV

PH

BTST

REGN

LODRV

PGND

SRP

SRN

BAT

LPREF

ISYNSET

PowerPad

ICS

C43

1uF_25v

28

26

25

27

24

C513

1uF_10V

23

22

19

18

17

7

14

29

R566

24.9K_1%

Kelvin sense

C511

0.1uF_16V

P_CG_DH

P_CG_PH

DC JACK

JACK501

1

2

3

G

G1

3

4

G2

G

4

ACES_91302_0047L_1_4P

+VBATR

R514

12

0.01_1%

1

2

12

P2U

1 2

1

1 2

C31

P2U

1uF_25v

C512

12

0.1uF_16v

13

D506

BAT54_30V_0.2A

P_CG_DL

P2U

Layout Rule 1>Noisy Driver(BST,DH,DL&SW node) keep trace short and wide 2>Don’t route sensitive signal(Voltage¤t sense, FB, REF, AGND...) close noisy driver area

2

3>Layout Vout sense connect to output terminal 4>Layout Kelvin sense as a differetial pair to device

7-,9-,10-,11-,12-,13-,29-,34-,53-

C30

1uF_25v

C510

1 2

0.1uF_25V

C538

1 2

0.1uF_25v

P2U

BAT_AMBERLED#

BAT_GRNLED#

LIMITSIGNAL

7A(280mils)

C507

C508

1

2

8.2K_5%

FDMC8884

C32

1 2

4.7uF_25v

R519

34348-

CHANGE by

8D765

G

S

Q6

4

123

PCMB0603T_8R2MS

765

8

D

Q26

G

FDMC8884

S

4

3

12

Kelvin sense C2O

Voltage sense

+V3AL

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

1

R512

8.2K_5%

2

ACES_87213_0300N_3P

Battery Charge LED CONN

Kevin Hsiao 16-Mar-2009

5-

R29

12

3K_5%

L501

12

C505

1 2

4.7uF_25v

CN502

1

2

G

G1

2

3

G2

G

3

C506

1 2

D7

1

RLZ18C2

+VBDCR

0.01_1%

12

Kelvin sense

1

R524

0_5%

2

0.033uF_16V

C516

1 2

7A(280mils)

Q509

8

1

S

D

7

2

6

3 4

5

G

AM4825P_AP

R515

3.6A(140mils)

1

R568

0_5%

2

C517

2

1

C540

1 2

1uF_25v

P2U

Note:

INVENTEC

TITLE

PIAGET_UMA

DC & BATTERY CHARGER

CODE

SIZE

A3

CS

SHEET

+VBDC+VBAT+VADPBL

5-,6-

+VBDC

5-,6-

C504

1

C503

2

4.7uF_25v

high power trace

DOC. NUMBER

1310A2252201 A01

OF

565

REV

CHGCTRL_3

5-,34-

12

1000pF_50V

C19

R15

1

1K_5%

D6

1SS355W

R3

470K_5%

2

1

2

1

2

1

R14

470K_5%

2

G

1

C4

0.047uF_16v

2

3

D

2N7002W

S

2

Q5

AC_AND_CHG

ADP_PRES

+V3AL

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

5

U501

4

74HC1G14GV

3

1

R506

10K_5%

2

5-

5-,34-,45-

2N7002W

+V3AL

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

R502

12

100_5%

1

3

2

1

R509

10K_5%

2

R501

12

100_5%

THM_MAIN#

D504

DIODE_BAV99

100K_5%

34-

1

3

2

1

+V3AL

1

2

R510

10K_5%

2

D502

3

DIODE_BAV99

PAD501

+VBDC

7A(280mils)

SDA_MAIN SCL_MAIN

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

3434-

D503

DIODE_BAV99

+VBDC

5-

POWERPAD_2_0610

+V3AL

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

1

R516

220K_5%

2

Q502

2

3

D

S

G

1

R517

12

0_5%

34-

BATCON

R511

1

2

R504

12

1K_5%

1

C502

470pF_50v

2

+V3AL

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

1

R503

10K_5%

2

CN501

1

2

3

4

5

G

5

6

G

6

1 2

C501

0.1uF_25V SYN_081006_TK001_6P

6CELLSEL#

G1 G2

EMI SOLUTION

INVENTEC

TITLE

PIAGET_UMA

SELECT & BATTERY CONN

SIZE

CODE DOC. NUMBER REV

A3

CHANGE by SHEET

18-Mar-2009Kevin Hsiao

CS

A011310A2252201

OF

656

KBC_PWR_ON

C2O

+V3A

5-,9-,13-,14-,31-,32-,33-,35-,45-,47-,50-,53-

6A(240mils)

PAD6

POWERPAD_2_0610

1

C202

2

1uF_6.3v

R715

6.8K_1%

C774

12

0402_OPEN

CYNTEC_PCMC063_3R3

1

2

C169

220uF_6.3V

R743

12

34-

30K_5%

R711

200K_5%

12

P2U

L18

1

R747

0402_OPEN

C799

0402_OPEN

+V5AL

5-,7-

1

R709

100K_5%

2

Q531

3

D

G

1

S

2

2N7002W

1

C798

1 2

0.1uF_16v

2 2

R714

12

10K_1%

51125GND

P2U

C756

0.1uF_16v

FDMC8884

2

1

2

Q542

1

FDMC8296

2

12

S

D

8D7

123

8

S

12

765

1

2A(80mils)

5

6

G

4

C776

4.7uF_25v

G

3

4

R687

2

0_5%

+VBATR

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

Q527

1 2

Q526

2

G1

5

G2

2N7002DW

P_3A_FB

1 2

C167

0.1uF_25V_OPEN

1

S1

6

D1

3

D2

4

S2

+V3AL

P2U

1 2

P_3A_DH

P_3A_DL

1 2

C166

2200pF_50V_OPEN

R716

71.5K_1%

51125GND

5-,6-,8-,30-,32-,34-,35-,36-,47-,50-

C775 10uF_6.3v

7 8

10

2VREF

11

5-,7-,14-

P_3A_LL

1

VREG3 VBST2

DRVL2

1

R712

61.9K_1%

2

P2U

51125GND

2VREF

5-,7-,14-

P_5A_FB

C773

R713

12

0_5%

R682

32-,34-

33_5%

P_5A_DH P_5A_DL

+VBATR

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

1

C754

2

4.7uF_25v

P2U

RSMRST#

P_5A_LL

1

0.22uF_6.3V

2

25

4

2

5

1

3

6

TML

VFB2

TONSEL

ENTRIP2

U517

SKIPSEL

EN0

GND

14

13

VFB1

VREF

ENTRIP1

24

VO1VO2

23

PGOOD

229

VBST1

21

DRVH1DRVH2

20

LL1LL2

1912

DRVL1

VCLK

VIN

VREG5

18

16

17

15

TI_TPS51125_QFN_24P

+V5AL

1 2

51125GND

12

5-,7-

P2U

C753

10uF_6.3v

51125GND

R684

1

0_5%

765

G

4

G

41S23

+V3S

8-,10-,13-,14-,15-,20-,21-,22-,26-,27-,28-,29-,30-,31-,32-,33-,34-,36-,39-,40-,41-,44-,45-,47-,48-,52-,53-

1

C671

2

10uF_6.3v

R710

1

10K_1%

2

P2U

C750

4.7uF_25v

1 2

8

D

S

FDMC8884

123

8765

D

Q543

FDMC8296

P2U

2

C751

4.7uF_25v

R683

12

15.4K_1%

C772

12

0402_OPEN

0.1uF_16vC752

2

1

+VBATR

3A(120mils)

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

1

2

C138

0.1uF_25V_OPEN

1 2

Q518

L13

12

CYNTEC_PCMC063_3R3

1

R708

0402_OPEN

ANPEC_APL5315_12BI_TRL_SOT23_5P

R655

12

10K_5%

1 2

0402_OPEN

U513

VIN3VOUT

1

2

C771

2

SETSHDN

GND

330uF_6.3V

C2O

C139

2200pF_50V_OPEN

1

C201

4

5

1 2

C140

1uF_6.3v

1

R634

22K_1%

2

1

R635

10K_1%

2

5A(200mils)

PAD5

POWERPAD_2_0610

200mA

+V2.5S

18-

12

10uF_6.3V

+V5A

C618

9-,10-,11-,12-,13-,38-

CHANGE by

Kevin Hsiao 18-Mar-2009

INVENTEC

TITLE

PIAGET_UMA

+V5A,+V3A&+V2.5S

CODE

SIZE

A3

DOC. NUMBER

1310A2252201 A01

CS

SHEET

REV

OF

567

BQREF

5-

LIMITsignal

VBIAS

ICS

5-

12

R25

165K_1%

R27

12

5-,8-

100_5%

8-

R531

12

10K_5%

BSS84_3P

LIMITsignal

1 2 3

TI_LMV321IDBVR_SOT23_5P

1

R533

105K_1%

2

Q9

2

3

D

S

G

1

5-,8-

U505

1IN+ GND 1IN-

1 2

Vcc+

OUT

12

C28

0.22uF_10v

1SS355W

D5

21

1SS355W

C18

3900pF_16v

+V5S

8-,13-,14-,20-,28-,29-,31-,32-,35-,37-,42-,43-,47-,53-

7-,10-,13-,14-,15-,20-,21-,22-,26-,27-,28-,29-,30-,31-,32-,33-,34-,36-,39-,40-,41-,44-,45-,47-,48-,52-,53-

5

4

1

R26

2K_1%

2

C518

0.1uF_16V

2

+V5S

8-,13-,14-,20-,28-,29-,31-,32-,35-,37-,42-,43-,47-,53-

R574

12

330K_5%

8

U506-A

3

+

1

OUT

2

-

AS393MTR_E1

4

2

1

D4

R11

12

100K_5%

1

R12

3.9K_1%

2

1

R41

182K_1%

2

12

1M_5%

1

R38

10K_1%

2

R13

R40

1

3.9K_5%

B

5-

5-,8-

R42

22.6K_1%

1

R39

10K_1%

2

5-,8-

1

R36

29.4K_1%

2

1

2

R570

10K_1%

I_SET

3

+

OUT

2

-

8-

5

+

OUT

6

-

3

C

Q4

E

D_MMST3904

2

+VADP +VADP

2

1

+VADP

5-,8-

1

R37

1_5%

2

C541

1 2

1uF_25v

8

U509-A

1

AS393MTR_E1

4

VBIAS

R573

12

1M_5%

8

U509-B

7

AS393MTR_E1

4

+V3S

1

R572

10K_5%

2

1SS355W

+V3AL

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

1

R569

10K_5%

2

34-

5-,6-,7-,8-,30-,32-,34-,35-,36-,47-,50-

1

R571

47K_5%

2

R532

220K_5%

D508

21

1SS355W

5-

ADP_EN#

1

2

1

2

Q512 1

2N7002W

ADP_PWRID

+V3AL

1

2

G

1

R525

220K_5%

2

R538

133K_1%

R537

80.6K_1%

D509

21

D

G

S

1

R35

10K_5%

2

3

D

S

2

1 2

R575

12

0_5%

3

2

1

2

Q11

2N7002W

8

U506-B

5

+

7

OUT

6

-

AS393MTR_E1

4

C519

0.027uF_10v

9-,10-,11-,14-

PWR_GOOD_3

18-,20-

PROCHOT#

5-,13-,32-,34-,43-,45-,48-

R34

100K_5%

3

C

1

B

Q10

E

D_MMST3904

2

5-

34-

R534

10K_5%

2

R535

100K_5%

R536

1

604K_1%

SLP_S3#_3R

BATCAL#

ADP_EN

1

12

2

INVENTEC

TITLE

PIAGET_UMA

OCP

Kevin Hsiao 12-Feb-2009

SIZE CODE DOC. NUMBER REV

A3

1310A2252201 A01

CS

SHEET OFCHANGE by

568

+VCC_NB

27-,53-

10A(400mils)

PAD1

POWERPAD_2_0610

R701

226K_1%

0.1uF_25V_OPEN

P2U

R700

10K_1%

R699

23.2K_1%

1

2

51124GND

R702

12

16.2K_1%

1

C766

2

0.0015uF_50V

C747

C2O

1

2

1

2

1 2

4.7uF_25v

PCMB104E_2R2MS

1

C82

2

330uF_2.5V

R703

12

5.1K_1%

1

C767

2

4700pF_25v

+VBATR

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

1A

C104

C103

1

2

4.7uF_25v

L7

12

R657

0402_OPEN

C694

0402_OPEN

C744

2200pF_50V_OPEN

1

876

5

2

D

G

1

8765

9

D

G

2

1 2

26-

2

R704

2K_5%

1

Q517

PWR_GOOD_3

FDMC8884

41S23

P_VCCNB_DH

Q516

FDMS8660S

41S23

STRP_DATA

8-,9-,10-,11-,14-

C745

12

P2U

0.1uF_16v

P_VCCNB_LL P_VCCNB_DL

STRP_DATA +VCC_NB

0 1 1.0

P_VCCNB_FB

R672

10K_5%

12

R679

12

0_5%

1 2

1.1

R698

12

0_5%_OPEN

7

PGOOD2

8

EN2

9

VBST2

10

DRVH2

LL2

12

DRVL2

C746

1000pF_50v

6

VO2

PGND2

13

VFB2

TRIP2

1

2

5.1K_1%

5

14

R678

TONSEL

U516

V5FILT

4

15

1

2

3

VO1

GND

VFB1

GND

PGOOD1

EN1

VBST1

DRVH1

LL1

DRVL1

TRIP1

V5IN

PGND1

17

16

18

TI_TPS51124RGER_QFN_24P

1

R676

2

7.5K_1%

51124GND

P_1.2S_FB

51124GND

25 24

23

22

21

2011

19

C765

1 2

1uF_6.3V

R696

2

0_5%

P2U

R674

R673

R675

1

12

10_5%

R677

+VBATR

C792

Q545

FDMC8296

0.1uF_25V_OPEN

6

5

87

G

4

3

G

23

41

D

FDMC8884

1S2

8765

D

S

Q521

1 2

1

12

0_5%

V1.2S_PG

8-,9-,10-,11-,14-

0_5%

12

PWR_GOOD_3

C741

0_5%

2

12

0.1uF_16v

P2U

P_1.2S_LL

P_1.2S_DH

P_1.2S_DL

+V5A

7-,9-,10-,11-,12-,13-,38-

P2U

C742

C743

1

2

4.7uF_6.3v

0.1uF_16V

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

C793

4.7uF_25v

C763

1

1 2

2

4.7uF_25v

L11

12

PCMC063T_1R5MN

1

330uF_2.5V

R694

0402_OPEN

2

C762

0402_OPEN

1A

1 2

C791

2200pF_50V_OPEN

6.49K_1%

1

C106

2

C2O

R695

51124GND

P2U

1

2

1

R697

10K_1%

2

7A(280mils)

POWERPAD_2_0610

C764

1 2

0402_OPEN

PAD3

+V1.2S

11-,15-,18-,19-,27-,30-,31-,53-

+V5A

7-,9-,10-,11-,12-,13-,38-

U7

7

R106

2

1

8

10K_5%

1

C161

2

0.1uF_16V

ANPEC_APL5930KAI_TRL_SOP_8P

5-,7-,13-,14-,31-,32-,33-,35-,45-,47-,50-,53-

6

VCNTL

POK

VIN

VOUT VOUT

EN FB

GND

VIN 9

1

+V3A

+V1.2A

31-

1

R129

5.36K_1%

2

1

R130

10K_1%

2

1A(40mils)

1 2

C160

10uF_6.3V

5

3 4

2

1

C159

2

10uF_6.3V

INVENTEC

TITLE

PIAGET_UMA

+VCC_NB & +V1.2A

CODE

CS

SHEET

DOC. NUMBER

956

SIZE

CHANGE by OF

18-Mar-2009Kevin Hsiao

A3

REV

A011310A2252201

To put resistors near switching power source

+VCC_CORE

Routing differential pair type

Kelvin sense

COREFB

1818-

COREFB#

NBV_BUF

+VCC_CORE_VDD1

18-

11-,34-

11-

8-,9-,11-,14-

1818-

NB_GNDS NB_SKIP#

10-,19-,53-

1

2

SYS_PWRGD

PWR_GOOD_3

CPU_SVC_R CPU_SVD_R

Kelvin sense

VDD1_FB#

VDD1_FB

10-,19-,53-

1

R556

51_5%

2

1

R555

51_5%

2

P2U

12

100K_1%

R540

51_5%

1

R539

51_5%

2

P2U

100_1%

+V3S

R547

MAX17009

11-

R554

1

2

7-,8-,13-,14-,15-,20-,21-,22-,26-,27-,28-,29-,30-,31-,32-,33-,34-,36-,39-,40-,41-,44-,45-,47-,48-,52-,53-

1

R550

4.7K_5%

2

C23

1 2

0.0047uF_50v

MAX17009

R553

MAX_MAX17009GTL+_TQFN_40P

12

R546

154K_1%

C527

12

1 2

R548 36.5K_1%

12

1000pF_50v

+V1.8

11-,12-,13-,18-,19-,20-,21-,22-,23-,53-

R541

P2U

2

1

100_1%

C521

12

0.0047uF_50v

R24

12

10_1%

1 2

MAX17009

P2U

R551

2

1000pF_50v

C529

12

R552

1.2K_1%

2

1

100_1%

2

1

C528

0.0047uF_50v

100_1%R549

P_VCORE_REF

C526

0.22uF_6.3v

12

R545

121K_1%

10

MAX17009

C524

0.0047uF_50v

C25

100_1%

2

1

2

1

1000pF_50v

12

1.5K_1%

2

1

R543 R542 1.2K_1%

C525

R544

1000pF_50v

2

MAX17009

1

PERGD

2

NV_BUF

3

SHDN#

4

REF

5

ILIM

6

OSC

7

TIME

8

SVC

9

SVD THRM

1 2

MAX17009

1.5K_1%

1

38

39

36

4011

37

CSN1CSN2

FBAC1FBAC2

FBDC1FBDC2

GNDS1

PGD_IN

OPTION

U507

VDDIO

GNDS215GNDS_NB

13

12

14

35

32

33

3417

3120

DH1

CSP1

PRO#

TMLPAD

VRHOT#

LX1

BST1

VDD1

DL1 GND1 GND2

DL2 VDD2

BST2

LX2

CSP2

DH2

VCC

NBSKP#

16

18

19

P_VCORE1_DH2

10_5%

1

C523

2

1uF_6.3V

P2U

32-,34-

P_VCORE_DH

R19

12

0_5%

R20

12

0_5%

MAX17009

41 30

P_VCORE_LX

29 28

P_VCORE_DL

27 26 25 24

P_VCORE1_DL2

23 22 21

1

R23

4.7_5%

2

P2U

C26

1 2

0.1uF_16v

P_VCORE1_LX2P_VCORE1_LX2

+V5A

7-,9-,10-,11-,12-,13-,38-

R576

12

SB_PWRGD

MAX17009

Kelvin sense

(Should routed in 5/5/5 pair and need to have 10mil clearance to other traces.)

2

C24

0.1uF_16v

1

P2U

1

R21

4.7_5%

2

P2U

R22

0_5%

+V5A

7-,9-,10-,11-,12-,13-,38-

12

C40

1

P2U

2

4.7uF_6.3V

Kelvin sense

(Should routed in 5/5/5 pair and need to

have 10mil clearance to other traces.)

MAX17009

Q13

FDMS7660

Q514

FDMS8692

FDMS7660

G

23

41

G

4

C39

1 2

4700pF_25v

0.1uF_25V_OPEN

G

41S23

Q12

G

41S23

C37

1 2

4700pF_25v

3A(120mils)

8765

D

Q513

FDMS8692

S

8

765

D

1S23

SBR3U40P1

C545

1

8765

2

D

2200pF_50V_OPEN

8765

D

+VBATR

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

C41

1

2

0402_OPEN

1

2

D9

0402_OPEN

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

1

C38

1

2

C36

C542

C543

1 2

4.7uF_25v

1

R580

2

1

C557

2

3A(120mils)

1

C547

1

2

4.7uF_25v

1

D10

SBR3U40P1

2

C544

0.1uF_25V_OPEN

1

2

1

R33

1K_5%

2

C554

1 2

220pF_50v

+VBATR

1

C520

C546

2

47uF_25V

1

R581

0402_OPEN

2

C558

1 2

0402_OPEN

C42

2200pF_50V_OPEN

L2

ETQP4LR45XFC

12

1

R577

2.4K_1%

2

R578

2

1

4.02K_1%

C522

1

0.22uF_10v

1

R32

12

1K_5%

2

4.02K_1%

C35

1 2

1

220pF_50v

R582

2.4K_1%

2

P2L

R579

12

10K_1%_THER_NTC

P2U

2

P2U

C530

0.22uF_10v

12

R583

R584

12

10K_1%_THER_NTC

+VCC_CORE

L1

12

ETQP4LR45XFC

330uF_2V_6mR

P2L

10-,19-,53-

18A(power plane)

Ensure trace/via isolated other signal

C50

1

C56112

2

330uF_2V_6mR

+VCC_CORE_VDD1

10-,19-,53-

18A(power plane)

1

C51

2

330uF_2V_6mR

C560

2

330uF_2V_6mR

Ensure trace/via isolated other signal

MAX17009

CHANGE by

INVENTEC

TITLE

PIAGET_UMA

+VCC_CORE

SIZE

CODE

16-Mar-2009Kevin Hsiao

A3

DOC. NUMBEROFREV

CS

SHEET

10 56

A011310A2252201

+VCC_CORE_NB

19-

2A(80mils)

PAD4

POWERPAD_2_0610

C130

220uF_2.5V

R728

2

1

10-,11-,34-

NB_SKIP#

P2U

1 2

8792GND

SYS_PWRGD

C790

100pF_50v

8792GND

80.6K_1%

1

R726 0402_OPEN

2

R727

12

0_5%

1

R730 0402_OPEN

2

R725

P2U

1

2

10-

C821 12

1000pF_50V

R724

1

0402_OPEN

NBV_BUF

2

8792GND

0_5%

C789

1

P2U

2

+V5A

7-,9-,10-,11-,12-,13-,38-

5-,7-,9-,10-,12-,13-,29-,34-,53-

+VBATR

1A

C129

4.7uF_25v12

L12

R722

P2U

C787 12

12

P2L

R723

12

5.76K_1%

1

2

CYNTEC_PCMC063_3R3

1.5K_1%

0.22uF_16V

C128

1 2

4.7uF_25v

R691

0402_OPEN

12

C760

0402_OPEN

1 2

1

2

1

2

P2U

C788

1uF_6.3V

C127

1

0.1uF_25V_OPEN

2

5

S1_D2

6 7

4

S2

FDS6900AS

Q520

1

D1

2

G1

8

G2

3

P_CORENB_DL

R693

0_5%

100K_1%

R692

PWR_GOOD_3

12

P2U

0.22uF_16v

C761

12

P_CORENB_DH

P_CORENB_FB

8-,9-,10-,11-,14-

P_CORENB_LX

R729

12

0_5%

U518

1

EN

PGOOD

VCC

VDD

3

DL

SKIP

4

LX

REF

5

DH

REFIN

6

ILIM

BST

7

TON

TML-PAD

MAX_MAX8792ETD+T_DFN_14P

R731

12

0_5%

P2U

1uF_6.3V

14

8792GND

132 12 11 10 9 8

FB

15

10-

8792GND

PWR_GOOD_3

7-,9-,10-,11-,12-,13-,38-

U515

1

8-,9-,10-,11-,14-

2

3

RICH_RT9194PE_05P_SOT23_6P

6

EN

VCC

5

DRI

GND

4

FB

PGOOD

9-,15-,18-,19-,27-,30-,31-,53-

+V5A

1

C739

0.1uF_16V

2

R671

12

10-,11-,34-

0_5%

+V1.2S

8 7

6 5

D

FDMC8296

1

C107

4.7uF_10v

2

Q16

1

S

2 3 4

G

SYS_PWRGD

24-,25-,26-,27-,53-

3A(120mils)

1

R75

4.12K_1%

2

1

R76

10K_1%

2

+V1.1S

POWERPAD_2_0610

1

2

PAD2

C105

220uF_2.5V

10-,12-,13-,18-,19-,20-,21-,22-,23-,53-

7-,9-,10-,11-,12-,13-,38-

C482

1

0.1uF_16V

2

C284

0.1uF_16V

+V5A

+V1.5S

48-

1A

+V1.8

U4

PWR_GOOD_3

R102

0_5%

8-,9-,10-,11-,14-

1

12

2

4

ANPEC_APL5910KAI_TRL_SOP_8P

1

C133

10uF_6.3V

2

POK EN FB

VIN3VOUT

VCNTL

9

GND

8

GND

7 6 5

NC

1

R103

9.1K_1%

2

1

R104

10K_1%

2

1

2

C132

10uF_6.3V

INVENTEC

TITLE

PIAGET_UMA

POWER

CHANGE by

Kevin Hsiao 18-Mar-2009

SIZE CODE

A3

CS

SHEET OF

DOC. NUMBER

1310A2252201 A01

REV

5611

+VBATR

5-,7-,9-,10-,11-,13-,29-,34-,53-

V18_GOOD

SLP_S5#_5R

+V5A

7-,9-,10-,11-,13-,38-

R668

12

10_5%

13-

R667

12

13-

0_5%

C736

1 2

1uF_6.3v

P2U

C735

1uF_6.3V

1 2

17000GND

U514

1

2 3

19

23

21

4 24 22

10

25

OVP

PGOOD1 PGOOD2

VDD

VCC

AGND

STDBY SHDN SKIP

REFIN

GND

PGND1

PGND2

VTTS VTTR

14

TON

17

BST

15

DH

16

LX

18

DL

20

13

CSH

12

CSL

11

FB

9

VTTI

7 8

VTT

5 6

MAX_MAX17000ETG+_TQFN_24P

R690

12

0_5%

R689

12

0_5%

P2U

C758

P2U

1

2

1uF_6.3v

C734

10uF_6.3V

17000GND

C757

12

0.1uF_16V

P_1.8_FB

1 2

+V0.9S

10uF_6.3V

1

R688

200K_5%

2

P_1.8_DH

P_1.8_LX

P_1.8_DL

M_VREF

19-,23-

21-,22-

P2U

C733

1 2

C115

1 2

0.033uF_16V

2A(80mils)

Q27

FDMC8884

Q23

FDMC8296

5

76

G

4

G

41S23

Kelvin sense

VTT IN

C777

1

8

2

D

0.1uF_25V_OPEN

S

123

R86

0402_OPEN

8765

1

D

2

C114

1 2

0402_OPEN

C164

1 2

4.7uF_25v

L519

12

PCMC063T_1R5MN

P2L

1

R109

9.09K_1%

2

R110

12

1.3K_1%

C755

1

2

0.22uF_16V

1 2

C163

1 2

4.7uF_25v

R686

8.45K_1%

C778

2200pF_50V_OPEN

1

P2U

2

1

10K_5%

2

17000GND

10-,11-,13-,18-,19-,20-,21-,22-,23-,53-

POWERPAD_2_0610

1

2

C759

330uF_2V_9mR_Panasonic

R685

+V1.8

8A(320mils)

PAD502

NOTE: DDR2 REGULATOR

CHANGE by

INVENTEC

TITLE

PIAGET_UMA

DDR2 POWER

DOC. NUMBER

CODE

SIZE

A3

CS

SHEET

18-Mar-2009Kevin Hsiao

12 56

REV

A011310A2252201

OF

GATE_5S

+V5A

7-,9-,10-,11-,12-,13-,38-

6 5 2

1

13-

Q525

D

G

FDC655BN

+V5S

8-,14-,20-,28-,29-,31-,32-,35-,37-,42-,43-,47-,53-

4A(160mils)

4

S

3

1

R707

47_5%

2

Q524

3

D

1

G

S

2

SSM3K7002F

C770

1 2

10uF_6.3v

GATE_5S

+V3A

5-,7-,9-,14-,31-,32-,33-,35-,45-,47-,50-,53-

Q538

6

D

5 2

1

G

FDC655BN

C831

12

1000pF_50V_OPEN

13-

+V3S

7-,8-,10-,14-,15-,20-,21-,22-,26-,27-,28-,29-,30-,31-,32-,33-,34-,36-,39-,40-,41-,44-,45-,47-,48-,52-,53-

+V1.8

GATE_3S

10-,11-,12-,18-,19-,20-,21-,22-,23-,53-

Q22

6

D

S

5

2

1

G

FDC655BN

13-

4A(160mils)

4

S

3

47_5%

R806

Q539 1

G

1

2

1

2

3

D

S

2

SSM3K7002F

C203

100uF_6.3V

4

3

2A(80mils)

C135

1 2

1000pF_50v

Q519

1

G

+V1.8S

14-,18-,24-,26-,27-,32-,53-

1

R105

47_5%

2

3

D

S

2

SSM3K7002F

C134

1 2

10uF_6.3v

13-,14-,28-

SLP_S3_5R

V18_GOOD

SLP_S3#_3R

13-,14-,28-

12-

5-,8-,32-,34-,43-,45-,48-

1

R818

100K_5%

2

R746

12

4.7K_5%

Q532 1

G

SSM3K7002F

Q529

G

1

SSM3K7002F

3

D

S

2 3

D

S

2

+VBATR

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

1

R744

100K_5%

2

1

R745

470K_5%

2

+VBATR

5-,7-,9-,10-,11-,12-,13-,29-,34-,53-

E

Q530

B

D-MMST3906

C

R148

12

100K_5%

R149

12

470_5%

1

C189

2200pF_50v

2

1

R147

20K_5%

2

13-

GATE_5S SLP_S5#_3R

13-

GATE_3S

32-,38-

Q18

1

G

SSM3K7002F

Q19

G

1

SSM3K7002F

3

D

S

2

3

D

S

2

CHANGE by

+V5A

7-,9-,10-,11-,12-,13-,38-

1

R100

10K_5%

2

Kevin Hsiao 17-Jan-2009

+V5A

7-,9-,10-,11-,12-,13-,38-

1

R101

3K_5%

2

12-

45-

SLP_S5#_5R

SLP_S5_FPR

INVENTEC

TITLE

PIAGET_UMA

POWER(Sleep)

SIZE

CODE DOC. NUMBER

A3

CS

SHEET

1310A2252201 A01

13

REV

OF

56

+V1.8S

13-,18-,24-,26-,27-,32-,53-

8-,13-,20-,28-,29-,31-,32-,35-,37-,42-,43-,47-,53-

+V5S

R201

12

100K_1%

R199

12

280K_1%

C233

1000pF_50v

SLP_S3_5R

+V3S

R202

2

1

1M_5%

5-,7-,9-,13-,31-,32-,33-,35-,45-,47-,50-,53-

R204

U13

1

+

OUT

3

-

2

R200

20K_5%

12

1

R203

2

54.9K_1%

2

13-,28-

SSM3K7002F

Q541 1

G

2VREF

5-,7-

R206

12

100K_1%

3

D

S

2

1 2

1

100K_1%

C234

4700pF_25v

+V3A

5

4

TI_LMV331IDBVR_SOT23_5P

2

C232

1 2

0.1uF_16v

7-,8-,10-,13-,15-,20-,21-,22-,26-,27-,28-,29-,30-,31-,32-,33-,34-,36-,39-,40-,41-,44-,45-,47-,48-,52-,53-

1

R205

1.2K_1%

2

8-,9-,10-,11-

PWR_GOOD_3

INVENTEC

TITLE

PIAGET_UMA

POWER(Sequence)

CODE

CHANGE by

Kevin Hsiao 17-Jan-2009

SIZE

A3

DOC. NUMBER

1310A2252201 A01

CS

SHEET

REV

OF

5614

7-,8-,10-,13-,14-,15-,20-,21-,22-,26-,27-,28-,29-,30-,31-,32-,33-,34-,36-,39-,40-,41-,44-,45-,47-,48-,52-,53-

SB_3S_SMCLK

SB_3S_SMDATA

CLK_R_PCIE_NEWCARD#

CLK_R_PCIE_NEWCARD

CLK_R_PCIE_MINICARD1#

CLK_R_PCIE_MINICARD1

CLK_R_PCIE_LAN#

7-,8-,10-,13-,14-,15-,20-,21-,22-,26-,27-,28-,29-,30-,31-,32-,33-,34-,36-,39-,40-,41-,44-,45-,47-,48-,52-,53-

+V3S_CLK

15-

CLK_R_PCIE_LAN

CPPE_NC#

SSM3K7002F

32-,48-

+V3S

1

G

D

3

Q29

20-,21-,22-,32-,3620-,21-,22-,32-,36-

4848-

4747-

4545-

S

2

+V3S_CLK

15-

1

R754

10K_5%

2

R753

12

10K_5%

+V3S

12

600OHM_25%

1

R755

10K_5%

2

CLK_DVI#

CLK_R_PCIE_ALINK#

CLK_R_PCIE_ALINK

CLK_R_PCIE_SB#

CLK_R_PCIE_SB

+V3S_CLK

CLK_48M_0 CLK_48M_1

15-

C813

1 2

0.1uF_16v

C814

1 2

0.1uF_16v

R717

12

33_5%

R718

12

33_5%

1

R128

8.2K_5%

2

2626-

C817

1 2

0.1uF_16v

C811

1 2

0.1uF_16v

1

C780

2

1

C782

2

NBHT_CLK NBHT_CLK#

1

R126

8.2K_5%_OPEN

2

L524

C820

22uF_6.3v

C779

1 2

0.1uF_16v

+V3S_CLK

15-

U522

1

SMBCLK

2

SMBDAT

4

SRC7C_LPRS_27MHZ_NS

5

SRC7T_LPRS_27MHZ_SS

45

SRC6C_SATAC_LPRS

46

SRC6T_SATAT_LPRS

7

SRC5C_LPRS

8

SRC5T_LPRS

9

SRC4C_LPRS

10

SRC4T_LPRS

13

SRC3C_LPRS

14

SRC3T_LPRS

15

SRC2C_LPRS

16

SRC2T_LPRS

20

SRC1C_LPRS

21

SRC1T_LPRS

22

SRC0C_LPRS

23

SRC0T_LPRS

42

CLKREQ4#

43

CLKREQ3#

50

CLKREQ2#

51

CLKREQ1#

24

CLKREQ0#

25

ATIG2C_LPRS

26

ATIG2T_LPRS

30

ATIG1C_LPRS

31

ATIG1T_LPRS

32

ATIG0C_LPRS

33

ATIG0T_LPRS

34

SB_SRC1C_LPRS

35

SB_SRC1T_LPRS

39

SB_SRC0C_LPRS

40

SB_SRC0T_LPRS

41

SB_SRC_SLOW#

67

X1

68

X2

1 2

47- 18-

WL_OFF

2626-

CLK_DVI

26263030-

CLKGEN_X1 CLKGEN_X2

ICS_ICS9LPRS476KLFT_MLF_72P

1 2

0.047uF_10v

+V3S_CLK

15-

L523

BLM11A121S

12

C816

0.1uF_16v

C818

1 2

L15

BLM11A121S

1

2

C176

2.2uF_6.3V

+V3S_CLK_VDDA

C819

1 2

2.2uF_6.3V

VDDSB_SRC

VDDATIG

VDDSATA

VDDCPU_IO

VDDSB_SRC_IO

VDDATIG_IO

VDDSRC_IO VDDSRC_IO

48MHZ_0 48MHZ_1

HTT0T_LPRS_66M

HTT0C_LPRS_66M

CPUKG0T_LPRS

CPUKG0C_LPRS

REF0_SEL_HTT66

REF1_SEL_SATA

REF2_SEL_27

GNDSATA

GNDSB_SRC

GNDATIG

THERMAL-PAD

C810

0.047uF_10v

+V3S_CLK_VDDREF

1 2

49

VDDA

69

VDD48

3

VDDDOT

62

VDDREF

61

VDDHTT

54

VDDCPU

38 29 17

VDDSRC

44 53 37 28 18 12

71 70 60 59 56 55

57

PD#

65 64 63

72

GND48

66

GNDREF

58

GNDHTT

52

GNDCPU

48

GNDA

47 36 27 19

GNDSRC

11

GNDSRC

6

GNDDOT

73

1 2

7pF_50V

CLK_KBC&SB14

C158

0.1uF_16v

+V1.2S_CLK_IO

C785

0.047uF_10v

1

R721

261_1%_OPEN

2

1

R720

8.2K_5%

2

C786

1 2

47pF_50V

+V1.2S_CLK_IO

C809

1 2

47pF_50V

32-

CLK_R3S_SB48

40-

CLK_R3S_FM48

18-

CLK_R_CPUBCLK

CLK_R_CPUBCLK#

R719

12

33_5%

1 2

C815

1 2

1uF_6.3V

C157

22pF_50V

BLM11A121S

C812

1 2

10uF_6.3V

2

1 2

L526

12

R124

1K_5%

C156

22pF_50V

+V1.2S

9-,11-,18-,19-,27-,30-,31-,53-

+V3S_CLK

15-

1

1 2

C784

22pF_50V

30-

SB700_L18

15-

CLK_R3S_NB14

34-

CLK_R3S_KBC14

X501

1 2

C783

33pF_50v

12

14.318MHz

30PPM

1 2

C781

33pF_50v

Place close to CLKGEN within 500mils

NBGFX_CLK

R127

1

R125

90.9_1%

2

12

158_1%

15-

CLK_R3S_NB14

26-

INVENTEC

TITLE

PIAGET_UMA

CLOCK_GENERATOR

SIZE CODE DOC. NUMBER

A3

CS

CHANGE by OF

12-Feb-2009Kevin Hsiao

SHEET

15 56

REV

A011310A2252201

L0_CLKIN1

L0_CLKIN1#

L0_CLKIN0

L0_CLKIN0#

L0_CTLIN1

L0_CTLIN1#

L0_CTLIN0

L0_CTLIN0#

L0_CADIN15

L0_CADIN15#

L0_CADIN14

L0_CADIN14#

L0_CADIN13

L0_CADIN13#

L0_CADIN12

L0_CADIN12#

L0_CADIN11

L0_CADIN11#

L0_CADIN10

L0_CADIN10#

L0_CADIN9

L0_CADIN9#

L0_CADIN8

L0_CADIN8#

L0_CADIN7

L0_CADIN7#

L0_CADIN6

L0_CADIN6#

L0_CADIN5

L0_CADIN5#

L0_CADIN4

L0_CADIN4#

L0_CADIN3

L0_CADIN3#

L0_CADIN2

L0_CADIN2#

L0_CADIN1

L0_CADIN1#

L0_CADIN0

L0_CADIN0#

24242424-

24242424242424242424242424242424-

24242424242424- 242424242424242424- 2424-

CN10-1

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

N5

L0_CADIN_H15

P5

L0_CADIN_L15

M3

L0_CADIN_H14

M4

L0_CADIN_L14

L5

L0_CADIN_H13

M5

L0_CADIN_L13

K3

L0_CADIN_H12

K4

L0_CADIN_L12

H3

L0_CADIN_H11

H4

L0_CADIN_L11

G5

L0_CADIN_H10

H5

L0_CADIN_L10

F3

L0_CADIN_H9

F4

L0_CADIN_L9

E5

L0_CADIN_H8

F5

L0_CADIN_L8

N3

L0_CADIN_H7

N2

L0_CADIN_L7

L1

L0_CADIN_H6

M1

L0_CADIN_L6

L3

L0_CADIN_H5

L2

L0_CADIN_L5

J1

L0_CADIN_H4

K1

L0_CADIN_L4

G1

L0_CADIN_H3

H1

L0_CADIN_L3

G3

L0_CADIN_H2

G2

L0_CADIN_L2

E1

L0_CADIN_H1

F1

L0_CADIN_L1

E3

L0_CADIN_H0

E2

L0_CADIN_L0

L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1 L0_CTLOUT_L1 L0_CTLOUT_H0 L0_CTLOUT_L0

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8

HYPERTRANSPORT

L0_CADOUT_L8

L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0

Y4 Y3 Y1 W1

T5 R5 R2 R3

T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3

T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1

FOX_PZ63823_284S_41F_TEMP_638P

24-

L0_CLKOUT1

24-

L0_CLKOUT1#

24-

L0_CLKOUT0

24-

L0_CLKOUT0#

24-

L0_CTLOUT1

24-

L0_CTLOUT1#

24-

L0_CTLOUT0

24-

L0_CTLOUT0#

24-

L0_CADOUT15

24-

L0_CADOUT15#

24-

L0_CADOUT14

24-

L0_CADOUT14#

24-

L0_CADOUT13

24-

L0_CADOUT13#

24-

L0_CADOUT12

24-

L0_CADOUT12#

24-

L0_CADOUT11

24-

L0_CADOUT11#

24-

L0_CADOUT10

24-

L0_CADOUT10#

24-

L0_CADOUT9

24-

L0_CADOUT9#

24-

L0_CADOUT8

24-

L0_CADOUT8#

24-

L0_CADOUT7

24-

L0_CADOUT7#

24-

L0_CADOUT6

24-

L0_CADOUT6#

24-

L0_CADOUT5

24-

L0_CADOUT5# L0_CADOUT4

24-

L0_CADOUT4#

24-

L0_CADOUT3

24-

L0_CADOUT3#

24-

L0_CADOUT2

24-

L0_CADOUT2#

24-

L0_CADOUT1

24-

L0_CADOUT1# L0_CADOUT0

24-

L0_CADOUT0#

A1

AF1

S1

Top View

A26

Layout: Add stitching caps if crossing plane split.

CHANGE by

Kevin Hsiao 17-Jan-2009

INVENTEC

TITLE

PIAGET_UMA

CPU-1

DOC. NUMBER REVSIZE

CODE

A3

1310A2252201 A01

CS

SHEET

OF

5616

MA_CLK_DDR2

MA_CLK_DDR2#

MA_CLK_DDR1

MA_CLK_DDR1#

MA_CS1# MA_CS0#

MA_ODT1 MA_ODT0

MA_CAS#

MA_WE#

MA_RAS#

MA_BA2 MA_BA1 MA_BA0

MA_CKE1 MA_CKE0

MA_A(15:0)

MA_DQS(7)

MA_DQS#(7)

MA_DQS(6)

MA_DQS#(6)

MA_DQS(5)

MA_DQS#(5)

MA_DQS(4)

MA_DQS#(4)

MA_DQS(3)

MA_DQS#(3)

MA_DQS(2)

MA_DQS#(2)

MA_DQS(1)

MA_DQS#(1)

MA_DQS(0)

MA_DQS#(0)

MA_DM(7:0)

CN10-2

P19

MA_CLK_H3

N19

MA_CLK_H0

N20

MA_CLK_L0

P20

MA_CLK_L3

21212121-

21-,2321-,23-

21-,23-

21-,2321-,2321-,23-

21-,2321-,2321-,23- 22-,23-

MA_A(15) MA_A(14) MA_A(13) MA_A(12) MA_A(11) MA_A(10) MA_A(9) MA_A(8) MA_A(7) MA_A(6) MA_A(5) MA_A(4) MA_A(3) MA_A(2) MA_A(1) MA_A(0)

21-

MA_DQS(7)

21-

MA_DQS#(7)

21-

MA_DQS(6)

21-

MA_DQS#(6)

21-

MA_DQS(5)

21-

MA_DQS#(5)

21-

MA_DQS(4)

21-

MA_DQS#(4)

21-

MA_DQS(3)

21-

MA_DQS#(3)

21-

MA_DQS(2)

21-

MA_DQS#(2)

21-

MA_DQS(1)

21-

MA_DQS#(1)

21-

MA_DQS(0)

21-

MA_DQS#(0)

21-

MA_DM(7) MA_DM(6) MA_DM(5) MA_DM(4) MA_DM(3) MA_DM(2) MA_DM(1) MA_DM(0)

Y16

MA_CLK_H2

AA16

MA_CLK_L2

E16

MA_CLK_H1

F16

MA_CLK_L1

V20

MA1_CS_L1

U20

MA1_CS_L0

U19

MA0_CS_L1

T20

MA0_CS_L0

V22

MA0_ODT1

T19

MA0_ODT0

V19

MA1_ODT1

U21

MA1_ODT0

T22

MA_CAS_L

T24

MA_WE_L

R19

MA_RAS_L

J21

MA_BANK2

R23

MA_BANK1

R20

MA_BANK0

J20

MA_CKE1

J22

MA_CKE0

K19

MA_ADD15

K24

MA_ADD14

V24

MA_ADD13

K20

MA_ADD12

L22

MA_ADD11

R21

MA_ADD10

K22

MA_ADD9

L19

MA_ADD8

L21

MA_ADD7

M24

MA_ADD6

L20

MA_ADD5

M22

MA_ADD4

M19

MA_ADD3

N22

MA_ADD2

M20

MA_ADD1

N21

MA_ADD0

W12

MA_DQS_H7

W13

MA_DQS_L7

Y15

MA_DQS_H6

W15

MA_DQS_L6

AB19

MA_DQS_H5

AB20

MA_DQS_L5

AD23

MA_DQS_H4

AC23

MA_DQS_L4

G22

MA_DQS_H3

G21

MA_DQS_L3

C22

MA_DQS_H2

C21

MA_DQS_L2

G16

MA_DQS_H1

G15

MA_DQS_L1

G13

MA_DQS_H0

H13

MA_DQS_L0

Y13

MA_DM7

AB16

MA_DM6

Y19

MA_DM5

AC24

MA_DM4

F24

MA_DM3

E19

MA_DM2

C15

MA_DM1

E12

MA_DM0

FOX_PZ63823_284S_41F_TEMP_638P

MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54

MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32

MEMORY INTERFACE

MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10

MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0

AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15

AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12

MA_DATA(63) MA_DATA(62) MA_DATA(61) MA_DATA(60) MA_DATA(59) MA_DATA(58) MA_DATA(57) MA_DATA(56) MA_DATA(55) MA_DATA(54)

MA_DATA(53) MA_DATA(52) MA_DATA(51) MA_DATA(50) MA_DATA(49) MA_DATA(48) MA_DATA(47) MA_DATA(46) MA_DATA(45) MA_DATA(44) MA_DATA(43) MA_DATA(42) MA_DATA(41) MA_DATA(40) MA_DATA(39) MA_DATA(38) MA_DATA(37) MA_DATA(36) MA_DATA(35) MA_DATA(34) MA_DATA(33) MA_DATA(32) MA_DATA(31) MA_DATA(30) MA_DATA(29) MA_DATA(28) MA_DATA(27) MA_DATA(26) MA_DATA(25) MA_DATA(24) MA_DATA(23) MA_DATA(22) MA_DATA(21) MA_DATA(20) MA_DATA(19) MA_DATA(18) MA_DATA(17) MA_DATA(16) MA_DATA(15) MA_DATA(14) MA_DATA(13) MA_DATA(12) MA_DATA(11) MA_DATA(10)

MA_DATA(9) MA_DATA(8) MA_DATA(7) MA_DATA(6) MA_DATA(5) MA_DATA(4) MA_DATA(3) MA_DATA(2) MA_DATA(1) MA_DATA(0)

MB_CS1# MB_CS0#

MB_ODT1 MB_ODT0

MB_CAS#

MB_WE#

MB_RAS#

MB_BA2 MB_BA1 MB_BA0

MB_CKE1 MB_CKE0

22222222-

22-,2322-,23-

22-,2322-,23-21-,2322-,23-

22-,2322-,2322-,23-

22-,2322-,23-

222222222222222222222222222222- C12 2222-

21- 22-

MA_DATA(63:0)

MB_CLK_DDR2

MB_CLK_DDR2#

MB_CLK_DDR1

MB_CLK_DDR1#

MB_A(15:0)

MB_DQS(7)

MB_DQS#(7)

MB_DQS(6)

MB_DQS#(6)

MB_DQS(5)

MB_DQS#(5)

MB_DQS(4)

MB_DQS#(4)

MB_DQS(3)

MB_DQS#(3)

MB_DQS(2)

MB_DQS#(2)

MB_DQS(1)

MB_DQS#(1)

MB_DQS(0)

MB_DQS#(0)

MB_DM(7:0)

MB_A(15) MB_A(14) MB_A(13) MB_A(12) MB_A(11) MB_A(10)

MB_A(9) MB_A(8) MB_A(7) MB_A(6) MB_A(5) MB_A(4) MB_A(3) MB_A(2) MB_A(1) MB_A(0)

MB_DQS(7) MB_DQS#(7) MB_DQS(6) MB_DQS#(6) MB_DQS(5) MB_DQS#(5) MB_DQS(4) MB_DQS#(4) MB_DQS(3) MB_DQS#(3) MB_DQS(2) MB_DQS#(2) MB_DQS(1) MB_DQS#(1) MB_DQS(0) MB_DQS#(0)

MB_DM(7) MB_DM(6) MB_DM(5) MB_DM(4) MB_DM(3) MB_DM(2) MB_DM(1) MB_DM(0)

CN10-3

R26

MB_CLK_H3

P22

MB_CLK_H0

R22

MB_CLK_L0

R25

MB_CLK_L3

AF18

MB_CLK_H2

AF17

MB_CLK_L2

A17

MB_CLK_H1

A18

MB_CLK_L1

U22

MB1_CS_L0

W25

MB0_CS_L1

V26

MB0_CS_L0

W23

MB0_ODT1

W26

MB0_ODT0

Y26

MB1_ODT0

U24

MB_CAS_L

U23

MB_WE_L

U25

MB_RAS_L

J26

MB_BANK2

U26

MB_BANK1

R24

MB_BANK0

H26

MB_CKE1

J25

MB_CKE0

J24

MB_ADD15

J23

MB_ADD14

W24

MB_ADD13

L25

MB_ADD12

L26

MB_ADD11

T26

MB_ADD10

K26

MB_ADD9

M26

MB_ADD8

L24

MB_ADD7

N25

MB_ADD6

L23

MB_ADD5

N26

MB_ADD4

N23

MB_ADD3

P26

MB_ADD2

N24

MB_ADD1

P24

MB_ADD0

AF12

MB_DQS_H7

AE12

MB_DQS_L7

AE16

MB_DQS_H6

AD16

MB_DQS_L6

AF21

MB_DQS_H5

AF22

MB_DQS_L5

AC25

MB_DQS_H4

AC26

MB_DQS_L4

F26

MB_DQS_H3

E26

MB_DQS_L3

A24

MB_DQS_H2

A23

MA_DQS_L2

D16

MB_DQS_H1

C16

MA_DQS_L1 MB_DQS_H0

B12

MA_DQS_L0

AD12

MB_DM7

AC16

MB_DM6

AE22

MB_DM5

AB26

MB_DM4

E25

MB_DM3

A22

MB_DM2

B16

MB_DM1

A12

MB_DM0

FOX_PZ63823_284S_41F_TEMP_638P

MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54

MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31

MEMORY INTERFACE

MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10

MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0

AD11 AF11 AF14 AE14 Y11 AB11 AC12 AF13 AF15 AF16

AC18 AF19 AD14 AC14 AE18 AD18 AD20 AC20 AF23 AF24 AF20 AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24 G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11

MB_DATA(63) MB_DATA(62) MB_DATA(61) MB_DATA(60) MB_DATA(59) MB_DATA(58) MB_DATA(57) MB_DATA(56) MB_DATA(55) MB_DATA(54)

MB_DATA(53) MB_DATA(52) MB_DATA(51) MB_DATA(50) MB_DATA(49) MB_DATA(48) MB_DATA(47) MB_DATA(46) MB_DATA(45) MB_DATA(44) MB_DATA(43) MB_DATA(42) MB_DATA(41) MB_DATA(40) MB_DATA(39) MB_DATA(38) MB_DATA(37) MB_DATA(36) MB_DATA(35) MB_DATA(34) MB_DATA(33) MB_DATA(32) MB_DATA(31) MB_DATA(30) MB_DATA(29) MB_DATA(28) MB_DATA(27) MB_DATA(26) MB_DATA(25) MB_DATA(24) MB_DATA(23) MB_DATA(22) MB_DATA(21) MB_DATA(20) MB_DATA(19) MB_DATA(18) MB_DATA(17) MB_DATA(16) MB_DATA(15) MB_DATA(14) MB_DATA(13) MB_DATA(12) MB_DATA(11) MB_DATA(10) MB_DATA(9) MB_DATA(8) MB_DATA(7) MB_DATA(6) MB_DATA(5) MB_DATA(4) MB_DATA(3) MB_DATA(2) MB_DATA(1) MB_DATA(0)

MB_DATA(63:0)

INVENTEC

TITLE

PIAGET_UMA

CPU-2

SIZE CODE DOC. NUMBER REV

CHANGE by SHEET OF

17-Jan-2009Kevin Hsiao

A3

CS

1310A2252201

17 56

A01