THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC
8
CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION,2009 ALL RIGHT RESERVED.
7 6 5 4 3 2 1
HSF Property:ROHS or Halogen-Free(5L3?)
E
F F
E
LEPUS
D
D
SODIMM_EDP
2011.10.13
C
LEPUS MB P/N:6050A2501101
CPU STAND OFF:
STAND OFF:6052B0205101
B
S4501 ,S4502,S4503
C
B
A
24-AUG-2011
DATE CHANGE NO.
8
REV
7 6 5 4 3
DRAWER
DESIGN
CHECK
RESPONSIBLE
SIZE=
FILE NAME:
P/N
XXX
POWER
2
VER:
A
DATE DATE EE
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
LEPUS
SIZE
CODE
C
CS
SHEET
DOC.NUMBER REV
1310xxxxx-0-0
1
of
1
X01
39
8 7
6 5
Index
4
3 2 1
D
01
02
03
04
05
06
08
09
10
11
12
13
14
Project Name
Page Index
Block Diagram
Charger
SELECTOR
P3V3, P5V0
P1V5 07
P1V05S_VCCP
P1V8S
PVSA
PVCORE-1
PVCORE-2
PORT
P3V3S, P5V0S
26 PCH-3
27
PCH-4
28 PCH-5
29
30
31
32
33
34
35
36
37
38
39
PCH-6
PCH-7
PCH-8
PCH-9
EC
KB & TP & USB PWR SW
EDP
AUDIO CODEC
WWAN OPTION
TO DB BTB CONN
SCREW
D
C C
15
16
B
17
18
19
20
21
22
23
24
25
CPU-1
CPU-2
CPU-3
CPU-4
CPU-5
CPU-6
Thermal & Fan
DDR3-1
XDP
PCH-1
PCH-2
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PAGE INDEX
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
2
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
D
HDMI
CPU
DDR3
DDR3 SO-DIMM
P.22
D
IO DB
P.38
HDMI
FDI
BGA 1023PIN
P.15 ~ P.20
DMI
EDP
USB5
USB 2.0
EDP CONN
P.35
WEBCAM
WLAN COMBO
PCI-E DB
P.38USB8P.35
C C
PCH
MSATA
PCI-E DB
P.38
B
AUDIO CODEC
SATA
HDA
IDT 92HD91
P.36
JACK COMBO
IO DB
SPKR
CONN
P.36 P.38
TI CHARGER
BQ24725
P.4
BATTERY CONN
P.5
PANTHER POINT
FCBGA 989 PIN
P.24 ~ P.32
LPC
SMBUS
SPI(HSPI)
ITE KBC
8517E
P.33
KEY BOARD
P.34
TOUCH
SPI
SMBUS
PAD
P.34
USB 3.0
SPI ROM
TERMAL
LID SW
IO DB
USB3.0 CONN
IO DB
USB2
4MB
P.33
METER
P.21
P.38 P.38
P.38
USB3.0 CONN
PCI-E DB
USB3
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
Block Diagram
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
3
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
D
B
PVADPTR
1 2
C6014
CSC0805_DY
1
R6018
2
3.32K_1%_3
PVADPTR
1 2
C6018
L6015
NFE31PT222Z1E9L
1 2
1 2
3
4
1 2
C6017
0.1UF_25V_2
1000PF_50V_2
1 2
C6016
0.1UF_25V_2
C6015
1000PF_50V_2
JACK6015
SINGA_2WA1571_004111_4P
1
1
2
2
3
3
4
4
G1
G
G2
G
D
R6015
1 2
4.7K_5%_3
R6014
1 2
RSC_0603_DY
Q6010
8
D
7
6
5 4
NMOS_4D3S
AM4410NC
C6030
1 2
2200PF_50V_2
1
AC_OK
P3V3AL
2
R6013
10K_5%_3
1
R6019
2
RSC_1206_DY
RSC_1206_DY
R6002
20.5K_1%_2
1 2
33
OUT
1
S
2
3
G
C6031
1 2
0.1UF_25V_3
R6006
1 2
RSC_0603_DY
R6004
4.3K_5%_2
1 2
R6005
4.3K_5%_2
1 2
MODIFY 20111013
OUT
33
33
I_ADP
100PF_50V_2
5
BI
5
BI
C6037
NEAR EC
BATT_DAT
BATT_CLK
1
2
1
C6036
100PF_50V_2
NEAR IC
2
C6035
CSC0402_DY
R6016
1 2
0_5%_2
R6017
1 2
0_5%_2
1
2
R6003
2
1
33
1
C6029
CSC0603_DY
2
MODIFY 20111013
8
7 6
1
S
2
3
G
NMOS_4D3S
AM4410NC
Q6011
8
D
7
6
5 4
C6034
CSC0402_DY
1 2
3
D6002
DIODES_BAV99
0.1UF_25V_3
TI_BQ24725RGRR_QFN_20P
P3V3AL
1 2
R6007
110K_5%_2
1 2
R6008
30K_5%_2
1 2
C6021
U6000
6
ACDET
7
IOUT
8
SDA
9
SCL
10
ILIM
1 2
C6032
0.1UF_16V_2
R6000
1 2
3 4
0.01_1%_6
C6020
1 2
0.1UF_16V_2
PVADPTR
1 2
415
2
3
CMSRC
ACP
ACOK
ACDRV
BATDRV
GND
SRN
SRP
12
13
14
11
1 2
ACN
TML
VCC
PHASE
HIDRV
BTST
REGN
LODRV
15
C6028
1UF_10V_2
D6000
1 2
C6022
0.1UF_25V_3
C6026
1UF_25V_3
1 2
21
20
19
18
17
1 2
16
1 2
R6020
SHORT_0603
1 2
D6001
BAT54C_30V_0.2A
R6011
1 2
SHORT_0402
R6010
6.98_1%_2
R6009
1 2
4.3K_5%_2
5 4
A2 A1
C
BAT54C_30V_0.2A
3
R6012
10_5%_5
1 2
VRCHARGER_HG
VRCHARGER_PH
C6027
1 2
3
0.047UF_16V_2
C
A2 A1
VRCHARGER_LG
1 2
PVBAT
1 2
1 2
POWERPAD_2_0610
5 4
AON7410
NMOS_4D3S
G
2
3
5 4
AON7410
NMOS_4D3S
G
2
3
PAD6000
876
Q6000
D
S
1
876
Q6001
D
S
1
PVPACK
1 2
C6001
Q6012
8
D
7
6
5 4
NMOS_4D3S
TPCA8065_H
1
S
2
3
G
1 2
C6002
10UF_25V_5470PF_50V_2
C6033
1 2
0.1UF_25V_3
C C
B
L6000
1 2
ETQP3W4R7WFN
SBR3U40P1_DY
R7600
RSC_0603_DY
1 2
1 2
C7600
CSC0402_DY
1 2
1 2
D6700
C6024
R6001
1 2
3 4
0.01_1%_6
C6023
1 2
0.1UF_16V_2
0.1UF_25V_3
1 2
C6011
10UF_25V_5
1 2
C6010
10UF_25V_5
1 2
C6025
0.1UF_25V_3
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CHARGER
CHANGE by
XXX
DATE
24-AUG-2011
2 3
SIZE
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
4
of
39
CODE
A3
1
REV
X01
8 7
6 5
4
3 2 1
D
P3V3AL
1 2
R6052
2 1
2.2K_5%_2
BI
BI
BATT_DAT
BATT_CLK
4
33
4
33
P3V3AL
R6050
2 1
2.2K_5%_2
C6051
2 1
100_5%_2
100PF_50V_2
R6051
D6051
C6052
PHP_PESD5V0S1BB_SOD523_2P
2 1
R6053
100_5%_2
100PF_50V_2
2 1
2 1
1 2
D6052
2 1
2 1
C6054
2 1
100PF_50V_2
PHP_PESD5V0S1BB_SOD523_2P
R6057
100_5%_2
1 2
D6055
2 1
PHP_PESD5V0S1BB_SOD523_2P
2 1
PVPACK
CN6050
SINGA_2WA1554_107111_7P
G1
1
2
3
4
5
6
7
G
1
2
3
4
5
6
7
G2
G
D
C C
P3V3AL
2 1
2 1
2 1
2 1
3
3
3
C6050
B
D6057
BAV99W_7_F
D6056
BAV99W_7_F
D6054
BAV99W_7_F
2 1
R6058
100K_5%_2
BATT_IN#
OUT
33
0.1UF_25V_2
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
SELECTOR
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
5
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
PVBAT
PAD6151
1 2
1 2
D
POWERPAD_2_0610
PAD6152
1 2
1 2
POWERPAD_2_0610
PVBAT
D
DELETE 20111013
VRP5V0A_VIN
1 2
OCP=8AMP OCP=8AMP
OUT
VRP3V3A
13
L6100
1 2
ETQP3W3R3WFN
1 2
1 2
+
C6100
R6100
6.8K_1%_2
1 2
220UF_6.3V
B
VO=((6.8K/10K)+1)*2
R6101
10K_1%_2
1 2
876
5 4
C6111
C6110
4.7UF_25V_5
10UF_25V_5
1 2
R7610
1 2
D
Q6100
NMOS_4D3S
AON7410
G
S S
2
3
1
876
5 4
D
Q6101
RSC_0603_DY
2
3
1
AON7702L
G
C6115
0.1UF_16V_2 2.2_5%_3
1 2
VRP3V3A_HG
VRP3V3A_PH
R6114
1 2
VRP3V3A_LG
1 2
13
OUT
R6110
5V_PG
73.2K_1%_2
C7610
13
OUT
VRP3V3A_LDO
CSC0402_DY
IN
TI_TPS51225RUKR_QFN_20P
U6100
VIN
9
10
8
SW2
11
4
6
5
7
PGOOD
3
VBST2
DRVH2
DRVL2
VFB2
EN2
CS2
VREG3
TMD
VBST1
DRVH1
SW1
DRVL1
VO1
VFB1
CS1
EN1
VCLK
VREG5
21
12
17
16
18
15
14
2
1
20
19
13
VRP5V0A_LDO
1 2
C6122
2.2_5%_3
1
VRP5V0A_HG
VRP5V0A_PH
VRP5V0A_LG
OUT
1UF_25V_3
R6155
13
2
C6155
0.1UF_16V_2
1 2
1 2
R6160
61.9K_1%_2
L6150
1 2
C6160
C6161
4.7UF_25V_5
10UF_25V_5
C C
VRP5V0A
1 2
R6150
OUT
13
1 2
8
7
6
5 4
D
NMOS_4D3S
AON7410
G
Q6150
S S
2
3
1
1 2
ETQP3W3R3WFN
AON7702L
D
876
5 4
1 2
Q6103
R7615
15.4K_1%_2
G
2
3
1
C7615
CSC0402_DY RSC_0603_DY
1 2
1 2
R6151
10K_1%_2
1 2
+
C6150
330UF_6.3V
B
1 2
C6121
1UF_6.3V_2
IN
EN_3V_5V
13
1
C6120
2
10UF_6.3V_3
VRP5V0A_CLK
OUT
13
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P3V3_P5V0
VO=((15.4K/10K)+1)*2
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
6
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
P5V0A
6 5
4
3 2 1
PVBAT
2 1
1 2
PAD6210
D
C6216
2 1
2.2UF_6.3V_2
U6200
15 12
VBST V5IN
VTT
TML
14
13
SW
11
10
20
9
2
3
1
4
5
21
DRVH
IN
IN
EN_P0V75
EN_P1V5
R6200
10K_1%_2
2 1
14
14
2 1
R6201
52.3K_1%_2
C6217
2 1
0.01UF_50V_2
B
C6218
2 1
0.1UF_16V_2
R6203
2 1
100K_5%_2
17
S3
16
S5
6
VREF
8
REFIN
7
GND
19
MODE
18
TRIP
2 1
TI_TPS51216RUKR_QFN_20P
R6202
75K_1%_2
DRVL
PGND
PGOOD
VDDQSNS
VLDOIN
VTTSNS
VTTGND
VTTREF
P0V75S
2 1
R6215
2.2_5%_3
VRP1V5_HG
VRP1V5_PH
VRP1V5_LG
P0V75M_VREF
C6220
2 1
10UF_6.3V_5
2 1
C6221
C6215
0.1UF_16V_2
0.22UF_6.3V_2
FDMC8884
2 1
678
Q6200
D
NMOS_4D3S
G
S S
3
214 5
C6211
2 1
4.7UF_25V_5
2 1
678
FDMS0310AS
Q6201
D
R7620
RSC_0603_DY
G
3
P1V5_PG
214 5
OUT
14
C7620
2 1
CSC0402_DY
C6210
2 1
L2
ETQP3W1R0WFN
POWERPAD_2_0610
D
10UF_25V_5
OCP=16AMP
2 1
2 1
4 3
4 3
2 1
1 2
PAD6220
POWERPAD1X1M
2 1
VRP1V5
+
C6200
13
OUT
C C
330UF_2V_9MR_PANA_-35%
B
VOUT=REFIN=1.8*(52.3K/(10K+52.3K))
MODE=100KOHM:TRACKING DISCHARGE
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P1V5
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
7
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
D
D
P5V0A
IN
EN_P1V0_VCCP
14
2 1
R6303
12K_5%_2
MODE=670KHZ
2 1
1 2
PAD6310
POWERPAD_2_0610
OUT
VCCIO_PG
P3V3A
R6306
10K_5%_2
R6307
RSC_0402_DY
TI_TPS51219RTER_QFN_16P
R6315
2.2_5%_3
17
16815
14
13
EN
BST
MODE
GND
SW
DH
DL
V5
PGND
7
1
2
3
4
C6319
U6300
VREF
REFIN
GSNS
VSNS
PWPD
PGOOD
TRIP
COMP
6
5
2 1
2 1
2 1
2 1
0.01UF_50V_2
2 1
12
VRP1V0_VCCP_PH
11
VRP1V0_VCCP_HG
10
VRP1V0_VCCP_LG
9
R6302
60.4K_1%_2
0.1UF_16V_2
P5V0A
C6316
2 1
C6315
2.2UF_6.3V_2
2 1
678
Q6300
FDMC8884
FDMS7692
D
NMOS_4D3S
G
S
3
214 5
CYN_PCMC063T_R68MN_4P-003
678
NMOS_4D3S
G
3
214 5
2 1
D
Q6301
R7630
S
C6311
2 1
10UF_25V_5
RSC_0603_DY
C7630
2 1
CSC0402_DY
L6300
C6310
2 1
CSC0805_DY
C C
OCP=13AMP
2 1
4 3
C6301
2 1
22UF_6.3V_5
C6300
2 1
22UF_6.3V_5
2 1
2 1
C6302
22UF_6.3V_5
VRP1V05S_VCCP
C6303
22UF_6.3V_5
2 1
13
OUT
C6304
22UF_6.3V_5
B
14
18
18
C6308
2 1
18
2.2UF_10V_3
VCCIO_SEL
IN
VSS_SENSE_VCCIO
IN
VCC_SENSE_VCCIO
IN
B
VOUT=1.05V@REFIN=3.3V; VOUT=1.0V@REFIN=GND
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P1V05S_VCCP
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
8
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
P3V3A
4
3 2 1
D
P3V3A
U6970
GMT_AT1530F11U_SOP8_8P
C6971
2 1
10UF_6.3V_3
R6970
10_5%_2
2 1
14
EN_P1V8
IN
8
VIN
1
VCC
5
EN
PGND
GND
C6972
6
2 1
0.1UF_16V_2
3
TML
LX
VRP1V8S_PH
FB
REF
9
7
4
2
C6973
2 1
L6970
PAN_ELL5PR2R2N
2 1
R6973
13K_1%_2
2 1
C6974
2 1
CSC0402_DY
C6970
2 1
R6972
2 1
10K_1%_2
0.1UF_16V_2
OCP=4.5AMP
VRP1V8S
MODIFY 20111013
VOUT=((13K/10K)+1)*0.8
22UF_6.3V_5
OUT
13
D
C C
B
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P1V8S
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
9
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
D
C6522
0.01UF_50V_2
C6520
2 1
C6521
3300PF_50V_2
2 1
D
2 1
0.22UF_6.3V_2
R6520
2 1
5.11K_1%_2
VCCSA_SENSE
19
IN
2 1
1
3
4
6
2
5
GND
VREF
VOUT
SLEW
MODE
V5DRV
18
COMP
U6500
V5FILT
PGOOD
16
VID0
VID1
EN
151417
13
25
TML
13 10 13
VRPVCCSA_IN
IN OUT
C6511
2 1
0.1UF_16V_2
IN
VRPVCCSA_IN
13 10
C6510
2 1
22UF_6.3V_5
24
23
VIN
22
VIN
21
PGND
20
PGND
19
PGND
B
R6521
33K_1%_2
7
SW VIN
8
SW
9
SW
10
SW
11
SW
12
BST
0.1UF_16V_2
TI_TPS51461RGER_QFN_24P
C6515
R6502
0_5%_2
R6524
0_5%_2
2 1
2 1
2 1
VRPVSA_PH
EN_PVCCSA
VCCSA_VID0
14
IN
19
IN
L6500
PCMC063T_R33MN
OCP=7AMP
2 1
4 3
2 1
C6500
C6501
2 1
2 1
C6502
2 1
VRPVSA
C C
C6503
22UF_6.3V_5_DY 22UF_6.3V_5 22UF_6.3V_5 22UF_6.3V_5
B
C6523
2 1
1UF_6.3V_2
C6524
2 1
1UF_6.3V_2
R6522
10K_5%_2
2 1
R6525
0_5%_2
2 1
VCCSA_VID1
19
IN
R6523
10K_5%_2
2 1
PVCCSA_PG
OUT
14
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PVSA
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
10
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
D
B
VREF_CPU
R6711
200K_1%_2
2 1
R6712
2 1
30K_1%_2
R6628
169K_1%_2
2 1
R6629
150K_1%_2
19
19
2 1
MODIFY 20111013
33
IN
8 7
IN
VREF_CPU
11
P3V3A
OUT
VREF_CPU
1 2
23
11
C6634
2.2UF_6.3V_2
18
TP6600
11
11
26
18
18
11
33
15
TP24
MODIFY 20111013
11
IN
11
2 1
C6633
2.2UF_6.3V_2
MODIFY 20111013
R6713
0_5%_2
IN
IN
GFX_VSS_SENSE
GFX_VCC_SENSE
1
1
2
2
0_5%_2
R6715
11
1
R6714
0_5%_2_DY
2
CPU_PWEN
2 2 1
R6630
0_5%_2
1
VR_ON
R6631
RSC_0402
OUT
11
8
IN
VREF_CPU
11
C6632
2 1
47PF_50V_2
R6625
2 1
8.45K_1%_2
R6626
62K_1%
2 1
VSSSENSE
R6627
56K_1%_2
2 1
13
GOCP-R
14
VREF
15
V3R3
IN
OUT
IN
OUT
BI
OUT
IN
1 2
R6716
0_5%_2_DY
VR_ON
VR_PWRGD
VR_SVID_CLK
VR_SVID_ALRT#
VR_SVID_DATA
H_PROCHOT#
PVAXG_PG
VREF_CPU
1
4.12K_1%_2
11
IN
16
17
18
19
20
21
22
23
24
C6726
47PF_50V_2
R6718
VREF_CPU
VR_ON
CPGOOD
VCLK
ALERT#
VDIO
VR_HOT#
SLEW
GPGOOD
GF_IMAX
P3V3A
2
15.4K_1%_2
7 6
6 5
R6620
2 1
P3V3A
18
18
IN
IN
10
11
12
VCCSENSE
CGFB
GGFB
25
9
CCOMP
CVFB
CCSN3
U6600
TI_TPS51650RSLR_QFN_48P
GCOMP
GCSN1
GVFB
26
27
28
62K_1%
42.2K_1%_2
RSC_0402_DY
8
CCSP3
GCSP1
29
R6624
RSC_0402_DY
R6621
2 1
P3V3A
R6635
11
RSC_0402_DY
R6636
2 1
11
IN
IN
7
6
CPU_CSN1
CPU_CSN2
CPU_CSP2
CCSP2
CCSN2
GCSN2
GCSP2
30
31
2 1
2 1
11
11
IN
IN
3
5
4
CPU_CSP1
CF-IMAX
CCSN1
CCSP1
GTHERM
GPWM1
GSKIP#
34
32
33
GPWM1
1
R6719
R6721
R6723
R6725
2 2 1
0_5%_2_DY
2 1
0_5%_2_DY
2 1
0_5%_2_DY
2 1
0_5%_2_DY
0_5%_2
2 1
2 1
R6724
12
1
0_5%_2
0_5%_2
0_5%_2
2
R6726
2 1
R6722
R6720
RSC_0402_DY
R6730
30K_5%_2
2 1
GPU_CSP1
GPU_CSN1
GPU_CSP2
GPU_CSN2
IN
IN
IN
2 1
2 1
12
R6729
100K_5%_NTC
IN
12
12
12
C6727
0.1UF_16V_2_DY
R6728
2 1
R6622
2 1
56K_1%_2
R6623
2 1
24K_1%_2
2 1
R6618
100K_5%_NTC
C6631
0.1UF_16V_2_DY
2 1
R6619
15.4K_1%_2
P5V0A
R6617
10_5%_3
1
2
COCP-R
CTHERM
GPWM2
CPWM3
36
35
C6629
2.2UF_10V_3
GND
V5
CDH1
CBST1
CSW1
CDL1
V5DRV
PGND
CDL2
CSW2
CBST2
CDH2
VBAT
2 1
49
48
V5DRV_CPU
47
R6601
46
1
2.2_5%_3
45
44
43
42
41
40
39
2.2_5%_3
38
R6616
37
10K_5%_3
P5V0A
R6606
2 1
PVBAT
GPWM2
TP24
TP6601
OUT
OUT
12
R6731
2 1
MODIFY 20111013
VREF_CPU
GSKIP#
OUT
IN
12
MODIFY 20111013
11
23 26
OUT
OUT
5 4
4
2 1
VREF_CPU
2 1
V5DRV_CPU
C6630
4.7UF_10V_3
2 1
FAIR_FDMS3664S_8P
11
IN
C6622
1 2
0.1UF_16V_2
C6624
1 2 1
0.1UF_16V_2
11
VR_PWRGD
PVAXG_PG
PVBAT
POWERPAD_2_0610
1 2
2
2
PAD6610
2 1
C6610
2 1
11
IN
Q6610
11
TML
OUT
9
Q1
TML
9
Q6620
FAIR_FDMS3664S_8P
P3V3A
1
R6634
R6732
2K_5%_2
2 1
2
Q1
1
G1
G2
8
18
C6611
10UF_25V_5
1
G1
G2
8
2
D1
PHASE
S2
7
2K_5%_2
11
CHANGE by
3 2 1
2 1
10UF_25V_5
PBAT_CPU
3
2
D1
D1
PHASE
S2
S2
7
6
3
D1
S2
6
C6612
2 1
D1
Q2
S2
5 4
2 1
2 1
PBAT_CPU
D1
Q2
S2
5 4
C6613
2 1
10UF_25V_5
10UF_25V_5
11
OUT
11
OUT
IN
R7661
RSC_0603_DY
C7661
CSC0402_DY
11
OUT
11
OUT
IN
R7662
RSC_0603_DY
2 1
C7662
CSC0402_DY
C6614
2 1
10UF_25V_5
CPU_CSN1
CPU_CSP1
11
R6602
17.8K_1%_2
CPU_CSN2
CPU_CSP2
11
R6607
17.8K_1%_2
PBAT_CPU
C6615
2 1
10UF_25V_5
0.033UF_16V_2
162K_1%_2
R6603
2 1
2 1
100K_5%_NTC
L6610
PAN_ETQP4LR24AFM_4P
0.033UF_16V_2
162K_1%_2
R6608
2 1
2 1
100K_5%_NTC
L6620
2 1
4 3
PAN_ETQP4LR24AFM_4P
R6605
2 1
4 3
R6610
2 1
4 3
C6623
11
OUT
2 1
2 1
R6604
28.7K_1%_2
2 1
4 3
C6625
2 1
2 1
R6609
28.7K_1%_2
2 1
2 1
2 1
MODIFY 20111013
P1V05S_VCCP
1
R6632
2
18
11
VR_SVID_CLK
IN
VR_SVID_DATA
BI
XXX
1
R6633
2
54.9_1%_2
DATE
1
C6635
130_1%_2
2
24-AUG-2011
2 3
0.1UF_16V_2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PVCORE1
CODE
SIZE
A3
CS
1310xxxxx-0-0
SHEET
1
C6600
470UF_2V
+
3
2
1
C6602
470UF_2V
+
3
2
DOC.NUMBER
of
11
39
1
PVCORE
C6601
1
470UF_2V
+
3
2
PVCORE
1
470UF_2V
+
3
2
C6603
REV
X01
D
C C
B
A A
8 7
6 5
4
3 2 1
11
11
D
2 1
0.1UF_16V_2
PAD
DRVH BST
SW SKIP#
VDD
C6720
9
8 1
7 2
6
2 1
P5V0A
Q6710
R6701
2.2_5%_3
U6710
11
11
GSKIP#
IN
GPWM1
IN
3
PWM
4 5
GND DRVL
TI_TPS51601DRBR_SON_8P
C6721
2 1
FAIR_FDMS3664S_8P
1UF_6.3V_2
Q1
TML
9
PVBAT_AXG1
1
2
D1
G1
PHASE
G2
S2
8
7
IN
3
D1
D1
Q2
S2
S2
6
5 4
2 1
2 1
GPU_CSN1
OUT
GPU_CSP1
OUT
R6702
17.8K_1%_2
R7671
RSC_0603_DY
C7671
CSC0402_DY
R6703
2 1
2 1
100K_5%_NTC
PAN_ETQP4LR24AFM_4P
C6722
0.033UF_16V_2
R6705
2 1
162K_1%_2
28.7K_1%_2
L6710
2 1
4 3
2 1
2 1
4 3
R6704
D
2 1
PVAXG
1
470UF_2V
+
3
2
C6700
PVBAT
1 2
PAD6710
POWERPAD_2_0610
2 1
PVBAT_AXG1
PVBAT
1 2
PAD6711
POWERPAD_2_0610
2 1
PVBAT_AXG2
OUT
C C
12
C6710
11
11
PVBAT_AXG2
IN
B
2 1
0.1UF_16V_2
PAD
DRVH BST
SW SKIP#
VDD
C6723
9
8 1
7 2
6
2 1
1
3
2
D1
D1
G1
D1
Q1
PHASE
R7672
RSC_0603_DY
2 1
2 1
C6724
P5V0A
FAIR_FDMS3664S_8P
2 1
Q6720
G2
TML
9
8
Q2
S2
S2
S2
7
6
5 4
R6706
P5V0A
2.2_5%_3
U6720
11
GPWM2
IN
3
PWM
4 5
GND DRVL
TI_TPS51601DRBR_SON_8P
GPU_CSN2
OUT
GPU_CSP2
OUT
12
R6707
17.8K_1%_2
C7672
CSC0402_DY
0.033UF_16V_2
162K_1%_2
R6708
2 1
2 1
100K_5%_NTC
2 1
4 3
L6720
PAN_ETQP4LR24AFM_4P
C6725
R6710
28.7K_1%_2
2 1
4 3
2 1
2 1
R6709
2 1
C6702
470UF_2V
PVAXG
1
+
3
2
2 1
C6711
2 1
10UF_25V_5
C6712
2 1
10UF_25V_5
10UF_25V_5
C6713
2 1
C6714
2 1
10UF_25V_5
C6715
2 1
10UF_25V_5
10UF_25V_5
B
1UF_6.3V_2
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PVCORE2
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
12
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
OCP=7AMP
P3V3AL
P3V3A
PAD6100
2 1
POWERPAD_2_0610
1 2
VRP3V3A
6
6
IN
PVADPTR
5V_PG
IN
OCP=7AMP
P5V0A
D
PAD6150
2 1
POWERPAD_2_0610
1 2
VRP5V0A
6
13
IN
PVADPTR
R6996
100_5%_2
R6999
1
100K_5%_2_DY
D6999
1
2 1
2
2 1
C6998
0.1UF_25V_2 0.1UF_25V_2
3
2 1
D6998
BAV99W_7_F
BAV70W_7_F
3
2
PVBAT
VRP5V0A_VIN
IN
OUT
P15V0A
6
VRP5V0A_CLK
2 1
C6997
3
2 1
D6997
BAV99W_7_F
IN
VRP5V0A
6
6
13
IN
D
P3V3AL
P5V0AL
PAD6121
2 1
POWERPAD1X1M
2 1
POWERPAD1X1M
1 2
PAD6105
1 2
VRP3V3A_LDO
VRP5V0A_LDO
OUT
EN_3V_5V
1
C6999
2
1
2
6
6
IN
0.1UF_25V_2
6
IN
R6998
200K_5%_2
R6997
1K_5%_2
2 1
ALWAYS_PW_EN
33
IN
C6996
1UF_25V_3
2 1
C6995
2 1
0.1UF_25V_2
C6994
2 1
0.1UF_25V_2
C C
OCP=12AMP
P1V5
PAD6200
2 1
POWERPAD_2_0610
1 2
B
VRP1V5
7
IN
P5V0A
PAD6510
1 2
POWERPAD1X1M
2 1
VRPVCCSA_IN
OUT
10
B
OCP=12AMP
P1V05S_VCCP
OCP=4.5AMP
P1V8S
OCP=7AMP
PVSA
8
PAD6300
2 1
POWERPAD_2_0610
2 1
POWERPAD_2_0610
2 1
POWERPAD_2_0610
1 2
PAD6970
1 2
PAD6500
1 2
VRP1V05S_VCCP
VRP1V8S
VRPVSA
7 6
8
IN
9
IN
DELETE 20111013
A A
10
IN
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PORT
5 4
CHANGE by
XXX
DATE
24-AUG-2011
2 3
SIZE
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
13
of
39
CODE
A3
1
REV
X01
8 7
6 5
P3V3A
P3V3S
4
3 2 1
P3V3S
P15V0A
R7000
1M_5%_2
2 1
D
Q7000
IN
CORE_PWEN#
33
14
1
G
SSM3K7002FU
3
D S
2
P15V0A_RC
0_5%_2
C7000
P5V0A
2 1
2200pF_50V_2
P3V3S
R7001
2 1
Q7001
1
G
SSM3K7002FU_DY
3
RSC_0402_DY
D S
2
P1V5
P5V0S
1
2
5
R7004
8
7
6
R7005
0_5%_2
R7006
0_5%_2
Q7004
D
NMOS_4D1S
FDC655BN
2 1
Q7005
D
NMOS_4D3S
AON7400AL
2 1
Q7006
8
D
7
6
AON7400AL
2 1
NMOS_4D3S
4
S
R7010
3 6
G
7
C7001
2 1
10uF_6.3V_3
IN
10
IN
P1V5_PG
PVCCSA_PG
R7007
100_5%_2
R7008
100_5%_2
2 1
2 1
P5V0S
10K_5%_2
2 1
ALL_PWGD_IN
OUT
15
33
D
C7004
2 1
1
S
2
3
4 5
G
R7011
C7002
2 1
10uF_6.3V_3
33
RESUME_PWEN
IN
100K_5%_2
2 1
EN_P1V5
OUT
7
1000pF_50V_2
C7005
2 1
P1V5S
CSC0402_DY
R7015
33
14 19
1
S
2
3
4 5
G
FOR DDR3L CHANGE TO AON7400AL
CORE_PWEN EN_P1V8
IN
10K_5%_2
2 1
OUT
9
C7009
2 1
0.1uF_16V_2
C C
C7003
2 1
10uF_6.3V_3
D3000
2 1
2 1
P3V3S
R7002
Q7002
G
Q7003
G
2 1
3
D S
2
P1V5S
R7003
2 1
3
D S
2
RSC_0402_DY
33
14 19
IN
P0V75S
R7020
22_5%_2
Q7010
G
2 1
3
D S
33
14 19
IN
CORE_PWEN
2
220_5%_2
33
14
CORE_PWEN#
IN
1
SSM3K7002FU
B
1
SSM3K7002FU_DY
1
SSM3K7002FU
1SS355VMTE_17
R7012
47K_1%_2
C7006
R7014
10K_5%_2
2 1
2 1
2 1
C7008
2 1
0.1uF_16V_2
EN_P1V0_VCCP
EN_P0V75
OUT
8
7 8
IN OUT
VCCIO_PG
R7016
0_5%_2
R7017
10K_5%_2
2 1
2 1
EN_PVCCSA CORE_PWEN
OUT
10
B
A A
0.01uF_50V_2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
P5V0S & P3V3S
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
14
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
P1V8S
U4500
R4535
2 1
1K_5%_1_DY
29
OUT
D
P1V05S_VCCP
NV_CLE
R4536
1K_5%_1
R4539
2 1
2.2K_5%_1
2 1
H_SNB_IVB#
F49
PROC_SELECT#
CLOCKS
TP1
TP24
TP4503
TP24
1
C57
1
C49
PROC_DETECT#
CATERR#
BCLK
BCLK#
DPLL_REF_CLK
DPLL_REF_CLK#
BCLK_ITP
BCLK_ITP#
J3
H2
AG3
AG1
N59
N58
FOR IVB 2C FINAL SYMBOL MOVE TO OTHER BLOCK
CLK_DMI_PCH_DP
CLK_DMI_PCH_DN
CLK_DP_PCH_DP
CLK_DP_PCH_DN
XDP_BCLK_ITP_DP
XDP_BCLK_ITP_DN
IN
IN
IN
IN
25
25
25
25
TP4520
TP4521
1
TP24
1
TP24
D
33
OUT
R4531
62_5%_1
IN
H_PROCHOT#
11
33
2 1
29
C4697
2 1
47PF_50V_1
OUT
26
BI
29 23
15
28 33 38
P3V3A
H_PECI
PM_THRMTRIP#
H_PM_SYNC
H_CPUPWRGD
IN
PM_DRAM_PWRGD_CPU
IN
BUF_PLT_RST#
IN
P1V5S
R4537
130_1%_2
R4538
1.5K_1%_1
R4540
2 1
56_5%_1
2 1
PM_DRAM_PWRGD_CPU_R
2 1
BUF_PLT_RST#_CPU
H_PROCHOT#_R
R4541
10K_5%_1
2 1
A48
C45
D45
C48
B46
BE45
D44
R4542
750_1%_1
2 1
PECI
PROCHOT#
THERMTRIP#
PM_SYNC
UNCOREPWRGOOD
PWR MANAGEMENT THERMAL MISC
SM_DRAMPWROK
RESET#
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PRDY#
PREQ#
TCK
TMS
TRST#
TDI
TDO
JTAG & BPM MISC DDR3
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
B
AT30
BF44
BE43
BG43
N53
XDP_PRDY#
N55
XDP_PREQ#
L56
XDP_TCLK
L55
XDP_TMS
J58
XDP_TRST#
M60
XDP_TDI_R
L59
XDP_TDO
K58
XDP_DBRESET#
G58
XDP_BMP0#
E55
XDP_BMP1#
E59
XDP_BMP2#
G55
XDP_BMP3#
G59
XDP_BMP4#
H60
XDP_BMP5#
J59
XDP_BMP6#
J61
XDP_BMP7#
CPU_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
R4558
R4559
R4560
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
2 1
2 1
2 1
23
23
23
15
23
15
23
15
23
15
23
15
23
15
23
23
23
23
23
23
23
23
140_1%_2
25.5_1%_2
200_1%_1
OUT
15
C C
B
Q4504
1
BSS138
P1V5
P3V3S
CHECK
2 1
1K_5%_1
2 1
51_5%_1
2 1
51_5%_1
2 1
51_5%_1
2 1
51_5%_1
2 1
51_5%_1
P1V05S_VCCP
A A
IN
IN
IN
IN
IN
IN
XDP_DBRESET#
XDP_TDO
XDP_TMS
XDP_TDI_R
XDP_TRST#
XDP_TCLK
15
OUT
23
22
15
23
15
23
15
23
15
23
15
23
R4543
1K_1%_1
2 1
3
D S
G
CHECK
2
R4546
1K_5%_1
2 1
DIMM_DRAMRST#
R4551
R4552
R4553
R4554
R4556
R4557
R4544
2 1
4.99K_1%_2
R4530
200_5%_1
2 1
U4501
IN
PM_DRAM_PWRGD
ALL_PWGD_IN
26
14
33
1
B
2
A
3
GND
NXP_74AHC1G09GV_SOT753_5P
VCC
5
4
Y
C4698
R4533
2 1
200_5%_1
2 1
0.1UF_10V_1
PM_DRAM_PWRGD_CPU
15
OUT IN
25
19
PCH_DDR_RST
IN
(OD AND GATE)
CHECK
15
CPU_DRAMRST#
IN
C4699
2 1
0.047UF_6.3V_1
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU - 1
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
15
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
P1V05S_VCCP
U4500
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
P10
P11
W11
W1
AA6
W6
AC9
W10
W3
AA7
W7
AA3
AC8
AA11
AC12
U11
AA10
AG8
AF3
AD2
AG11
AG4
AF4
AC3
AC4
AE11
AE7
AC1
AA4
AE10
AE6
M2
P1
N3
K1
M8
N4
R2
M7
U7
U6
P6
P7
P3
K3
P4
T3
V4
Y2
T4
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
eDP_COMPIO
eDP_ICOMPO
eDP_HPD
eDP_AUX#
eDP_AUX
eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
Intel(R) FDI DMI
PCI EXPRESS -- GRAPHICS
DP
26
IN
26
IN
26
D
B
P1V05S_VCCP
24.9_1%_1
R4502
2 1
P1V05S_VCCP
R4501
2 1
10K_5%_1_DY
CPU_EDP_HPD#
16
IN
IN
26
IN
26
IN
26
IN
26
IN
26
IN
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
OUT
26
IN
26
IN
26
IN
26
IN
26
IN
16
IN
35
BI
35
BI
35
OUT
35
OUT
35
OUT
35
OUT
DMI_TX0_DN
DMI_TX1_DN
DMI_TX2_DN
DMI_TX3_DN
DMI_TX0_DP
DMI_TX1_DP
DMI_TX2_DP
DMI_TX3_DP
DMI_RX0_DN
DMI_RX1_DN
DMI_RX2_DN
DMI_RX3_DN
DMI_RX0_DP
DMI_RX1_DP
DMI_RX2_DP
DMI_RX3_DP
FDI_TX0_DN
FDI_TX1_DN
FDI_TX2_DN
FDI_TX3_DN
FDI_TX4_DN
FDI_TX5_DN
FDI_TX6_DN
FDI_TX7_DN
FDI_TX0_DP
FDI_TX1_DP
FDI_TX2_DP
FDI_TX3_DP
FDI_TX4_DP
FDI_TX5_DP
FDI_TX6_DP
FDI_TX7_DP
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
CPU_EDP_COMPIO
CPU_EDP_HPD#
CPU_EDP_AUX_DN
CPU_EDP_AUX_DP
CPU_EDP_TX0_DN
CPU_EDP_TX1_DN
CPU_EDP_TX0_DP
CPU_EDP_TX1_DP
G3
G1
G4
H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7
K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6
G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4
F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4
CPU_PEG_ICOMPI
R4503
24.9_1%_1
2 1
D
C C
B
A A
*BOM
FOR EDP PANEL
R4500
10K_5%_1
2 1
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU - 2
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
16
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
U4500
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
OUT
OUT
OUT
OUT
OUT
OUT
M_B_DQ<0>
M_B_DQ<1>
M_B_DQ<2>
M_B_DQ<3>
M_B_DQ<4>
M_B_DQ<5>
M_B_DQ<6>
M_B_DQ<7>
M_B_DQ<8>
M_B_DQ<9>
M_B_DQ<10>
M_B_DQ<11>
M_B_DQ<12>
M_B_DQ<13>
M_B_DQ<14>
M_B_DQ<15>
M_B_DQ<16>
M_B_DQ<17>
M_B_DQ<18>
M_B_DQ<19>
M_B_DQ<20>
M_B_DQ<21>
M_B_DQ<22>
M_B_DQ<23>
M_B_DQ<24>
M_B_DQ<25>
M_B_DQ<26>
M_B_DQ<27>
M_B_DQ<28>
M_B_DQ<29>
M_B_DQ<30>
M_B_DQ<31>
M_B_DQ<32>
M_B_DQ<33>
M_B_DQ<34>
M_B_DQ<35>
M_B_DQ<36>
M_B_DQ<37>
M_B_DQ<38>
M_B_DQ<39>
M_B_DQ<40>
M_B_DQ<41>
M_B_DQ<42>
M_B_DQ<43>
M_B_DQ<44>
M_B_DQ<45>
M_B_DQ<46>
M_B_DQ<47>
M_B_DQ<48>
M_B_DQ<49>
M_B_DQ<50>
M_B_DQ<51>
M_B_DQ<52>
M_B_DQ<53>
M_B_DQ<54>
M_B_DQ<55>
M_B_DQ<56>
M_B_DQ<57>
M_B_DQ<58>
M_B_DQ<59>
M_B_DQ<60>
M_B_DQ<61>
M_B_DQ<62>
M_B_DQ<63>
M_B_BS0
M_B_BS1
M_B_BS2
M_B_CAS#
M_B_RAS#
M_B_WE#
22
22
22
U4500
D
B
AG6
AJ6
AP11
AL6
AJ10
AJ8
AL8
AL7
AR11
AP6
AU6
AV9
AR6
AP8
AT13
AU13
BC7
BB7
BA13
BB11
BA7
BA9
BB9
AY13
AV14
AR14
AY17
AR19
BA14
AU14
BB14
BB17
BA45
AR43
AW48
BC48
BC45
AR45
AT48
AY48
BA49
AV49
BB51
AY53
BB49
AU49
BA53
BB55
BA55
AV56
AP50
AP53
AV54
AT54
AP56
AP52
AN57
AN53
AG56
AG53
AN55
AN52
AG55
AK56
BD37
BF36
BA28
BE39
BD39
AT41
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
DDR SYSTEM MEMORY A
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AU36
AV36
AY26
AT40
AU40
BB26
BB40
BC41
AY40
BA41
AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55
AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54
BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
AL4
AL1
AN3
AR4
AK4
AK3
AN4
AR1
AU4
AT2
AV4
BA4
AU3
AR3
AY2
BA3
BE9
BD9
BD13
BF12
BF8
BD10
BD14
BE13
BF16
BE17
BE18
BE21
BE14
BG14
BG18
BF19
BD50
BF48
BD53
BF52
BD49
BE49
BD54
BE53
BF56
BE57
BC59
AY60
BE54
BG54
BA58
AW59
AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58
AG58
AG59
AM60
AL59
AF61
AH60
BG39
BD42
AT22
AV43
BF40
BD45
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
DDR SYSTEM MEMORY B
SB_CLK[0]
SB_CLK#[0]
SB_CKE[0]
SB_CLK[1]
SB_CLK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
BA34
M_CLK_DDR2_DP
AY34
M_CLK_DDR2_DN
AR22
M_CKE2
BA36
M_CLK_DDR3_DP
BB36
M_CLK_DDR3_DN
BF27
M_CKE3
BE41
M_CS#2
BE47
M_CS#3
AT43
M_ODT2
BG47
M_ODT3
AL3
M_B_DQS0_DN
AV3
M_B_DQS1_DN
BG11
M_B_DQS2_DN
BD17
M_B_DQS3_DN
BG51
M_B_DQS4_DN
BA59
M_B_DQS5_DN
AT60
M_B_DQS6_DN
AK59
M_B_DQS7_DN
AM2
M_B_DQS0_DP
AV1
M_B_DQS1_DP
BE11
M_B_DQS2_DP
BD18
M_B_DQS3_DP
BE51
M_B_DQS4_DP
BA61
M_B_DQS5_DP
AR59
M_B_DQS6_DP
AK61
M_B_DQS7_DP
BF32
M_B_A<0>
BE33
M_B_A<1>
BD33
M_B_A<2>
AU30
M_B_A<3>
BD30
M_B_A<4>
AV30
M_B_A<5>
BG30
M_B_A<6>
BD29
M_B_A<7>
BE30
M_B_A<8>
BE28
M_B_A<9>
BD43
M_B_A<10>
AT28
M_B_A<11>
AV28
M_B_A<12>
BD46
M_B_A<13>
AT26
M_B_A<14>
AU22
M_B_A<15>
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
D
C C
B
A A
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU - 3
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
17
of
39
1
SIZE
CODE
A3
REV
X01
8
7 6 5 4 3 2 1
F F
U4500
PVCORE
A26
VCC[1]
A29
VCC[2]
A31
VCC[3]
A34
VCC[4]
A35
VCC[5]
A38
C4549
C4555
C4534
C4539
C4504
C4509
C4514
C4519
C4524
2 1
C4529
2 1
2 1
2 1
2 1
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
22UF_6.3V_5
2 1
2 1
22UF_6.3V_5
22UF_6.3V_5
C4544
2 1
22UF_6.3V_5
2 1
2 1
22UF_6.3V_5
22UF_6.3V_5
C4561
2 1
2 1
22UF_6.3V_5
22UF_6.3V_5
E
D
C4502
2 1
2 1
2 1
2 1
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2 22UF_6.3V_5
2.2UF_6.3V_2
C4527
C4532
C4537
C4542
C4547
C4552
C4558
C4564
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
2.2UF_6.3V_2
C4570
2 1
2 1
2.2UF_6.3V_2
2.2UF_6.3V_2
C4503
C4508
2 1
2 1
2.2UF_6.3V_2
2.2UF_6.3V_2
C4522
C4517
C4512
C4507
C
VCC[6]
A39
VCC[7]
A42
VCC[8]
C26
VCC[9]
C27
VCC[10]
C32
VCC[11]
C34
VCC[12]
C37
VCC[13]
C39
VCC[14]
C42
VCC[15]
D27
VCC[16]
D32
VCC[17]
D34
VCC[18]
D37
VCC[19]
D39
VCC[20]
D42
VCC[21]
E26
VCC[22]
E28
VCC[23]
E32
VCC[24]
E34
VCC[25]
E37
VCC[26]
E38
VCC[27]
F25
VCC[28]
F26
VCC[29]
F28
VCC[30]
F32
VCC[31]
F34
VCC[32]
F37
VCC[33]
F38
VCC[34]
F42
VCC[35]
G42
VCC[36]
H25
VCC[37]
H26
VCC[38]
H28
VCC[39]
H29
VCC[40]
H32
VCC[41]
H34
VCC[42]
H35
VCC[43]
H37
VCC[44]
H38
VCC[45]
H40
VCC[46]
J25
VCC[47]
J26
VCC[48]
J28
VCC[49]
J29
VCC[50]
J32
VCC[51]
J34
VCC[52]
J35
VCC[53]
J37
VCC[54]
J38
VCC[55]
J40
VCC[56]
J42
VCC[57]
K26
VCC[58]
K27
VCC[59]
K29
VCC[60]
K32
VCC[61]
K34
VCC[62]
K35
VCC[63]
K37
VCC[64]
K39
VCC[66]
K42
VCC[67]
L25
VCC[68]
L28
VCC[69]
L33
VCC[70]
L36
VCC[71]
L40
VCC[72]
N26
VCC[73]
N30
VCC[74]
N34
VCC[75]
N38
VCC[76]
CORE SUPPLY
POWER
QUIET RAILS SVID SENSE LINES PEG AND DDR
VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO50
VCCIO51
VCCIO_SEL
VCCPQE[1]
VCCPQE[2]
VIDALERT#
VIDSCLK
VIDSOUT
AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48
AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15
W16
W17
BC22
AM25
AN22
A44
H_CPU_SVIDALRT#
B43
H_CPU_SVIDCLK
C44
H_CPU_SVIDDAT
P1V05S_VCCP
C4584
C4579
2 1
2 1
1UF_6.3V_2
C4585
C4580
2 1
2 1
1UF_6.3V_2
P1V05S_VCCP
C4604
C4601
2 1
2 1
10UF_6.3V_3
C4582
C4587
2 1
2 1
10UF_6.3V_3
P1V05S_VCCP
C4583
2 1
1UF_6.3V_2
C4562
C4556
C4550
C4545
C4540
C4535
C4530
C4600
C4596
C4592
C4588
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
E
2 1
1UF_6.3V_2
1UF_6.3V_2
C4607
2 1
10UF_6.3V_3
10UF_6.3V_3
2 1
2 1
C4610
2 1
1UF_6.3V_2
1UF_6.3V_2
C4613
2 1
10UF_6.3V_3 10UF_6.3V_3
10UF_6.3V_3
2 1
2 1
C4501
1UF_6.3V_2
1UF_6.3V_2
+
220UF_2V
2 1
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
C4518
C4513
C4598
C4590
C4586
C4581
C4575
C4569
C4563
C4568
C4589
D
C4591
C4595
2 1
10UF_6.3V_3
C4599
2 1
2 1
10UF_6.3V_3
10UF_6.3V_3
VCCIO_SEL
P1V05S_VCCP
OUT
8
C
2 1
R4506
R4509
R4510
R4511
130_1%_2
2 1
43_5%_2
2 1
0_5%_1
2 1
0_5%_1
R4512
2 1
75_1%_1
VR_SVID_ALRT#
VR_SVID_CLK
VR_SVID_DATA
OUT
OUT
OUT
11
11
11
PVCORE
R4504
100_1%_1
VCC_SENSE
VSS_SENSE
F43
G43
B
AN16
AN17
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
VCCIO_SENSE
VSS_SENSE_VCCIO
A
2 1
VCCSENSE
VSSSENSE
OUT
OUT
11
11
B
R4505
100_1%_1
2 1
P1V05S_VCCP
R4507
10_1%_1
2 1
VCC_SENSE_VCCIO
VSS_SENSE_VCCIO
R4508
10_1%_1
2 1
OUT
OUT
8
8
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU4
SIZE
CODE
CHANGE by
8
7 6 5 4 3
XXX
DATE
24-AUG-2011
2 1
C
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
REV
X01
39
18
of
8
7 6 5 4 3 2 1
F F
2 1
3
D S
Q4501
CPUDDR_WR_VREF2_M
25
IN
15 19
P0V75M_VREF_H
33
14
IN
20
IN
DDR_WR_VREF01
2
1K_5%_1_DY
R4519
0_5%_1_DY
G
1
AM2302N
PCH_DDR_RST
CPUDDR_WR_VREF1_M
R4515
2 1
0_5%_1_DY
2
R4514
2 1
1K_5%_1_DY
1
AM2302N
3
D S
G
Q4500
PCH_DDR_RST
PVAXG
25
15 19
IN
U4500
20
IN
DDR_WR_VREF02
R4518
2 1
C4685
AA46
VAXG[1]
AB47
VAXG[2]
AB50
VAXG[3]
AB51
E
C4623
C4627
2 1
10UF_6.3V_3
D
C4631
2 1
2 1
10UF_6.3V_3
10UF_6.3V_3
C4632
2 1
10UF_6.3V_3
C4638
C4644
C4651
C4658
C4665
C4672
2 1
2 1
2 1
2 1
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
1UF_6.3V_2
C4635
2 1
10UF_6.3V_3
C4636
C4640
C4646
2 1
2 1
10UF_6.3V_3
2 1
22UF_6.3V_5
22UF_6.3V_5
C4659
2 1
C4653
C4660
2 1
2 1
22UF_6.3V_5
1UF_6.3V_2
1UF_6.3V_2
C4666
C4673
2 1
2 1
1UF_6.3V_2 22UF_6.3V_ 5
1UF_6.3V_2
1UF_6.3V_2
C4667
C4674
2 1
2 1
22UF_6.3V_5
22UF_6.3V_5
1
+
C4616
470uF_2V
3
2
C4675
C4668
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
PVAXG
C
2 1
AB52
AB53
AB55
AB56
AB58
AB59
AC61
AD47
AD48
AD50
AD51
AD52
AD53
AD55
AD56
AD58
AD59
AE46
W50
W51
W52
W53
W55
W56
W61
VAXG[4]
VAXG[5]
VAXG[6]
VAXG[7]
VAXG[8]
VAXG[9]
VAXG[10]
VAXG[11]
VAXG[12]
VAXG[13]
VAXG[14]
VAXG[15]
VAXG[16]
VAXG[17]
VAXG[18]
VAXG[19]
VAXG[20]
VAXG[21]
VAXG[22]
N45
VAXG[23]
P47
VAXG[24]
P48
VAXG[25]
P50
VAXG[26]
P51
VAXG[27]
P52
VAXG[28]
P53
VAXG[29]
P55
VAXG[30]
P56
VAXG[31]
P61
VAXG[32]
T48
VAXG[33]
T58
VAXG[34]
T59
VAXG[35]
T61
VAXG[36]
U46
VAXG[37]
V47
VAXG[38]
V48
VAXG[39]
V50
VAXG[40]
V51
VAXG[41]
V52
VAXG[42]
V53
VAXG[43]
V55
VAXG[44]
V56
VAXG[45]
V58
VAXG[46]
V59
VAXG[47]
VAXG[48]
VAXG[49]
VAXG[50]
VAXG[51]
VAXG[52]
VAXG[53]
VAXG[54]
Y48
VAXG[55]
Y61
VAXG[56]
POWER
GRAPHICS
R4516
OUT
OUT
GFX_VCC_SENSE
GFX_VSS_SENSE
11
11
100_1%_1 100_1%_1
2 1
F45
VAXG_SENSE
G45
VSSAXG_SENSE
LINES SENSE
QUIET RAILS
SM_VREF
VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]
VDDQ[9]
VDDQ[10]
VDDQ[11]
VDDQ[12]
DDR3 - 1.5V RAILS
VDDQ[13]
VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]
VCCDQ[1]
VCCDQ[2]
R4517
BB3
P1V8S
BC1
BC4
VCCPLL[1]
VCCPLL[2]
VCCPLL[3]
1.8V RAIL
AY43
AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33
AM28
AN26
P1V5S
P1V5S
C4676
2 1
C4677
2 1
2.2UF_6.3V_2
C4678
2 1
10UF_6.3V_3
2 1
2 1
C4680
2 1
2.2UF_6.3V_2
2.2UF_6.3V_2
C4682
2 1
10UF_6.3V_3
10UF_6.3V_3
C4681
C4679
1UF_6.3V_2
2 1
0.1UF_10V_1
C4520
C4515
C4510
C4505
C4683
2 1
1UF_6.3V_2
C4684
2 1
10UF_6.3V_3
C4500
C4686
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
C4687
C4689
2 1
2 1
10UF_6.3V_3
10UF_6.3V_3
2 1
2 1
C4691
2 1
1UF_6.3V_2
1UF_6.3V_2
C4525
2 1
10UF_6.3V_3
10UF_6.3V_3
2 1
2 1
1UF_6.3V_2
+
C4511
2 1
100UF_6.3V
P0V75M_VREF P0V75M_VREF_H
R4520
2 1
0_5%_3_DY
3
D S
G
Q4502
CORE_PWEN
1
C4696
2 1
470pF_50V_2_DY
1UF_6.3V_2
2
AM2302N
P1V5S
R4521
2 1
R4522
2 1
1K_1%_1_DY
100K_5%_1
E
D
C
VDDQ_SENSE
L17
VCCSA[1]
C4648
2 1
1uF_6.3V_2
B
A
PVSA
C4642
C4643
C4649
2 1
2 1
10UF_6.3V_3
10UF_6.3V_3
C4650
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
C4662
C4655
2 1
1uF_6.3V_2
C4656
2 1
10UF_6.3V_3
C4506
2 1
1UF_6.3V_2
C4669
2 1
2 1
10UF_6.3V_3
22uF_6.3V_5
C4663
C4573
2 1
2 1
10UF_6.3V_3
10UF_6.3V_3
C4567
C4664
2 1
2 1
1UF_6.3V_2
1UF_6.3V_2
L21
VCCSA[2]
N16
VCCSA[3]
N20
VCCSA[4]
N22
VCCSA[5]
P17
VCCSA[6]
P20
VCCSA[7]
R16
VCCSA[8]
R18
VCCSA[9]
R21
VCCSA[10]
U15
VCCSA[11]
V16
VCCSA[12]
V17
VCCSA[13]
V18
VCCSA[14]
V21
VCCSA[15]
W20
VCCSA[16]
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
SA RAIL
VSS_SENSE_VDDQ
SENSE LINES
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
BC43
BA43
U10
D48
D49
R4513
100_5%_1_DY
VCCSA_SENSE
VCCSA_VID0
VCCSA_VID1
TP4500
TP4501
2 1
PVSA
1
TP24
1
TP24
OUT
OUT
OUT
10
10
10
B
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU5
SIZE
CODE
CHANGE by
8
7 6 5 4 3
XXX
DATE
24-AUG-2011
2 1
C
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
REV
X01
39
19
of
8
7 6 5 4 3 2 1
F F
U4500
TP4527
TP4528
TP24
TP24
1
1
TP4529
TP4530
TP4531
TP4532
TP4533
TP4534
TP4535
TP4536
TP4537
TP4538
23
20
20
20
20
20
TP24
TP24
TP24
TP24
TP24
TP24
TP24
TP24
TP24
TP24
OUT
OUT
OUT
OUT
OUT
OUT
1
1
1
1
1
1
1
1
1
1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
E
TP4526
TP24
D
B50
CFG[0]
C51
CFG[1]
B54
CFG[2]
D53
CFG[3]
A51
CFG[4]
C53
CFG[5]
C55
CFG[6]
H49
CFG[7]
A55
CFG[8]
H51
CFG[9]
K49
CFG[10]
K53
CFG[11]
F53
CFG[12]
G53
CFG[13]
L51
CFG[14]
F51
CFG[15]
D52
CFG[16]
L53
CFG[17]
H43
VCC_VAL_SENSE
K43
VSS_VAL_SENSE
H45
VAXG_VAL_SENSE
K45
VSSAXG_VAL_SENSE
1
F48
VCC_DIE_SENSE
H48
RSVD6
K48
RSVD7
BA19
RSVD8
AV19
RSVD9
AT21
RSVD10
BB21
RSVD11
BB19
RSVD12
AY21
RSVD13
BA22
RSVD14
AY22
RSVD15
AU19
RSVD16
AU21
RSVD17
BD21
RSVD18
BD22
RSVD19
BD25
RSVD20
BD26
RSVD21
BG22
RSVD22
BE22
RSVD23
BG26
RSVD24
BE26
RSVD25
BF23
RSVD26
BE24
RSVD27
RESERVED
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD36
RSVD37
RSVD38
RSVD39
RSVD40
RSVD41
RSVD42
RSVD43
RSVD44
RSVD45
DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1
FOR IVB 2C BGA ADD
PROCESSOR DDR 1.5 RAIL
BE7
DDR_WR_VREF01
BG7
DDR_WR_VREF02
N42
L42
L45
L47
M13
M14
U14
W14
P13
AT49
K24
AH2
AG13
AM14
AM15
N50
A4
C4
D3
D1
A58
A59
C59
A61
C61
D61
BD61
BE61
BE59
BG61
BG59
BG58
BG4
BG3
BE3
BG1
BE1
BD1
19
OUT
19
OUT
R4529 FOR IVB 2C BGA MOVE
R4529 FOR SANDY BRIDGE BGA MOUNT
R4739
2 1
0_5%_1
TP4525
1
TP24
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
BG17
BG21
BG24
BG28
BG37
BG41
BG45
BG49
BG53
BG9
G51
G61
H21
M11
M15
U4500
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
C29
VSS[191]
C35
VSS[192]
C40
VSS[193]
D10
VSS[194]
D14
VSS[195]
D18
VSS[196]
D22
VSS[197]
D26
VSS[198]
D29
VSS[199]
D35
VSS[200]
D4
VSS[201]
D40
VSS[202]
D43
VSS[203]
D46
VSS[204]
D50
VSS[205]
D54
VSS[206]
D58
VSS[207]
D6
VSS[208]
E25
VSS[209]
E29
VSS[210]
E3
VSS[211]
E35
VSS[212]
E40
VSS[213]
F13
VSS[214]
F15
VSS[215]
F19
VSS[216]
F29
VSS[217]
F35
VSS[218]
F40
VSS[219]
F55
VSS[220]
G48
VSS[221]
VSS[222]
G6
VSS[223]
VSS[224]
H10
VSS[225]
H14
VSS[226]
H17
VSS[227]
VSS[228]
H4
VSS[229]
H53
VSS[230]
H58
VSS[231]
J1
VSS[232]
J49
VSS[233]
J55
VSS[234]
K11
VSS[235]
K21
VSS[236]
K51
VSS[237]
K8
VSS[238]
L16
VSS[239]
L20
VSS[240]
L22
VSS[241]
L26
VSS[242]
L30
VSS[243]
L34
VSS[244]
L38
VSS[245]
L43
VSS[246]
L48
VSS[247]
L61
VSS[248]
VSS[249]
VSS[250]
VSS
NCTF
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59
A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61
C
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
MODIFY 20111001
R4601
1
CFG2
20
IN
CFG5
20
IN
CFG6
20
IN
CFG7
20
IN
R4602
R4603
R4604
2
1K_1%_1_DY
2 1
1K_1%_1_DY
2 1
1K_1%_1_DY
2 1
1K_1%_1_DY
CFG[2] : PCI Express* Static x16 Lane Numbering Reversal.
1 = NORMAL MODE
0 = LANE REVERSED
U4500
A13
VSS[1]
A17
VSS[2]
A21
VSS[3]
A25
VSS[4]
A28
VSS[5]
A33
VSS[6]
A37
VSS[7]
A40
VSS[8]
A45
VSS[9]
A49
VSS[10]
A53
VSS[11]
A9
VSS[12]
AA1
VSS[13]
AA13
VSS[14]
AA50
VSS[15]
AA51
VSS[16]
AA52
VSS[17]
AA53
VSS[18]
AA55
VSS[19]
AA56
VSS[20]
AA8
VSS[21]
AB16
VSS[22]
AB18
VSS[23]
AB21
VSS[24]
AB48
VSS[25]
AB61
VSS[26]
AC10
VSS[27]
AC14
VSS[28]
AC46
VSS[29]
AC6
VSS[30]
AD17
VSS[31]
AD20
VSS[32]
AD4
VSS[33]
AD61
VSS[34]
AE13
VSS[35]
AE8
VSS[36]
AF1
VSS[37]
AF17
VSS[38]
AF21
VSS[39]
AF47
VSS[40]
AF48
VSS[41]
AF50
VSS[42]
AF51
VSS[43]
AF52
VSS[44]
AF53
VSS[45]
AF55
VSS[46]
AF56
VSS[47]
AF58
VSS[48]
AF59
VSS[49]
AG10
VSS[50]
AG14
VSS[51]
AG18
VSS[52]
AG47
VSS[53]
AG52
VSS[54]
AG61
VSS[55]
AG7
VSS[56]
AH4
VSS[57]
AH58
VSS[58]
AJ13
VSS[59]
AJ16
VSS[60]
AJ20
VSS[61]
AJ22
VSS[62]
AJ26
VSS[63]
AJ30
VSS[64]
AJ34
VSS[65]
AJ38
VSS[66]
AJ42
VSS[67]
AJ45
VSS[68]
AJ48
VSS[69]
AJ7
VSS[70]
AK1
VSS[71]
AK52
VSS[72]
AL10
VSS[73]
AL13
VSS[74]
AL17
VSS[75]
AL21
VSS[76]
AL25
VSS[77]
AL28
VSS[78]
AL33
VSS[79]
AL36
VSS[80]
AL40
VSS[81]
AL43
VSS[82]
AL47
VSS[83]
AL61
VSS[84]
AM13
VSS[85]
AM20
VSS[86]
AM22
VSS[87]
AM26
VSS[88]
AM30
VSS[89]
AM34
VSS[90]
ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P
VSS
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
AM38
AM4
AM42
AM45
AM48
AM58
AN1
AN21
AN25
AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13
E
D
C
B
20
CFG4
IN
R4599
1K_1%_1
2 1
CFG[4] : eDP enable
1 = Disabled
0 = Enabled
CFG[6:5] : PCI Express Bifurcation:
00 = 1 x8, 2 x4 PCI Expres
01 = reserved
10 = 2 x8 PCI Express
11 = 1 x16 PCI Express
CFG[7] :PEG DEFER TRAINING
1: (Default) PEG Train immediately following RESETB deassertion
0: PEG Wait for BIOS for training
A
B
A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
CPU6
SIZE
CODE
CHANGE by
8
7 6 5 4 3
XXX
DATE
24-AUG-2011
2 1
C
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
REV
X01
39 20
of
8 7
6 5
4
3 2 1
FAN CONN
P5V0S P3V3S
C4301
2 1
D
R4300
OUT
IN
FAN_TACH1
CPUFAN1_ON#
33
33
R4301
2 1
2 1
4.7K_5%_1
4.7K_5%_1
4.7uF_6.3V_3
C4300
2 1
0.1UF_10V_1
CN4300
1
G
2
G
3
4
ACES_50271_0040N_001_4P
OUT
THERMTRIP#
33
R4412
0_5%_1
C4302
2 1
CSC0201_DY
THERMAL SENSOR(LOCAL)
NCT7717U I2C / SMBus address is 1001000xb (x is R/W bit).
THM_CLK
BI BI
2 1
U4411
2
GND
3
ALERT#
NUVO_NCT7717U_SOT23_5P
P3V3S
R4411
1
10.5K_1%_1
2
SDA SCL
VDD
5 1
THM_DAT
P3V3S
4
2 1
C4411
C4412
2 1
0.1UF_10V_1
4.7uF_6.3V_3
33 33
D
C C
B
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
THERMAL & FAN
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
21
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
P1V5
CN4100
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
D
B
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
22
IN
22
IN
23 25 35 38
IN
23 25 35 38
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
17
IN
M_B_A<0>
M_B_A<1>
M_B_A<2>
M_B_A<3>
M_B_A<4>
M_B_A<5>
M_B_A<6>
M_B_A<7>
M_B_A<8>
M_B_A<9>
M_B_A<10>
M_B_A<11>
M_B_A<12>
M_B_A<13>
M_B_A<14>
M_B_A<15>
M_B_BS0
M_B_BS1
M_B_BS2
M_CS#2
M_CS#3
M_CLK_DDR2_DP
M_CLK_DDR2_DN
M_CLK_DDR3_DP
M_CLK_DDR3_DN
M_CKE2
M_CKE3
M_B_CAS#
M_B_RAS#
M_B_WE#
SA0_DIM1
SA1_DIM1
PCH_3S_SMCLK
PCH_3S_SMDAT
M_ODT2
M_ODT3
M_B_DQS0_DP
M_B_DQS1_DP
M_B_DQS2_DP
M_B_DQS3_DP
M_B_DQS4_DP
M_B_DQS5_DP
M_B_DQS6_DP
M_B_DQS7_DP
M_B_DQS0_DN
M_B_DQS1_DN
M_B_DQS2_DN
M_B_DQS3_DN
M_B_DQS4_DN
M_B_DQS5_DN
M_B_DQS6_DN
M_B_DQS7_DN
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10_AP
84
A11
83
A12
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
FOX_AS0A626_U4SG_7H_204P
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
M_B_DQ<0>
M_B_DQ<1>
M_B_DQ<2>
M_B_DQ<3>
M_B_DQ<4>
M_B_DQ<5>
M_B_DQ<6>
M_B_DQ<7>
M_B_DQ<8>
M_B_DQ<9>
M_B_DQ<10>
M_B_DQ<11>
M_B_DQ<12>
M_B_DQ<13>
M_B_DQ<14>
M_B_DQ<15>
M_B_DQ<16>
M_B_DQ<17>
M_B_DQ<18>
M_B_DQ<19>
M_B_DQ<20>
M_B_DQ<21>
M_B_DQ<22>
M_B_DQ<23>
M_B_DQ<24>
M_B_DQ<25>
M_B_DQ<26>
M_B_DQ<27>
M_B_DQ<28>
M_B_DQ<29>
M_B_DQ<30>
M_B_DQ<31>
M_B_DQ<32>
M_B_DQ<33>
M_B_DQ<34>
M_B_DQ<35>
M_B_DQ<36>
M_B_DQ<37>
M_B_DQ<38>
M_B_DQ<39>
M_B_DQ<40>
M_B_DQ<41>
M_B_DQ<42>
M_B_DQ<43>
M_B_DQ<44>
M_B_DQ<45>
M_B_DQ<46>
M_B_DQ<47>
M_B_DQ<48>
M_B_DQ<49>
M_B_DQ<50>
M_B_DQ<51>
M_B_DQ<52>
M_B_DQ<53>
M_B_DQ<54>
M_B_DQ<55>
M_B_DQ<56>
M_B_DQ<57>
M_B_DQ<58>
M_B_DQ<59>
M_B_DQ<60>
M_B_DQ<61>
M_B_DQ<62>
M_B_DQ<63>
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
17
BI
P1V5
+
C4107
C4106
2 1
100uF_6.3V_DY
C4105
2 1
0.1UF_10V_1
C4103
2 1
0.1UF_10V_1
C4102
2 1
2 1
2.2UF_6.3V_2
C4101
2 1
22uF_6.3V_5
P3V3S
C4109
C4108
2 1
2 1
2.2UF_6.3V_2
0.1UF_10V_1
15
DIMM_DRAMRST#
IN
P0V75S_DIMM0_VREF_DQ P0V75S_DIMM0_VREF_CA
C4110
C4111
2 1
2 1
2.2UF_6.3V_2
0.1UF_10V_1
C4112
C4113
2 1
2 1
2.2UF_6.3V_2
0.1UF_10V_1
P1V5
P1V5
CN4100
75
VDD1
76
VDD2
81
VDD3
82
VDD4
87
VDD5
88
C4100
2 1
22uF_6.3V_5
22uF_6.3V_5
VDD6
93
VDD7
94
VDD8
99
VDD9
100
VDD10
105
VDD11
106
VDD12
111
VDD13
112
VDD14
117
VDD15
118
VDD16
123
VDD17
124
VDD18
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS1
3
VSS2
8
VSS3
9
VSS4
13
VSS5
14
VSS6
19
VSS7
20
VSS8
25
VSS9
26
VSS10
31
VSS11
32
VSS12
37
VSS13
38
VSS14
43
VSS15
FOX_AS0A626_U4SG_7H_204P
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VTT1
VTT2
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
D
C C
P0V75S
203
204
G1
G1
G2
G2
B
C4115
2 1
2.2UF_6.3V_2
C4117
2 1
2.2UF_6.3V_2
P3V3S
P0V75M_VREF
CPUDDR_WR_VREF1_M
R4108
P0V75S_DIMM0_VREF_CA
1K_1%_1 1K_1%_1
2 1
R4110
2 1
0_5%_1_DY
R4109
2 1
P0V75M_VREF
A A
Note :
SO-DIMMA SPD Address is 0xA4
SO-DIMMA TS Address is 0x34
R4104
P0V75S_DIMM0_VREF_DQ
1K_1%_1
2 1
R4106
R4107
0_5%_1
2 1
2 1
R4112
2 1
R4113
2 1
R4114
10K_5%_1
10K_5%_2_DY
R4115
2 1
2 1
10K_5%_2_DY
SA1_DIM1
SA0_DIM1
10K_5%_1
22
IN
22
IN
R4105
1K_1%_1
2 1
0_5%_1_DY
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
DDR3 - 1
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 22
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
CN4510
15
OUT
15
IN
15
IN
15
IN
D
P1V05S_VCCP
15
29
33 26
20
11
26
IN
OUT
IN
OUT
H_CPUPWRGD
SB_PWRBTN#
CFG0
VR_PWRGD
15
IN
15
IN
15
IN
15
IN
15
IN
15
IN
R4605
R4606
R4607
R4608
25 35 22 38
BI
25 35 22 38
BI
15
OUT OUT
XDP_PREQ#
XDP_PRDY#
XDP_BMP0#
XDP_BMP1#
XDP_BMP2#
XDP_BMP3#
XDP_BMP4#
XDP_BMP5#
XDP_BMP6#
XDP_BMP7#
2 1
1K_5%_2
2 1
0_5%_2
2 1
1K_5%_2 1K_5%_2
2 1
0_5%_2
PCH_3S_SMCLK
PCH_3S_SMDAT
H_CPUPWRGD_XDP
SB_PWRBTN#_XDP
CFG0_XDP
VR_PWRGD_XDP
XDP_TCLK
3
5
9
11
15
17
21
23
27
29
33
35
39
41
45
47
51
53
57
GND0
OBSFN_A0
OBSFN_A1
GND2
OBSDATD_A0
OBSDATD_A1
GND4
OBSDATD_A2
OBSDATD_A4
GND6
OBSFN_B0
OBSFN_B1
GND8
OBSDATA_B0
OBSDATA_B1
GND10
OBSDATA_B2
OBSDATA_B3
GND12
PWRGOOD_HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
GND14
SDA
SCL
TCK1
TCK0
GND16
SAMTEC_BSH_030_01_L_D_A_TR_60P_DY
GND1
OBSFN_C0
OBSFN_C1
GND3
OBSDATA_C0
OBSDATA_C1
GND5
OBSDATA_C2
OBSDATA_C3
GND7
OBSFN_D0
OBSFN_D1
GND9
OBSDATA_D0
OBSDATA_D1
GND11
OBSDATA_D2
OBSDATA_D3
GND13
ITPCLK_HOOK4
ITPCLK#_HOOK5
VCC_OBS_CD
RESET#_HOOK6
DBR#_HOOK7
GND15
TDO
TRSTn
TMS
GND17
TDI
2 1
4
6
8 7
10
12
14 13
16
18
20 19
22
24
26 25
28
30
32 31
34
36
38 37
40
CLK_XDP_DP_R CLK_XDP_DP
42
CLK_XDP_DN_R CLK_XDP_DN
44 43
46
PLT_RST#_XDP PLT_RST#
48
50 49
52
54
56 55
58
60 59
XDP_DBRESET#
R4609
R4610
R4611
XDP_TRST#
XDP_TDI_R
XDP_TMS
OUT
OUT
OUT
2 1
0_5%_2
2 1
0_5%_2
2 1
15
15
15
15
R4612
P1V05S_VCCP
2 1
1K_5%_2
D
2 1
P3V3S
R4613
51_5%_2
XDP_TDO
OUT
15
25
IN
25
IN
28
IN
C C
B
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
XDP
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 23
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
RTC BATTERY :
P3V3AL
2 1
A2 A1
P3V3AL_RTC_BAT
BAT54C_30V_0.2A
D
U4400
MAXELL_ML1220_T10_2P
+
-
R4401
1
2
0_5%_1
2 1
R4400
1K_5%_1
2 1
P3V3_RTC
3
C
D4400
SSM3K7002FU
P5V0S P3V3A
1
Q4700
G
R4704
2 1
36
BI
HDA_SYNC
33_5%_1
HDA_SYNC_Q
2
R4706
3
D S
2 1
P3V3S
R4705
1M_5%_1
2 1
36
OUT
R4707
1K_5%_1_DY
HDA_SDO
C4705
B
HDA_SDO_PCH
OUT
2 1
R4713
1K_5%_1
ME_FLASH_EN
33
IN
Flash Descriptor Security Overide
HDA_SDO_PCH :
8
High : Enable
Low : Disable
7 6
6 5
P3V3_RTC
C4704
2 1
1uF_6.3V_2
37
IN
36
1K_5%_1
2 1
OUT
36
OUT
36
OUT
36
IN
SSM3K7002FU
R4703
1M_5%_1
2 1
HDA_BITCLK
HDA_RST#
P5V0S
1
Q4701
G
2
D S
3
HDA_SDO_R
P3V3A
2 1
22PF_50V_1
4
C4700
2 1
R4701
20K_5%_1
2 1
2 1
R4700
C4706
2 1
1uF_6.3V_2
R4702
20K_5%_1
330K_5%_1
24 33
24 33
24 33
24
2 1
XTAL32RTC_IN
XTAL32RTC_OUT
C4703
P3V3_RTC_RTCRST#
2 1
1uF_6.3V_2
P3V3_RTC_SRTCRST#
WWAN_DET#
R4708
2 1
R4710
33_5%_1
2 1
PCH_INTVRMEN
2 1
CSC0201_DY
HDA_BITCLK_PCH
C4721
HDA_SYNC_PCH
PCSPKR
R4711
2 1
33_5%_1
HDA_RST#_PCH
HDA_SDIN0
R4714
2 1
33_5%_1
R4715
1K_5%_1_DY
R4716
R4717
24
OUT
24
OUT
24
OUT
24
OUT
24
OUT
24
OUT
24
IN
PCH_SPI_CLK
BI BI
PCH_SPI_CS0#
BI BI
PCH_SPI_SI HSPI_SI
BI
PCH_SPI_SO
BI
HDA_SDO_PCH
2 1
2 1
10K_5%_1
2 1
51_5%_1
PCH_SPI_CLK
PCH_SPI_CS0#
GPIO33
GPIO13
PCH_TCK
PCH_TMS
PCH_TDI
PCH_TDO
PCH_SPI_SI
PCH_SPI_SO
R4721
0_5%_1
R4722
0_5%_1
R4723
0_5%_1
R4724
0_5%_1
A20
C20
D20
G22
K22
C17
N34
T10
K34
E34
G34
C34
A34
A36
C36
N32
Y14
2 1
2 1
2 1
2 1
2 1
X4700
10M_5%_1
EMI
L34
J3
H7
K5
H1
T3
T1
V4
U3
HSPI_CLK
HSPI_CS0#
HSPI_SO
12PF_50V_1
32.768KHZ
U4700
RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN
HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SDO
HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO13
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
SPI_CLK
SPI_CS0#
SPI_CS1#
SPI_MOSI
SPI_MISO
ITL_PANTHERPOINT_FCBGA_989P
C4715
2 1
12PF_50V_1
BI
BI
5 4
3 2 1
C38
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
RTC
IHDA
JTAG
SATA
LPC
SATA 6G
LDRQ0#
LDRQ1#/GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SPI
SATALED#
SATA0GP/GPIO21
SATA1GP/GPIO19
P3V3A
R4725
R4726
R4727
IN
IN
IN
CHANGE by
PCH_TMS
PCH_TDI
PCH_TDO
XXX
R4728
100_1%_1
R4729
100_1%_1
R4730
100_1%_1
24
24
24
33
LPC_AD<0>
A38
LPC_AD<1>
B37
LPC_AD<2>
C37
LPC_AD<3>
D36
LPC_FRAME#
E36
1
K36
V5
SERIRQ
AM3
SATA_COMBO3_RX_DN
AM1
SATA_COMBO3_RX_DP
AP7
SATA_COMBO3_TX_DN
AP5
SATA_COMBO3_TX_DP
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
SATAICOMPO
Y10
AB12
SATA3RCOMPO
AB13
AH1
SATA3RBIAS
P3
LED_SATA#
V14
2nd_WLAN_RF_OFF#
P1
BBSTRAP0
2 1
210_1%_1
2 1
210_1%_1
2 1
210_1%_1
2 1
2 1
2 1
33 38
BI
33 38
BI
33 38
BI
33 38
BI
33 38
OUT
R4736
BI
IN
IN
OUT
OUT
2 1
33
38
38
38
38
TP24
TP4700
10K_5%_1
UM77-SATA 6G PORT1 DISABLE
UM77-SATA PORT1/3 DISABLE
P1V05S_VCCP
R4735
R4734
R4733
2 1
2 1
2 1
37.4_1%_1
49.9_1%_1
750_1%_1
INVENTEC
TITLE
CODE
SIZE
CS
DATE
24-AUG-2011
2 3
A3
P3V3S
P3V3S
R4732
10K_5%_1
2 1
OUT
38
OUT
R4731
10K_5%_1
IN
10K_5%_1
MODEL,PROJECT,FUNCTION
PCH - 1
1310xxxxx-0-0
SHEET
2 1
28
R4836
2 1
DOC.NUMBER
of
24
39
1
REV
X01
D
C C
B
A A
D
MODIFY 20111012
P3V3S
P3V3A
8 7
6 5
4
3 2 1
P3V3A
IN
IN
IN
IN
PCIE_WLAN_RX_C_DN
PCIE_WLAN_RX_C_DP
PCIE_WLAN_TX_C_DN
PCIE_WLAN_TX_C_DP
PCIE_WIGI_RX_C_DN
PCIE_WIGI_RX_C_DP
PCIE_WIGI_TX_C_DN
PCIE_WIGI_TX_C_DP
C4707
C4708
C4711
C4712
2 1
2 1
2 1
2 1
0.1UF_10V_1
0.1UF_10V_1
0.1UF_10V_1
0.1UF_10V_1
PCIE_WLAN_TX_DN
PCIE_WLAN_TX_DP
PCIE_LAN_TX_DN
PCIE_LAN_TX_DP
38
38
38
OUT
38
OUT
38
38
38
OUT
38
OUT
UM77-PCIE 4/5/6/7 DISABLE
R4742
1
2
10K_5%_1
CLKREQ_WIGI#
IN
UM77-PCIE 4/5/6/7 DISABLE
UM77-PCIE 4/5/6/7 DISABLE
UM77-PCIE 4/5/6/7 DISABLE
R4880
1
1
R4737
2
1K_5%_1
2
10K_5%_1
PCH_DDR_RST
CLKREQ_WLAN#
25
IN
IN
15 19
38 25
MODIFY 20111012
38
38
38 25
CLK_PCIE_WLAN_DN
OUT
CLK_PCIE_WLAN_DP
OUT
CLKREQ_WLAN#
IN
BG34
BJ34
AV32
AU32
BE34
BF34
BB32
AY32
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
BG37
BH37
AY36
BB36
BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38
Y40
Y39
J2
U4700
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
PERN6
PERP6
PETN6
PETP6
PERN7
PERP7
PETN7
PETP7
PERN8
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0#/GPIO73
E12
SMBALERT#/GPIO11
SMBCLK
SMBDATA
SMBUS
PCI-E*
Link
SML0ALERT#/GPIO60
SML0CLK
SML0DATA
SML1ALERT#/PCHHOT#/GPIO74
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
GPIO11
H14
PCH_3A_SMCLK
C9
PCH_3A_SMDAT
A12
PCH_DDR_RST
C8
PCH_3M_SMCLK
G12
PCH_3M_SMDAT
C13
GPIO74
E14
PCH_THM_SMCLK
M16
PCH_THM_SMDAT
M7
T11
P10
Controller
M10
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKREQ_GPU#
AB37
AB38
R4759
10K_5%_1
R4760
R4761
R4762
10K_5%_1
2 1
OUT
2 1
2.2K_5%_1
2 1
2.2K_5%_1
2 1
10K_5%_1
R4763
R4764
R4765
BI
BI
BI
BI
2 1
2 1
2 1
25
25
15 19
33
33
2.2K_5%_1
2.2K_5%_1
P3V3A
25
D
C C
1
TP4780
TP4781
TP4782
TP24
TP24
TP24
CLK_PCIE_WIGI_DN
1
CLK_PCIE_WIGI_DP
1
CLKREQ_WIGI#
P3V3S
R4747
1
B
P3V3A P3V3S
2
2 1
R4745
R4744
R4743
1
2.2K_5%_1
23 35
22 38
25
23 35
22 38
25
PCH_3S_SMCLK
BI
PCH_3A_SMCLK
BI
PCH_3S_SMDAT
BI
PCH_3A_SMDAT
BI
2.2K_5%_1
8
MODIFY 20111012
P3V3A
P3V3S
2 1
2
R4746
1
2.2K_5%_1
2.2K_5%_1
2 3
SSM3K7002FU
1
G
D S
Q4703
2
SSM3K7002FU
1
G
D S
Q4704
3
7 6
10K_5%_1
23
23
2
R4738
1
10K_5%_1
R4754
1
10K_5%_1
R4755
1
10K_5%_1
R4756
1
10K_5%_1
R4757
10K_5%_1
R4758
10K_5%_1
OUT
OUT
GPIO20
2
2
2
2
2 1
2 1
CLK_XDP_DN
CLK_XDP_DP
GPIO25
GPIO26
GPIO44
GPIO56
GPIO45
GPIO46
AB49
AB47
M1
AA48
AA47
V10
Y37
Y36
Y43
Y45
L12
V45
V46
L14
AB42
AB40
V40
V42
T13
V38
V37
K12
AK14
AK13
A8
E6
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1#/GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2#/GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3#/GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4#/GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5#/GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ#/GPIO56
CLKOUT_PCIE6N
CLKOUT_PCIE6P
PCIECLKRQ6#/GPIO45
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7#/GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
ITL_PANTHERPOINT_FCBGA_989P
5 4
CLOCKS
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
FLEX CLOCKS
CLKOUTFLEX3/GPIO67
CHANGE by
AV22
CLK_DMI_PCH_DN
AU22
CLK_DMI_PCH_DP
AM12
CLK_DP_PCH_DN
AM13
CLK_DP_PCH_DP
BF18
CLKIN_DMI_PCH_DN
BE18
CLKIN_DMI_PCH_DP
BJ30
CLKIN_BUF_CPYCLK_DN
BG30
CLKIN_BUF_CPYCLK_DP
G24
CLKIN_BUF_DOT96_DN
E24
CLKIN_BUF_DOT96_DP
AK7
CLKIN_SATA_DN
AK5
CLKIN_SATA_DP
K45
CLKIN_BUF_REF14
H45
CLKIN_PCI_FB
V47
XTAL25PCH_IN
V49
XTAL25PCH_OUT
Y47
PCH_XCLK_RCOMP
K43
F47
H47
K49
XXX
R4766
R4767
R4768
R4769
R4770
R4771
R4772
R4773
R4774
OUT
OUT
OUT
OUT
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
2 1
IN
IN
OUT
R4775
2 1
90.9_1%_2
DATE
15
15
15
15
10K_5%_1
10K_5%_1
10K_5%_1
10K_5%_1
10K_5%_1
10K_5%_1
10K_5%_1
10K_5%_1
10K_5%_1
25
28
25
25
25
24-AUG-2011
2 3
XTAL25PCH_OUT
IN
XTAL25PCH_IN
OUT
P1V05S_VCCP
INVENTEC
TITLE
SIZE
A3
R4776
1M_5%_1
X4701
1
4
25MHz
C4713
2 1
27PF_50V_1
MODEL,PROJECT,FUNCTION
PCH - 2
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
CODE
B
2 1
3
2
A A
C4714
2 1
27PF_50V_1
REV
X01
39 25
1
8 7
D
P1V05S_VCCP
P3V3S
6 5
16
IN
16
IN
16
IN
16
IN
16
IN
16
IN
16
IN
16
IN
16
OUT
16
OUT
16
OUT
16
OUT
16
OUT
16
OUT
16
OUT
16
OUT
R4777
DMI_RX0_DN
DMI_RX1_DN
DMI_RX2_DN
DMI_RX3_DN
DMI_RX0_DP
DMI_RX1_DP
DMI_RX2_DP
DMI_RX3_DP
DMI_TX0_DN
DMI_TX1_DN
DMI_TX2_DN
DMI_TX3_DN
DMI_TX0_DP
DMI_TX1_DP
DMI_TX2_DP
DMI_TX3_DP
2 1
PCH_DMI_ZCOMP
49.9_1%_2
R4778
2 1
PCH_DMI2RBIAS
750_1%_1
BC24
BE20
BG18
BG20
BE24
BC20
BJ18
BJ20
AW24
AW20
BB18
AV18
AY24
AY20
AY18
AU18
BJ24
BG25
BH21
U4700
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP
DMI_IRCOMP
DMI2RBIAS
4
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
DMI
FDI
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9
BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9
AW16
AV12
BC10
AV14
BB10
A18
3 2 1
FDI_TX0_DN
FDI_TX1_DN
FDI_TX2_DN
FDI_TX3_DN
FDI_TX4_DN
FDI_TX5_DN
FDI_TX6_DN
FDI_TX7_DN
FDI_TX0_DP
FDI_TX1_DP
FDI_TX2_DP
FDI_TX3_DP
FDI_TX4_DP
FDI_TX5_DP
FDI_TX6_DP
FDI_TX7_DP
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
P3V3_RTC
R4787
2 1
PCH_DSWVRMEN
D
330K_5%_2
C C
R4779
2 1
26 33
11
23
33
15
33 26
SUS_PWR_DN_ACK
IN
VR_PWRGD
IN
SB_PWRGD
IN
PM_DRAM_PWRGD
OUT
RSMRST#
IN
0_5%_1_DY
R4780
10K_5%_1
R4781
0_5%_1
R4782
0_5%_1
R4783
0_5%_1
PCH_SUSACK#
2 1
PCH_SYSRESET#
2 1
2 1
2 1
B
SUS_PWR_DN_ACK
OUT
SB_PWRBTN#
IN
ADP_PRES
R4794
R4784
10K_5%_1
R4785
10K_5%_1
R4786
10K_5%_1
2 1
0_5%_1_DY
2 1
GPIO31
2 1
GPIO72
2 1
PM_RI#
P3V3A
CHECK
26 33
23 33
33
OUT
C12
P12
L22
L10
B13
C21
K16
E20
H20
E10
A10
SUSACK#
SYS_RESET#
SYS_PWROK
PWROK
APWROK
DRAMPWROK
RSMRST#
SUSWARN#/SUSPWRDNACK/GPIO30
PWRBTN#
ACPRESENT/GPIO31
BATLOW#/GPIO72
RI#
ITL_PANTHERPOINT_FCBGA_989P
DPWROK
WAKE#
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
System Power Management
SLP_A#
SLP_SUS#
PMSYNCH
SLP_LAN#/GPIO29
E22
B9 K3
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
PCI_CLKRUN#
GPIO29
R4790
8.2K_5%_1
TP4701
1
TP24
TP4702
1
TP24
TP4713
1
TP24
R4792
R4793
0_5%_1
0_5%_1
TP4711
1
TP24
TP4703
1
TP24
R4795
10K_5%_1_DY
2 1
2 1
2 1
2 1
RSMRST#
PCIE_WAKE#
CHECK
SLP_S4#
SLP_S3#
CHECK
H_PM_SYNC
IN
IN
OUT
OUT
OUT
33 26
33 38
26
33
33
15
CHECK
P3V3S
B
P3V3A
P3V3A
1K_5%_1
2 1
R4796
2 1
R4797
A A
IN
IN
SUS_PWR_DN_ACK
10K_5%_1
PCIE_WAKE#
26 33
33 38 26
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PCH - 3
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 26
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
35
OUT
35
D
OUT
35
OUT
PCH_LCD_BKEN
PCH_LCDVDD_EN
PCH_LCD_PWM
J47
M45
P45
T40
K47
T45
P39
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AM47
AK47
AJ48
AN47
AM49
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
U4700
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
LVDS
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
Digital Display Interface
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
D
P3V3S
SSM3K7002FU
1
Q4705
R4881
1M_5%_1
27
PCH_HDMI_HPD
2 1
G
2
3
D S
HDMI_HPD
38
IN OUT
C C
R4882
20K_5%_1
2 1
B
N48
P49
T49
CRT_BLUE
CRT_GREEN
CRT_RED
CRT
CLOSE TO PCH
PCH_DAC_IREF
R4843
1K_1%_1
2 1
T39
M40
M47
M49
T43
T42
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
ITL_PANTHERPOINT_FCBGA_989P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
PCH_HDMI_CLK
PCH_HDMI_DAT
PCH_HDMI_HPD
PCH_HDMI_TX2_DN
PCH_HDMI_TX2_DP
PCH_HDMI_TX1_DN
PCH_HDMI_TX1_DP
PCH_HDMI_TX0_DN
PCH_HDMI_TX0_DP
PCH_HDMI_TXCL_DN
PCH_HDMI_TXCL_DP
BI
BI
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
38
38
27
38
38
38
38
38
38
38
38
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PCH - 4
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 27
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
P3V3A
U4700
R4808
R4809
R4810
R4811
2 1
2 1
2 1
2 1
38
38
28
IN
28
IN
28
IN
28
IN
28
IN
38
38
38
38
38
38
USB3_P3_RX_DN
IN
USB3_P4_RX_DN
IN
USB3_P3_RX_DP
IN
USB3_P4_RX_DP
IN
USB3_P3_TX_DN
OUT
USB3_P4_TX_DN
OUT
USB3_P3_TX_DP
OUT
USB3_P4_TX_DP
OUT
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
B21
M20
AY16
BG46
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
H3
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
USB3RN1
USB3RN2
USB3RN3
USB3RN4
USB3RP1
USB3RP2
USB3RP3
USB3RP4
USB3TN1
USB3TN2
USB3TN3
USB3TN4
USB3TP1
USB3TP2
USB3TP3
USB3TP4
RSVD
NVRAM
28 28
GPIO55 GPIO59
IN
1K_5%_1_DY
GPIO55 : TOP-BLOCK SWAP OVERRIDE
LOW=A16 SWAP OVERRIDE
HIGH=DEFAULT
D
24
28
28
BBSTRAP1 BBSTRAP0
0 0
0
1
1
P3V3S
BBSTRAP0
IN
BBSTRAP1
IN
DGPU_PWM_SELECT#
IN
R4812
R4813
R4814
R4815
R4816
10K_5%_1
8.2K_5%_1
1K_5%_1
8.2K_5%_1
8.2K_5%_1
1K_5%_1_DY
1K_5%_1_DY
1K_5%_1_DY
BOOT BIOS
LPC
1
0
1
Reserved (NAND)
2 1
DGPU_HOLD_RST#
2 1
DGPU_SELECT#
2 1
DGPU_PWR_EN#
2 1
USB30_SMI#
2 1
ACCEL_INT#
-ÂSPI
P3V3S
R4818
B
R4819
R4820
R4821
P3V3A
C4716
2 1
0.1UF_10V_1
CHECK
OUT
BUF_PLT_RST#
R4817
2 1
15
33 38
U4702
4
100K_5%_1
5
+
1
2
-
TC7SZ08FU
3
PLT_RST#
28 23
IN
33
OUT
25
OUT
38
OUT
P3V3S
P3V3A
CLK_LPC_EC
CLKIN_PCI_FB
CLK_LPC_DEBUG
R4822
R4823
R4824
R4826
R4825
2 1
2 1
2 1
2 1
28
OUT
28
OUT
28
OUT
28
IN
28
OUT
28
IN
28
IN
28
IN
10K_5%_1_DY
23 28
OUT
R4827
22_5%_1
8.2K_5%_1
8.2K_5%_1
8.2K_5%_1
8.2K_5%_1
DGPU_HOLD_RST#
DGPU_SELECT#
DGPU_PWR_EN#
BBSTRAP1
DGPU_PWM_SELECT#
GPIO55
2 1
8.2K_5%_1
2 1
8.2K_5%_1
2 1
2 1
22_5%_1
2 1
22_5%_1
2 1
PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
USB30_SMI#
GPIO3
GPIO4
ACCEL_INT#
PCH_PME#
PLT_RST#
CLK_LPC_EC_R
CLKIN_PCI_FB_R
CLK_LPC_DEBUG_R
K40
K38
H38
G38
C46
C44
E40
D47
E42
F46
G42
G40
C42
D44
K10
H49
H43
J48
K42
H40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PME#
C6
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4 OC7#/GPIO14
ITL_PANTHERPOINT_FCBGA_989P
PCI
USB
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
RSVD28
RSVD29
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10
AT8
AY5
BA2
AT12
BF3
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
USB_P2_DN
USB_P2_DP
USB_P3_DN
USB_P3_DP
USB_P4_DN
USB_P4_DP
USB_P5_DN
USB_P5_DP
UM77-USB6/7/12/13 DISABLE
USB_P8_DN
USB_P8_DP
USB_P9_DN
USB_P9_DP
UM77-USB6/7/12/13 DISABLE
PCH_USBBIAS
GPIO59
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
2ND_WWAN_GPS_OFF#
OUT
28 37
OUT
28
OUT
28
OUT
28
OUT
28
OUT
28
OUT
28
OUT
28
OUT
28
OUT
38
BI
38
BI
38
BI
38
BI
37
BI
37
BI
35
BI
35
BI
38
BI
38
BI
38
BI
38
BI
CLOSE TO PCH
R4828
22.6_1%_1
2 1
IN
IN
IN
IN
IN
IN
IN
IN
2ND_WWAN_GPS_OFF#
BOARD_ID0
BOARD_ID1
CHECK
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
ID3 ID1 ID5
ID4
UMASG0 0
0
0 0
USB3.0
USB3.0
WWAN
WEBCAM
WLAN COMBO
USB2.0 DB (DeBug Port)
28
28
28
28
28
28
28
28 37
R4829
R4830
R4831
R4832
R4837
R4838
R4839
R4840
R4841
R4842
ID2
0 0
0 0
2 1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1_DY
2 1
10K_5%_1_DY
2 1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
ID0
0
1 0
D
C C
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PCH - 5
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 28
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
P3V3A
2 1
2 1
2 1
2 1
R4865
R4866
R4867
R4868
P3V3S
IN
CHECK
IN
OUT
2 1
OUT
33
29 33
15
15
23
PM_THRMTRIP#
D
15
IN
C C
B
A A
29 38
OUT
29 37
OUT
29 37
OUT
29
OUT
29 38
OUT
WLAN_RF_OFF#
WWAN_RF_OFF#
WWAN_POWER_OFF#
BTOFF
WLAN_POWER_OFF
R4844
R4845
R4846
R4878
R4859
2 1
D
33 29
OUT
29
OUT
29
OUT
29
OUT
33 29
OUT
29 33
29
PCI_SERR#
DGPU_HPD_INTR#
HDD_LOCK_LED
TEMP_ALERT#
KB_RST#
DGPU_PWROK
OUT
GPIO37
OUT
R4847
R4848
R4851
R4852
R4853
R4854
R4855
B
2 1
10K_5%_1
2 1
1K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
2 1
10K_5%_1
2 1
100K_5%_1
2 1
100K_5%_1
P3V3S
P3V3S
P3V3S
P3V3S
29 33
33
29
33
29
29 37
R4857
29 33
R4858
29 37
29 38
R4860
R4861
R4862
R4885
10K_5%_1
R4863
R4864
IN
IN
IN
IN
R4856
1K_5%_1_DY
OUT
OUT
10K_5%_1
IN
10K_5%_1
OUT
OUT
1K_5%_1_DY
10K_5%_1
10K_5%_1_DY
IN
2 1
29
IN
10K_5%_1
10K_5%_1
29
OUT
29
OUT
29 38
OUT
PCI_SERR#
EC_SMI#
DGPU_HPD_INTR#
EC_SCI#
2 1
GPIO8
BTOFF
WWAN_RF_OFF#
2 1
GPIO16
DGPU_PWROK
2 1
GPIO22
WWAN_POWER_OFF#
WLAN_POWER_OFF
2 1
GPIO28
2 1
GPIO34
2 1
GPIO35
ODD_PRSNT#
GPIO37
2 1
GPIO38
2 1
GPIO39
HDD_LOCK_LED
TEMP_ALERT#
WLAN_RF_OFF#
A42
H36
E38
C10
D40
E16
M5
M3
V13
A45
A46
B47
BD1
BD49
BE1
BE49
BF1
BF49
C4
G2
U2
K1
N2
D6
T7
T5
E8
P8
K4
V8
V3
A4
A5
A6
B3
U4700
BMBUSY#/GPIO0
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
LAN_PHY_PWR_CTRL/GPIO12
GPIO15
SATA4GP/GPIO16
TACH0/GPIO17
SCLOCK/GPIO22
GPIO24
GPIO27
GPIO28
STP_PCI#/GPIO34
GPIO35
SATA2GP/GPIO36
SATA3GP/GPIO37
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
SATA5GP/GPIO49/TEMP_ALERT#
GPIO57
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
ITL_PANTHERPOINT_FCBGA_989P
GPIO
TACH4/GPIO68
TACH5/GPIO69
TACH6/GPIO70
TACH7/GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
INIT3_3V#
CPU/MISC
DF_TVS
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
NCTF
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32
C40
GPIO68
B41
GPIO69
C41
GPIO70
A40
GPIO71
P4
A20GATE
AU16
PCH_PECI
P5
KB_RST#
AY11
H_CPUPWRGD
AY10
PM_THRMTRIP#_PCH
T14
AY1
NV_CLE
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44 A44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
10K_5%_1
10K_5%_1
10K_5%_1
10K_5%_1
TP4714
1
TP24
390_5%_2
R4869
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PCH - 6
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 29
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
P1V05S_VCCP
D
2 1
C4724
2 1
C4718
2.2UF_6.3V_2
CHECK
C4725
1uF_6.3V_2
C4719
2 1
2 1
2.2UF_6.3V_2
P1V05S_VCCP
2 1
1uF_6.3V_2
1uF_6.3V_2
TP24
TP4705
1
P1V05S_VCCP
C4717
C4722
2 1
10UF_6.3V_3
C4783
2 1
10UF_6.3V_3
C4723
2 1
2.2UF_6.3V_2
P3V3S
B
C4728
TP24
2 1
TP4706
0.1UF_10V_1
1
P1V05S_VCCP
P1V5S_VCCAFDI_VRM
CHECK
P1V05S_VCCP
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
AN19
BJ22
AN16
AN17
AN21
AN26
AN27
AP21
AP23
AP24
AP26
AT24
AN33
AN34
BH29
AP16
BG6
AP17
AU20
U4700
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]
VCCIO[28]
VCCAPLLEXP
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCC3_3[3] VCCDFTERM[2]
VCCVRM[2]
VccAFDIPLL
VCCIO[27]
VCCDMI[2]
ITL_PANTHERPOINT_FCBGA_989P
POWER
VCC CORE
VCCIO
FDI
CRT
LVDS
DMI HVCMOS
NAND / SPI
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
VCC3_3[6]
VCC3_3[7]
VCCVRM[3]
VCCDMI[1]
VCCCLKDMI
VCCDFTERM[1]
VCCDFTERM[3]
VCCDFTERM[4]
VCCSPI
U48
U47
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
V1
P3V3S_PCH_VCCADAC
R4798
R4799
P3V3S
C4735
P1V8S
C4738
2 1
2 1
2 1
2 1
0.1UF_10V_1
0.1UF_10V_1
0_5%_1
0_5%_1
P1V05S_VCCP_VCCCLKDMI
C4729
2 1
0.01UF_10V_1
P1V5S_VCCAFDI_VRM
MLZ1608M100WT
C4737
2 1
1uF_6.3V_2_DY
P3V3A
L4701
MLZ1608M100WT
C4730
C4731
2 1
2 1
10UF_6.3V_3
0.1UF_10V_1
P1V05S_VCCP
L4711
2 1
P3V3S
2 1
P1V05S_VCCP
C4736
2 1
1uF_6.3V_2
D
C C
B
A A
C4739
2 1
1uF_6.3V_2
P1V5S
P1V5S_VCCAFDI_VRM
R4872
0_5%_3
8
7 6
5 4
2 1
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PCH - 7
CHANGE by
XXX
DATE
24-AUG-2011
2 3
SIZE
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 30
CODE
A3
1
REV
X01
8 7
6 5
4
3 2 1
D
B
P3V3S
L4712
MLZ1608M100WT
P1V05S_VCCP
L4703
MLZ1608M100WT
MLZ1608M100WT
2 1
2 1
L4704
2 1
P1V05S_VCCP
8
C4740
C4741
2 1
1uF_6.3V_2
P1V05S_VCCP
P1V05S_PCH_VCCADPLLA
C4751
2 1
P1V05S_PCH_VCCADPLLB
C4755
2 1
C4764
C4765
2 1
2 1
4.7uF_6.3V_3
2 1
10UF_6.3V_3
C4748
C4752
22uF_6.3V_5
C4756
22uF_6.3V_5
0.1UF_10V_1
P1V05S_VCCP
C4701
2 1
2 1
1uF_6.3V_2
C4753
2 1
P1V05S_VCCP
C4766
2 1
2.2UF_6.3V_2
C4757
2 1
2 1
2.2UF_6.3V_2
2 1
0.1UF_10V_1
P3V3A
CHECK
C4742
2 1
0.1UF_10V_1
CHECK
CHECK
CHECK
C4702
C4747
2 1
1uF_6.3V_2
1uF_6.3V_2
C4745
2 1
1uF_6.3V_2
0.1UF_10V_1
P1V5S_VCCAFDI_VRM
0.1UF_10V_1
C4759
C4760
C4761
C4746
2 1
10UF_6.3V_3
2 1
2 1
2 1
C4762
2 1
0.1UF_10V_1
2 1
CHECK
P3V3_RTC
C4767
C4768
2 1
1uF_6.3V_2
7 6
TP4707
TP4717
1
1
TP24
TP24
P3V3_VCC3_3_5
TP4708
TP4716
1
1
TP24
TP24
10UF_6.3V_3
C4758
2 1
0.1UF_10V_1
1uF_6.3V_2
1uF_6.3V_2
1uF_6.3V_2
TP4715
TP24
C4769
2 1
2 1
0.1UF_10V_1
0.1UF_10V_1
P1V05S_VCCP
AD49
T16
V12
T38
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31
W21
W23
W24
W26
W29
W31
W33
N16
Y49
BD47
BF47
AF17
AF33
AF34
AG34
AG33
V16
1
T17
V19
BJ8
A22
U4700
VCCACLK
VCCDSW3_3
DCPSUSBYP
VCC3_3[5]
VCCAPLLDMI2
VCCIO[14]
DCPSUS[3]
VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]
DCPRTC
VCCVRM[4]
VCCADPLLA
VCCADPLLB
VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]
VCCSSC
DCPSST
DCPSUS[1]
DCPSUS[2]
V_PROC_IO
POWER
Clock and Miscellaneous
SATA
CPU
VCCRTC
ITL_PANTHERPOINT_FCBGA_989P
RTC
HDA
USB
PCI/GPIO/LPC MISC
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[6]
VCCIO[34]
V5REF_SUS
DCPSUS[4]
VCCSUS3_3[1]
V5REF
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCC3_3[1]
VCC3_3[8]
VCC3_3[4]
VCC3_3[2]
VCCIO[5]
VCCIO[12]
VCCIO[13]
VCCIO[6]
VCCAPLLSATA
VCCVRM[1]
VCCIO[2]
VCCIO[3]
VCCIO[4]
VCCASW[22]
VCCASW[23]
VCCASW[21]
VCCSUSHDA
5 4
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
C4780
2 1
1uF_6.3V_2
2 1
0.1UF_10V_1
2 1
0.1UF_10V_1
C4779
C4778
P5V0A_PCH_V5REF_SUSU
TP4710
1
TP24
CHECK
P5V0S_PCH_V5REF
C4776
2 1
1uF_6.3V_2
2 1
0.1UF_10V_1
2 1
0.1UF_10V_1
2 1
0.1UF_10V_1
C4772
2 1
1uF_6.3V_2
C4771
2 1
1uF_6.3V_2
C4770
2 1
0.1UF_10V_1
C4775
C4774
C4773
TP4772
1
CHANGE by
TP24
XXX
P3V3A P3V3A
P1V05S_VCCP
P3V3A
P3V3A
P3V3S
P3V3S
P1V05S_VCCP
CHECK
P1V05S_VCCP
P1V05S_VCCP
P3V3A
P1V5S_VCCAFDI_VRM
DATE
24-AUG-2011
2 3
D4700
1SS355VMTE_17
R4876
10_5%_1
C4781
2 1
0.1UF_10V_1
D4701
1SS355VMTE_17
R4877
10_5%_1
C4782
2 1
1uF_6.3V_2
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PCH - 8
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
31
SIZE
CODE
A3
P3V3A
2 1
2 1
P5V0A
2 1
D
P3V3S
2 1
2 1
P5V0S
2 1
C C
B
A A
REV
X01
of
39
1
8 7
6 5
4
3 2 1
U4700
AY4
VSS[159]
AY42
VSS[160]
AY46
VSS[161]
AY8
VSS[162]
B11
VSS[163]
B15
VSS[164]
B19
VSS[165]
B23
VSS[166]
B27
VSS[167]
B31
VSS[168]
B35
VSS[169]
B39
VSS[170]
B7
VSS[171]
F45
VSS[172]
BB12
VSS[173]
BB16
VSS[174]
D
B
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
D3
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
D8
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
F3
VSS[258]
ITL_PANTHERPOINT_FCBGA_989P
8
7 6
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
5 4
U4700
H5
VSS[0]
AA17
VSS[1]
AA2
VSS[2]
AA3
VSS[3]
AA33
VSS[4]
AA34
VSS[5]
AB11
VSS[6]
AB14
VSS[7]
AB39
VSS[8]
AB4
VSS[9]
AB43
VSS[10]
AB5
VSS[11]
AB7
VSS[12]
AC19
VSS[13]
AC2
VSS[14]
AC21
VSS[15]
AC24
VSS[16]
AC33
VSS[17]
AC34
VSS[18]
AC48
VSS[19]
AD10
VSS[20]
AD11
VSS[21]
AD12
VSS[22]
AD13
VSS[23]
AD19
VSS[24]
AD24
VSS[25]
AD26
VSS[26]
AD27
VSS[27]
AD33
VSS[28]
AD34
VSS[29]
AD36
VSS[30]
AD37
VSS[31]
AD38
VSS[32]
AD39
VSS[33]
AD4
VSS[34]
AD40
VSS[35]
AD42
VSS[36]
AD43
VSS[37]
AD45
VSS[38]
AD46
VSS[39]
AD8
VSS[40]
AE2
VSS[41]
AE3
VSS[42]
AF10
VSS[43]
AF12
VSS[44]
AD14
VSS[45]
AD16
VSS[46]
AF16
VSS[47]
AF19
VSS[48]
AF24
VSS[49]
AF26
VSS[50]
AF27
VSS[51]
AF29
VSS[52]
AF31
VSS[53]
AF38
VSS[54]
AF4
VSS[55]
AF42
VSS[56]
AF46
VSS[57]
AF5
VSS[58]
AF7
VSS[59]
AF8
VSS[60]
AG19
VSS[61]
AG2
VSS[62]
AG31
VSS[63]
AG48
VSS[64]
AH11
VSS[65]
AH3
VSS[66]
AH36
VSS[67]
AH39
VSS[68]
AH40
VSS[69]
AH42
VSS[70]
AH46
VSS[71]
AH7
VSS[72]
AJ19
VSS[73]
AJ21
VSS[74]
AJ24
VSS[75]
AJ33
VSS[76]
AJ34
VSS[77]
AK12
VSS[78]
AK3
VSS[79]
ITL_PANTHERPOINT_FCBGA_989P
CHANGE by
XXX
DATE
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
24-AUG-2011
2 3
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
PCH - 9
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 32
1
SIZE
CODE
A3
REV
X01
D
C C
B
A A
8 7
6 5
4
3 2 1
P3V3AL
L300
2 1
BLM15AG121SN1D_500mA
C300
C301
2 1
0.1UF_10V_1
C302
2 1
0.1UF_10V_1
C303
2 1
2 1
0.1UF_10V_1
BLM15AG121SN1D_500mA
0.1UF_10V_1
P3V3S
R321
R300
R301
2 1
2 1
2 1
1SS355VMTE_17
2 1
2 1
2 1
1SS355VMTE_17
D300
EC_SMI#_D EC_SMI#
D301
EC_SCI#_D
D
29 24 38
10K_5%_1
OUT
P3V3S
10K_5%_1
OUT
EC_SCI#
29
2 1
10K_5%_1
P3V3S
29
OUT
R305
10K_5%_1
P3V3AL
D302
2 1
2 1
1SS355VMTE_17
R302
100K_5%_1
2 1
ADP_SEL :
PU : 90W (SG)
PD : 65W (UMA)
C305
2 1
0.1UF_10V_1
1
R304
2
100K_5%_1
B
P3V3AL
33
33
IN
OUT
EC_SPI_CS0#
EC_SPI_SO
R311
3.3K_5%_1
8
U301
1
CS#
2
2 1
SO_SIO1
3
WP#_ACC
4
GND
MXIC_MX25L3206EM2I_12G_SOP_8P
VCC
HOLD#
SCLK
SI_SIO0
C306
2 1
0.1UF_10V_1
8
7
6
EC_SPI_CLK
5
EC_SPI_SI
7 6
R312
P3V3AL
2 1
3.3K_5%_1
IN
IN
P3V3S
33
33
P3V3AL_EC_VSTBY
R333
L301
2 1
P3V3S_EC_VCC
2 1
0_5%_1
C304
2 1
0.1UF_10V_1
U300
10
LAD0_GPM0_3_X
9
LAD1_GPM1_3_X
8
LAD2_GPM2_3_X
7
LAD3_GPM3_3_X
22
13
LPCCLK_GPM4_3_X
6
LFRAME#_GPM5_3_X
17
LPCPD#_WUI6_GPE6_DN
126
GA20_GPB5_3_X
5
SERIRQ_GPM6_3_X
15
ECSMI#_GPD4_3_UP
23
ECSCI#_GPD3_UP
14
WRST#
4
KBRST#_GPB6_3_X
16
PWUREQ#_BBO_SMCLK2ALT_GPC7_3_UP
119
CRX0_GPC0_DN
123
CTX0_TMA0_GPB2_3_DN
80
DAC4_DCD0#_GPJ4_3_X
104
DSR0#_GPG6_X
33
GINT_CTS0#_GPD5_UP
88
PS2DAT1_RTS0#_GPF3_UP
81
DAC5_RIG0#_GPJ5_3_X
87
PS2CLK1_DTR0#_GPF2_UP
109
TXD_SOUT0_GPB1_UP
108
RXD_SIN0_GPB0_UP
71
ADC5_DCD1#_WUI29_GPI5_3_X
72
ADC6_DSR1#_WUI30_GPI6_3_X
73
ADC7_CTS1#_WUI31_GPI7_3_X
35
RTS1#_WUI5_GPE5_DN
34
PWM7_RIG1#_GPA7_UP
107
DTR1#_SBUSY_GPG1_ID7_DN
95
CTX1_WUI18_SOUT1_GPH2_SMDAT3_ID2_DN
94
CRX1_WUI17_SIN1_SMCLK3_GPH1_ID1_DN
105
FSCK
101
FSCE#
102
FMOSI
103
FMISO
56
KSO16_SMOSI_GPC3_3_DN
57
KSO17_SMISO_GPC5_3_DN
32
PWM6_SSCK_GPA6_UP
100
106
36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
SSCE0#_GPG2_X
SSCE1#_GPG0_X
KSO0_PD0
KSO1_PD1
KSO2_PD2
KSO3_PD3
KSO4_PD4
KSO5_PD5
KSO6_PD6
KSO7_PD7
KSO8_ACK#
KSO9_BUSY
KSO10_PE
KSO11_ERR#
KSO12_SLCT
KSO13
KSO14
KSO15
1
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
BUF_PLT_RST#
CLK_LPC_EC
LPC_FRAME#
RSMRST#
A20GATE
SERIRQ
EC_RST#
KB_RST#
1
CHG_LED
ADP_SEL
RESUME_PWEN
DGPU_PWROK
GPU_THROT#
SLP_S3#
RF_AMBER_LED#
ME_FLASH_EN
ODD_PWEN#
WOL_PWEN#
TP_OFF_LED#
BATT_IN#
I_ADP
AC_OK
ADP_PRES
RF_WHITE_LED#
ADP_EN
PCH_THM_SMDAT
PCH_THM_SMCLK
EC_SPI_CLK
EC_SPI_CS0#
EC_SPI_SI
EC_SPI_SO
KSO16
KSO17
CORE_PWEN_D#
PCI_SERR#
TP24
TP303
SCAN_OUT<0>
SCAN_OUT<1>
SCAN_OUT<2>
SCAN_OUT<3>
SCAN_OUT<4>
SCAN_OUT<5>
SCAN_OUT<6>
SCAN_OUT<7>
SCAN_OUT<8>
SCAN_OUT<9>
SCAN_OUT<10>
SCAN_OUT<11>
SCAN_OUT<12>
SCAN_OUT<13>
SCAN_OUT<14>
SCAN_OUT<15>
BI
24 38
BI
24 38
BI
24 38
BI
28
15
38
28
24 38
2 1
26
25
TP309
TP310
TP311
TP312
TP313
TP314
TP315
TP316
TP317
TP318
TP319
26
OUT
24
BI
29
OUT
TP24
14
OUT OUT
29
TP24
TP24
24
OUT
TP24
TP24
TP24
5
4
4
26
TP24
TP24
BI
25
BI
33
OUT
33
OUT
33
OUT
33
TP24
TP24
TP24
29
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
34
OUT
11
VCC
EXTERNAL SERIAL FLASH
SPI ENABLE
KSI1_AFD#
KSI0_STB#
121
114
929150
26
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
LPC
CIR
UART port
KBMX
KSI6
KSI5
KSI4
KSI3_SLIN#
KSI2_INIT#
6261605958
IN
IN
IN
IN
IN
IN
IN
IN
SCAN_IN<0>
SCAN_IN<1>
SCAN_IN<2>
SCAN_IN<3>
SCAN_IN<4>
SCAN_IN<5>
SCAN_IN<6>
SCAN_IN<7>
34
34
34
34
34
34
34
34
127
74
3
VBAT
AVCC
VSTBY
EGCLK_WUI27_GPE3_DN
KSI7
656463
VSS
VSS
1
27
838482
EGCS#_WUI26_GPE2_DN
VSS
49
19
20
EGAD_WUI25_GPE1_DN
L80LLAT_WUI7_GPE7_UP
L80HLAT_BAO_WUI24_GPE0_DN
GPIO
WAKE UP
122
113
VSS
AVSS
75
122
113
979699
98
93
HSCK_GPH4_ID4_DN
HMOSI_GPH6_ID6_DN
HMISO_GPH5_ID5_DN
HSCE#_WUI19_GPH3_ID3_DN
CLKRUN#_WUI16_GPH0_ID0_DN
RING#_PWRFAIL#_CK32KOUT_LPCRST#_GPB7_DN
A/D D/A
VCORE
ITE_ITE8517E_G_LQFP_128P
12
C307
2 1
0.1UF_10V_1
5 4
LID_SW#
SB_PWRBTN#
USBPWR_EN
PCIE_WAKE#
HSPI_SI
HSPI_SO
HSPI_CLK
HSPI_CS0#
SB_PWRGD
100K_5%_1
SM BUS
PECI_SMCLK2_WUI22_GPF6_3_UP LPCRST#_WUI4_GPD2_UP
SMDAT2_WUI23_GPF7_3_UP
PS2CLK0_TMB0_GPF0_UP
PS2DAT0_TMB1_GPF1_UP
PS2CLK2_WUI20_GPF4_UP
PS/2
PS2DAT2_WUI21_GPF5_UP
PWM
TACH1A_TMA1_GPD7_3_DN
DAC2_TACH0B_GPJ2_3_X
DAC3_TACH1B_GPJ3_3_X
CLOCK
CHANGE by
R303
2 1
SMCLK0_GPB3_X
SMDAT0_GPB4_X
SMCLK1_GPC1_X
SMDAT1_GPC2_X
PWM0_GPA0_UP
PWM1_GPA1_UP
PWM2_GPA2_UP
PWM3_GPA3_UP
PWM4_GPA4_UP
PWM5_GPA5_UP
TACH0A_GPD6_3_DN
TMRI0_WUI2_GPC4_3_DN
TMRI1_WUI3_GPC6_3_DN
PWRSW_GPE4_3_UP
RI1#_WUI0_GPD0_3_UP
RI2#_WUI1_GPD1_UP
ADC0_GPI0_3_X
ADC1_GPI1_3_X
ADC2_GPI2_3_X
ADC3_GPI3_3_X
ADC4_WUI28_GPI4_3_X
TACH2_GPJ0_3_X
GPJ1_3_X
CK32KE_GPJ7_3_X
CK32K_GPJ6_3_X
XXX
IN
OUT
OUT
1
OUT
OUT
OUT
OUT
OUT
OUT
110
111
115
116
117
118
85
86
89
90
24
25
28
29
30
31
47
48
120
124
125
18
21
112
66
67
68
69
70
76
77
78
79
2
128
38 35
23 26
34
TP24
TP306
38 26
24
24
24
24
26
R314
R315
EC_PECI
SUS_PWR_DN_ACK
CORE_PWEN#
ODD_MD#
TP_CLK
TP_DAT
PWR_LED#
KB_BLON
H_PROCHOT#
AOAC_LED
CPUFAN1_ON#
EC_LCD_PWM
FAN_TACH1
ALL_PWGD_IN
ALWAYS_PW_EN
CPU_PWEN
R332
SLP_S4#
CORE_PWEN
MB_ID0
MB_ID1
THERMTRIP#
ADP_ID
AMP_EN
WWAN_IND#
BT_IND
WLAN_IND#
1
R330
R331
0_5%_1
2 1
2 1
R316
0_5%_1
2 1
TP24
DATE
2 1
2.2K_5%_1
2 1
2.2K_5%_1
2 1
43_5%_1
IN
OUT
TP24
1
OUT
OUT
OUT
OUT
OUT
0_5%_1
IN
OUT
IN
IN
IN
TP24
OUT
R323
1
R324
1
24-AUG-2011
TP324
TP24
TP24
IN
IN
TP307
IN
TP24
IN
2 3
P3V3S
26
14
R355
R356
38
TP323
38
21
TP322
21
14 15
13
11
EC_PWRBTN#
EC_PWRBTN#
26
14 19
33
33
TP321
36
37
TP320
38
10K_5%_1
2
2
10K_5%_1
THM_CLK
THM_DAT
BATT_CLK
BATT_DAT
H_PECI
R318
R319
2
10K_5%_1_DY
2 1
10K_5%_1_DY
11
33
33
21
15
OUT
OUT
BI
BI
BI
BI
IN
BI
BI
21
21
4 5
4 5
15
2 1
10K_5%_1
2 1
10K_5%_1
34
34
IN
IN
MB_ID0
MB_ID1
38 33
38 33
P3V3S
MB_ID0
MB_ID1
0
0
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
EC
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
SIZE
CODE
A3
P3V3A
R326
2 1
R327
2 1
SI DB
1
0
of
33
P5V0A
10K_5%_1_DY 10K_5%_1
PV
0
39
1
P3V3AL
R328
2 1
R329
2 1
1
10K_5%_1_DY
10K_5%_1
MV
1
1
REV
X01
D
C C
B
A A
8 7
6 5
4
3 2 1
KEYBOARD CONN(26 PIN)
TouchPad Module CONN
P5V0A P3V3A
2 1
D
CN200
OUT
OUT
OUT
IN
OUT
OUT
IN
OUT
OUT
IN
IN
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
SCAN_IN(1)
SCAN_IN(7)
SCAN_IN(6)
SCAN_OUT(9)
SCAN_IN(4)
SCAN_IN(5)
SCAN_OUT(0)
SCAN_IN(2)
SCAN_IN(3)
SCAN_OUT(5)
SCAN_OUT(1)
SCAN_IN(0)
SCAN_OUT<2>
SCAN_OUT<4>
SCAN_OUT<7>
SCAN_OUT<8>
SCAN_OUT<6>
SCAN_OUT<3>
SCAN_OUT<12>
SCAN_OUT<13>
SCAN_OUT<14>
SCAN_OUT<11>
SCAN_OUT<10>
SCAN_OUT<15>
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
22
23
24
G1
21
G2
22
23
24
ACES_50503_0244N_001_24P
G1
G2
33
33
R200
2 1
BI
BI
TP_DAT
TP_CLK
R201
0_5%_1
C3700
0_5%_1_DY
2 1
10UF_6.3V_3
CN201
6
5
4
3
2
1
ACES_50501_0064N_001_6P
G2
G
6
5
4
3
2
1
G1
G
D
C C
B
B
USB 3.0 POWER SW
C2400
2 1
22uF_6.3V_5
33
USBPWR_EN
IN
P5V0A
U2400
1
GND
2
IN1
3
IN2
4
EN#
UPI_UP7534ARA8_15_MSOP_8P
OUT1
OUT2
OUT3
OC#
8
7
6
5
P5V0A_USB3
+
C2401
2 1
100UF_6.3V
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
KB & TP & USB PWR SW
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 34
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
EDP CONN
CN3001
1
1
2
2
D
16
16
16
16
16
16
CPU_EDP_TX1_DN
IN
CPU_EDP_TX1_DP
IN
CPU_EDP_TX0_DN
IN
CPU_EDP_TX0_DP
IN
CPU_EDP_AUX_DP
BI
CPU_EDP_AUX_DN
BI
C3011
C3012
C3013
C3014
C3015
C3016
2 1
2 1
2 1
2 1
2 1
0.1UF_10V_1
0.1UF_10V_1
0.1UF_10V_1
2 1
0.1UF_10V_1
0.1UF_10V_1
0.1UF_10V_1
CPU_EDP_TX1_C_DN
CPU_EDP_TX1_C_DP
CPU_EDP_TX0_C_DN
CPU_EDP_TX0_C_DP
CPU_EDP_AUX_C_DP
CPU_EDP_AUX_C_DN
P3V3S_LCDVDD
D3001
R3005
2 1
2 1
2 1
TP3000
TP24
1
38 33
27
LID_SW#
IN
PCH_LCD_BKEN
IN
1SS355VMTE_17
3K_5%_1
LCD_BKEN
IN
PCH_LCD_PWM
C3007
2 1
680PF_50V_2
P3V3S_LCDVDD
PVBAT_LCD
R3004
2 1
100K_5%_1
27
P3V3A
U3000
1 5
OUT IN
2
4 3
NUVO_NCT3521U_SOT23_5P
C3000
B
1uF_6.3V_2
2 1
100_5%_1
PVBAT
POWERPAD1x1m
36 35 36 35
IN
36
OUT
DMIC_CLK
DMIC_DAT
GND
DIS EN
P3V3S_LCDVDD
R3000
2 1
PAD3000
1 2
PCH_LCDVDD_EN
PVBAT_LCD
2 1
R3001
2 1
100K_5%_1
R2252
33_5%_1
27
IN
C3001
2 1
4.7uF_6.3V_3
2 1
DMIC_DAT_CN
OUT
OUT
35
C3008
2 1
P3V3S
4.7uF_25V_5
IN
IN
USB_P5_DN
USB_P5_DP
28
C2255
28
2 1
10UF_6.3V_3
35 36
35
OUT
23 25 22 38
BI
23 25 22 38
BI
IN
DMIC_CLK
DMIC_DAT_CN
PCH_3S_SMCLK
PCH_3S_SMDAT
R2253
R2254
0_5%_2_DY
0_5%_2_DY
2 1
PCH_3S_CN_SMCLK
2 1
PCH_3S_CN_SMDAT
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
JAE_FI_G40SB_VF25_R2000_DT_40P
D
C C
B
G1
G1
G2
G2
G3
G3
G4
G4
G5
G5
G6
G6
G7
G7
G8
G8
G9
G9
A A
C2251
2 1
CSC0201_DY
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
EDP
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 35
1
SIZE
CODE
A3
REV
X01
8 7
6 5
4
3 2 1
P3V3S
C503
D
IN
OUT
IN
IN
IN
HDA_BITCLK
HDA_SDO
HDA_SYNC
HDA_RST#
24
24
24
24
24 38
2 1
R501
33_5%_1
C504
2 1
CSC0201_DY
C502
2 1
OUT
IN
0.1UF_10V_1
0.1UF_10V_1
2 1
35 36
35 36
OUT
P3V3S
C501
1uF_6.3V_2
2 1
HDA_SDIN0_CODEC HDA_SDIN0
DMIC_CLK
DMIC_DAT
MUTE_LED#
C500
2 1
R502
33_5%_1
10UF_6.3V_3
P3V3S
IN
R503
C528
C527
PAD500
1 2
AMP_EN
2 1
33
2 1
10K_5%_1
C506
2 1
2.2uF_16V_3
35 36
35 36
OUT
B
DMIC_DAT
IN
DMIC_CLK
C508
C507
2 1
2 1
10PF_50V_1_DY
EMI
2 1
0.1UF_10V_1_DY
2 1
0.1UF_10V_1_DY
10PF_50V_1_DY
POWERPAD_2_0610
AUDIO CODEC
U500
1
DVDD_CORE
9
DVDD
3
DVDD_IO
6
HDA_BITCLK
8
SDATA_IN
5
SDATA_OUT
10
HDA_SYNC
11
HDA_RESET#
2
2 1
DMIC_CLK-GPIO1
4
DMIC0-GPIO2
46
DMIC1-GPIO0-SPDIFOUT1
48
SPDIF_OUT_0_GPIO3
47
EAPD
35
CAP-
36
CAP+
7
DVSS
33
AVSS
30
AVSS
26
AVSS
42
PVSS
49
TML-PAD
IDT_92HD91B2X5NLGXYA8_QFN_48P
HP0_PORT_A_L
HP0_PORT_A_R
HP1_PORT_B_L
HP1_PORT_B_R
SPKR_PORT_D_L+
SPKR_PORT_D_L-
SPKR_PORT_D_R-
SPKR_PORT_D_R+
AVDD
AVDD
PVDD
PVDD
SENSE_A
SENSE_B
VREFOUT_A
PORT_C_L
PORT_C_R
VREFOUT_C
PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R
PC_PCBEEP
MONO_OUT
CAP2
VREFFILT
VREG_+2.5V
P5V0S_AUDIO_AVDD
C519
27
38
39
45
13
14
28
29
23
31
HP_L_CODEC
32
HP_R_CODEC
19
MIC_CODEC
20
24
40
SPKR_L_DP
41
SPKR_L_DN
43
SPKR_R_DN
44
SPKR_R_DP
15
16
17
18
12
25
22
21
34
V-
37
C512
C513
2 1
2.2UF_6.3V_2
2 1
2 1
2.2UF_6.3V_2
C520
1uF_6.3V_2
2 1
0.1UF_10V_1
SENSE_A
R507
R512
R513
C525
OUT
OUT
OUT
OUT
C516
2 1
0.1UF_10V_1
C514
2 1
IN
2 1
1UF_10V_5
36
36
36
36
C515
2 1
10UF_6.3V_3
C521
2 1
2 1
C517
2 1
0.1UF_10V_1
C522
10UF_6.3V_3
36
100K_5%_1
2 1
33_1%_1
2 1
33_1%_1
R505
0.01UF_10V_1
1uF_10V_2
2 1
HP_L
HP_R
MIC
VREFOUT_MIC
100K_5%_1
2 1
10K_5%_1
P5V0S
C523
2 1
10UF_6.3V_3
P5V0S_AUDIO_AVDD
R506
2 1
2 1
0.1UF_10V_1
36
OUT
C518
38
OUT
OUT
38 36
IN
38
OUT
P5V0S_AUDIO_AVDD
2 1
R511
10K_5%_1
3
Q500
D S
G
SSM3K7002FU
2
SENSE_A
1
PCSPKR
P5V0S_AUDIO_AVDD
R508
2 1
36
OUT
SENSE_A
2.49K_1%_1
A
B
C
D
C524
2 1
E
F
Discription PORT
HP
MIC
SPKR
Sense
HPS
MICS
D
1000PF_25V_1
C C
INT-SPKR CONN
36
36
36
36
24
IN
SPKR_L_DP
IN
SPKR_L_DN
IN
SPKR_R_DN
IN
SPKR_R_DP
IN
CN600
1
1
2
2
3
3
4
4 G2
ACES_50224_0040N_001_4P
G1
G1
G2
B
P3V3S
P5V0S_AUDIO_AVDD
P5V0S
C509
2 1
2 1
10K_5%_1
1uF_6.3V_2
U501
1
IN
2
GND
R504
3
#SHDN
GMT_G916_475T1Uf_SOT23_5P
OUT
BYP
P5V0S_AUDIO_AVDD
5
4
C510
2 1
0.01UF_10V_1
C511
2 1
4.7uF_6.3V_3
38
IN
JACK_DET#
2 1
R514
R515
20K_1%_1
2 1
39.2K_1%_1
3
SSM3K7002FU
Q501
D S
1
G
TI_LMV331IDBVR_SOT23_5P
2
R516
2 1
C526
10K_5%_1
2 1
0.1UF_10V_1
5 2
+
4
OUT
U503
-
R517
2 1
560K_1%_1
1
+
3
-
R518
2 1
120K_1%_1
MIC
38 36
IN
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
AUDIO CODEC
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 36
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
P3V3A
P3V3S
P3V3S_WWAN
R1401
2 1
C1400
2 1
D
29
WWAN_POWER_OFF#
IN
R1400
220K_5%_2_DY
2 1
4
0.1UF_16V_2_DY
3 6
Q1400
S
G
PMOS_4D1S
AM3423P_DY
D
WWAN CONN OPTION
TP1403
TP1404
TP1405
TP1406
TP1407
TP1408
TP1409
TP1410
TP1411
TP24
TP24
TP24
TP24
TP24
TP24
TP24
TP24
TP24
0_5%_3_DY
1
2
5
D
2 1
10UF_6.3V_3_DY
BI
BI
BI
BI
BI
OUT
C1404
2 1
10UF_6.3V_3_DY
CN1403
37
BI
37
BI
37
BI
37
BI
37
BI
37
37
37
37
37
24
UIM_VPP
UIM_RST
UIM_CLK
UIM_DAT
UIM_PWR
D1401
2 1
2 1
1SS355VMTE_17_DY
6
6
5
5
4
3
2
1
ACES_50264_0060N_001_6P
G
4
G
3
2
1
(CN1403 OPEN)
WWAN_RF_OFF#
G2
G1
C C
29
IN
P3V3S_WWAN
C1401
P3V3S_WWAN
1
1
1
1
1
1
1
1
1
C1402
0.1UF_16V_2_DY
UIM_PWR
UIM_DAT
UIM_CLK
UIM_RST
UIM_VPP
2 1
0.1UF_16V_2_DY
2 1
WWAN_RF_OFF#_CN
WWAN_DET#
C1403
TP1412
TP1413
B
TP1414
TP1415
TP24
TP24
TP24
TP24
1
1
1
1
USB_P4_DN
USB_P4_DP
WWAN_IND#_CN
2nd_WWAN_GPS_OFF#_CN
28
BI
28
BI
D1400
2 1
2 1
1SS355VMTE_17_DY
1
G
Q1401
2
SSM3K7002FU_DY
3
D S
2nd_WWAN_GPS_OFF#
WWAN_IND#
IN
33
OUT
B
28
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
WWAN_OPTION
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
of
39 37
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
TO IO DB CONN
P5V0S P3V3S
(HDMI)
P5V0A_USB3
CN210
1
1
2
2
3
3
27
27
D
27
27
27
27
27
27
27
27
27
PCH_HDMI_TX2_DP
IN
PCH_HDMI_TX2_DN
IN
PCH_HDMI_TX1_DP
IN
PCH_HDMI_TX1_DN
IN
PCH_HDMI_TX0_DP
IN
PCH_HDMI_TX0_DN
IN
PCH_HDMI_TXCL_DP
IN
PCH_HDMI_TXCL_DN
IN
HDMI_HPD
OUT
PCH_HDMI_CLK
BI
PCH_HDMI_DAT
BI
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
ACES_50501_02041_001_20P
G1
G
G2
G
OUT
IN
EC_PWRBTN#
PWR_LED#
33
33
P3V3A
P3V3AL
TO PWR BTN DB CONN
CN214
1
1
2
2
3 G1
4
5
6
ACES_50264_0060N_001_6P
G
3
4
5
6
G2
G
BI
BI
BI
BI
OUT
OUT
IN
IN
USB_P9_DN
USB_P9_DP
USB_P3_DN
USB_P3_DP
USB3_P4_RX_DN
USB3_P4_RX_DP
USB3_P4_TX_DN
USB3_P4_TX_DP
28
28
28
28
28
28
28
28
TO IO DB CONN
(USB 3.0 & AUDIO JACK &LID SW)
P5V0S_AUDIO_AVDD
CN211
16
1
17
2
18
3
19
4
20
5
21
6
22
7
23
8
24
9
25
10
26
11
27
12
28
13
29
14
30
15
G
G
G
G
G
G
ACES_88068_03001_30P
MIC
HP_L
HP_R
JACK_DET#
VREFOUT_MIC
LID_SW#
OUT
IN
IN
OUT
OUT
OUT
36
36
36
36
P3V3A
33 35
D
C C
P3V3S
P3V3A
P5V0A_USB3
TO PCIE DB CONN
CN213
50
B
PCIE_WAKE#
OUT
CLKREQ_WLAN#
OUT
CLK_PCIE_WLAN_DN
IN
CLK_PCIE_WLAN_DP
IN
BUF_PLT_RST#
IN
CLK_LPC_DEBUG
IN
PCIE_WLAN_RX_C_DN
OUT
PCIE_WLAN_RX_C_DP
OUT
PCIE_WLAN_TX_C_DN
IN
PCIE_WLAN_TX_C_DP
IN
2ND_WLAN_RF_OFF#
IN
WLAN_POWER_OFF
IN
WLAN_RF_OFF#
IN
BUF_PLT_RST#
IN
WLAN_IND#
IN
PCH_3S_SMCLK
IN
PCH_3S_SMDAT
IN
24
OUT
24
OUT
24
24
33
SATA_COMBO3_RX_DP
SATA_COMBO3_RX_DN
SATA_COMBO3_TX_DN
IN
SATA_COMBO3_TX_DP
IN
AOAC_LED
IN
TO AOAC LED
P3V3A
P3V3S
TO PCIE DB CONN
CN212
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
G1
19
G2
20
G3
21
G4
22
G5
23
G6
24
ACES_50051_02471_001_24P
33 26
25
25
25
15
28
33 38
28
25
25
25
25
24
29
29
28
15
33 38
33
23 25 35 22
23 25 35 22
1
49
2
48
3
47
4
46
5
45
6
44
7
43
8
42
9
41
10
40
11
39
12
38
13
37
14
36
15
35
16
34
17
33
18
32
19
31
20
30
21
29
22
28
23
27
24
26 25
G G
ENTERY_1001_F50M_03L_50P
USB_P2_DN
USB_P2_DP
USB3_P3_RX_DN
USB3_P3_RX_DP
USB3_P3_TX_DN
USB3_P3_TX_DP
USB_P8_DN
USB_P8_DP
LPC_FRAME#
LPC_AD<3>
LPC_AD<2>
LPC_AD<1>
LPC_AD<0>
PCIE_WIGI_RX_C_DN
PCIE_WIGI_RX_C_DP
PCIE_WIGI_TX_C_DN
PCIE_WIGI_TX_C_DP
BI
BI
OUT
OUT
IN
IN
BI
BI
IN
BI
BI
BI
BI
IN
IN
OUT
OUT
28
28
28
28
28
28
28
28
24
24
24
24 33
25
25
25
25
33 24
33
33
33
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
BTB CONN
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
38
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01
8 7
6 5
4
3 2 1
D
D
FOR PCB
S6
FIX2
FIX6
S5
1
1
SCREW230_550_750_NP_1P
SCREW230_550_750_NP_1P
FIX3
1
FIX_MASK
FIX7
1
FIX_MASK FIX_MASK
FIX4
1
FIX_MASK
FIX8
1
FOR CPU
S4501
1
S4502
1
SCREW305_550_1P
SCREW305_550_1P
C C
S4503
1
SCREW305_550_1P
S1
1
FIX_MASK
FIX_MASK
S3
S2
1
1
SCREW320_550_1P
SCREW320_550_1P
SCREW320_550_1P
FIX1
1
FIX5
1
1
FIX_MASK
1
FIX_MASK
B
B
A A
INVENTEC
TITLE
MODEL,PROJECT,FUNCTION
SCREW
CS
DOC.NUMBER
1310xxxxx-0-0
SHEET
39
of
39
1
CODE
SIZE
CHANGE by
8
7 6
5 4
XXX
DATE
24-AUG-2011
2 3
A3
REV
X01