Inventec J11 Eagle, LifeBook E8310 Schematic

5

D D

4

3

2

1

Inventec Corporation R&D Division

C C

Board name : Mother Board Schematic

Project : J11Eagle (Santa Rosa)

Version : 0.4

B B

A A

5

Initial Date : January 05, 2007

4

3

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of

Date: Sheet of 55

2

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Monday, April 09, 2007

1

Title

55

1

Rev

0.4

8

7

6

1. Schematic Page Description :

J11Eagle (Santa Rosa) Schematic Ver : 0.4

5

4

3

2

1

D D

1. Title

2. Schematic Page DESCR

3. Block Diagram

4. ANNOTATIONS

5. Schematic Modify

6. DDRII Layout Guideline

7. Merom Processor(1/2)

8. Merom Processor(2/2)

9. CPU Thermal

10. Clock Generator

11. Crestline Host(1/6)

12. Crestline DMI/Graph2/6)

13. Crestline DDR2(3/6)

C C

14. Crestline Power(4/6)

15. Crestline Power(5/6)*

16. Crestline Ground(6/6)

17. DDR2 SDRAM SO-DIMM0

18. DDR2 SDRAM SO-DIMM1

26. OZ711MP1I(1/3)

27. OZ711MP1I(2/3)

28. OZ711MP1I(3/3)

29. LAN--88E8055

30. MINI_PCIE/USB/Bluetooth

31. Audio Codec(1/2)

32. AUDIO JACK(2/2)

33. G-S/TPM1.2/SATA/MDC/BAY

34. BENN

35. SUPER IO (1/2)

36. SUPER IO (2/2)

37. DVI Transmitter SiI1368

38. DOCK/KB/ST-LCD CN

39. RESET

40. CPU Core Power(MAX8770)

41. LDO/SWITCH

42. Battery

43. Charger

51. USB BOARD

52. GLIDE SW BOARD W/FP

53. STICK SW BOARD

54. EMI/ESD

55. GLIDE SW BOARD W/O FP

44. 5VPMU/5VSTD/3VPMU/3VSTD

20. ICH8M PCI/PCIE/DMI(2/4)

21. ICH8M GPIO(3/4)

22. ICH8M Power/GND(4/4)

23. BIOS/SMBUS_SW/80 PORT

24. LCD&CRT

25. TV OUT & CRT SW

45. 1.8V_DIMM

46.GPU_CORE

47. BATTERY CN

48. 1.05V/ETC0

49. EC control

50. BAY TR /GP/Stick BOARD

B B

2. PCI & IRQ & DMA Description :

IDSEL

AD19

PCI_INT#0 PCI_INT#1 PCI_INT#2 PCI_INT#3

BUSMASTER

A A

REQ REQ0 / GNT0 REQ1 / GNT1 REQ2 / GNT2 REQ3 / GNT3

8

CHIP

OZ711MP1

CHIPPCIINT

OZ711MP1 N/A N/A N/A

CHIP N/A OZ711MP1 N/A N/A

19. ICH8M CPU/IDE/SATA(1/4)

7

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

6

5

4

3

Date: Sheet of 55

2

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Schematic Page DESCR

Monday, April 09, 2007

2

1

Rev

0.3

8

7

6

5

4

3

2

1

3. Block Diagram :

PLL

CPU

D D

P.9

LCD

FAN1

P.24

CRT

P.24

S-OUT

P.25

cPR2

P.38

cPR2

P.38

C C

PWM

LVDS

TVO

RGB_CRT RGB

RGB_DOCK

DVI SI1368

P.37

Thermal

ADT7473

CRT_SW

P.25

SDVO

HDD

Thermal

SATA 150

P.33

BAY

PATA 100

P.33

USB0USB1USB2USB3

System1System2System3System4

USB BoardUSB BoardUSB Board

B B

USB 2.0/1.1

Docking

MiniCard #0

Bluetooth

P.30P.30

Flash

A A

8

7

ROM

for_Finger Sensor

P.30

USB4USB5

Express Card

P.27P.38

USB 2.0/1.1

USB6USB7USB8

Finger Sensor

SW w/FP

SPI

Flash ROM

P.23P.23

for_BIOS

6

uFCPGA 478pin

Merom

P.7~8P.9

FSB 1.05V 667/800MHz

MCH

965GM/GML FCBGA 1299pin

35mmx35mm

Crestline GM

P.11~16

DMI x4

ICH

31mmx31mm

mBGA 676pin

ICH8M

EHCI#1

Support S0~S3 state

EHCI#2

Support S0~S2 state

P.19~22

PCI-Express x1 2.5GHz

PCI 3.3V 33MHz

5

DDR2 1.8V 533/667MHz

CardBus

OZ711MP1

HDA 24MHz

MDC1.5 RJ11

LPC 3.3V 33MHz

PMU&KBC ASIC

LUNA2 BENN

P.49 P.34

SODIMM2

SODIMM1

P.17

P.18

GbE

88E8055

Port#1

P.26~28

P.33P.33

PS/2

cPR2

P.38

ST-LCD

P.38

FlatPointKBStickPoint

P.38 P.51

G-sensor P.33

App BTN BD P.49

P.29

CardBus

P.26~28

IntMic Stereo

Analog In

P.38

4

Express Card

Port#2

P.32

ICS9LPRS365BGLF

RJ45

P.29

P.27

MS/SD

Slot

Out

SmartCard Slot

Audio Codec

ALC262

P.31

Super I/O

LPC47N217 V1.2

TPM 80Port

Serial

P.36

cPR2

Parallel

P.36

IrDA

P.35

3

P.10

MiniCard #1

UMTS/Robson

Port#3

P.30

P.28P.26

Out

cPR2

IN

P.38

IN

P.38

166MHz+/100MHz+/48MHz 33MHz 14MHz 27MHz/96MHz+/-

SIM Slot

P.30

MiniCard #2

WLAN/Robson

Port#4

P.30

AMP

P.31

P.23P.33P.35-36

2

x2 x9 x1 x6 x2 x1

SPK

P.32

Analog Out

P.32

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Block Diagram

Monday, April 09, 2007

3

1

Rev

0.3

8

7

6

5

4

3

2

1

4. Nat name Description :

Voltage Rails

PWR_DCIN +5VLA 5.0V always on power rail by LATCH or ACIN

D D

PWR_3VSTD 3.3V always on power rail by LATCH or ACIN

PWR_5VSUS PWR_3VSUS PWR_5VMAIN

PWR_CPUCORE

PWR_1.05VMAIN PWR_1.5VMAIN

PWR_1.8VSUS PWR_DIMM_VTT

Primary DC system power supply

3.3V always on power rail by ECPWONPWR_PMU

5.0V power rail by SLP_S5#_3R

3.3V power rail by SLP_S5#_3R

5.0V switched power rail by SLP_S3#_3R

3.3V switched power rail by SLP_S3#_3RPWR_3VMAIN

Core Voltage for CPU

1.05V power rail for AGTL+ termination/Core for GMCH by SLP_S3#_3R

1.5V power rail for CPU PLL/DMI;PCIE;DDRII DLLs for GMCH/Core;PCIE for ICH7m by SLP_S3#_3R

1.8V power rail for DDRII by SLP_S5#_3R

0.9V DDRII Termination Voltage by SLP_S3#_3R

Power Rail

PWR_CPUCORE

PWR_1.05VMAIN

PWR_1.5VMAIN

PWR_1.8VSUS

Part Naming Conventions

C CN

C C

D F L Q R RP U Y

Capacitor

= =

Connector

=

Diode

=

Fuse

=

Inductor

=

Transistor

=

Resistor

=

Resistor Pack

=

Arbitrary Logic Device

=

Crystal and Osc

PWR_DIMM_VTT

PWR_3VSUS

Net Name Suffix

# =

5. Board Stack up Description

PCB Layers

B B

Layer 1

Layer 2

Layer 3

Layer 5 Stripline Layer

Layer 6

Layer 7

Layer 8

Host Clock

SRC Clock

Host Bus

DDR2 CLK

DDR2 Strobe

A A

DDR2 Bus

DMI Bus

PCIE Bus

SATA

SDVO

LVDS

USB

IEEE1394

Lan

Active Low signal

Component Side, Microstrip signal Layer

Ground Plane

Stripline Layer

Power PlaneLayer 4

Stripline Layer

Ground Plane

Solder Side,Microstrip signal Layer

Single End Impedance Differential Impedance for Microstrip Differential Impedance for Stripline

55 ohm +/- 15%

42 ohm +/- 15%

55 ohm +/- 15%

50 ohm +/- 15%

8

95 ohm +/- 15% 100 ohm +/- 15%

95 ohm +/- 15% 100 ohm +/- 15%55 ohm +/- 15%

70 ohm +/- 20% 70 ohm +/- 20%

95 ohm +/- 15% 100 ohm +/- 15%

90 ohm +/- 15% 90 ohm +/- 15%

110 ohm +/- 15% 110 ohm +/- 15%

7

85 ohm +/- 20%

100 ohm +/- 15%95 ohm +/- 15%

100 ohm +/- 15%100 ohm +/- 15%

6

PWR_3VMAIN

PWR_3VSTD

PWR_3VMAIN

PWR_5VMAIN

PWR_3VSTD

5

4

Destination

Merom

HFM:

LFM: Merom: AGTL+ termination 965GM: Core 965GM: AGTL+ termination ICH8m: Merom PLL 965GM: PCIE 965GM: LVDS 965GM: TVDAC 965GM: Various PLLS analog supply 965GM: DDR DLLS,DDRII,FSB HSIO ICH8m: ICH8m: ICH8m: ICH8m: Mini Card: Express Card: 965GM: DDRII System Memory SO-DIMM: 965GM: LVDS analog 965GM: LVDS I/O 965GM: PCIE analog CLOCK GEN.

DDRII Terminator:

965GM: HV CMOS 965GM: TVDAC analog ICH8m: ICH8m: ICH8m: ICH8m: ICH8m: Mini Card: Express Card: CLK Generator: ICS9LPRS365AGLF Mini PCIe: WirelessLan Azalia Codec: ALC262 Azalia MDC: HDD: SATA 965GM: CRT DAC

CardBus: OZ711MP1 CardBus: Slot voltage Lan: Broadcom 88E8055 Card Reader: SD/MMC/MS Azalia MDC: For wake up Mini PCI: For wake up ICH8m: ICH8m: ICH8m: LCD:

Azalia Codec: ALC262 Azalia MDC: HDD: SATA ODD: PATA Audio AMP: G1412 Woofer AMP: G1432 Inverter: CardBus: Slot voltage USB: x 4 ports EC: ICH8m: RTC Flash ROM: BIOS

3

Voltage

1.3319V~1.4375V~1.4591V

0.9221V~0.9625V~0.9739V

0.997V~1.05V~1.102V

1.0V~1.05V~1.1V

0.9475V~1.05V~1.1025V

1.425V~1.5V~1.575V

1.7V~1.8V~1.9V

0.855V~0.9V~0.945V

3.135V~3.3V~3.465V

3.0V~3.3V~3.6V

4.75V~5.0V~5.25V

5V 2.0A

2

S0 Current

36A

2.5A

4.6A

1.4A

120mA

1.5A 60mA 24mA 320mA

1.885A

3.1A

10mA 60mA 2mA

1.0A

40mA 120mA

400mA

70mA

1.0A

Max: 1.0A ; R/W: 460mA ; STDBY: 70mA Max: 1.8A ; R/W: 900mA ; STDBY: 45mA

Inventec Corporation

Title

J11Eagle(Merom+Crestline+ICH8M)

Document Number

Size

C

Date: Sheet of 55

Monday, April 09, 2007

Date: Sheet of 55

Monday, April 09, 2007

Date: Sheet of 55

Monday, April 09, 2007

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

ANNOTATIONS

4

1

Rev

0.3

5

4

6.Schematic modify Item and History :

3

2

1

V0.1 MODIFY LIST

1. Change R75 from 10K to 100K. (Page 39)

2. Change R291 from 470K to NU. (Page 27)

D D

V0.2 MODIFY LIST

1. ADD DVI function. (Page 37)

2. U27 pin K1 and M1 (AVCC) have to be connected from CORE_VCC to PCI_VCC. (Page 26)

3. DG_AMP_SD# change from U54 Pin 47 to U54 Pin 3. (Page 26)

4. R457,R468 change to 100 Ohm 1%, R462 change to 5.1K Ohm 1%, R127 change to 100K 1% add R758 0 Ohm---- Adjust OCP 10A (Page 45)

5. R98 change to 2.2K 0.5%, R93 change to 39K 0.5% ---- Adjust Changer current. (Page 48)

6. Change X2 pin5 from GND to PWR_PMU (Page 34)

7. R102 change from 10K to 20K 1% ---- Adjust OCP 10A (Page 44)

8. Change R176 from 10K to 12K1% ---- Adjust OCP 7A (Page 47)

9. Change R616 from 4.7K to 475 Ohm ---- CLKREQ damping (Page 10)

10. R515 change from 1.3K to 1.27K ---- adjust CRT REFSET. (Page 12)

11. Del R622 and change D35 (PP gate) from PWR_3VSTD to PWR_5VSUS, change D35 (P gate) from PWR_3VSTD to PWR_3VSUS --- improve leakage. (Page 22)

12. R271 change from 3.48K to 3.9K, R238, R228 change from 2.1K to 2.67K.---- Ajust CPU Core load line (Page 39)

13. Change R132 from 243 Ohm to 249 Ohm ---- Ajust PWR_3VMAIN_ATBG (Page 15).

14. Change R433 ( 0 Ohm ) to NU. (Page 30)

15. Change R56 from 1K to NU.--- Set DOCK EXIST. (Page 34)

16. Change R444 connect from DLY_SUSB# to DLY_SUSC#.--- Modify PWR_1.8VSUS power syquence. (Page 44)

C C

17. R293,R641,R642,R564,R569 change power plane from PWR_3VSUS to PWR_3VMAIN. ---- for S3 leakage. (Page 10)

18. CL_VREF1_ICH pull up change from PWR_3VSTD to PWR_3VMAIN. (Page 21)

19. R351 from 100K to NU ---- follow FJ schematics. (Page 47)

20. Add 470k ohm to LCDCL##_LUNA (Page 49)

21. change Speaker lines dumping-resistersR391,R390,R389,R388 to Filter L66,L67,L68,L69. (Page 32)

22. C307, C311 change from 10PF to 15PF fro RTC. (Page 19)

23. Add R759 470K, R758 0 Ohm. (Page49)

24. R673 change 10K to 220K. (Page 30)

25. C654,C655 change from 0.1uf/10V to 0.1uf/25V.

26. R214,R215 change from 0 Ohm to 2.2 Ohm.

27. Change R719,R721 from 10K to 12.4K (Page 31)

28. Add R767,R768 voltage divide to add "Maximum Power Clampping Function" to avoide damaging the speaker. (Page 31)

29. Change G-sensor from KXPS5-3176 to LIS302ALK (Page 33)

30. M_VREF add R760 0 Ohm to connect to U37 Pin6. (Page 45)

31. TP16 connect to change from PWR_DIMM_VTT to M_VREF. (Page 17)

32. Add C842~C867, C870~C876 for EMI.

33. Change Q53, Q54 from SI2301BDS-T1-E3 to RVE002P03. (Page 43)

34. U34 Pin5 change from PWR_3VSTD to PWR_5VMAIN. (Page 39)

35. C354,C359,C337,C674,C676,C679 change from NU to 5P 50V for EMI.

B B

36. RS47,RS52,RS53,RS55 change from 2.2K to NU, RS29,RS30,RS48,RS54change from 1K to NU. (Page33)

37. Change R31: 47K => 1K, R37:4.7K => 1K, C63: 0.01uF => None

38. Change R1,R2,C1,C2,U30 to NU (Page29)

39. R356 (0.01ohm )-> 0.015ohm, R33 (18k ohm)-> 12 k ohm, R28 (33k ohm ) -> 10k ohm, R24 (30k ohm)-> 39k ohm (Page43)

V0.3 MODIFY LIST

22. Change R772, R773 from 0 Ohm to 47 Ohm. (Page 32)

23. Del R123, R124, R758, and mount R769. (Page 46)

24. Del U56, R320, R321, R287, C772, and mount R288, R308, R309, R310, R311, R312, R313 , and OZ711MP1 change to OZ711SP2(Page 26)

25. LAN_RST# tie to GND.(Page 21)

26. Remove R189, R193 (Page 21)

V0.4 MODIFY LIST

1. LAN_RST# pull down with 10K Ohm. (Page 21)

2. Delete Pull-up(R2) for LAN_Disable.(Page 29)

3. Delete RS1001, and A6,A7,D6,D7 tie to GND(SW with FP Page 52)

4. ALG_HP_R_DOCK & ALG_HP_L_DOCK add 22K pull down, and change R59,R62 from 0 Ohm to 27K Ohm at V04. (Page 38)

5. CN14 pin37 tie to GND. (Page 30)

6. Change the G-sensor vender from ST-micro to KIONX. Change U14 and R101(1K)/R95 (NU) (Page 33).

7. For Express Card leakage issue, please consider following. * U45 pin2 : From "PWR_3VMAIN" to "PWR_3VSTD". * U45 pin20 : From "SUSC#" to "PWR_3VSTD". * U44 pin5 : From "PWR_3VMAIN" to "PWR_3VSTD" (Page 28)

8. Add U62(NU), R796 for SC_CD#, change R298 from NU to 10K, C398 from NU to 0.01uF, C391 from NU to 0.1uF. (Page26, 28)

9. Change R691,R698 : 22K => 100K, C743,C749 : 1000pF => 220pF for the internal MIC volume small (Page 32)

10. Change C395 from NU to 470uF

11. Delete L72,L73,L74,L75 (Page 29)

12.Change C307,C311 from 10pF to 15pF. (Page 19)

13. Add L72(100ohm bead)---NU, C890 (10uF)----NU for PWR_BL noise. (Page 24)

14. Change R684 from 10K to 1K.(Page 44)

15. Change R63,R64,R65 from 200 Ohm to 150 Ohm at V04 (Page 38)

16. Change C119 from 0.1uF to 1uF at V04 (Page30)

V0.2 Daughter Board Modify LIST

1.Change R1005 from 15K Ohm to 1.5K Ohm, and Net G_USBON add R1012 (NU) to CN1003 pin 14. (FingerPrinter Board)

2.C1011 change from U1001 Pin D8 to Pin D9.

V0.3 MODIFY LIST

1.Change Q113~Q120 from PDTC144EU to 2SC2412KR for SMBUS issue.

2.Change LAN_DISABLE# pull-up from PWR_PMU to PWR_3VLAN, Change U30,R1,R2 from NU to install. Add L72,L73,L74,L75 common chock for EMI. (Page 29)

3.Change D35 Pin P from PWR_3VSUS to PWR_3VSTD (Page 22)

4. Add "L71" between these signals as below picture for reduce the noise on 1.5VS_TVDAC (Page 15)

5. Remove U41, U48, Mount R664. Add the Pull-up for "SPI_CE#0" with PWR_3VMAIN(RS31 Pin 4) (Page 23).

6. Change U18 from PI5V330SQE to PI5V330SQ1(Page 25)

7. Change U50 from OZ2216S to OZ2206SN.(Page 27)

8. Change C700 from 1000pF/NU to 0.01uF for TPS2231_CLKEN drop. (Page 28)

9. Add R773, R772 0 Ohm between L57, C419 & L56 & C420. Swap Q112 Pin S & Pin D(Page 32)

10. Add MS request the micrphone performance. (Page 32)

11. Change Bay con pin for move glide pad con. and stick con. to bay board. (Page 33)

12. Change RF_ON_SW from SW1 Pin3 to pin1. (page 34)

A A

13.Please add R774 & D37, D36, change r733 from 10K to 1K to the DVI control signals. (Page 37)

14. Change R63,R64,R65 from 75 to 200 fro VESA mesurement. (Page 38)

15. Add D38,D39 for discharge. (Page 39)

16. Change U26 PWRGD & CLKEN# pull up from PWR_3VMAIN. (Page 40)

17. Change R654 from 470K to 100K, and R646 from 47K to 10K. power on/off,S4 fail issue.(Page 41)

18. Change circuit for fix PWR_BT1ROM/PWR_BT2ROM signals don't work issue. (Page 42)

19. Change GPU VID0~VID4 default from 00100 to 00010. (Page 46)

20. Add and reserve USB switch circuit (page 51)

21. Change U1002 from AAT4610AIGV to FPF2101, Add RS1001 for A6,A7,D6,D7 to GND. (Page 52)

5

4

3

V0.3 Daughter Board Modify LIST

1.Cut CN1-11pin & SW_GND1,then add zero-ohm resister between CN1-11pin & SW_GND1.(SW board)

2.Change R1012 to NU (Finger Printer board)

3.Mount: R1301, R1302, U1301, Remove: R1305, R1306 (FP board)

V0.4 Daughter Board Modify LIST

1. Delete RS1001, and A6,A7,D6,D7 tie to GND(Page 52)

Inventec Corporation

Title

J11Eagle(Merom+Crestline+ICH8M)

Document Number

Size

C

Date: Sheet of 55

Monday, April 09, 2007

Date: Sheet of 55

Monday, April 09, 2007

Date: Sheet of 55

2

Monday, April 09, 2007

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

Schematic Modify

1

5

Rev

0.4

5

8. Layout Guideline :

4

3

2

1

Crestline DDRII Layout Guidelines

DDRII Signal Groups

Group Signal Name

D D

Data

M_A_DQ[63..0]/M_B_DQ[63..0] M_A_DM[7..0]/M_B_DM[7..0] M_A_DQS[7..0]/M_A_DQS#[7..0] M_B_DQS[7..0]/M_B_DQS#[7..0]

M_A_A[13..0]/M_B_A[13..0]Address M_A_BS[2..0]/M_B_BS[2..0] M_A_RAS#/M_B_RAS# M_A_CAS#/M_B_CAS# M_A_WE#/M_B_WE#

M_CS#[3..0]Control M_CKE[3..0] M_ODT[3..0]

Clock M_CLK_DDR[3..0]

M_CLK_DDR#[3..0]

SA_RCVEN#/SB_RCVEN#FeedBack

CLK group : M_CLK_DDR[3..0],M_CLK_DDR#[3..0]

GMCH

P1P1L0

C C

Topology

Reference Plane

Single Ended Trace Impedance

Differential Mode Impedance

Package Length Range - P1 350 mils ~ 625 mils

Min. Serpentine Spacing 25 mils

Trace Length Limit - L0 (MS) Length Limit: Max = 50 mils (Escape)

Trace Length Limit - L1 (SL)

(Breakout length segment)

Trace Length Limit - L2 (SL)

Stub Length S1-Stub from via to SO-DIMM Max = 200 mils (Breakin)

MB Length Limits - L0 + L1 + L2 + S1 Min = 500 mils

B B

Maximim Via Count 2 (Per side)

SCK to SCK# Length Matching Match total length to within 5 mils

Clock to Clock Length Match (Total Length)

Breakout Exceptions (Reduce geometries for GMCH break-out region)

Breakin Exceptions (Reduce geometries for SO-DIMM break-in region)

Feedback group : M_A_RCVENIN#,M_A_RCVENOUT#,M_B_RCVENIN#,M_B_RCVENOUT#

These signals are routed internally on the GMCH package and don't require any routing on the MB. As a result, can be left as NC.

A A

4/4/12 7/4/16 8/5/15

Escape

L0L1L1

Breakout Breakin

5

L2L2S1

SLMS SL MS

Length Matching and Length Formulas

Signal Group Minimum Length Maximum Length

Control-to-Clock

Command-to-Clock

Strobe-to-Clock

Data-to-Strobe

Clock - 1.0"

Clock - 0.5"

Strobe - 220mils

SO-DIMM

S1

Differential Pair Point-to-Point

Ground

42 +/- 15%

70 +/- 20%

Length Limit: Max = 700 mils

Min. Trace Spacng (Other) : 12 mils

Min. Trace Spacng (Other) : 16 mils

Nominal Trace Width : Outer: 8.5/4/8.5

Inner: L3= 7/4/7, L5&L6=8/4/8

Min. Trace Spacng (pair) : 4mils

Max = 4000 mils

Max = 4500 milsTotal Length - P1 + L0 + L1 + L2 + S1

Total Length for Channel A : X0

Total Length for Channel B : X1

Match Channel A clocks to X0 +/- 20mils

Match Channel A clocks to X1 +/- 20mils

Inner Layer : 4/12 mils to other DDR2 Outer Layer : 5/15 mils to other DDR2 Max. breakout length is 500 mils

CK to CK# spacing rule waived at connector spacing of 15 mils to other DDR2

Max. breakin length is 200 mils

Clock - 0.0"

Clock + 1.0"

Strobe - 180mils

4

Control group : M_CKE[3..0],M_CS#[3..0],M_ODT[3..0]

GMCH

Escape

P1

L0

MS SL/MS

L1

Breakout SL

L2

L3

SL/MS

S1

MS

Vtt

SO-DIMM

Topology

Reference Plane

Characteristic Trace Impedance

Nominal Trace Width

Minimum CTRL Trace Spacing

Minimum Spacing to Other DDR2

Minimum Isolation Spacing to non-DDR2

Package Length P1

Trace Length Limit - L0

Trace Length Limit - L1

Stub Length S1-Stub from via to SO-DIMM

MB Length Limits - L0 + L1 + L2 + S1 From GMCH ball to SO-DIMM pad Total Length - P1 + L0 + L1 + L2 + S1 From GMCH die to SO-DIMM pad

Parallel Termination Resistor 56 +/- 5%

Maximim Via Count

CTRL to SCK/SCK# Length Matching (Total Length including package) Breakout Exceptions (Reduce geometries for GMCH break-out region)

Command group : M_A_A[13..0],M_B_A[13..0],M_A_BS[2..0],M_B_BS[2..0],M_A_RAS#, M_B_RAS#,M_A_CAS#,M_B_CAS#,M_A_WE#,M_B_WE#

GMCH

P1

Escape

L0

4/4

L1

Breakout

Point-to-Point with parallel termination

Ground

55 +/- 15%

Inner Layer : L3=5.5 mils, L5&L6= 7 mils Outer Layer : 5 mils

Inner Layer : 6 mils Outer Layer : 8 mils

Inner Layer : 12 mils Outer Layer : 15 mils

25 mils

400~800 mils

Max = 250 mils (Escape)

Max = 700 mils (Breakout)

Max = 250 mils (Breakin)

Min = 500 mils Max = 4500 mils

Max = 5000 mils

Max = 1500 milsTrace Length L3

3

(CLK-1.0") </= CTRL </= (CLK-0.0")

Inner Layer : 4 mils spacing allowed Outer Layer : 5 mils spacing allowed Max. breakout length is 500 mils

4/6,5/10

L2

SL/MSMS SL

S1

4/6,5/10

L3

SL/MS

MS

L2 Seg.= 45Ohm +/- 15%

Vtt

SO-DIMM

Topology

Reference Plane

Characteristic Trace Impedance

Nominal Trace Width

Minimum CMD Bus Trace Spacing

Minimum Spacing to Other DDR2

Minimum Isolation Spacing to non-DDR2

Package Length P1

Trace Length Limit - L0

Trace Length Limit - L1

Stub Length S1-Stub from via to SO-DIMM

MB Length Limits - L0 + L1 + L2 + S1 From GMCH ball to SO-DIMM pad Total Length - P1 + L0 + L1 + L2 + S1 From GMCH die to SO-DIMM pad Trace Length L3

Parallel Termination Resistor

Maximim Via Count

CTRL to SCK/SCK# Length Matching (Total Length including package) Breakout Exceptions (Reduce geometries for GMCH break-out region)

Point-to-Point with parallel termination

Ground

55 +/- 15%

Inner Layer : L5&L6= 4.5 mils Outer Layer : 5 mils

Inner Layer : 6 mils Outer Layer : 8 mils

Inner Layer : 12 mils Outer Layer : 15 mils

25 mils

250~750 mils

Max = 250 mils (Escape)

Max = 700 mils (Breakout)

Max = 250 mils (Breakin)

Min = 500 mils Max = 4500 mils

Max = 5000 mils

Max = 1500 mils

56 +/- 5%

3

(CLK-1.0") </= CMD </= (CLK+1.0")

Inner Layer : 4 mils spacing allowed Outer Layer : 5 mils spacing allowed Max. breakout length is 500 mils

3

Data group : M_A_DQ[63..0],M_B_DQ[63..0],M_A_DM[7..0],M_B_DM[7..0]

4/4

L1

Breakout

4/6

L2

S1

GMCH

Escape

P1 L0

MS SLSL MS

SO-DIMM

Topology

Reference Plane

Characteristic Trace Impedance

Nominal Trace Width

Minimum DQ Bus Trace Spacing

Minimum Serpentine Spacing Same as DQ-to-DQ routing

Minimum Spacing to Other DDR2

Minimum Isolation Spacing to non-DDR2

Package Length P1

Trace Length Limit - L0

Trace Length Limit - L1

Stub Length S1-Stub from via to SO-DIMM

MB Length Limits - L0 + L1 + L2 + S1 From GMCH ball to SO-DIMM pad Total Length - P1 + L0 + L1 + L2 + S1 From GMCH die to SO-DIMM pad Trace Length L3

Maximim Via Count

DQ/DM to DQS Length Matching (Total Length including package)

Breakout Exceptions (Reduce geometries for GMCH break-out region)

Point-to-Point

Ground

55 +/- 15%

Inner Layer : L5&L6= 4.5 mils Outer Layer : 5 mils

Inner Layer : 6 mils Outer Layer : 8 mils

Inner Layer : 12 mils Outer Layer : 15 mils

25 mils

750 mils +/- 350 mils

Max = 250 mils (Escape)

Max = 700 mils (Breakout)

Max = 250 mils (Breakin)

Min = 500 mils Max = 4500 mils

Max = 4800 mils

Max = 1500 mils

2

Match DQ/DM to [SDQS - 200mils] +/- 20mils, per byte lane Inner Layer : 4 mils spacing allowed

Outer Layer : 5 mils spacing allowed Max. breakout length is 500 mils

Data Strobe group : M_A_DQS[7..0],M_A_DQS[7..0]#,M_B_DQS[7..0],M_B_DQS[7..0]#

SO-DIMM

5/5/10

4/4/12

GMCH

P1

Topology

Reference Plane

Single Ended Trace Impedance

Differential Mode Impedance

Nominal Trace Width

Nominal DQS to DQS# Spacing (edge to edge)

Minimum Serpentine Spacing

Minimum Spacing to Other DDR2

Minimum Isolation Spacing to non-DDR2

Package Length Range - P1

Trace Length Limit - L0

Trace Length Limit - L1

Stub Length S1-Stub from via to SO-DIMM

MB Length Limits - L0 + L1 + L2 + S1 From GMCH ball to SO-DIMM pad Total Length - P1 + L0 + L1 + L2 + S1 From GMCH die to SO-DIMM pad Maximim Via Count

DQS to DQS# Length Matching

Clock to Clock Length Match (Total Length include package) Breakout Exceptions (Reduce geometries for GMCH break-out region)

Breakin Exceptions (Reduce geometries for SO-DIMM break-in region)

Escape

L0

4/4/8

L2

L1

L2

L1

Breakout SL SL MS

Differential Pair Point-to-Point

Ground

55 +/- 15%

85 +/- 20%

Inner Layer :L3:5/5/5, L5&L6= 5/4/5 mils Outer Layer : 6/5/6 mils

Inner Layer : 4 mils Outer Layer : 5 mils

Inner Layer : 12 milsMinimum DQS to DQ Spacing Outer Layer : 15 mils

Inner Layer : 8 mils Outer Layer : 10 mils

Inner Layer : 12 mils Outer Layer : 15 mils

25 mils

425~925 mils

Max = 250 mils (Escape)

Max = 500 mils (Breakout)

Max = 250 mils (Breakin)

Min = 500 mils Max = 4500 mils

Max = 5000 mils

2 (Per side)

Match total length to within 5 mils

(CLK-0.5") </= DQS </= (CLK+1.0")

Inner Layer : 8 mils to other DDR2 Outer Layer : 10 mils to other DDR2 Max. breakout length is 500 mils

DQS to DQS# spacing rule waived at connector spacing of 10 mils to other DDR2

Max. breakin length is 200 mils

2

S1

Breakin

Inventec Corporation

Title

J11Eagle(Merom+Crestline+ICH8M)

Document Number

Size

C

Date: Sheet of 55

Monday, April 09, 2007

Date: Sheet of 55

Monday, April 09, 2007

Date: Sheet of 55

Monday, April 09, 2007

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

DDRII Layout Guideline

1

6

Rev

0.4

A

CN20A

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14

H_A#[35..3]

H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

4 4

3 3

H_A#[35..3]11

H_ADSTB#011

H_REQ#[4..0]11

H_A#[35..3]11

H_ADSTB#111

H_A20M#19

H_FERR#19,54

H_IGNNE#19

H_STPCLK#19,54

H_INTR19,54

H_NMI19,54

H_SMI#19,54

H_A#[35..3]

H_REQ#[4..0]

No stub on H_STPCLK test point

CN20A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

SCKT CPU 478P PZ4782K-274M-41 FOXCONN

6026B0056801

Rout to TP via and place gnd via w/in 100mils

A#[32-39], APM#[0-1]:Leave escape routing on for future functionality

ICH

ADS#

ADDR GROUP 0 ADDR GROUP 1

BNR# BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TRST#

DBR#

XDP/ITP SIGNALS

THERMAL

PROCHOT#

THERMDA THERMDC

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

RESERVED

B

H1 E2 G5

H5 F21 E1

F1

D20 B3

H4

C1 F3 F4 G3 G2

G6

HIT#

E4

AD4 AD3 AD1 AC4 AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

TCK

XDP_TDI

AA6

TDI

AB3

TDO

XDP_TMS

AB5

TMS

XDP_TRST#

AB6

XDP_DBRESET#

C20

D21 A24 B25

C7

A22 A21

H_ADS# 11 H_BNR# 11

H_BPRI# 11

H_DEFER# 11

H_DRDY# 11 H_DBSY# 11

H_BREQ#0 11

H_IERR# 54 H_INIT# 19,54

H_LOCK# 11

H_CPURST# 11,54 H_RS#0 11 H_RS#1 11 H_RS#2 11 H_TRDY# 11

H_HIT# 11 H_HITM# 11

PWR_1.05VMAIN 8,10,11,14,15,19,22,44,48,54

R545

R545 68-1%-1/16W-0402

68-1%-1/16W-0402

H_PROCHOT# 40 H_THERMDA 9 H_THERMDC 9

PM_THRMTRIP# 12,19

CLK_CPU_BCLK 10 CLK_CPU_BCLK# 10

C

Topology : FERR#

CPU IMVP6

Rtt

ICH7m

L2+L1 L3 Strip-line

CPU

VCCP

L4

Topology : PWRGOOD

CPU

ICH7m

L1

Topology : INTR , NMI , A20M# , DPSLP# , IGNNE# , INIT# , SMI# , STPCLK#

L1

Topology : THERMTRIP#

GMCHL2CPU ICH8m

D

VCCP L1

Rtt

L2

VCCP

L1

0.5" - 12"

0.5" - 12" Strip-line

L1CPU ICH7m

0.5" - 12" Micro-strip

0.5" - 12"

L3

RttL1 L4

0.5" - 12"L1

Rtt

0.5" - 6.5"

Transmission Line

Micro-strip

Transmission Line

Strip-line

VCCP

Rtt

Rtt Transmission Line

L2

56 +/-5%

0" - 3.0" Micro-strip0.5" - 12"

0" - 3.0"

56 +/-5%

L3 L4

0.5" - 6.5"

0" - 3.0"

0.5" - 6.5"

0" - 3.0"

Topology : CPUSLP#

Topology : RESET#

L1 L2

1" - 12"

1" - 12" 1" - 6"

L1+L3

1" - 6" 0" - 3.0"

1" - 12"

Strip-line

0" - 3.0"

Rtt Transmission LineL2L1

70 +/-5%0.5" - 6.5"

GMCH

L3

0" - 3.0"

E

Micro-strip70 +/-5%

Transmission Line

L1CPU

GMCH

0.5" - 12"

L1

Rss

24 +/-5%

0.5" - 12"

L1

1" - 6"

Rtt

56 +/-5%

Micro-strip

Strip-line

Transmission LineCPU

Micro-strip

Strip-line

Transmission LineL4

Micro-strip

Strip-line0" - 3.0"

Should be connect to ICH8 and Calistoga without T-ing(no stub)

XDP P/U & P/D

XDP_DBRESET#

H_CPURST# H_IERR# XDP_TMS XDP_TDI XDP_BPM#5 H_DPRSTP# H_DPSLP#

XDP_TRST# XDP_TCK

R539 1K-5%-1/16W-0402R539 1K-5%-1/16W-0402

R480 56-5%-1/16W-0402_NUR480 56-5%-1/16W-0402_NU R547 56-5%-1/16W-0402R547 56-5%-1/16W-0402 R499 39.2-1%-1/16W-0402R499 39.2-1%-1/16W-0402 R498 150-5%-1/16W-0402R498 150-5%-1/16W-0402 R497 54.9-1%-1/16W-0402R497 54.9-1%-1/16W-0402 R504 56-5%-1/16W-0402_NUR504 56-5%-1/16W-0402_NU R505 56-5%-1/16W-0402_NUR505 56-5%-1/16W-0402_NU

R500 649-1%-1/16W-0402R500 649-1%-1/16W-0402 R481 27-5%-1/10W-0603R481 27-5%-1/10W-0603

PWR_3VMAIN 9,10,12,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

PWR_1.05VMAIN 8,10,11,14,15,19,22,44,48,54

FSB Common Clock Signal Layout Guide :

H_ADS# , H_BNR# , H_BPRI# , H_BR0# , H_DBSY# , H_DEFER# , H_DPWR# , H_DRDY# , H_HIT# , H_HITM# , H_LOCK# ,H_ RS#[2..0] , H_TRDY# , H_CPURST#.

Transmission Line Type Total Trace Length Normal Impedance Spacing (mils)

GND1

Strip-line(Int. Layer)

Micro-strip(Ext. Layer)

1.0 ~ 6.5 inch

55+/-15%

W=4 & S=8 mils

W=5 & S=10 mils

H_D#[63..0]11

2 2

H_DSTBN#011

H_DSTBP#011

H_DINV#011

H_D#[63..0]11

PWR_1.05VMAIN8,10,11,14,15,19,22,44,48,54

1K-1%-1/16W-0402

0.1uF 10V 10% 0402 X7R_NU

0.1uF 10V 10% 0402 X7R_NU R546

R546

R542

2K-1%-1/16W-0402

R542

2K-1%-1/16W-0402

C639

GND1

C639

GND1

A

1 1

H_DSTBN#111

H_DSTBP#111

H_DINV#111

10mils

Zo=55ohm, 0.5" max for GTLREF, Space any other switch signals away from GTLREF with a minimum of 25mils. Don't allow the GTLREF routing to create splits or discontinuities in the reference planes of the FSB signals

H_D#[63..0]

1K-5%-1/16W-0402_NU

1K-5%-1/16W-0402_NU R540

R540 R541

R541 1K-5%-1/16W-0402_NU

1K-5%-1/16W-0402_NU

C637

0.1uF 10V 10% 0402 X5R_NU

GND1

CLK_BSEL010 CLK_BSEL110 CLK_BSEL210

CN20B

H_D#0

E22

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

GTLREF COMP0 H_TEST1 H_TEST2

H_TEST4

D[0]#

F24

D[1]#

E26

D[2]#

AD26

AF26

G22

F23

G25

E25

E23

K24

G24

J24

J23

H22

F26

K22

H23

J26

H26

H25

N22

K25

P26

R23

L23

M24

L22

M23

P25

P23

P22

T24

R24

L25

T25

N25

L26

M26

N24

C23

D25

C24

AF1

A26

B22

B23

C21

DATA GRP 0 DATA GRP 1

D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF

MISC

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

BSEL[0] BSEL[1] BSEL[2]

SCKT CPU 478P PZ4782K-274M-41 FOXCONN

6026B0056801

B

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]#

DATA GRP 2DATA GRP 3

D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0] COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

PSI#

H_D#[63..0] H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#[63..0] H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

R543 27.4-1%-1/16W-0402R543 27.4-1%-1/16W-0402

COMP1

R544 54.9-1%-1/16W-0402R544 54.9-1%-1/16W-0402

COMP2

R475 27.4-1%-1/16W-0402R475 27.4-1%-1/16W-0402

COMP3

R474 54.9-1%-1/16W-0402R474 54.9-1%-1/16W-0402

H_DPRSTP# 12,19,40 H_DPSLP# 19 H_DPWR# 11,54 H_PWRGD 19,54 H_CPUSLP# 11 PSI# 40

H_PWRGD rise time : Max : 15ns

H_D#[63..0] 11

H_DSTBN#2 11 H_DSTBP#2 11 H_DINV#2 11

H_D#[63..0] 11

H_DSTBN#3 11 H_DSTBP#3 11 H_DINV#3 11

GND1

Comp0,2 connect with Zo=27.4ohm, make trace length shorter than 0.5" and width is 18mils. Comp1,3 connect with Zo=55ohm, make trace length shorter than 0.5" and width is 5mils

C

FSB Source Synchronous Data Length Variation and Strobe Matching Requirements :

Signals Name

H_D#[15..0] , H_DINV#0

H_D#[31..16] , H_DINV#1

H_D#[47..32] , H_DINV#2

H_D#[63..48] , H_DINV#3

FSB Source Synchronous Data Signal Routing Topology#1 :

Signal Name

H_DINV#[3..0]

H_DATA#[63..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

FSB Source Synchronous Address Length Variation and Strobe Matching Requirements :

H_A#[16..3] , H_REQ#[4..0]

H_A#[35..17]

*** No length matching requirements exist between H_ADSTB#0 and H_ADSTB#1

FSB Source Synchronous Address Signal Routing :

Signal Name

H_A#[35..3]

H_REQ#[4..0]

H_ADSTB#[1..0]

Signals Matching

+/- 100 mils

Transmission Line Type

Strip-line

Signals MatchingSignals Name

+/- 200 mils

Transmission Line Type

Strip-line

D

Strobes associated with the group Strobe-to-Strobe Complement Matching

H_DSTBP#0, H_DSTBN#0

H_DSTBP#1, H_DSTBN#1

H_DSTBP#2, H_DSTBN#2

H_DSTBP#3, H_DSTBN#3

Total Trace Length

0.5 ~ 5.5 inch

Strobes associated with the group

H_ADSTB#0

H_ADSTB#1

Total Trace Length Normal Impedance

0.5 ~ 6.5 inch

Normal Impedance

55+/-15%

55+/-15%Strip-line

+/- 25 mils+/- 100 mils

+/- 25 mils

Width & Spacing (mils)

Data-to-Data,Strobe-to-strobe Strobe-to-Data

W=4 & S=8 mils

W=4 & S=4 mils

Strobe to Assoc. Address Signal Matching

+/- 200 mils

Width & Spacing (mils)

W=4 & S=8 mils

W=4 & S=12 mils

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Merom Processor(1/2)

Monday, April 09, 2007

N/A

W=4 & S=12 mils

Rev

0.4

7

E

7

0.4

A

B

C

D

E

Place these inside socket cavity on L8 (North side secondary)

4 4

3 3

PWR_CPUCORE9,40

C614 10uF 6.3V 10% 0805 X5RC614 10uF 6.3V 10% 0805 X5R

GND1 GND1

Place these inside socket cavity on L1 (North side Primary)

C224 10uF 6.3V 10% 0805 X5RC224 10uF 6.3V 10% 0805 X5R

GND1 GND1

C588 10uF 6.3V 10% 0805 X5RC588 10uF 6.3V 10% 0805 X5R

C554 10uF 6.3V 10% 0805 X5RC554 10uF 6.3V 10% 0805 X5R

C556 10uF 6.3V 10% 0805 X5RC556 10uF 6.3V 10% 0805 X5R

C611 10uF 6.3V 10% 0805 X5RC611 10uF 6.3V 10% 0805 X5R

C608 10uF 6.3V 10% 0805 X5RC608 10uF 6.3V 10% 0805 X5R

C601 10uF 6.3V 10% 0805 X5RC601 10uF 6.3V 10% 0805 X5R

C619 10uF 6.3V 10% 0805 X5RC619 10uF 6.3V 10% 0805 X5R

C248 10uF 6.3V 10% 0805 X5RC248 10uF 6.3V 10% 0805 X5R

C233 10uF 6.3V 10% 0805 X5RC233 10uF 6.3V 10% 0805 X5R

C621 10uF 6.3V 10% 0805 X5RC621 10uF 6.3V 10% 0805 X5R

C617 10uF 6.3V 10% 0805 X5RC617 10uF 6.3V 10% 0805 X5R

C258 10uF 6.3V 10% 0805 X5RC258 10uF 6.3V 10% 0805 X5R

C585 10uF 6.3V 10% 0805 X5RC585 10uF 6.3V 10% 0805 X5R

C242 10uF 6.3V 10% 0805 X5RC242 10uF 6.3V 10% 0805 X5R

North side secondary

C218 T330uF 2.5V 20% 105C DX1.9C218 T330uF 2.5V 20% 105C DX1.9

C246 T330uF 2.5V 20% 105C DX1.9C246 T330uF 2.5V 20% 105C DX1.9

C197 T330uF 2.5V 20% 105C DX1.9C197 T330uF 2.5V 20% 105C DX1.9

2 2

GND1 GND1

Place these inside socket cavity on L8 (South side secondary)

C600 10uF 6.3V 10% 0805 X5RC600 10uF 6.3V 10% 0805 X5R

C620 10uF 6.3V 10% 0805 X5RC620 10uF 6.3V 10% 0805 X5R

C609 10uF 6.3V 10% 0805 X5RC609 10uF 6.3V 10% 0805 X5R

C589 10uF 6.3V 10% 0805 X5RC589 10uF 6.3V 10% 0805 X5R

Place these inside socket cavity on L1 (South side Primary)

C234 10uF 6.3V 10% 0805 X5RC234 10uF 6.3V 10% 0805 X5R

C225 10uF 6.3V 10% 0805 X5RC225 10uF 6.3V 10% 0805 X5R

C243 10uF 6.3V 10% 0805 X5RC243 10uF 6.3V 10% 0805 X5R

C568 10uF 6.3V 10% 0805 X5RC568 10uF 6.3V 10% 0805 X5R

C576 10uF 6.3V 10% 0805 X5RC576 10uF 6.3V 10% 0805 X5R

C561 10uF 6.3V 10% 0805 X5RC561 10uF 6.3V 10% 0805 X5R

C613 10uF 6.3V 10% 0805 X5RC613 10uF 6.3V 10% 0805 X5R

C604 10uF 6.3V 10% 0805 X5RC604 10uF 6.3V 10% 0805 X5R

C249 10uF 6.3V 10% 0805 X5RC249 10uF 6.3V 10% 0805 X5R

C594 10uF 6.3V 10% 0805 X5RC594 10uF 6.3V 10% 0805 X5R

C610 10uF 6.3V 10% 0805 X5RC610 10uF 6.3V 10% 0805 X5R

C259 10uF 6.3V 10% 0805 X5RC259 10uF 6.3V 10% 0805 X5R

South side secondary

C254 T330uF 2.5V 20% 105C DX1.9C254 T330uF 2.5V 20% 105C DX1.9

C236 T330uF 2.5V 20% 105C DX1.9C236 T330uF 2.5V 20% 105C DX1.9

C214 T330uF 2.5V 20% 105C DX1.9C214 T330uF 2.5V 20% 105C DX1.9

CN20C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

SCKT CPU 478P PZ4782K-274M-41 FOXCONN

6026B0056801

Route VCCSENSE and VSSSENSE traces at 27.4 ohms with 50mil spacing. Place PU and PD within 1 inch of CPU

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

R534

R534 SHORT-0603-PWR

SHORT-0603-PWR

R501

R501 SHORT-0603-PWR

SHORT-0603-PWR

CPU_VID0 40 CPU_VID1 40 CPU_VID2 40 CPU_VID3 40 CPU_VID4 40 CPU_VID5 40 CPU_VID6 40

CN20D

Via:2.5A

C625 0.1uF 10V 10% 0402 X7RC625 0.1uF 10V 10% 0402 X7R

C626 0.1uF 10V 10% 0402 X7RC626 0.1uF 10V 10% 0402 X7R

GND1 GND1

Close to CPU pin B26

C273

0.01uF 16V 10% 0402 X7R

GND1 GND1

PWR_CPUCORE9,40

R492

R492 100-1%-1/16W-0402

100-1%-1/16W-0402

R488

R488 100-1%-1/16W-0402

100-1%-1/16W-0402

GND1 GND1 GND1

C612 T220uF 2.5V 18m 20% 7343 SANYO+C612 T220uF 2.5V 18m 20% 7343 SANYO

C577 0.1uF 10V 10% 0402 X7RC577 0.1uF 10V 10% 0402 X7R

C579 0.1uF 10V 10% 0402 X7RC579 0.1uF 10V 10% 0402 X7R

C627 0.1uF 10V 10% 0402 X7RC627 0.1uF 10V 10% 0402 X7R

+

20mils

18mil 7mil space

C580 0.1uF 10V 10% 0402 X7RC580 0.1uF 10V 10% 0402 X7R

>100mils

PWR_1.05VMAIN 7,10,11,14,15,19,22,44,48,54

Place these inside socket cavity on L8 (North side secondary)

PWR_1.5VMAIN 15,19,22,28,30,41,44

C274

C274 10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R

CPU_VCC_SENSE 40

CPU_VSS_SENSE 40

CN20D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]

P3

VSS[081]

SCKT CPU 478P PZ4782K-274M-41 FOXCONN

6026B0056801

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

1 1

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

A

B

C

D

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Merom Processor(2/2)

Monday, April 09, 2007

E

8

Rev

0.4

8

D D

7

6

5

4

3

2

1

THERMAL SENSOR

TEMP_TACH_CPU

R-AR-8P4R-10K-5%-1/16W-2010

C309

0.1uF 10V 10% 0402 X7R

GND1

1uF 6.3V 10% 0402 X5R

C61

R-AR-8P4R-10K-5%-1/16W-2010

0-5%-1/16W-0402

0-5%-1/16W-0402 R190

R190

TEMP_TACH_CPU

C62

3300pF 50V 10% 0402 X7R_NU

C62

3300pF 50V 10% 0402 X7R_NU

SMB_CLK_THERM23

SMB_DATA_THERM23

R169

R169 0-5%-1/16W-0402

B

Q25

2SC2411K 32V 0.5A SC59

Put near GMCH

C C

B B

0-5%-1/16W-0402

E C

0-5%-1/16W-0402

0-5%-1/16W-0402 R168

R168

H_THERMDA7

H_THERMDC7

PWR_5VSUS22,25,26,27,30,40,41,44,45,46,48

C60

10uF 10V 10% 0805 X5R

C60

10uF 10V 10% 0805 X5R

GND1

PWR_CPUCORE8,40

C63

0.01uF 16V 10% 0402 X7R_NU

C63

0.01uF 16V 10% 0402 X7R_NU

Modify at V02

C295

C295 1000pF 50V 10% 0402 X7R

1000pF 50V 10% 0402 X7R

1000pF 50V 10% 0402 X7R C296

C296

Q14

FDN338P 20V 1.6A SOT3

S D

S

1K-5%-1/16W-0402

R31

1K-5%-1/16W-0402

D

G

R37

U22

6

TACH1

7

TACH2

PWM2/SMBALERT#

1

SCL

16

SDA

THERM#/SMBALT#/TAC4/GPIO

13

D1+

12

D1-

11

D2+

10

D2-

14

VCCP(Monitor_Voltage)

ADT7473ARQZ-REEL QSOP 16P

6019B0334101

PWM1/XTO

PWM3

TACH3

VCC

GND

15

5

8

9

4

3

2

PWR_FAN_CPU

R35

10-5%-1/16W-0402

R35

10-5%-1/16W-0402

GND1 GND1

PWR_3VMAIN7,10,12,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

RS28

1 8 2 7 3 6 4 5

THERM_PMU# 49

PWR_3VSUS 10,17,18,23,25,26,27,28,33,34,36,41,47

ADFANON

PWR_3VSUS 10,17,18,23,25,26,27,28,33,34,36,41,47

PM_EXTTS#0 12

CN11

G1

1

2

3

G2

3P FAN 3801-E03N-01R E&T

6012B0185801

GND1

ADFANON

A A

8

7

6

Q15

B

NPN PDTC144EU 50V 100mA SOT223

E C

GND1

5

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

4

3

Date: Sheet of 55

2

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

CPU Thermal

Monday, April 09, 2007

9

1

Rev

0.4

5

PWR_1.8VSUS12,14,15,17,18,44,45

D D

4

20mil 20mil

100ohm 25% 2A 0.1ohm 0603

100ohm 25% 2A 0.1ohm 0603 L33

L33

blm11a471s

C388 10uF 6.3V 10% 0805 X5RC388 10uF 6.3V 10% 0805 X5R

C372 0.1uF 10V 10% 0402 X7RC372 0.1uF 10V 10% 0402 X7R

C389 0.1uF 10V 10% 0402 X7RC389 0.1uF 10V 10% 0402 X7R

C385 10uF 6.3V 10% 0805 X5RC385 10uF 6.3V 10% 0805 X5R

C373 0.1uF 10V 10% 0402 X7RC373 0.1uF 10V 10% 0402 X7R

C367 0.1uF 10V 10% 0402 X7RC367 0.1uF 10V 10% 0402 X7R

C375 0.1uF 10V 10% 0402 X7RC375 0.1uF 10V 10% 0402 X7R

C380 0.1uF 10V 10% 0402 X7RC380 0.1uF 10V 10% 0402 X7R

3

blm11a471s

100ohm 25% 2A 0.1ohm 0603

ICS_3VS

C362 0.1uF 10V 10% 0402 X7RC362 0.1uF 10V 10% 0402 X7R

C351 0.1uF 10V 10% 0402 X7RC351 0.1uF 10V 10% 0402 X7R

100ohm 25% 2A 0.1ohm 0603

L31

C368 10uF 6.3V 10% 0805 X5RC368 10uF 6.3V 10% 0805 X5R

C361 0.1uF 10V 10% 0402 X7RC361 0.1uF 10V 10% 0402 X7R

C371 0.1uF 10V 10% 0402 X7RC371 0.1uF 10V 10% 0402 X7R

C381 0.1uF 10V 10% 0402 X7RC381 0.1uF 10V 10% 0402 X7R

20mil 20mil

C348 0.1uF 10V 10% 0402 X7RC348 0.1uF 10V 10% 0402 X7R

2

PWR_3VSUS9,17,18,23,25,26,27,28,33,34,36,41,47

PWR_3VMAIN 7,9,12,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

R564 10K-5%-1/16W-0402R564 10K-5%-1/16W-0402

R569 10K-5%-1/16W-0402R569 10K-5%-1/16W-0402

R290 4.7K-5%-1/16W-0402R290 4.7K-5%-1/16W-0402

R293 10K-5%-1/16W-0402R293 10K-5%-1/16W-0402

R641 10K-5%-1/16W-0402R641 10K-5%-1/16W-0402

R642 10K-5%-1/16W-0402R642 10K-5%-1/16W-0402

1

del c301

GND1

SMB_DATA_SUS17,18,23

SMB_CLK_SUS17,18,23

CLK_PWROK21

R601

2.2K-5%-1/16W-0402

CLK_BSEL07

C C

B B

CLK_BSEL17

CLK_BSEL27

R581 2.2K-5%-1/16W-0402R581 2.2K-5%-1/16W-0402

PM_STPPCI#21

PM_STPCPU#21,54

CLK_48M_ICH21

CLK_14M_ICH21

CLK_14M_SIO35

14.318180MHZ-(SMD 6x)-30PPM-20PF-TXC

14.318180MHZ-(SMD 6x)-30PPM-20PF-TXC X5

X5

C673

33pF 50V 5% 0402 NPO

C673

33pF 50V 5% 0402 NPO

GND1

C672

33pF 50V 5% 0402 NPO

C672

33pF 50V 5% 0402 NPO

33-5%-1/16W-0402

GND1

R25533-5%-1/16W-0402 R25533-5%-1/16W-0402 R57433-5%-1/16W-0402 R57433-5%-1/16W-0402

CLK_USB48

R602

CLK_14M_REF

R57522-5%-1/16W-0402 R57522-5%-1/16W-0402

R57622-5%-1/16W-0402 R57622-5%-1/16W-0402

ICS_GND48

ICS_GNDREF

U46

26

VDDSRC_IO

45

VDDSRC_IO

36

VDDSRC_IO

12

VDD96_IO

20

VDDPLL3_IO

49

VDDCPU_IO

63

SDATA

64

SCLOCK

56

38 37

10 57 62

60

59

8 11 15 19 23 29 42 58 52

48

CPUC2_ITP / SRCC8

CK_PWRGD / PD#

PCI_STOP# CPU_STOP#

USB_48MHZ / FSLA FSLB / TEST_MODE REF0 / FSLC/TEST_SEL

XTAL_IN

XTAL_OUT

GNDPCI GND48 GND

27MHz_NonSS/SRCT1_SE1

GND

27MHz_SS/SRCC1_SE2

GNDSRC GNDSRC GNDSRC GNDREF GND_CPU

NC

ICS9LPRS365AGLF TSSOP 64P

6019B0282801

VDDREF VDDSRC

VDD48

VDDPCI

VDDCPU

VDDPLL3

CPUT1_F CPUC1_F

CPUT0

CPUC0

CPUT2_ITP / SRCT8

SRCT11 / CR#_H SRCC11 / CR#_G

SRCT10 SRCC10

SRCT9 SRCC9

SRCT7 / CR#_F

SRCC7 / CR#_E

SRCT6 SRCC6

PCI4 / 27_Select

PCI_F5 / ITP_EN

SRCT4 SRCC4

SRCT3/ CR#_C

SRCC3 / CR#_D

SRCT2 / SATAT

SRCC2 / SATAC

SRCT0 / DOTT_96

SRCC0 / DOTC_96

PCI0/CR#_A PCI1/CR#_B

PCI2/TME

PCI3

ICS_VDDREF

61 39

ICS_VDD48

9 2 55 16

ICS_MCH_BCLK

51

ICS_MCH_BCLK#

50

ICS_CPU_BCLK

54

ICS_CPU_BCLK#

53

ICS_PCIE_EXPCARD

47

ICS_PCIE_EXPCARD#

46

CR#_H

33

CR#_G

32

ICS_PCIE_MINICARD1

34

ICS_PCIE_MINICARD1#

35

ICS_PCIE_MINICARD

30

ICS_PCIE_MINICARD#

31

CR#_F

44

CR#_E

43

ICS_PCIE_LAN

41

ICS_PCIE_LAN#

40

27_SELECT

6

ITP_EN

7

ICS_PCIE_3GPLL

27

ICS_PCIE_3GPLL#

28

ICS_PCIE_ICH

24

ICS_PCIE_ICH#

25

ICS_PCIE_SATA

21

ICS_PCIE_SATA#

22

ICS_DREFSSCLK

17

ICS_DREFSSCLK#

18

ICS_DREFCLK

13

ICS_DREFCLK#

14

1 3

ICS_PCI2

4 5

ICS_PCI3

GND1

R606 SHORT-0402-5MILR606 SHORT-0402-5MIL R609 SHORT-0402-5MILR609 SHORT-0402-5MIL

R599 SHORT-0402-5MILR599 SHORT-0402-5MIL R603 SHORT-0402-5MILR603 SHORT-0402-5MIL

R612 SHORT-0402-5MILR612 SHORT-0402-5MIL R614 SHORT-0402-5MILR614 SHORT-0402-5MIL

R639 475-1%-1/16W-0402R639 475-1%-1/16W-0402 R643 475-1%-1/16W-0402R643 475-1%-1/16W-0402

R636 SHORT-0402-5MILR636 SHORT-0402-5MIL R629 SHORT-0402-5MILR629 SHORT-0402-5MIL

R638 SHORT-0402-5MILR638 SHORT-0402-5MIL R640 SHORT-0402-5MILR640 SHORT-0402-5MIL

R616 475-1%-1/16W-0402R616 475-1%-1/16W-0402 R618 475-1%-1/16W-0402R618 475-1%-1/16W-0402

R621 SHORT-0402-5MILR621 SHORT-0402-5MIL R626 SHORT-0402-5MILR626 SHORT-0402-5MIL

R591 33-5%-1/16W-0402R591 33-5%-1/16W-0402 R598 33-5%-1/16W-0402R598 33-5%-1/16W-0402

R628 SHORT-0402-5MILR628 SHORT-0402-5MIL R635 SHORT-0402-5MILR635 SHORT-0402-5MIL

R620 SHORT-0402-5MILR620 SHORT-0402-5MIL R623 SHORT-0402-5MILR623 SHORT-0402-5MIL

R615 SHORT-0402-5MILR615 SHORT-0402-5MIL R617 SHORT-0402-5MILR617 SHORT-0402-5MIL

R611 SHORT-0402-5MILR611 SHORT-0402-5MIL R613 SHORT-0402-5MILR613 SHORT-0402-5MIL

R605 SHORT-0402-5MILR605 SHORT-0402-5MIL R608 SHORT-0402-5MILR608 SHORT-0402-5MIL

R567 475-1%-1/16W-0402R567 475-1%-1/16W-0402 R570 475-1%-1/16W-0402R570 475-1%-1/16W-0402 R577 33-5%-1/16W-0402R577 33-5%-1/16W-0402 R240 33-5%-1/16W-0402R240 33-5%-1/16W-0402

R580 33-5%-1/16W-0402R580 33-5%-1/16W-0402 R586 33-5%-1/16W-0402R586 33-5%-1/16W-0402

CLK_PCIE_EXPCARD CLK_PCIE_EXPCARD#

CLK_33_ASIC CLK_PCIF_ICH

CLK_33_PMU CLK_33_PCIC

C679

5pF 50V 0.25% 0402 C0G

C679

5pF 50V 0.25% 0402 C0G

C676

5pF 50V 0.25% 0402 C0G

C676

5pF 50V 0.25% 0402 C0G

C337

5pF 50V 0.25% 0402 C0G

C337

5pF 50V 0.25% 0402 C0G

C359

5pF 50V 0.25% 0402 C0G

C359

5pF 50V 0.25% 0402 C0G

C674

5pF 50V 0.25% 0402 C0G

C674

5pF 50V 0.25% 0402 C0G

GND1 GND1 GND1 GND1 GND1 GND1

C354

5pF 50V 0.25% 0402 C0G

C354

5pF 50V 0.25% 0402 C0G

For EMI

CLK_MCH_BCLK 11 CLK_MCH_BCLK# 11

CLK_CPU_BCLK 7 CLK_CPU_BCLK# 7

CLK_PCIE_EXPCARD 27 CLK_PCIE_EXPCARD# 27

CLKREQ#_MINIC1 30 CLKREQ#_MINIC0 30

CLK_PCIE_MINICARD1 30 CLK_PCIE_MINICARD1# 30

CLK_PCIE_MINICARD0 30 CLK_PCIE_MINICARD0# 30

PLL_CLKREQ#_EXC 28 CLKREQ#_LAN 29

CLK_PCIE_LAN 29 CLK_PCIE_LAN# 29

CLK_33_ASIC 23,30,34 CLK_PCIF_ICH 20

CLK_PCIE_3GPLL 12 CLK_PCIE_3GPLL# 12

CLK_PCIE_ICH 20 CLK_PCIE_ICH# 20

CLK_PCIE_SATA 19 CLK_PCIE_SATA# 19

DREFSSCLK 12 DREFSSCLK# 12

DREFCLK 12 DREFCLK# 12

CLKREQ#_SATA 21 CLKREQ#_GMCH 12 CLK_33_PMU 49 CLK_33_PCIC 26

CLK_33_SIO 35 CLK_33_TPM 33

Clock Request table

PWR_1.05VMAIN7,8,11,14,15,19,22,44,48,54

R607

R267

R610

R267 1K-5%-1/16W-0402_NU

1K-5%-1/16W-0402_NU

R582 1K-5%-1/16W-0402R582 1K-5%-1/16W-0402 R592 1K-5%-1/16W-0402R592 1K-5%-1/16W-0402 R600 1K-5%-1/16W-0402R600 1K-5%-1/16W-0402

R587

R587 1K-5%-1/16W-0402_NU

1K-5%-1/16W-0402_NU

GND1GND1

FSA FSB FSC FSB CLOCK

1 110

FREQUENCY FREQUENCY

667 166

800 200

00

MCH_BSEL2 12 MCH_BSEL1 12 MCH_BSEL0 12CLK_BSEL07

HOST CLOCK

4

PWR_3VMAIN7,9,12,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

R253

R253 10K-5%-1/16W-0402

CLK_33_PMU

10K-5%-1/16W-0402

R248

R248 10K-5%-1/16W-0402_NU

10K-5%-1/16W-0402_NU

*

3

ITP_EN =0

SRC8/SRC8#

ITP_EN =1

ITP/ITP#

CLK_PCIF_ICH

R597

R597 10K-5%-1/16W-0402

10K-5%-1/16W-0402

GND1GND1

27_Selet =0

LCD_SST 100MHZ

27_Selet =1

27MHZ non-spread clock

2

PWR_3VMAIN7,9,12,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

CLK_33_ASIC

GND1

1K-5%-1/16W-0402_NU

CLK_BSEL27 CLK_BSEL17

1K-5%-1/16W-0402_NU

A A

1K-5%-1/16W-0402_NU

5

CLKREQ#_pin Clocks

R264

R264 10K-5%-1/16W-0402_NU

10K-5%-1/16W-0402_NU

R590

R590 10K-5%-1/16W-0402

10K-5%-1/16W-0402

SRCCLK0

CR#_A

SRCCLK2

SRCCLK1

CR#_B

SRCCLK4

SRCCLK6

CR#_E

SRCCLK8

CR#_F

CR#_G

SRCCLK9

CR#_H

SRCCLK10

Inventec Corporation

Title

J11Eagle(Merom+Crestline+ICH8M)

Size

C

Date: Sheet of 55

Select

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

Document Number

Monday, April 09, 2007

Byte 5, bit 7=1

V

Byte 5, bit 6=1

Byte 5, bit 5=1

V

Byte 5, bit 4=1

V

Byte 6, bit 7=1

V

Byte 6, bit 6=1

V

Byte 6, bit 5=1

V

Byte 6, bit 4=1

Clock Generator

1

Rev

0.4

10

0.4

10

9

8

7

6

5

4

3

2

1

H H

PWR_1.05VMAIN7,8,10,14,15,19,22,44,48,54

R159

54.9-1%-1/16W-0402

G G

F F

54.9-1%-1/16W-0402

H_SCOMP#

PWR_1.05VMAIN7,8,10,14,15,19,22,44,48,54 PWR_1.05VMAIN7,8,10,14,15,19,22,44,48,54

R158

54.9-1%-1/16W-0402

H_SCOMP

H_RCOMP

R161

24.9-1%-1/16W-0402

GND1

R156

R156 221-1%-1/16W-0402

221-1%-1/16W-0402

R154

R154 100-1%-1/16W-0402

100-1%-1/16W-0402

GND1

H_SWING

GND1

H_D#[63..0]7

C272

0.1uF 10V 10% 0402 X7R

H_D#[63..0]

Trace should be 10-mil wide with 20-mil spacing

E E

D D

H_SWING H_RCOMP

H_SCOMP H_SCOMP#

H_CPURST#7,54

PWR_1.05VMAIN7,8,10,14,15,19,22,44,48,54

C C

R152

R152 1K-1%-1/16W-0402

1K-1%-1/16W-0402

H_CPUSLP#7

H_AVREF

U21A

H_D#0

E2

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_D#_0

G2

H_D#_1

G7

H_D#_2

M6

H_D#_3

H7

H_D#_4

H3

H_D#_5

G4

H_D#_6

F3

H_D#_7

N8

H_D#_8

H2

H_D#_9

M10

H_D#_10

N12

H_D#_11

N9

H_D#_12

H5

H_D#_13

P13

H_D#_14

K9

H_D#_15

M2

H_D#_16

W10

H_D#_17

Y8

H_D#_18

V4

H_D#_19

M3

H_D#_20

J1

H_D#_21

N5

H_D#_22

N3

H_D#_23

W6

H_D#_24

W9

H_D#_25

N2

H_D#_26

Y7

H_D#_27

Y9

H_D#_28

P4

H_D#_29

W3

H_D#_30

N1

H_D#_31

AD12

H_D#_32

AE3

H_D#_33

AD9

H_D#_34

AC9

H_D#_35

AC7

H_D#_36

AC14

H_D#_37

AD11

H_D#_38

AC11

H_D#_39

AB2

H_D#_40

AD7

H_D#_41

AB1

H_D#_42

Y3

H_D#_43

AC6

H_D#_44

AE2

H_D#_45

AC5

H_D#_46

AG3

H_D#_47

AJ9

H_D#_48

AH8

H_D#_49

AJ14

H_D#_50

AE9

H_D#_51

AE11

H_D#_52

AH12

H_D#_53

AJ5

H_D#_54

AH5

H_D#_55

AJ6

H_D#_56

AE7

H_D#_57

AJ7

H_D#_58

AJ2

H_D#_59

AE5

H_D#_60

AJ3

H_D#_61

AH2

H_D#_62

AH13

H_D#_63

B3

H_SWING

C2

H_RCOMP

W1

H_SCOMP

W2

H_SCOMP#

B6

H_CPURST#

E5

H_CPUSLP#

B9

H_AVREF

A9

H_DVREF

Crestline FBGA 1299P INTEL 6019B0360601

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0

H_RS#_1

H_RS#_2

B11 C11 M11 C15 F16 L13 G17 C14 K16 B13 L16 J17 B14 K19 P15 R17 B16 H20 L19 D17 M17 N16 J19 B18 E19 B17 B15 E17 C18 A19 B19 N19

G12 H17 G20 C8 E8 F12 D6 C10 AM5 AM7 H8 K7 E4 C6 G10 B7

K5 L2 AD13 AE13

M7 K3 AD2 AH11

L7 K2 AC2 AJ10

M14 E13 A11 H13 B12

E12 D7 D8

H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#3

J13

H_A#[35..3]

H_REQ#[4..0]

H_A#[35..3] 7

H_ADS# 7 H_ADSTB#0 7 H_ADSTB#1 7 H_BNR# 7 H_BPRI# 7 H_BREQ#0 7 H_DEFER# 7 H_DBSY# 7 CLK_MCH_BCLK 10 CLK_MCH_BCLK# 10 H_DPWR# 7,54 H_DRDY# 7 H_HIT# 7 H_HITM# 7 H_LOCK# 7 H_TRDY# 7

H_DINV#0 7 H_DINV#1 7 H_DINV#2 7 H_DINV#3 7

H_DSTBN#0 7 H_DSTBN#1 7 H_DSTBN#2 7 H_DSTBN#3 7

H_DSTBP#0 7 H_DSTBP#1 7 H_DSTBP#2 7 H_DSTBP#3 7 H_REQ#[4..0] 7

H_RS#0 7 H_RS#1 7 H_RS#2 7

R149

R149 2K-1%-1/16W-0402

2K-1%-1/16W-0402

GND1 GND1

C267

0.1uF 10V 10% 0402 X7R

R150

R150 0-5%-1/16W-0402

0-5%-1/16W-0402

H_DVREF

C267

B B

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

A A

10

9

8

7

6

5

4

3

Title

Size

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Crestline Host(1/6)

Monday, April 09, 2007

2

11

1

Rev

0.4

10

H H

G G

F F

MCH_BSEL010 MCH_BSEL110 MCH_BSEL210

E E

PM_BMBUSY#21

H_DPRSTP#7,19,40 PM_EXTTS#09 PM_EXTTS#117,18

PWROK_3VMAIN17,21,39,54

D D

PM_THRMTRIP#7,19

PWR_3VMAIN

R491

R491 10K-5%-1/16W-0402

10K-5%-1/16W-0402

R483

R483 10K-5%-1/16W-0402

10K-5%-1/16W-0402

PLT_RST#20,34,35,37,49,54

DPRSLPVR21,40

MCH_CFG5

MCH_CFG9

MCH_CFG16

MCH_CFG18 MCH_CFG19 MCH_CFG20

R527 100-5%-1/16W-0402R527 100-5%-1/16W-0402

R513 0-5%-1/16W-0402R513 0-5%-1/16W-0402

PM_EXTTS#0

PM_EXTTS#1

C C

MCH_CFG18

R511 1K-5%-1/16W-0402_NUR511 1K-5%-1/16W-0402_NU

MCH_CFG19

R503 4.02K-1%-1/16W-0402_NUR503 4.02K-1%-1/16W-0402_NU

MCH_CFG20

R485 4.02K-1%-1/16W-0402_NUR485 4.02K-1%-1/16W-0402_NU

MCH_CFG5

R531 4.02K-1%-1/16W-0402_NUR531 4.02K-1%-1/16W-0402_NU

MCH_CFG9

R530 2.2K-5%-1/16W-0402_NUR530 2.2K-5%-1/16W-0402_NU

MCH_CFG16

R532 4.02K-1%-1/16W-0402_NUR532 4.02K-1%-1/16W-0402_NU

B B

SDVO_CTRL_CLK

5.6K-5%-1/16W-0402

A A

10

PM_EXTTS#0 PM_EXTTS#1

R770

9

PWR_3VMAIN7,9,10,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

GND1

9

U21B

P36

RSVD1

P37

RSVD2

R35

RSVD3

N35

RSVD4

AR12

RSVD5

AR13

RSVD6

AM12

RSVD7

AN13

RSVD8

J12

RSVD9

AR37

RSVD10

AM36

RSVD11

AL36

RSVD12

AM37

RSVD13

D20

RSVD14

H10

RSVD20

B51

RSVD21

BJ20

RSVD22

BK22

RSVD23

BF19

RSVD24

BH20

RSVD25

BK18

RSVD26

BJ18

RSVD27

BF23

RSVD28

BG23

RSVD29

BC23

RSVD30

BD24

RSVD31

BH39

RSVD34

AW20

RSVD35

BK20

RSVD36

B44

RSVD39

C44

RSVD40

A35

RSVD41

B37

RSVD42

B36

RSVD43

B34

RSVD44

C34

RSVD45

P27

CFG_0

N27

CFG_1

N24

CFG_2

C21

CFG_3

C23

CFG_4

F23

CFG_5

N23

CFG_6

G23

CFG_7

J20

CFG_8

C20

CFG_9

R24

CFG_10

L23

CFG_11

J23

CFG_12

E23

CFG_13

E20

CFG_14

K23

CFG_15

M20

CFG_16

M24

CFG_17

L32

CFG_18

N33

CFG_19

L35

CFG_20

G41

PM_BM_BUSY#

L39

PM_DPRSTP#

L36

PM_EXT_TS#_0

J36

PM_EXT_TS#_1

AW49

PWROK

AV20

RSTIN#

N20

THERMTRIP#

G36

DPRSLPVR

BJ51

NC_1

BK51

NC_2

BK50

NC_3

BL50

NC_4

BL49

NC_5

BL3

NC_6

BL2

NC_7

BK1

NC_8

BJ1

NC_9

E1

NC_10

A5

NC_11

C51

NC_12

B50

NC_13

A50

NC_14

A49

NC_15

BK2

NC_16

Crestline FBGA 1299P INTEL 6019B0360601

PWR_3VMAIN7,9,10,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

GND1

Change to 316 Ohm (R762,R765)

R765

R765 316 1% 1/16 0402

316 1% 1/16 0402

SDVO_CTRL_DATA

R764

R764 1K-5%-1/16W-0402

1K-5%-1/16W-0402

R771

5.6K-5%-1/16W-0402

Modify at V03

CFGRSVD

PM

NC

8

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF_0 SM_VREF_1

DDR MUXINGCLK

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

DMI

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3

GFX_VR_EN

GRAPHICS VID

CL_PWROK

ME

SDVO_CTRL_CLK

SDVO_CTRL_DATA

ICH_SYNC#

MISC

PWR_3VMAIN7,9,10,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

R762

R762 316 1% 1/16 0402

316 1% 1/16 0402

R763

R763 1K-5%-1/16W-0402

1K-5%-1/16W-0402

GND1

SM_CK_0 SM_CK_1 SM_CK_3 SM_CK_4

SM_CK#_0 SM_CK#_1 SM_CK#_3

SM_CK#_4

SM_CKE_0 SM_CKE_1 SM_CKE_3 SM_CKE_4

SM_CS#_0 SM_CS#_1 SM_CS#_2 SM_CS#_3

SM_ODT_0 SM_ODT_1 SM_ODT_2 SM_ODT_3

PEG_CLK

PEG_CLK#

CL_CLK

CL_DATA

CL_RST# CL_VREF

CLK_REQ#

TEST_1 TEST_2

7

AV29 BB23 BA25 AV23

AW30 BA23 AW25 AW23

BE29 AY32 BD39 BG37

BG20 BK16 BG16 BE13

BH18 BJ15 BJ14 BE16

BL15 BK14

BK31 BL31

AR49 AW4

B42 C42 H48 H47

K44 K45

AN47 AJ38 AN42 AN46

AM47 AJ39 AN41 AN45

AJ46 AJ41 AM40 AM44

AJ47 AJ42 AM39 AM43

E35 A39 C38 B39 E36

AM49 AK50 AT43 AN49 AM50

H35 K36 G39 G40

A37 R32

M_RCOMP M_RCOMP#

M_RCOMP_VOH M_RCOMP_VOL

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

MCH_CLVREF

SDVO_CTRL_CLK SDVO_CTRL_DATA

MCH_TEST1 MCH_TEST2

M_CLK_DDR0 17 M_CLK_DDR1 17 M_CLK_DDR2 18 M_CLK_DDR3 18

M_CLK_DDR#0 17 M_CLK_DDR#1 17 M_CLK_DDR#2 18 M_CLK_DDR#3 18

M_CKE0 17 M_CKE1 17 M_CKE2 18 M_CKE3 18

M_CS#0 17 M_CS#1 17 M_CS#2 18 M_CS#3 18

M_ODT0 17 M_ODT1 17 M_ODT2 18 M_ODT3 18

M_VREF 17,18,45

DREFCLK 10 DREFCLK# 10 DREFSSCLK 10 DREFSSCLK# 10

CLK_PCIE_3GPLL 10 CLK_PCIE_3GPLL# 10

DMI_TXN[3..0]

DMI_TXP[3..0]

DMI_RXN[3..0]

DMI_RXP[3..0]

DFGT_VID_0 46 DFGT_VID_1 46 DFGT_VID_2 46 DFGT_VID_3 46 VGAON 46

CL_CLK0 21

CL_DATA0 21 CL_PWROK 21 CL_RST#0 21 MCH_CLVREF

SDVO_CTRL_CLK 37

SDVO_CTRL_DATA 37 CLKREQ#_GMCH 10 MCH_ICH_SYNC# 21

MCH_TEST1 MCH_TEST2

0-5%-1/16W-0402

Route M_OCDCMOP 0&1 as short as possible

DMI_TXN[3..0] 20

DMI_TXP[3..0] 20

DMI_RXN[3..0] 20

DMI_RXP[3..0] 20

R489

GND1GND1

CRESTLINE (965GM) Strapping:

MCH_CFG5

MCH_CFG9 (PCIE Graphic Lane)

MCH_CFG16 (FSB Dynamic ODT)

MCH_CFG18 (VCC Select)

MCH_CFG19 (DMI Lane Reversal)

MCH_CFG20

7

6

GND1

M_VREF

C636

C549

0.1uF 10V 10% 0402 X7R

GND1

Place 150ohm termination resistor close to GMCH

R510

R510 20K-5%-1/16W-0402

20K-5%-1/16W-0402

Low

DMIx2

Reverse Lane

Dynamic ODT Disable

1.05V

Normal Lanes Reversed

Only SDVO or PCIE x1 is operation

LCDEN24,34

TVA_DAC25 TVB_DAC25 TVC_DAC25

GND1

GM_CRT_BLUE25

GM_CRT_GREEN25

GM_CRT_RED25

CRT_DDC_CLK24 CRT_DDC_DATA24

CRT_HSYNC24

CRT_VSYNC24

High

DMIx4

Normal Operation

Dynamic ODT Enable

1.5V

Only SDVO or PCIE x1 with PEG port

6

5

R487

100K-5%-1/16W-0402

GM_BL_VOL24 GM_BLEN34

GND1

R522 120 0.5% 1/16W 0402R522 120 0.5% 1/16W 0402 R524 120 0.5% 1/16W 0402R524 120 0.5% 1/16W 0402 R528 120 0.5% 1/16W 0402R528 120 0.5% 1/16W 0402

PWR_3VMAIN7,9,10,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

R519 120 0.5% 1/16W 0402R519 120 0.5% 1/16W 0402 R518 120 0.5% 1/16W 0402R518 120 0.5% 1/16W 0402 R520 120 0.5% 1/16W 0402R520 120 0.5% 1/16W 0402

GM_BLEN

R484 0-5%-1/16W-0402R484 0-5%-1/16W-0402

LVDS_TXCLK_LN24 LVDS_TXCLK_LP24 LVDS_TXCLK_UN24 LVDS_TXCLK_UP24

LVDS_TXOUT_L0N24 LVDS_TXOUT_L1N24 LVDS_TXOUT_L2N24

LVDS_TXOUT_L0P24 LVDS_TXOUT_L1P24 LVDS_TXOUT_L2P24

LVDS_TXOUT_U0N24 LVDS_TXOUT_U1N24 LVDS_TXOUT_U2N24

LVDS_TXOUT_U0P24 LVDS_TXOUT_U1P24 LVDS_TXOUT_U2P24

R523 SHORT-0402-5MILR523 SHORT-0402-5MIL R525 SHORT-0402-5MILR525 SHORT-0402-5MIL R529 SHORT-0402-5MILR529 SHORT-0402-5MIL

GM_CRT_BLUE

GM_CRT_GREEN

GM_CRT_RED

R514 30.1-0.5%-1/16W-0402R514 30.1-0.5%-1/16W-0402

R509 30.1-0.5%-1/16W-0402R509 30.1-0.5%-1/16W-0402

MCH_CLVREF

0.1uF 10V 10% 0402 X7R

5

C543

GM_BLEN

GND1

R515

1.27K 1% 1/16W 0402

2.2K-5%-1/16W-0402

R493

LVDS_TXCLK_LN LVDS_TXCLK_LP LVDS_TXCLK_UN LVDS_TXCLK_UP

LVDS_TXOUT_L0N LVDS_TXOUT_L1N LVDS_TXOUT_L2N

LVDS_TXOUT_L0P LVDS_TXOUT_L1P LVDS_TXOUT_L2P

LVDS_TXOUT_U0N LVDS_TXOUT_U1N LVDS_TXOUT_U2N

LVDS_TXOUT_U0P LVDS_TXOUT_U1P LVDS_TXOUT_U2P

GND1

PWR_1.25VMAIN15,22,41,44

GND1 GND1

PWR_1.8VSUS10,14,15,17,18,44,45

R146

R147

GND1

PWR_3VMAIN7,9,10,15,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

10K-5%-1/16W-0402

2.2K-5%-1/16W-0402

R496

R495

GM_LCDON

R4822.37K-1%-1/16W-0402 R4822.37K-1%-1/16W-0402

R4902.2K-5%-1/16W-0402_NU R4902.2K-5%-1/16W-0402_NU R5022.2K-5%-1/16W-0402_NU R5022.2K-5%-1/16W-0402_NU

REFSET

R473

R473 1K-1%-1/16W-0402

1K-1%-1/16W-0402

R471

R471 392-1%-1/16W-0402

392-1%-1/16W-0402

20-1%-1/16W-0402

4

3

SDVO Routing Guideline at

10K-5%-1/16W-0402

Page 35

R494

U21C

J40

L_BKLT_CTRL

H39

L_BKLT_EN

E39

L_CTRL_CLK

E40

L_CTRL_DATA

C37

L_DDC_CLK

D35

L_DDC_DATA

K40

L_VDD_EN

L41

LVDS_IBG

L43

LVDS_VBG

N41

LVDS_VREFH

N40

LVDS_VREFL

D46

LVDSA_CLK#

C45

LVDSA_CLK

D44

LVDSB_CLK#

E42

LVDSB_CLK

G51

LVDSA_DATA#_0

E51

LVDSA_DATA#_1

F49

LVDSA_DATA#_2

C48

LVDSA_DATA#_3

G50

LVDSA_DATA_0

E50

LVDSA_DATA_1

F48

LVDSA_DATA_2

D47

LVDSA_DATA_3

G44

LVDSB_DATA#_0

B47

LVDSB_DATA#_1

B45

LVDSB_DATA#_2

E44

LVDSB_DATA_0

A47

LVDSB_DATA_1

A45

LVDSB_DATA_2

E27

TVA_DAC

G27

TVB_DAC

K27

TVC_DAC

F27

TVA_RTN

J27

TVB_RTN

L27

TVC_RTN

M35

TV_DCONSEL_0

P33

TV_DCONSEL_1

H32

CRT_BLUE

G32

CRT_BLUE#

K29

CRT_GREEN

J29

CRT_GREEN#

F29

CRT_RED

E29

CRT_RED#

K33

CRT_DDC_CLK

G35

CRT_DDC_DATA

F33

CRT_HSYNC

C32

CRT_TVO_IREF

E33

CRT_VSYNC

Crestline FBGA 1299P INTEL 6019B0360601

As close as possible to GMCH and Minimum spacing of 20 mils away from any toggle signals

When the display is completely white , the RGB voltage is between 665mV to 770mV by VESA Spec If meet , CRT_IREF resistor value is optimal

M_RCOMP

M_RCOMP#

LVDS

TV VGA

R137

1K-1%-1/16W-0402

R138

3.01K 1% 1/16 0402

R139

1K-1%-1/16W-0402

PCI-EXPRESS GRAPHICS

PWR_1.8VSUS10,14,15,17,18,44,45

GND1

4

N43

PEG_COMPI

M43

PEG_COMPO

J51

PEG_RX#_0

L51

PEG_RX#_1

N47

PEG_RX#_2

T45

PEG_RX#_3

T50

PEG_RX#_4

U40

PEG_RX#_5

Y44

PEG_RX#_6

Y40

PEG_RX#_7

AB51

PEG_RX#_8

W49

PEG_RX#_9

AD44

PEG_RX#_10

AD40

PEG_RX#_11

AG46

PEG_RX#_12

AH49

PEG_RX#_13

AG45

PEG_RX#_14

AG41

PEG_RX#_15

J50

PEG_RX_0

L50

PEG_RX_1

M47

PEG_RX_2

U44

PEG_RX_3

T49

PEG_RX_4

T41

PEG_RX_5

W45

PEG_RX_6

W41

PEG_RX_7

AB50

PEG_RX_8

Y48

PEG_RX_9

AC45

PEG_RX_10

AC41

PEG_RX_11

AH47

PEG_RX_12

AG49

PEG_RX_13

AH45

PEG_RX_14

AG42

PEG_RX_15

N45

PEG_TX#_0

U39

PEG_TX#_1

U47

PEG_TX#_2

N51

PEG_TX#_3

R50

PEG_TX#_4

T42

PEG_TX#_5

Y43

PEG_TX#_6

W46

PEG_TX#_7

W38

PEG_TX#_8

AD39

PEG_TX#_9

AC46

PEG_TX#_10

AC49

PEG_TX#_11

AC42

PEG_TX#_12

AH39

PEG_TX#_13

AE49

PEG_TX#_14

AH44

PEG_TX#_15

M45

PEG_TX_0

T38

PEG_TX_1

T46

PEG_TX_2

N50

PEG_TX_3

R51

PEG_TX_4

U43

PEG_TX_5

W42

PEG_TX_6

Y47

PEG_TX_7

Y39

PEG_TX_8

AC38

PEG_TX_9

AD47

PEG_TX_10

AC50

PEG_TX_11

AD43

PEG_TX_12

AG39

PEG_TX_13

AE50

PEG_TX_14

AH43

PEG_TX_15

0.01uF 16V 10% 0402 X7R

M_RCOMP_VOH

C231

C230

2.2uF 10V 10% 0805 X5R

GND1

M_RCOMP_VOL

C244

C245

2.2uF 10V 10% 0805 X5R

GND1

0.01uF 16V 10% 0402 X7R

3

2

VCC_PEG15

R477

24.9-1%-1/16W-0402

PEG_COMP

SDVOB_INT- 37

SDVOB_INT+ 37

C831 0.1uF 10V 10% 0402 X5RC831 0.1uF 10V 10% 0402 X5R

C832 0.1uF 10V 10% 0402 X5RC832 0.1uF 10V 10% 0402 X5R

C833 0.1uF 10V 10% 0402 X5RC833 0.1uF 10V 10% 0402 X5R

C834 0.1uF 10V 10% 0402 X5RC834 0.1uF 10V 10% 0402 X5R

C835 0.1uF 10V 10% 0402 X5RC835 0.1uF 10V 10% 0402 X5R

C836 0.1uF 10V 10% 0402 X5RC836 0.1uF 10V 10% 0402 X5R

C837 0.1uF 10V 10% 0402 X5RC837 0.1uF 10V 10% 0402 X5R

C838 0.1uF 10V 10% 0402 X5RC838 0.1uF 10V 10% 0402 X5R

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Crestline DMI/Graph2/6)

Monday, April 09, 2007

2

SDVOB_RED- 37

SDVOB_GREEN- 37

SDVOB_BLUE- 37

SDVOB_CLK- 37

SDVOB_RED+ 37

SDVOB_GREEN+ 37

SDVOB_BLUE+ 37

SDVOB_CLK+ 37

1

Rev

0.4

12

1

0.4

10

9

8

7

6

5

4

3

2

1

H H

G G

M_A_DQ[63..0]17

F F

E E

D D

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

U21D

AR43

SA_DQ_0

AW44

SA_DQ_1

BA45

SA_DQ_2

AY46

SA_DQ_3

AR41

SA_DQ_4

AR45

SA_DQ_5

AT42

SA_DQ_6

AW47

SA_DQ_7

BB45

SA_DQ_8

BF48

SA_DQ_9

BG47

SA_DQ_10

BJ45

SA_DQ_11

BB47

SA_DQ_12

BG50

SA_DQ_13

BH49

SA_DQ_14

BE45

SA_DQ_15

AW43

SA_DQ_16

BE44

SA_DQ_17

BG42

SA_DQ_18

BE40

SA_DQ_19

BF44

SA_DQ_20

BH45

SA_DQ_21

BG40

SA_DQ_22

BF40

SA_DQ_23

AR40

SA_DQ_24

AW40

SA_DQ_25

AT39

SA_DQ_26

AW36

SA_DQ_27

AW41

SA_DQ_28

AY41

SA_DQ_29

AV38

SA_DQ_30

AT38

SA_DQ_31

AV13

SA_DQ_32

AT13

SA_DQ_33

AW11

SA_DQ_34

AV11

SA_DQ_35

AU15

SA_DQ_36

AT11

SA_DQ_37

BA13

SA_DQ_38

BA11

SA_DQ_39

BE10

SA_DQ_40

BD10

SA_DQ_41

BD8

SA_DQ_42

AY9

SA_DQ_43

BG10

SA_DQ_44

AW9

SA_DQ_45

BD7

SA_DQ_46

BB9

SA_DQ_47

BB5

SA_DQ_48

AY7

SA_DQ_49

AT5

SA_DQ_50

AT7

SA_DQ_51

AY6

SA_DQ_52

BB7

SA_DQ_53

AR5

SA_DQ_54

AR8

SA_DQ_55

AR9

SA_DQ_56

AN3

SA_DQ_57

AM8

SA_DQ_58

AN10

SA_DQ_59

AT9

SA_DQ_60

AN9

SA_DQ_61

AM9

SA_DQ_62

AN11

SA_DQ_63

Crestline FBGA 1299P INTEL 6019B0360601

DDR SYSTEM MEMORY A

SA_BS_0 SA_BS_1 SA_BS_2

SA_CAS#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

SA_RAS#

SA_RCVEN#

SA_WE#

BB19 BK19 BF29

BL17

AT45 BD44 BD42 AW38 AW13 BG8 AY5 AN6

AT46 BE48 BB43 BC37 BB16 BH6 BB2 AP3 AT47 BD47 BC41 BA37 BA16 BH7 BC1 AP2

BJ19 BD20 BK27 BH28 BL24 BK28 BJ27 BJ25 BL28 BA28 BC19 BE28 BG30 BJ16 BJ29

BE18 AY20

BA19

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_BS0 17 M_A_BS1 17 M_A_BS2 17

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

1

TP19TP19

M_A_CAS# 17

M_A_DM[7..0] 17

M_A_DQS[7..0] 17

M_A_DQS#[7..0] 17

M_A_A[14..0] 17

M_A_RAS# 17

M_A_WE# 17

M_B_DQ[63..0]18

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

U21E

AP49

SB_DQ_0

AR51

SB_DQ_1

AW50

SB_DQ_2

AW51

SB_DQ_3

AN51

SB_DQ_4

AN50

SB_DQ_5

AV50

SB_DQ_6

AV49

SB_DQ_7

BA50

SB_DQ_8

BB50

SB_DQ_9

BA49

SB_DQ_10

BE50

SB_DQ_11

BA51

SB_DQ_12

AY49

SB_DQ_13

BF50

SB_DQ_14

BF49

SB_DQ_15

BJ50

SB_DQ_16

BJ44

SB_DQ_17

BJ43

SB_DQ_18

BL43

SB_DQ_19

BK47

SB_DQ_20

BK49

SB_DQ_21

BK43

SB_DQ_22

BK42

SB_DQ_23

BJ41

SB_DQ_24

BL41

SB_DQ_25

BJ37

SB_DQ_26

BJ36

SB_DQ_27

BK41

SB_DQ_28

BJ40

SB_DQ_29

BL35

SB_DQ_30

BK37

SB_DQ_31

BK13

SB_DQ_32

BE11

SB_DQ_33

BK11

SB_DQ_34

BC11

SB_DQ_35

BC13

SB_DQ_36

BE12

SB_DQ_37

BC12

SB_DQ_38

BG12

SB_DQ_39

BJ10

SB_DQ_40

BL9

SB_DQ_41

BK5

SB_DQ_42

BL5

SB_DQ_43

BK9

SB_DQ_44

BK10

SB_DQ_45

BJ8

SB_DQ_46

BJ6

SB_DQ_47

BF4

SB_DQ_48

BH5

SB_DQ_49

BG1

SB_DQ_50

BC2

SB_DQ_51

BK3

SB_DQ_52

BE4

SB_DQ_53

BD3

SB_DQ_54

BJ2

SB_DQ_55

BA3

SB_DQ_56

BB3

SB_DQ_57

AR1

SB_DQ_58

AT3

SB_DQ_59

AY2

SB_DQ_60

AY3

SB_DQ_61

AU2

SB_DQ_62

AT2

SB_DQ_63

Crestline FBGA 1299P INTEL 6019B0360601

DDR SYSTEM MEMORY B

SB_BS_0 SB_BS_1 SB_BS_2

SB_CAS#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

SB_RAS#

SB_RCVEN#

SB_WE#

AY17 BG18 BG36

BE17

AR50 BD49 BK45 BL39 BH12 BJ7 BF3 AW2

AT50 BD50 BK46 BK39 BJ12 BL7 BE2 AV2 AU50 BC50 BL45 BK38 BK12 BK7 BF2 AV3

BC18 BG28 BG25 AW17 BF25 BE25 BA29 BC28 AY28 BD37 BG17 BE37 BA39 BG13 BE24

AV16 AY18

BC17

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_BS0 18 M_B_BS1 18 M_B_BS2 18

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

1

TP20TP20

M_B_CAS# 18

M_B_DM[7..0] 18

M_B_DQS[7..0] 18

M_B_DQS#[7..0] 18

M_B_A[14..0] 18

M_B_RAS# 18

M_B_WE# 18

C C

B B

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

A A

10

9

8

7

6

5

4

3

Title

Size

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Monday, April 09, 2007

2

Crestline DDR2(3/6)

13

1

Rev

0.4

10

9

8

7

6

5

4

3

2

1

H H

PWR_1.05VMAIN7,8,10,11,15,19,22,44,48,54

U21G

AT35

VCC_1

AT34

VCC_2

AH28

VCC_3

AC32

VCC_5

AC31

VCC_4

AK32

VCC_6

AJ31

VCC_7

AJ28

VCC_8

AH32

VCC_9

AH31

G G

R516

SHORT-0402-15MIL

PLACE ON THE EDGE

F F

C175 T330uF 2.5V 20% 105C DX1.9C175 T330uF 2.5V 20% 105C DX1.9

C581 0.1uF 10V 10% 0402 X7RC581 0.1uF 10V 10% 0402 X7R

PWR_1.8VSUS10,12,15,17,18,44,45

C177 10uF 6.3V 10% 0805 X5RC177 10uF 6.3V 10% 0805 X5R

C176 10uF 6.3V 10% 0805 X5RC176 10uF 6.3V 10% 0805 X5R

E E

Place C5C7 where LVDS and DDR2 taps.

GND1

PWR_IGPCORE46

D D

C C

AH29 AF32

AU32 AU33 AU35

AV33 AW33 AW35

AY35

BA32

BA33

BA35

BB33

BC32

BC33

BC35

BD32

BD35

BE32

BE33

BE35

BF33

BF34

BG32

BG33

BG35

BH32

BH34

BH35

BK32

BK33

BK34

BK35

AU30

AA20

AA23

AA26

AA28

AB21

AB24

AB29

AC20

AC21

AC23

AC24

AC26

AC28

AC29

AD20

AD23

AD24

AD28

AF21

AF26

AA31

AH20

AH21

AH23

AH24

AH26

AD31

AN14

R30

BJ32 BJ33 BJ34

BL33

R20

W13 W14

AJ20

T14

Y12

VCC_10 VCC_11 VCC_12

VCC_13

VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35 VCC_SM_36

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34

VCC CORE

POWER

VCC SMVCC GFX

VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54

VCC GFX NCTF

VCC_AXG_NCTF_55 VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60 VCC_AXG_NCTF_61 VCC_AXG_NCTF_62 VCC_AXG_NCTF_63 VCC_AXG_NCTF_64 VCC_AXG_NCTF_65 VCC_AXG_NCTF_66 VCC_AXG_NCTF_67 VCC_AXG_NCTF_68 VCC_AXG_NCTF_69 VCC_AXG_NCTF_70 VCC_AXG_NCTF_71 VCC_AXG_NCTF_72 VCC_AXG_NCTF_73 VCC_AXG_NCTF_74 VCC_AXG_NCTF_75 VCC_AXG_NCTF_76 VCC_AXG_NCTF_77 VCC_AXG_NCTF_78 VCC_AXG_NCTF_79 VCC_AXG_NCTF_80 VCC_AXG_NCTF_81 VCC_AXG_NCTF_82 VCC_AXG_NCTF_83

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31

AW45 BC39 BE39 BD17 BD4 AW8 AT6

PWR_IGPCORE46

0.1uF 10V 10% 0402 X7R

C634

Cavity Capacitors

C618 0.1uF 10V 10% 0402 X7RC618 0.1uF 10V 10% 0402 X7R

C624 0.1uF 10V 10% 0402 X7RC624 0.1uF 10V 10% 0402 X7R

GND1

0.22uF 10V 10% 0603 X7R

0.1uF 10V 10% 0402 X7R

C638

C632

C622 1uF 6.3V 10% 0402 X5RC622 1uF 6. 3V 10% 0402 X5R

C607 0.47uF 16V 10% 0603 X7RC607 0.47uF 16V 10% 0603 X7R

0.47uF 16V 10% 0603 X7R

0.22uF 10V 10% 0603 X7R

C574

C629

C615 10uF 6.3V 10% 0805 X5RC615 10uF 6.3V 10% 0805 X5R

1uF 6.3V 10% 0402 X5R

C616 10uF 6.3V 10% 0805 X5RC616 10uF 6.3V 10% 0805 X5R

1uF 6.3V 10% 0402 X5R

C565

C160 T330uF 2.5V 20% 105C DX1.9C160 T330uF 2.5V 20% 105C DX1.9

370mils from the Edge

C560

PWR_1.05VMAIN7,8,10,11,15,19,22,44,48,54

308 mils from the Edge

370mils from the Edge

C564 10uF 6.3V 10% 0805 X5RC564 10uF 6.3V 10% 0805 X5R

GND1

C293 T220uF 2.5V 35m 20% 3528+C293 T220uF 2.5V 35m 20% 3528

+

GND1 GND1

Cavity Capacitors

C567 0.22uF 10V 10% 0603 X7RC567 0.22uF 10V 10% 0603 X7R

C605 10uF 6.3V 10% 0805 X5RC605 10uF 6.3V 10% 0805 X5R C575 0.22uF 10V 10% 0603 X7RC575 0.22uF 10V 10% 0603 X7R

VCC_GMCH7,8,10,11,15,19,22,44,48,54

C592 0.22uF 10V 10% 0603 X7RC592 0.22uF 10V 10% 0603 X7R

C582 0.1uF 10V 10% 0402 X7RC582 0.1uF 10V 10% 0402 X7R

C584 0.22uF 10V 10% 0603 X7RC584 0.22uF 10V 10% 0603 X7R

VCC_AXM7,8,10,11,15,19,22,44,48,54

C279 0.1uF 10V 10% 0402 X7RC279 0.1uF 10V 10% 0402 X7R

C602 0.1uF 10V 10% 0402 X7RC602 0.1uF 10V 10% 0402 X7R

C573 0.1uF 10V 10% 0402 X7RC573 0.1uF 10V 10% 0402 X7R

Cavity Capacitors

U21F

AB33

VCC_NCTF_1

AB36

VCC_NCTF_2

AB37

VCC_NCTF_3

AC33

VCC_NCTF_4

AC35

VCC_NCTF_5

AC36

VCC_NCTF_6

AD35

VCC_NCTF_7

AD36

VCC_NCTF_8

AF33

VCC_NCTF_9

AF36

VCC_NCTF_10

AH33

VCC_NCTF_11

AH35

VCC_NCTF_12

AH36

VCC_NCTF_13

AH37

VCC_NCTF_14

AJ33

VCC_NCTF_15

AJ35

VCC_NCTF_16

AK33

VCC_NCTF_17

AK35

VCC_NCTF_18

AK36

VCC_NCTF_19

AK37

VCC_NCTF_20

AD33

VCC_NCTF_21

AJ36

VCC_NCTF_22

AM35

VCC_NCTF_23

AL33

VCC_NCTF_24

AL35

VCC_NCTF_25

AA33

VCC_NCTF_26

AA35

VCC_NCTF_27

AA36

VCC_NCTF_28

AP35

VCC_NCTF_29

AP36

VCC_NCTF_30

AR35

VCC_NCTF_31

AR36

VCC_NCTF_32

Y32

VCC_NCTF_33

Y33

VCC_NCTF_34

Y35

VCC_NCTF_35

Y36

VCC_NCTF_36

Y37

VCC_NCTF_37

T30

VCC_NCTF_38

T34

VCC_NCTF_39

T35

VCC_NCTF_40

U29

VCC_NCTF_41

U31

VCC_NCTF_42

U32

VCC_NCTF_43

U33

VCC_NCTF_44

U35

VCC_NCTF_45

U36

VCC_NCTF_46

V32

VCC_NCTF_47

V33

VCC_NCTF_48

V36

VCC_NCTF_49

V37

VCC_NCTF_50

AL24

VCC_AXM_NCTF_1

AL26

VCC_AXM_NCTF_2

AL28

VCC_AXM_NCTF_3

AM26

VCC_AXM_NCTF_4

AM28

VCC_AXM_NCTF_5

AM29

VCC_AXM_NCTF_6

AM31

VCC_AXM_NCTF_7

AM32

VCC_AXM_NCTF_8

AM33

VCC_AXM_NCTF_9

AP29

VCC_AXM_NCTF_10

AP31

VCC_AXM_NCTF_11

AP32

VCC_AXM_NCTF_12

AP33

VCC_AXM_NCTF_13

AL29

VCC_AXM_NCTF_14

AL31

VCC_AXM_NCTF_15

AL32

VCC_AXM_NCTF_16

AR31

VCC_AXM_NCTF_17

AR32

VCC_AXM_NCTF_18

AR33

VCC_AXM_NCTF_19

Crestline FBGA 1299P INTEL

VCC NCTF

POWER

VCC AXM NCTF

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15

VSS NCTF

VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21

VSS_SCB1 VSS_SCB2 VSS_SCB3 VSS_SCB4 VSS_SCB5 VSS_SCB6

VSS SCBVCC AXM

VCC_AXM_1 VCC_AXM_2 VCC_AXM_3 VCC_AXM_4 VCC_AXM_5 VCC_AXM_6 VCC_AXM_7

6019B0360601

T27 T37 U24 U28 V31 V35 AA19 AB17 AB35 AD19 AD37 AF17 AF35 AK17 AM17 AM24 AP26 AP28 AR15 AR19 AR28

A3 B2 C1 BL1 BL51 A51

AT33 AT31 AK29 AK24 AK23 AJ26 AJ23

GND1

PWR_1.05VMAIN7,8,10,11,15,19,22,44,48,54

6019B0360601

Crestline FBGA 1299P INTEL

B B

Crestline FBGA 1299P INTEL

A A

10

9

6019B0360601

8

GND1

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

7

6

5

4

3

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Monday, April 09, 2007

2

Crestline Power(4/6)

14

1

Rev

0.4

10

7,8,10,11,14,19,22,44,48,54

9

8

7

6

5

4

3

2

1

H H

PWR_1.25VMAIN12,22,41,44

30mils

G G

F F

E E

PWR_1.5VMAIN8,19,22,28,30,41,44

D D

PWR_5VMAIN 22,23,24,31,32,33,36,37,38,39,41,49

C C

B B

A A

20mils

10uF 6.3V 10% 0805 X5R

Vout

GND

U20

G1117T63UF-SOT-223-3P

6019B0235801

3

C183

Modify at V02

Vout=Vref(1+R2/R1)+Iadj*R2R1 R2=R1(Vout/Vref-1) 1117 Vref=1.250V,Iadj=55uAFB

R2

10

0.1uf caps in 1.5VDDM_xPLL need to be located as edge caps within 200mils

L45

100ohm 25% 2A 0.1ohm 0603

T330uF 2.5V 20% 105C DX1.9

L44

100ohm 25% 2A 0.1ohm 0603

T330uF 2.5V 20% 105C DX1.9

L24

100ohm 25% 2A 0.1ohm 0603

L23

100ohm 25% 2A 0.1ohm 0603

L49

100ohm 25% 2A 0.1ohm 0603

L71

100-5%-1/10W-0603

100-5%-1/10W-0603 R780

R780

20mils

2

VOUT

VIN

ADJ

1

150-1%-1/16W-0402

R133

249-1%-1/16W-0402

R132

C544

GND1 GND1

C539

GND1 GND1

(24mA)

0.1uF 10V 10% 0402 X7R

C603

GND1GND1

C5900.1uF 10V 10% 0402 X7R C5900.1uF 10V 10% 0402 X7R

GND1GND1

PWR_3VMAIN_ATVBG

100ohm 25% 2A 0.1ohm 0603

L19

C199

10uF 10V 10% 1210 X5R

GND1

9

C545

C164

C283

C287

C287 10uF 10V 10% 1210 X5R

10uF 10V 10% 1210 X5R

C276

C288

C288 10uF 10V 10% 1210 X5R

10uF 10V 10% 1210 X5R

C550

GND1

10mils

C597

0.022uF 16V 10% 0402 X7R

10mils

C599

C879

0.022uF 16V 10% 0402 X7R

1uF 6.3V 10% 0402 X5R

GND1

10uF 6.3V 10% 0805 X5R

GND1

(40mA)

0.1uF 10V 10% 0402 X7R

(40mA)

0.1uF 10V 10% 0402 X7R

(45mA)

0.1uF 10V 10% 0402 X7R

(45mA)

0.1uF 10V 10% 0402 X7R

1.5VS_TVDAC

1.5VS_QDAC

(120mA)

C227

0.1uF 10V 10% 0402 X7R

GND1 GND1

0.1uF 10V 10% 0402 X7R

GND1 GND1

0.1uF 10V 10% 0402 X7R

10mils

1.25VS_DPLLA

10mils

1.25VS_DPLLB

10mils

1.25VS_HPLL

10mils

1.25VS_MPLL

1.25VS_PEGPLL

Caps used in 1.5VDDM_TVDAC and 1.5VDDM_QTVDAC should be within 250mils of edge

10mils

C595

C241

0.022uF 16V 10% 0402 X7R

10mils

C591

C235

0.022uF 16V 10% 0402 X7R

10mils

C593

C232

0.022uF 16V 10% 0402 X7R

GND1GND1

3VDDM_TVDAC should be within 250mils of edge

8

10mils

VCCS_TVDACA

VCCS_TVDACB

VCCS_TVDACC

VCCS_TVDAC

7

VCCS_TVDAC

0.022uF 16V 10% 0402 X7R

PWR_1.25VMAIN12,22,41,44

6

PWR_3VMAIN_ATVBG

C598

GND1

1.8V_TXLVDS

PWR_1.25VMAIN12,22,41,44

T220uF 2.5V 35m 20% 3528

20mils

0.1uF 10V 10% 0402 X7R

PWR_3VMAIN7,9,10,12,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

100ohm 25% 2A 0.1ohm 0603

L18

0.1uF 10V 10% 0402 X7R

C229

1000pF 50V 10% 0402 X7R

GND1

PWR_3VMAIN7,9,10,12,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

0.1uF 10V 10% 0402 X7R

C269

+

C623

1uF 6.3V 10% 0402 X5R

C623

1uF 6.3V 10% 0402 X5R

C587

10uF 6.3V 10% 0805 X5R

C587

10uF 6.3V 10% 0805 X5R

C596

1uF 6.3V 10% 0402 X5R

C596

1uF 6.3V 10% 0402 X5R

GND1

PWR_1.25VMAIN12,22,41,44

C161

5

C586

GND1

10uF 6.3V 10% 0805 X5R

C583

C263

0.1uF 10V 10% 0402 X7R

C586

C215

1.25VS_DPLLA

1.25VS_DPLLB

1.25VS_HPLL

1.25VS_MPLL

C547

GND1

1.25VS_PEGPLL

C265

4.7uF 25V 10% 0805 X5R

C265

4.7uF 25V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R

VCCS_TVDACA

VCCS_TVDACB

VCCS_TVDACC

1.5VS_TVDAC

1.5VS_QDAC

1.25VS_PEGPLL

0.1uF 10V 10% 0402 X7R

C559

C559 1000pF 50V 10% 0402 X7R

1000pF 50V 10% 0402 X7R

PWR_1.05VMAIN7,8,10,11,14,19,22,44,48,54

GND1

U21H

J32

VCCSYNC

A33

GND1

C536

C264

1uF 6.3V 10% 0402 X5R

C264

1uF 6.3V 10% 0402 X5R

GND1GND1

0.1uF 10V 10% 0402 X7R

0.1uF 10V 10% 0402 X7R C553

C553

GND1

C178

10uF 6.3V 10% 0805 X5R

C178

10uF 6.3V 10% 0805 X5R

VCCA_CRT_DAC_1

B33

VCCA_CRT_DAC_2

A30

VCCA_DAC_BG

B32

VSSA_DAC_BG

B49

VCCA_DPLLA

H49

VCCA_DPLLB

AL2

VCCA_HPLL

AM2

VCCA_MPLL

A41

VCCA_LVDS

B41

VSSA_LVDS

K50

VCCA_PEG_BG

K49

VSSA_PEG_BG

U51

VCCA_PEG_PLL

AW18

VCCA_SM_1

AV19

VCCA_SM_2

AU19

VCCA_SM_3

AU18

VCCA_SM_4

AU17

VCCA_SM_5

AT22

VCCA_SM_7

AT21

VCCA_SM_8

AT19

VCCA_SM_9

AT18

VCCA_SM_10

AT17

VCCA_SM_11

AR17

VCCA_SM_NCTF_1

AR16

VCCA_SM_NCTF_2

BC29

VCCA_SM_CK_1

BB29

VCCA_SM_CK_2

C25

VCCA_TVA_DAC_1

B25

VCCA_TVA_DAC_2

C27

VCCA_TVB_DAC_1

B27

VCCA_TVB_DAC_2

B28

VCCA_TVC_DAC_1

A28

VCCA_TVC_DAC_2

M32

VCCD_CRT

L29

VCCD_TVDAC

N28

VCCD_QDAC

AN2

VCCD_HPLL

U48

VCCD_PEG_PLL

J41

VCCD_LVDS_1

H42

VCCD_LVDS_2

Crestline FBGA 1299P INTEL 6019B0360601

PWR_1.8VSUS 10,12,14,17,18,44,45

C260

1uF 6.3V 10% 0402 X5R

C260

1uF 6.3V 10% 0402 X5R

GND1

PWR_3VMAIN7,9,10,12,19,20,21,22,23,24,25,26,28,29,30,31,32,33,34,35,37,39,40,41,46,49

CRTPLLA PEGA SMTV

POWER

A CK A LVDS

D TV/CRTLVDS

10-5%-1/10W-0603

10-5%-1/10W-0603 R479

R479

R486 SHORT-0402-15MILR486 SHORT-0402-15MIL

4

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8

VTT_9 VTT_10 VTT_11 VTT_12 VTT_13

VTT

VTT_14 VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22

VCC_AXD_1 VCC_AXD_2 VCC_AXD_3 VCC_AXD_4 VCC_AXD_5

AXD

VCC_AXD_6

VCC_AXD_NCTF

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_DMI

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

VCC_HV_1 VCC_HV_2

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4

PEG

VCC_PEG_5

VCC_RXR_DMI_1 VCC_RXR_DMI_2

DMI

VTTLF1 VTTLF2 VTTLF3

VTTLF

D31

N

BAT54C-7 30V 200MA SOT23

3

U13 U12 U11 U9 U8 U7 U5 U3 U2 U1 T13 T11 T10 T9 T7 T6 T5 T3 T2 R3 R2 R1

AT23 AU28 AU24 AT29 AT25 AT30

AR29

B23 B21 A21

AJ50

0.1uF 10V 10% 0402 X7R

BK24 BK23 BJ24 BJ23

GND1

A43

1000pF 50V 10% 0402 X7R

C40 B40

AD51 W50 W51 V49 V50

AH50 AH51

VTTLF_CAP1

A7

VTTLF_CAP2

F2

VTTLF_CAP3

AH1

P

PP

4.7uF 25V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R

C542

0.47uF 16V 10% 0603 X7R

C285

C278

C289

C290

C286

2.2uF 10V 10% 0805 X5R

0.47uF 16V 10% 0603 X7R

4.7uF 25V 10% 0805 X5R

PLACE ON THE EDGE

1uF 6.3V 10% 0402 X5R

C261

C257

10uF 6.3V 10% 0805 X5R

GND1

1uF 6.3V 10% 0402 X5R

C163

GND1

C256

C250

10uF 6.3V 10% 0805 X5R

C563

3VS_HV

GND1 GND1

T220uF 2.5V 35m 20% 3528

C541

+

GND1 GND1

C281

0.47uF 16V 10% 0603 X7R

C281

0.47uF 16V 10% 0603 X7R

C270

C282

GND1GND1GND1

PWR_1.05VMAIN 7,8,10,11,14,19,22,44,48,54

3VS_HV

Inventec Corporation

Title

J11Eagle(Merom+Crestline+ICH8M)

Document Number

Size

C

Date: Sheet of 55

Monday, April 09, 2007

Date: Sheet of 55

Monday, April 09, 2007

Date: Sheet of 55

Monday, April 09, 2007

2

C289

T220uF 2.5V 35m 20% 3528

+

GND1GND1

1.25VM_AXD

L22

120OHM-25%-200mA-0603-0.2OHM

C247

C247 10uF 6.3V 10% 0805 X5R

10uF 6.3V 10% 0805 X5R

0.1uF 10V 10% 0402 X7R

C159

120OHM-25%-200mA-0603-0.2OHM

GND1

L20

1.8V_TXLVDS

L50 120ohm 25% 200mA 0603(BLM11A121S)L50 120ohm 25% 200mA 0603(BLM11A121S)

C552

+

T220uF 2.5V 35m 20% 3528

VCC_PEG12

VCC_DMI

C537 10uF 6.3V 10% 0805 X5RC537 10uF 6.3V 10% 0805 X5R

C540 T220uF 2.5V 35m 20% 3528+C540 T220uF 2.5V 35m 20% 3528

+

0.47uF 16V 10% 0603 X7R

GND1GND1

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

Crestline Power(5/6)*

PWR_1.25VMAIN 12,22,41,44

PWR_1.8VSUS 10,12,14,17,18,44,45

100ohm 25% 2A 0.1ohm 0603_NU

L47

L46

PWR_1.25VMAIN 12,22,41,44

PWR_1.05VMAIN

100ohm 25% 2A 0.1ohm 0603

100ohm 25% 2A 0.1ohm 0603_NU

L43

L48

100ohm 25% 2A 0.1ohm 0603

PWR_1.25VMAIN 12,22,41,44

PWR_1.05VMAIN

Rev

0.4

15

1

0.4

8

7

6

5

4

3

2

1

DMI Routing Guideline

U21I

A13

VSS_1

A15

VSS_2

D D

C C

B B

A17

VSS_3

A24

VSS_4

AA21

VSS_5

AA24

VSS_6

AA29

VSS_7

AB20

VSS_8

AB23

VSS_9

AB26

VSS_10

AB28

VSS_11

AB31

VSS_12

AC10

VSS_13

AC13

VSS_14

AC3

VSS_15

AC39

VSS_16

AC43

VSS_17

AC47

VSS_18

AD1

VSS_19

AD21

VSS_20

AD26

VSS_21

AD29

VSS_22

AD3

VSS_23

AD41

VSS_24

AD45

VSS_25

AD49

VSS_26

AD5

VSS_27

AD50

VSS_28

AD8

VSS_29

AE10

VSS_30

AE14

VSS_31

AE6

VSS_32

AF20

VSS_33

AF23

VSS_34

AF24

VSS_35

AF31

VSS_36

AG2

VSS_37

AG38

VSS_38

AG43

VSS_39

AG47

VSS_40

AG50

VSS_41

AH3

VSS_42

AH40

VSS_43

AH41

VSS_44

AH7

VSS_45

AH9

VSS_46

AJ11

VSS_47

AJ13

VSS_48

AJ21

VSS_49

AJ24

VSS_50

AJ29

VSS_51

AJ32

VSS_52

AJ43

VSS_53

AJ45

VSS_54

AJ49

VSS_55

AK20

VSS_56

AK21

VSS_57

AK26

VSS_58

AK28

VSS_59

AK31

VSS_60

AK51

VSS_61

AL1

VSS_62

AM11

VSS_63

AM13

VSS_64

AM3

VSS_65

AM4

VSS_66

AM41

VSS_67

AM45

VSS_68

AN1

VSS_69

AN38

VSS_70

AN39

VSS_71

AN43

VSS_72

AN5

VSS_73

AN7

VSS_74

AP4

VSS_75

AP48

VSS_76

AP50

VSS_77

AR11

VSS_78

AR2

VSS_79

AR39

VSS_80

AR44

VSS_81

AR47

VSS_82

AR7

VSS_83

AT10

VSS_84

AT14

VSS_85

AT41

VSS_86

AT49

VSS_87

AU1

VSS_88

AU23

VSS_89

AU29

VSS_90

AU3

VSS_91

AU36

VSS_92

AU49

VSS_93

AU51

VSS_94

AV39

VSS_95

AV48

VSS_96

AW1

VSS_97

AW12

VSS_98

AW16

VSS_99

Crestline FBGA 1299P INTEL 6019B0360601

GND1

VSS

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198

AW24 AW29 AW32 AW5 AW7 AY10 AY24 AY37 AY42 AY43 AY45 AY47 AY50 B10 B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6 BK8 BL11 BL13 BL19 BL22 BL37 BL47 C12 C16 C19 C28 C29 C33 C36 C41

GND1

U21J

C46

VSS_199

C50

VSS_200

C7

VSS_201

D13

VSS_202

D24

VSS_203

D3

VSS_204

D32

VSS_205

D39

VSS_206

D45

VSS_207

D49

VSS_208

E10

VSS_209

E16

VSS_210

E24

VSS_211

E28

VSS_212

E32

VSS_213

E47

VSS_214

F19

VSS_215

F36

VSS_216

F4

VSS_217

F40

VSS_218

F50

VSS_219

G1

VSS_220

G13

VSS_221

G16

VSS_222

G19

VSS_223

G24

VSS_224

G28

VSS_225

G29

VSS_226

G33

VSS_227

G42

VSS_228

G45

VSS_229

G48

VSS_230

G8

VSS_231

H24

VSS_232

H28

VSS_233

H4

VSS_234

H45

VSS_235

J11

VSS_236

J16

VSS_237

J2

VSS_238

J24

VSS_239

J28

VSS_240

J33

VSS_241

J35

VSS_242

J39

VSS_243

K12

VSS_245

K47

VSS_246

K8

VSS_247

L1

VSS_248

L17

VSS_249

L20

VSS_250

L24

VSS_251

L28

VSS_252

L3

VSS_253

L33

VSS_254

L49

VSS_255

M28

VSS_256

M42

VSS_257

M46

VSS_258

M49

VSS_259

M5

VSS_260

M50

VSS_261

M9

VSS_262

N11

VSS_263

N14

VSS_264

N17

VSS_265

N29

VSS_266

N32

VSS_267

N36

VSS_268

N39

VSS_269

N44

VSS_270

N49

VSS_271

N7

VSS_272

P19

VSS_273

P2

VSS_274

P23

VSS_275

P3

VSS_276

P50

VSS_277

R49

VSS_278

T39

VSS_279

T43

VSS_280

T47

VSS_281

U41

VSS_282

U45

VSS_283

U50

VSS_284

V2

VSS_285

V3

VSS_286

Crestline FBGA 1299P INTEL 6019B0360601

GND1

VSS

VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305

VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313

W11 W39 W43 W47 W5 W7 Y13 Y2 Y41 Y45 Y49 Y5 Y50 Y11 P29

R521 SHORT-0402-15MILR521 SHORT-0402-15MIL

T29

R512 SHORT-0402-15MILR512 SHORT-0402-15MIL

T31

R508 SHORT-0402-15MILR508 SHORT-0402-15MIL

T33

R526 SHORT-0402-15MILR526 SHORT-0402-15MIL

R28

AA32 AB32 AD32 AF28 AF29 AT27 AV25 H50

GMCH

Tx

LA1

Rx

LZ1

GND1

Breakout/in

LA/LZ

Microstrip Same Routing layer as LA/LZ

Microstrip

Stripline

Parameter Breakout Guideline

Uncoupled Single End Impedance

Nominal Trace Width

Main Route

LB/LY

Same Routing layer as LA/LZ

Pair-to-Pair Pitch

Bus-to-Bus Pitch

Reference Plane

Trace Length-LA (GMCH Breakout)

Trace Length-LB (GMCH Breakout to Via2)

Trace Length-LC (Via2 to Via3) Max = 5900 mils

Trace Length-LD (Via3 to ICH7m Breakout)

Trace Length-LE (ICH7m Breakout) Max = 400 mils

Trace Length-LV ( ICH7m Breakout)

Trace Length-LX (Via2 to Via3)

Trace Length-LY (Via3 to GMCH Breakout) Max = 3600 mils

Trace Length-LZ (GMCH Breakout)

Trace Length-L2 (LV+LW+LX+LY+LZ) Max = 8000 mils

*** When routing near the edge of their reference plane , trace should maintain at least 40 mils space to the edge of the plane *** Match the trace lengths of the complementary signals within each differential pair to +/- 5 mils

LB

LA2

LZ2

LC LD LE

LXLY LW LV

Same Routing layer as LE/LV

Main Route Guideline

55 +/- 15%

Inner Layer : 4 mils Outer Layer : 5 mils

Inner Layer : 7 milsNominal Didderential Pair-Pitch Outer Layer : 7 mils

Inner Layer : 37 mils Outer Layer : 37 mils

Inner Layer : 22 mils Outer Layer : 20 mils

Ground Ground

No routing over plane splitsSplits/Voids No routing over voids

Max = 250 mils

Max = 3600 mils

Main Route

LD/LW

Max = 3600 mils

Max = 8000 milsTrace Length-L1 (LA+LB+LC+LD+LE)

Max = 400 mils

Max = 3600 milsTrace Length-LW (ICH7m Breakout to Via2)

Max = 5900 mils

Max = 400 mils

X O

ICH8m

Rx

Tx

Breakout/in

LE/LV

Microstrip

Stripline

Microstrip

Stripline

Microstrip

Stripline

Microstrip

55 +/- 15%

Inner Layer : 4 mils Outer Layer : 5 mils

Inner Layer : 27 mils Outer Layer : 27 mils

Inner Layer : 15 mils Outer Layer : 12 mils

PCIE Routing Guideline

GMCH

Tx

Rx

Breakout/in

LA/LZ

Stripline

Parameter

Uncoupled Single End Impedance

Nominal Trace Width

Main Route

LB/LC/LY

Microstrip

Nominal Differential Trace Space

Pair-to-Pair Pitch

Bus-to-Bus Pitch

Reference Plane

Splits/Voids

Trace Length-LA (ICH7m Breakout)

Trace Length-LB (ICH7m Breakout to AC cap) Trace Length-LC (AC cap to PCIe CN) Trace Length-L1 (LA+LB+LC)

Trace Length-LY (PCIe CN to ICH7m Breakout) Trace Length-LZ (ICH7m Breakout)

*** When routing near the edge of their reference plane , trace should maintain at least 40 mils space to the edge of the plane *** Match the trace lengths of the complementary signals within each differential pair to +/- 5 mils

LB

LA

LZ

LY

Main Route

LD/LW

Same Routing layer as LE/LV

Main Route Guideline

55 +/- 15%

Inner Layer : 4 mils Outer Layer : 5 mils

Inner Layer : 7 mils Outer Layer : 7 mils

Inner Layer : 37 mils Outer Layer : 37 mils

Inner Layer : 20 mils Outer Layer : 20 mils

Ground

No routing over plane splits No routing over voids

Max = 400 mils

Max = 10750 mils

Max = 12000 mils

Max = 11950 mils

Max = 400 mils

Max = 12000 milsTrace Length-L2 (LY+LZ)

X O

Express/Mini Card

LC

Breakout Guideline

55 +/- 15%

Inner Layer : 4 mils Outer Layer : 5 mils

Inner Layer : 27 mils Outer Layer : 27 mils

Inner Layer : 15 mils Outer Layer : 12 mils

Ground

>3W

S < 2S

S = Spacing S = Trace Width

Rx

Tx

Breakout/in

LE/LV

Microstrip

A A

>3W

S < 2S

S = Spacing S = Trace Width

8

7

6

5

4

3

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

2

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

Crestline Ground(6/6)

Monday, April 09, 2007

Rev

0.4

16

1

0.4

5

4

3

2

1

SO-DIMM0

D D

M_CLK_DDR012

M_CLK_DDR#012

M_CLK_DDR112

M_CLK_DDR#112

PWR_3VSUS9,10,18,23,25,26,27,28,33,34,36,41,47

GND1

C C

PWR_3VSUS9,10,18,23,25,26,27,28,33,34,36,41,47

2.2uF 6.3V 20% X5R 0603

20mil

B B

M_VREF12,18,45

2.2uF 6.3V 20% X5R 0603

C144

Other signal

M_VREF

Other signal

SMB_CLK_SUS10,18,23

SMB_DATA_SUS10,18,23

M_A_DM[7..0]13

M_A_DQS[7..0]13

M_A_DQS#[7..0]13

PWR_1.8VSUS10,12,14,15,18,44,45

C277

C143

0.1uF 10V 10% 0402 X7R

GND1GND1

M_A_A[13..0] M_A_DQ[63..0]

M_A_BS2

M_A_BS213

M_A_BS1

M_A_BS113

M_A_BS0

M_A_BS013

M_CS#0

M_CS#012

M_CS#1

M_CS#112

M_CKE0

M_CKE012

M_CKE1

M_CKE112 M_A_CAS#13 M_A_RAS#13

M_A_CAS# M_A_RAS# M_A_WE#

M_A_WE#13

R163 SHORT-0402-5MILR163 SHORT-0402-5MIL R162 SHORT-0402-5MILR162 SHORT-0402-5MIL

M_ODT0

M_ODT012

M_ODT1

M_ODT112

M_A_DM[7..0] M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

20mil

C284

0.1uF 10V 10% 0402 X7R

GND1GND1

20mil

PM_EXTTS#112,18

20mil

GND1

CN38

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16_BA2

106

BA1

107

BA0

110

S0#

115

S1#

30

CK0

32

CK0#

164

CK1

166

CK1#

79

CKE0

80

CKE1

113

CAS#

108

RAS#

109

WE#

198

SA0

200

SA1

197

SCL

195

SDA

114

ODT0

119

ODT1

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

112

VDD1

111

VDD2

117

VDD3

96

VDD4

95

VDD5

118

VDD6

81

VDD7

82

VDD8

87

VDD9

103

VDD10

88

VDD11

104

VDD12

199

VDDSPD

83

NC1

120

NC2

50

NC3

69

NC4

163

NCTEST

1

VREF1

201

NPTH1

202

NPTH2

132

VSS42

144

VSS43

156

VSS44

168

VSS45

2

VSS46

3

VSS47

15

VSS48

27

VSS49

39

VSS50

149

VSS51

161

VSS52

28

VSS53

40

VSS54

138

VSS55

150

VSS56

162

STANDARD

VSS57

G1

DDR2 DIMM 200P AS0A421-N4SN-7F 4.0mm STAND FOXCNN

6026B0037601

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8

VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

47 133 183 77 12 48 184 78 71 72 121 122 196 193 8 18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 G2

G2

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

GND1

M_A_DQ[63..0] 13M_A_A[13..0]13

RS27

R-AR-8P4R-56-5%-1/16W-2010

M_ODT1 M_CS#1 M_A_CAS# M_A_WE#

M_ODT0 M_A_A13 M_A_BS0 M_CS#0

M_A_A11 M_A_A9 M_A_A12 M_CKE1

M_A_A4 M_A_A3 M_A_A5 M_A_A8

M_A_RAS# M_A_A10 M_A_A1 M_A_A0

M_A_BS1 M_A_A2 M_A_A7 M_A_A6

M_A_BS2 M_CKE0

R-AR-8P4R-56-5%-1/16W-2010

1 8 2 7 3 6 4 5

RS26

R-AR-8P4R-56-5%-1/16W-2010

1 8 2 7 3 6 4 5

RS17

R-AR-8P4R-56-5%-1/16W-2010

1 8 2 7 3 6 4 5

RS19

R-AR-8P4R-56-5%-1/16W-2010

1 8 2 7 3 6 4 5

RS24

R-AR-8P4R-56-5%-1/16W-2010

1 8 2 7 3 6 4 5

RS22

R-AR-8P4R-56-5%-1/16W-2010

1 8 2 7 3 6 4 5

RS16

R-AR-8P4R-56-5%-1/16W-2010

1 8 2 7 3 6 4 5

PWR_DIMM_VTT18,44,45

C240 0.1uF 10V 10% 0402 X7RC240 0.1uF 10V 10% 0402 X7R

C239 0.1uF 10V 10% 0402 X7RC239 0.1uF 10V 10% 0402 X7R

C223 0.1uF 10V 10% 0402 X7RC223 0.1uF 10V 10% 0402 X7R

C220 0.1uF 10V 10% 0402 X7RC220 0.1uF 10V 10% 0402 X7R

C174 0.1uF 10V 10% 0402 X7RC174 0.1uF 10V 10% 0402 X7R

C182 0.1uF 10V 10% 0402 X7RC182 0.1uF 10V 10% 0402 X7R

C190 0.1uF 10V 10% 0402 X7RC190 0.1uF 10V 10% 0402 X7R

C193 0.1uF 10V 10% 0402 X7RC193 0.1uF 10V 10% 0402 X7R

C212 0.1uF 10V 10% 0402 X7RC212 0.1uF 10V 10% 0402 X7R

C217 0.1uF 10V 10% 0402 X7RC217 0.1uF 10V 10% 0402 X7R

C201 0.1uF 10V 10% 0402 X7RC201 0.1uF 10V 10% 0402 X7R

C205 0.1uF 10V 10% 0402 X7RC205 0.1uF 10V 10% 0402 X7R

C169 0.1uF 10V 10% 0402 X7RC169 0.1uF 10V 10% 0402 X7R

160mil

PWR_1.8VSUS10,12,14,15,18,44,45

Place these 2.2uF caps near So-Dimm1

C206 2.2uF 6.3V 20% X5R 0603C206 2.2uF 6.3V 20% X5R 0603

C222 2.2uF 6.3V 20% X5R 0603C222 2.2uF 6.3V 20% X5R 0603

C216 2.2uF 6.3V 20% X5R 0603C216 2.2uF 6.3V 20% X5R 0603

C162

T220uF 2.5V 35m 20% 3528+C162

T220uF 2.5V 35m 20% 3528

+

C181 2.2uF 6.3V 20% X5R 0603C181 2.2uF 6.3V 20% X5R 0603

Place one cap close to every 2 pullup resistors terminated to 0.9VDDT_DDRII

400 mils

GND1

C228 2.2uF 6.3V 20% X5R 0603C228 2.2uF 6.3V 20% X5R 0603

C192 0.1uF 10V 10% 0402 X7RC192 0.1uF 10V 10% 0402 X7R

C202 0.1uF 10V 10% 0402 X7RC202 0.1uF 10V 10% 0402 X7R

C185 0.1uF 10V 10% 0402 X7RC185 0.1uF 10V 10% 0402 X7R

C210 0.1uF 10V 10% 0402 X7RC210 0.1uF 10V 10% 0402 X7R

GND1

Place these 0.1uF caps near So-Dimm0 pin79~pin115 area

For Margin test

1

TP14

PWR_3VMINIC030

M_VREF12,18,45

A A

5

4

3

PWR_1.8VSUS10,12,14,15,18,44,45

PWROK_3VMAIN12,21,39,54

SYS_RST#21

SMB_DATA_SUS10,18,23

SMB_CLK_SUS10,18,23

GND1

PWROK_3VMAIN

SYS_RST#

2

TP80

TP14

1

TP16

TP18

TP15

TP23

TP21

TP22

TP17

Modify at V02

Inventec Corporation

5F, No. 35, Section 2, Zhongyang South Road

5F, No. 35, Section 2, Zhongyang South Road Beitou District, Taipei 11270, Taiwan

Beitou District, Taipei 11270, Taiwan

Title

Size

Date: Sheet of 55

Beitou District, Taipei 11270, Taiwan TEL:+886-2-2881-0721

TEL:+886-2-2881-0721

J11Eagle(Merom+Crestline+ICH8M)

Document Number

C

DDR2 SDRAM SO-DIMM0

Monday, April 09, 2007

1

17

Rev

0.4

1