Inventec harvey-14, cq35-701tu, cq45-2000 Schematics

THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC
CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION,2009 ALL RIGHT RESERVED.

8

HSF Property:ROHS or Halogen-Free(5L3?)

7 6 5 4 3 2 1

DB BUILD QUANTITY LIST :

1310A2493104
1310A2493105
1310A2493106
1310A2493201
1310A2493601
1310A2493701

10

CR-SG + H-VRAM + GIGA LAN

PCS

72

CR-SG + S-VRAM + 10/100 LAN

PCS

55

PCS

CR-UMA + GIGA LAN

137

PCS

POWER /B

PCS

137

PICK BTN /B
USB /B137

PCS

For DB build

SOUTH BRIDGE

HM75 QPEG Q0
BD82PPSM
P/N : 6019B0919101

FF

E

MOTHER BOARD PCB
P/N󶁪6050A2493101

POWER BOARD PCB
P/N󶁪6050A2493201

USB BOARD PCB
P/N󶁪6050A2493601

TOUCHPAD BOARD PCB

D

P/N󶁪6050A2493701

C

B

A

GPU VRAM TYPE:

U5 , U6 , U7 , U8
SAMSUNG 1GB C-DIE

PN : 6019B0818601

R2 : NA
R3 : NA
R33 : NA
R61 : NA

HYNIX 1GB D-DIE
PN : 6019B0938301

R2 : MOUNT

R3 : NA
R33 : NA
R61 : NA

SAMSUNG 512KB

R2 : NA
R3 : MOUNT
R33 : NA
R61 : NA

HYNIX 512MB

R2 : MOUNT
R3 : MOUNT
R33 : NA
R61 : NA

AUGUST 30, 2010

21-OCT-2002

DATE CHANGE NO.

8

0R : 60130B0000ZT

HARVEY 14

HARVEY 14 ID LIST
HURON RIVER UMA :

HURON RIVER DIS :
CHIEF RIVER UMA :
CHIEF RIVER DIS :

SUB SYSTEM ID :
HP : 0X103C

BASE SCHEMATIC :
CR-SG + SAMSUNG VRAM + 10/100 LAN + 90W ADAPTER + SUPPORT 27MHZ GREEN CLK + USB2.0 CONN

DIS GREEN CLK

SLG3NB300V

U9

MOUNT

C188

MOUNTR126

D4400

NA

UMA GREEN CLK

U9 SLG3NB250V

NA

C188
R126

NA

D4400

NA

DIS ADAPTER 90W

R802

MOUNT

R769

UMA ADAPTER 65W

R802
R769

USB 3.0 CONN

CN518

C2405
C2406
D2400
L470
L471

USB 2.0 CONN

CN518

C2405
C2406
D2400
L470
L471

X01

REV

7 6 5 4 3

NA

NA

MOUNT

6012B0370301

MOUNT
MOUNT
NA >> ESD
MOUNT
MOUNT

6012B0370102

NA
NA
NA >> ESD
NA
NA

0X1854
0X1855
0X1856
0X1857

SUPPORT 27MHZ

P/N : 6019B0941101

0.1UF : 6010A0036403
10R : 60130B10000X
P/N : 6011A0026803

6019B0934701

100K : 60130B1040ZT

100K : 60130B1040ZT

0.1UF : 6010A0036403

0.1UF : 6010A0036403
P/N : 6014B0177901

P/N : 6014B0177901

CR / HR

CR-SG

CR-UMA

HR-SG

BOARD ID

ID0-HI
ID1-HI
ID2-HI
ID3-HI
ID4-HI

ID5-HI

ID0-LO
ID1-LO
ID2-LO
ID3-LO
ID4-LO

ID0 = GPIO40
ID1 = GPIO41
ID2 = GPIO42
ID3 = GPIO43
ID4 = GPIO9
ID5 = GPIO10

M/B ID

R844
R824
R845

RXXX = 10K : 60130B1030ZT

HR-UMA

SEYMOUR

INTEL

R960

0
R905
R902
R967
R899

R914

R961
R903
R904
R96811
R900 1

R920ID5-LO

1

0

0

0

0

00

0

0

1 1

1

0

1

1

1

1
1

RXXX = 10K : 60130B1030ZT

BOARD_ID5 ONLY FOR WEBCAN USE
FOR HD WEB CAM BOARD_ID5 PULL P3V3A
FOR VGA WEB CAM BOARD_ID5 PULL GND

DB

1 : RXXX MOUNT0 : RXXX NA

SI

NAMOUNT

NA

MOUNT
MOUNT

NOV

MOUNT

UMA / DIS

2011.09.27

CR-SG
HR-SG

THAMES

0

1

0
0
0

1

1
0
1
1
1

000

PV

MOUNT

NA
NA

MOUNTNANAR828

JAN

MV
NA

NA
MOUNT
MOUNT

MAR

PAD402
PAD4500

PAD2
PAD4
PAD400
PAD4700
PAD500
PAD508
PAD6015
PAD6100
PAD6103
PAD6105
PAD6110
PAD6150
PAD6200
PAD6210
PAD6220
PAD6300
PAD6301
PAD6310
PAD6510
PAD6500
PAD6610
PAD6710
PAD6750
PAD6970
PAD9000
PAD9001
PAD9200

RTL8161FH = 6019B0928101(10/100/1000)
RTL8165EH = 6019B0928301(10/100)

󰵖󵓔󵉅󲛈
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RTL8165EH(10/100) LDO MODE

R408 : MOUNT

R407 : NA
R413 : NA
C404 : NA
C405 : NA
C406 : NA
C409 : NA
C411 : NA
C415 : NA
C417 : NA
C420 : NA
L400 : NA
U470 : NA

U502 : MOUNT
U400 : MOUNT 6019B0928301 ( 10/100 LAN )

RTL8161FH(GIGA-LAN) SWITCHING MODE

R408 : NA

R407 : MOUNT

R413 : MOUNT
C404 : MOUNT
C405 : MOUNT
C406 : MOUNT
C409 : MOUNT
C411 : MOUNT
C415 : MOUNT
C417 : MOUNT
C420 : MOUNT
L400 : MOUNT

U470 : MOUNT

U502 : NA

U400 : MOUNT 6019B0928101 ( GIGALAN )

DRAWER

DESIGN

CHECK

RESPONSIBLE

SIZE=

FILE NAME:

6050A2493101

P/N

XXX

----> CHOOSE LDO MODE

----> CHOOSE SWITCHING MODE

6016B0008101

----> CHOOSE LDO MODE

----> CHOOSE SWITCHING MODE

0R_0603 : 60130B00000Z

4.7UF : 6010B0009904

0.1UF : 6010A0036403

0.1UF : 6010A0036403

0.1UF : 6010A0036403

0.1UF : 6010A0036403

0.1UF : 6010A0036403

4.7UF : 6010B0009904

0.1UF : 6010A0036403
P/N : 6014B0200401

6016B0010401

POWER

DATEDATEEE

VER:

2

0R : 60130B0000ZT

TITLE

MODEL,PROJECT,FUNCTION

HARVEY 14

CODE

SIZE

C

RTC Rest
SM_Vrer

0R : 60130B1030ZT

INVENTEC

DOC.NUMBER REV

1310xxxxx-0-0

CS

SHEET

1

1

E

D

C

B

A

X01

of

57

8 7

6 5

Index

4

3 2 1

D

26

Project Name

01

Page Index

02
03

Block Diagram

04

Power Procedure
Charger

05
06 31 PCH-6 56

Battery Connecter

07

P3V3A, P5V0A
P1V5

08

P1V05S

09

P1V8S

10

PVSA

11

PVCORE-1

12

PVCORE-2

13

PORT & EMI PART

14
15

P3V3S, P5V0S
GREEN CLK

16

B

CPU -1

17

CPU-2

18

CPU-3

19

CPU-4

20

CPU-5

21

CPU-6

22

Thermal & Fan

23

DDR3-1

24

DDR3-2 SEYMOUR THERMAL SENSOR

25

PCH-1

27

PCH-2

28

PCH-3

29

PCH-4
PCH-5

30
32

PCH-7

33

PCH-8
PCH-9

34
35

EC ITE8517E
KB & LED

36
37

CRT

38

LCD & WEBCAN
HDMI

39

SATA HDD& ODD

40

LAN

41

RJ-45 CONN

42

CARD READER

43

AUDIO CODEC

44

HP & MIC JACK

45
46

WLAN
USB 3.0 CONN

47

SEYMOUR PCI-E INTERFACE

48

SEYMOUR CRT CLK THERMAL

49
50

SEYMOUR POWER

51

SEYMOUR DP-POWER & LVDS

52
53

SEYMOUR MEMORY INTERFACE
VRAM DDR3

54
55

DGPU POWER EE
DGPU POWER

57 USB, POWERBUTTON ,TP DB

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

INDEX

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

2

1

DOC.NUMBER

CODE

REV

X01

57

X01

8 7

6 5

4

3 2 1

CRT

P37

V-RAM

128M X 16

(2GB)

P54

HDMI

D

LCM

P39

P38

VGA

AMD SEYMOUR 64BIT

S3 PACKAGE

P48~P53

PCIE-8X

IVY BRIDGE

(SOCKET RPGA 989)

37.5MM X 37.5MM

P17~P22

FDI

DMI

DDR3

DDR3

PANTHER

CARD READER

RTL 5239-GR

P43

RJ-45

P42

RTL 8165EH-CG

10/100 LAN

P41

WLAN + BT

RTL 8161FH-CG

GIGA LAN

P41

SATA HDD

B

SPEAKER

HP JACK

COMBO JACK

THERMAL METER
TI TMP431A

P23

PCIE

PCIE

MINI CARD

SATA ODD

P46

P44

P45

P45

PCIE

SATA
SATA

P40P40

ALC 3201-GR

AUDIO CODEC

DMIC

POINT

25MM X 25MM

HDA

P44

P44

P26~P34

LPC

KBC

ITE IT8517E

KEYBOARD

USB 2.0

USB 3.0

SPI ROM

HSPI

P35

P36

DDR3 SO-DIMM1

1333/1600 MAX 8GB

DDR3 SO-DIMM2

1333/1600 MAX 8GB

USB

USB CONN3

P47

4MB

P26

SPI ROM

TOUCHPAD

P57

1MB

P24

P25

USB

WEBCAM

USB

USBCONN2USB CONN1

P35

P47

SYSTEM CHARGER

DC/DC SYSTEM POWER

D

P38

P57

CC

B

MAIN BATT

P6

AA

P4

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

3

1

DOC.NUMBER

CODE

REV

X01

57

8 7

6 5

4

3 2 1

AC

PVADPTR

PVPACK

DC

D

B

VADPBL

MOS

MOS

CHARGER

BQ24728

MOS

MOS

MOS

PVBAT

PAD

PAD

PAD

5V / 3.3V

TPS51123RGER

1.5V

TPS51216RUKR

1.05V

TPS51219RTER

VCORE

TPS51650RSLR

VRP5V0A

VRP3V3A

VRP1V5

VRP1V05S_VCCP

PAD

PAD

PAD

PVCORE

P5V0A

P3V3A

P1V5

PAD

MOS

PAD

MOS

MOS

MOS

P1V05S_CPU

P1V0S_DGPU

P5V0S

P3V3S

P1V5S

PAD

VCCSA

TPS51461RGER

1.8V

AT1530F11U

P3VSS_DGPU

MOS

P1V5S_DGPU

MOS

P1V05S_PCH

VRPVSAVRPVCCSA_IN

VRP1V8S

PAD

PAD

PVSA

P1V8S

MOS

D

P1V8S_DGPU

CC

B

PAD

EN_DGPU

AXG

TPS51601DRBR

VCORE_DGPU
RT8208BGQW

PVAXG

VRPVCORE_DGPU

DGPU_PG

PAD

PVCORE_DGPU

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

POWER PROCEDURE

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

4

1

DOC.NUMBER

CODE

REV

X01

57

8 7

6 5

4

3 2 1

OUT

VADPBL

Q6010

5

ACDRV

1

S

2
3
4 5

IN

G

NMOS_4D3S

AON7410

8

D

7
6

D

2 1

C6031

2200PF_50V_2

C6019

2 1

0.1UF_25V_2

R6017

1M_5%_2

2 1

5

BATDRV

PVADPTRP1V5S

B

PVADPTR

R6029

2 1

D6018

2 1

2 1

1SS355VMTE_17

R6021

35

ADP_PRES

2 1

300K_1%_2

RSC_0402_DYRSC_0402_DY

OUT

R6030

2 1

C6022

2 1

CSC0402_DY

8

35

AC_OK

ACDET>0.6V = SMBUS OK
ACDET>1.8V = ADP_PRES HI
ACDET>2.4V = AC_OK TO CHARGE
ACDET>3.15V = AC_OVP

R6049

2 1

47K_1%_2

7 6

PVADPTR

R6015

2_5%_6

2 1

C6018

2 1

2 1

C6033

2 1

CSC0402_DY

1UF_25V_3

PVPACK

IN

5

ACDRV

2 1

C6032

0.01UF_50V_2

OUT

R6028

2 1

4.3K_5%_2

P3V3AL

R6024

2 1

10K_5%_2

OUT

35

35

35

BATT_DAT

BATT_CLK

I_ADP

6

6

OUT

BI
BI

L6015

NFE31PT222Z1E9L

4

C6017

1000PF_50V_2

Q6012

AON7410

1

S

2
3
4 5

G

NMOS_4D3S

1

S

2
3
4 5

G

NMOS_4D3S

AON7410

R6018

2 1

4.3K_5%_2

TI_BQ24728_QFN_20P

C6046

2 1

100PF_50V_2

3

C6047

Q6011

CSC0402_DY

21

1

2

C6016

2 1

CSC0402_DY

C6015

2 1

1000PF_50V_2

SEM_SM24_SOT23_3P_DY

D6017

1

3

3

8

D

7
6

P3V3AL

2

D6015

21

21

1SS355VMTE_17

2 1

PVBAT

8

D

7
6

0.1UF_16V_2

21

C6029

1UF_25V_3

543

ACPRES

6

ACDET

7

IOUT

U6000

8

SDA

9

SCL

10

ILIM

BATDRV

11

P3V3A

R6023

2 1

100K_1%_2

21

R6046

2 1

36.5K_1%_2

21
43

R6000

0.01_1%_6

21

C6028

C6030

2 1

CSC0402_DY

VRPVADPTR_CSN

VRPVADPTR_CSP

1

ACDRV

SRN

12

2

ACP

CMSRC

GND

SRP

151413

4.3K_5%_2

ACN

LODRV

R6043

TML

VCC

PHASE

HIDRV

BTST

REGN

C6025

SHORT_0402

SHORT_0402

21

0.047UF_25V_3

21
20

19
18
17
16

2 1

1UF_10V_2

R6025

R6020

C6027

2 1

R6026

2 1

D6016

BAT54WS

21

21

OUT

21

BATDRV

5 4

7

IN

VRP5V0A_VIN

R6027

2 1

0.047UF_16V_22.2_5%_2

20_5%_5

VRPVPACK_HG

VRPVPACK_PH

21

C6026

VRPVPACK_LG

5

12

PAD6015

2 1

POWERPAD_2_0610

678

AON7410

AON7410

Q6000

D

NMOS_4D3S

C6000

2 1

2 1

2 1

CSC0805_DY

ETQP3W4R7WFN

R7600

RSC_0603_DY

C7600

CSC0402_DY

G

S

3

214 5

678

Q6001

D

NMOS_4D3S

G

S

3

214 5

VRPVPACK_CSP

VRPVPACK_CSN

CHANGE by

XXX

35

CHG_LED#

R6048

1K_1%_2

2 1

R6047

C6048

2 1

12K_1%_2

0.0015UF_50V_2

IN

C6002

C6001

2 1

2 1

L6000

4.7UF_25V_5

10UF_25V_5

R6001

0.01_1%_6

21

C6023

0.1UF_16V_2

C6024

2 1

CSC0402_DY

DATE

JACK6015

ACES_59012_0080N_002_8P

PVBAT_CHG

21
43

21

21-OCT-2002

23

21

21

43

43

65

65

87

OUT

87

ADP_ID

ININ

35

PVPACK

2 1

C6021

2 1

0.1UF_25V_2

10UF_25V_5

10UF_25V_5

C6011

C6010

2 1

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

5

AC_LED#

C6012

2 1

CSC0805_DY

of

57

1

35

D

CC

B

D6019

B0530W_7

2 1

AA

REV

X01

8 7

6 5

4

3 2 1

D

P3V3AL

C7500

100PF_50V_2

R6051

12

D7504

2 1

21

2 1

PHP_PESD5V0S1BB_SOD523_2P

100_5%_2

P3V3AL

2 1

R6058

5

35

BATT_DAT

5

35

BATT_CLK

R6052

2 1

2.2K_5%_2

BI
BI

R6050

2 1

2.2K_5%_2

2 1

100_5%_2

P3V3AL

21

B

3

21

3

D7500

BAV99W_7_F

21

3

D7501

BAV99W_7_F

D7502

BAV99W_7_F

C7501

R6053

100K_5%_2

12

D7505

C7502

OUT

2 1

PHP_PESD5V0S1BB_SOD523_2P

100_5%_2

BATT_IN#

100PF_50V_2

2 1

21

100PF_50V_2

R6057

12

2 1

21

35

PVPACK

D7506

CN6050

1

PHP_PESD5V0S1BB_SOD523_2P

1

2

2

3

3

4

4

5

5

6
7
8

FOX_BP02083_B82B5_9HV_8P

6012B0387101-002

G1

G1

6

G2

G2

7
8

21

C6050

0.1UF_25V_2

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SELETOR

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

6

1

DOC.NUMBER

CODE

REV

X01

57

8 7

6 5

4

3 2 1

P3V3A

PAD6100

2 1

POWERPAD_2_0610

12

IN

PVBAT

7

VRP3V3A

PVADPTR

EN_3V

D6999

IN

3

IN

BAV70W_7_F

21

IN

OUT

IN

PVBAT

5

7

VRP5V0A_VIN

EN_5V

D

12

PAD6110

2 1

IN

VBATP

7

POWERPAD_2_0610

R6110

2 1

73.2K_1%_2

R6160

2 1

61.9K_1%_2

OUT

2VREF

OCP=7AMPOCP=7AMP

P5V0A

PAD6150

2 1

POWERPAD_2_0610

12

7

IN

VRP5V0A

14

D

TON=3.3V:300KHZ/375KHZ

5V_PG

678

D

S

D

S

214 5

214 5

Q6100

5

3

4

25

TML

TONSEL

TRIP2

VREF

NMOS_4D3S

G

3

678

Q6101

G

C6115

VRP3V3A_HG
VRP3V3A_PH
VRP3V3A_LG

R6114

2.2_5%_30.1UF_16V_2

21

21

7 24
8
9 22

10 21

11 20

12 19

VFB2

VO2 VO1
VREG3
VBST2
DRVH2
LL2
DRVL2

SKIPSEL

GND

EN0

VIN

16

15618

13

14

3

7

VRP3V3A_LDO

OUT

AON7410

C6111

C6110

2 1

2 1

4.7UF_25V_5

10UF_25V_5

OCP=8AMP

L6100

7

VRP3V3A

OUT

ETQP3W3R3WFN

21

AON7702A

B

R6100

2 1

6.8K_1%_2

+

C6100

2 1

220UF_6.3V

R6101

2 1

10K_1%_2

R7610

2 1

RSC_0603_DY

C7610

2 1

C6123

1

2

TRIP1

VFB1

VREG5

17

0.22UF_6.3V_2

23

PGOOD

VBST1

DRVH1

LL1

DRVL1

ENC

U6100

TI_TPS51123RGER_QFN_24P

2 1

R6155

2.2_5%_3

VRP5V0A_HG
VRP5V0A_PH

OUT

C6155

0.1UF_16V_2

21

7

VRP5V0A_LDO

CSC0402_DY

VO=((6.8K/10K)+1)*2

C6121

1UF_6.3V_2

R6113

2 1

330K_5%_2_DY

C6122

2 1

2 1

1UF_25V_3

C6120

2 1

10UF_6.3V_3

14

21

VRP5V0A_PH

678

AON7410

NMOS_4D3S

G

3

214 5

678

AON7702A

G

3

2145

IN

Q6150

D

S

Q6151

D

S

14

VRP5V0A_LG

7

OUTOUT

VBATP

7

CC

IN

C6160

2 1

C6161

2 1

10UF_25V_5

4.7UF_25V_5RSC_0603_DY

OCP=8AMP

L6150

2 1

2 1

ETQP3W3R3WFN

R7615

C7615

CSC0402_DY

21

+

C6150

2 1

330UF_6.3V

OUT

R6150

2 1

15.4K_1%_2

R6151

10K_1%_2

2 1

VO=((15.4K/10K)+1)*2

VRP5V0A

7

14

B

P3V3AL

PAD6103

2 1

12

POWERPAD1X1M

8

7

IN

VRP3V3A_LDO

7 6

SKIP:OOA=3.3V; PWM=2VREF; AUTO=GND

14

SKIP_3V_5V

EN_3V_5V

14

5

7

VRP5V0A_VIN

IN

IN

IN

5 4

P5V0AL

PAD6105

2 1

POWERPAD1X1M

CHANGE by

AA

INVENTEC

TITLE

12

XXX

IN

7

VRP5V0A_LDO

DATE

21-OCT-2002

23

MODEL,PROJECT,FUNCTION

CODE

SIZE

CS

A3

P3V3A & P5V0A

DOC.NUMBER

1310xxxxx-0-0

SHEET

7

REV

of

X01

57

1

8 7

6 5

4

3 2 1

OCP=16AMP

P1V5

PVBAT

PAD6200

2 1

POWERPAD_2_0610

12

VRP1V5

8

IN

21

D

P5V0A

1 2

PAD6210

D

POWERPAD_2_0610

P0V75S

678

C6216

2 1

2.2UF_6.3V_3

C6220

2 1

R6215

VRP1V5_HG

VRP1V5_PH

VRP1V5_LG

P0V75M_VREF

2 1

10UF_6.3V_3

U6200

15

EN_P0V75

15

EN_P1V5

DDR3L_SEL

IN

R6200

IN

21

10K_1%_2

21

C6217

B

R6201

2 1

52.3K_1%_2

C6218

2 1

0.01UF_50V_2

0.1UF_16V_2

R6203

2 1

100K_5%_2

17
16

6

8

7
19
18

21

TI_TPS51216RUKR_QFN_20P

R6202

75K_1%_2

S3

S5

VREF

REFIN

GND

MODE

TRIP

DRVH

DRVL

PGND

PGOOD

VDDQSNS

VLDOIN

VTTSNS

VTTGND

VTTREF

1512

VBSTV5IN

14
13

SW

11
10
20
9
2
3

VTT

1

4
5
21

TML

C6215

0.1UF_16V_22.2_5%_3

21

21

C6221

0.22UF_6.3V_2

FDMC8884

FDMS0310AS

Q6200

D

NMOS_4D3S

G

S

3

2145

678

Q6201

D

C6211

2 1

21

R7620

RSC_0603_DY

G

S

3

2145

C7620

2 1

CSC0402_DY

C6210

2 1

4.7UF_25V_5

10UF_25V_5

OCP=16AMP

L6200

ETQP3W1R0WFN

21

21

43

43

OUTIN

21

1 2

PAD6220

POWERPAD1X1M

+

C6200

VRP1V5

8

CC

2 1

330UF_2V_9MR_PANA_-35%

OUT

P1V5_PG

15

B

VOUT=REFIN=1.8*(52.3K/(10K+52.3K))
MODE=100KOHM:TRACKING DISCHARGE

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

P1V5

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

8

1

DOC.NUMBER

CODE

REV

X01

57

8 7

6 5

4

3 2 1

OCP=17AMP

P1V05S_CPU

PAD6300

2 1

POWERPAD_2_0610

12

9

55

12

IN

VRP1V05S_VCCP

D

D

PVBAT

15

EN_P1V0_VCCP

15

VCCIO_PG

VCCIO_SEL

VSS_SENSE_VCCIO

VCC_SENSE_VCCIO

C6308

2 1

2.2UF_10V_3

B

IN

OUT

P3V3A

21

20

20

IN
IN
IN

VOUT=1.05V@REFIN=3.3V; VOUT=1.0V@REFIN=GND

R6306

10K_5%_2

21

R6307

21

0_5%_2

TI_TPS51219RTER_QFN_16P

MODE=100KOHM/300KHZ

U6300

1

VREF

2

REFIN

3

GSNS

4

VSNS

2 1

C6319

0.01UF_50V_2

21

R6303

2 1

100K_5%_2

678

FDMC8884

FDMS0310AS

Q6300

D

NMOS_4D3S

G

S S

3

2145

678

Q6301

D

G

3

214 5

C6310

2 1

10UF_25V_5

21

R7630

RSC_0603_DY

C7630

2 1

CSC0402_DY

2 1

CYN_PCMB063T_R68MS_4P

21

0.1UF_16V_2

P5V0A

C6315

21

R6315

2.2_5%_3

14

17

16815

PWPD

PGOOD

TRIP

COMP

6

5

13

EN

BST

MODE

GND

PGND

SW

DH

DL

V5

12

VRP1V05S_VCCP_PH

11

VRP1V05S_VCCP_HG

10

VRP1V05S_VCCP_LG

9

7

21

R6302

60.4K_1%_2

C6316

2 1

2.2UF_6.3V_3

1 2

PAD6310

POWERPAD_2_0610

C6311

C6312

2 1

4.7UF_25V_5

L6300

CSC0805_DY

CHOKE_4PIN_2PIN

21

21

43

43

CC

OCP=17AMP

9

55

12

OUT

VRP1V05S_VCCP

+

C6300

2 1

22UF_6.3V_5

C6301

2 1

560UF_2.5V

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

P1V05S_CPU

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

9

1

DOC.NUMBER

CODE

REV

X01

57

8 7

6 5

4

3 2 1

OCP=4.5AMP

P1V8S

PAD6970

2 1

POWERPAD_2_0610

12

IN

10

VRP1V8S

D

D

P3V3S P3V3S

U6970

R6970

10_5%_2

2 1

15

EN_P1V8

C6972

2 1

0.1UF_16V_2

C6971

2 1

10UF_6.3V_3

IN

GMT_AT1530F11U_SOP8_8P

8

VIN

1

VCC

5

EN

PGNDLXGND

673

TML

VRP1V8S_PH

FB

REF

9

4

2

C6973

2 1

L6970

PAN_ELL5PR2R2N

21

R6973

13K_1%_2

2 1

R6972

2 1

10K_1%_2

C6974

2 1

2 1

CSC0402_DY

0.1UF_16V_2

B

C6970

22UF_6.3V_5

OCP=4.5AMP

OUT

VRP1V8S

VOUT=((13K+10K)+1)*0.8

CC

10

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

P1V8S

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5710

8 7

P5V0A

PAD6510

1 2

POWERPAD1X1M

6 5

4

3 2 1

OCP=7AMP

PVSA

PAD6500

2 1

21

OUT

11

VRPVCCSA_IN

POWERPAD_2_0610

12

IN

VRPVSA

11

21

D

C6522

21

2 1

0.01UF_50V_2

2 1

C6515

0.1UF_16V_2

R6502

0_5%_2

R6524

0_5%_2

R6525

0_5%_2

21

IN

VCCSA_SENSE

OCP=7AMP

VRPVSA_PH

21

21

IN

EN_PVCCSA

21

IN

VCCSA_VID0

21

IN

VCCSA_VID1

L6500

21

CYN_PCMB063T_R33MS_4P

43

15

21

21

21
43

2 1

C6500

2 1

C6501

C6502

2 1

2 1

C6503

22UF_6.3V_5_DY22UF_6.3V_522UF_6.3V_522UF_6.3V_5

OUT

VRPVSA

11

21

C6520

2 1

3300PF_50V_2

R6520

2 1

5.11K_1%_2

1

2

5

4

3

GND

COMP

VREF

VOUT

SLEW

U6500

V5FILT

VID0

VID1

V5DRV

PGOOD

151417

18

16

R6521

6

RSC_0402_DY

MODE

7

SWVIN

8

SW

9

SW

10

SW

11

SW

12

BST

EN

TI_TPS51461RGER_QFN_24P

13

11

VRPVCCSA_IN

C6521

2 1

0.22UF_6.3V_2

25

TML

IN

C6511

2 1

0.1UF_16V_2

VRPVCCSA_IN

C6510

2 1

22UF_6.3V_5

11

IN

24
23

VIN

22

VIN

21

PGND

20

PGND

19

PGND

B

C6523

1UF_6.3V_2

C6524

2 1

2 1

1UF_6.3V_2

R6522

10K_5%_210K_5%_2

D

CC

B

R6523

2 1

OUT

PVCCSA_PG

15

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PVSA

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

11

1

DOC.NUMBER

CODE

REV

X01

57

D

B

15

R6626 3.3K
R6627
R6711

R6714
R6716
R6719

VREF_CPU

R6711

2 1

200K_1%_230K_1%_2

21

R6712

2 1

21

EN_PVCORE

IN

R6638

8 7

2+02+1

56K
200K
30KR6712
DNP
DNP

DNP

2 1

R6629

20K_1%_2

2 1

12

R6628

0_5%_2_DY

IN

IN

IN

8

DNP
DNP
DNP
DNP

0
0
0DNP

12

0R6723

IN

R6630

20K_5%_2

2 1

R6631

8.66K_1%_2

2 1

OUT

12

GFX_VCC_SENSE

GFX_VSS_SENSE

VREF_CPU

VR_ON

12

VREF_CPU

P3V3A

2 1

2 1

0_5%_2_DY

2 1

0_5%_2_DY

100PF_50V_2

4.12K_1%_2

OUT

IN

C6633

2.2UF_6.3V_3

R6713

0_5%_2

R6714

R6715

0_5%_2

R6716

C6726

R6718

VREF_CPU

R6626

2 1

3.3K_1%_2

IN

IN

R6627

2 1

56K_1%_2

VR_ON

PVCORE_PG

VR_SVID_CLK

VR_SVID_ALERT#
VR_SVID_DATA

CPU_PROCHOT#

PVAXG_PG

C6634

2 1

2.2UF_6.3V_3

12

14

28

OUT

12

20

20

OUT

12

20

BI

17

35

OUT

14

OUT

21

21

21

21

12

7 6

12

C6632

100PF_50V_2

R6625

8.45K_1%_2

13
14
15
16
17
18
19
20
21
22
23
24

P3V3A

6 5

VREF_CPU

IN

21

21

GOCP-R

VREF

V3R3

VR_ON

CPGOOD

VCLK

ALERT#

VDIO

VR_HOT#

SLEW

GPGOOD

GF_IMAX

R6719

0_5%_2_DY

R6721

0_5%_2

R6723

0_5%_2_DY

R6725

0_5%_2

20

20

IN

IN

VSSSENSE

VCCSENSE

11

12

CVFB

CGFB

GGFB

GVFB

26

25

21

21

21

21

R6620

R6621

90.9K_1%_2

IN

IN

12

R6635

0_5%_2

R6636

0_5%_2

IN

CPU_CSP3

CPU_CSN3

U6600

9

CCSN3

GCSN1

282729

2 1

GPU_CSN1

IN

13

CPU_CSP2

7

8

CCSP2

CCSP3

GCSP1

GCSP2

30

0_5%_2

0_5%_2

2 1

2 1

R6724

R6720

GPU_CSP2

GPU_CSP1

IN

IN

13

10

CCOMP

TI_TPS51650RSLR_QFN_48P

GCOMP

21

21

12

IN

CPU_CSN2

6

CCSN2

GCSN2

31

0_5%_2_DY

2 1

R6722

GPU_CSN2

IN

P3V3A

21

12

12

21

IN

IN

CPU_CSN1

CPU_CSP1

5

4

CCSN1

CCSP1

GTHERM

GSKIP#

323334

R6730

100K_5%_2

0_5%_2_DY

2 1

R6726

C6727

0.1UF_16V_2_DY

2 1

R6622

39K_1%_243K_1%_2

21

R6623

24K_1%_2

21

C6631

2 1

1

2

3

CTHERM

COCP-R

CF-IMAX

GPWM1

GPWM2

CPWM3

36

35

CPWM3

GPWM2

GPWM1

OUT

OUT

13

R6731

RSC_0402_DY

CBST1

CSW1

V5DRV

CSW2

CBST2

OUT

21

R6618

12

GND

V5

CDH1

CDL1

PGND

CDL2

CDH2

VBAT

100K_1%_NTC

OUT

R6729

100K_1%_NTC

2 1

49
48
47
46
45
44
43
42
41
40
39
38
37

10K_5%_3

VREF_CPU

GSKIP#

15.4K_1%_2

2 1

0.1UF_16V_2_DY

V5_CPU

V5_CPU

R6601

2.2_5%_3

R6606

2.2_5%_3

R6616

R6728

R6619

15.4K_1%_2

2 1

21

21

21

PVBAT

IN

OUT

2 1

5 4

C6629

2.2UF_10V_3

IN

0.1UF_16V_2

P5V0A

0.1UF_16V_2

12

13

VREF_CPU

4

PVBAT

POWERPAD_2_0610

+

C6699

68UF_25V

2 1

9/21 EE CHANGE
MOVE C6699.1 TO PAD6610.1
FROM PAD6610.2

VREF_CPU

21

P5V0A

21

R6617

10_5%_3

2 1

12

C6622

21

C6624

21

12

IN

3 2 1

PAD6610

21

1 2

C6613

C6612

C6611

C6610

2 1

2 1

PVBAT_CPU

678

IN

12

FDMS7692 FDMS0306AS

Q6610

D

NMOS_4D3S

G

S S

3

214 5

10UF_25V_5

10UF_25V_5

12

12 12

2 1

2 1

OUT
OUTIN

10UF_25V_5

10UF_25V_5

CPU_CSN1

CPU_CSP1

21

R6602

C6630

678

Q6611

4.7UF_10V_3

D

R7661

RSC_0603_DY

2 1

G

3

214 5

C7661

CSC0402_DY

2 1

CPU_CSN2

12

OUT

PVBAT_CPU

678

FDMS7692

FDMS0306AS

Q6620

D

NMOS_4D3S

G

S

3

214 5

678

Q6621

D

G

S

3

214 5

2 1

2 1

12

12

OUTIN

R7662

RSC_0603_DY

C7662

CSC0402_DY

CPU_CSP2

R6607

9/21 EE CHANGE TO VRP1V05S FROM P1V05S_CPU

R6632

2 1

20

12

20

CHANGE by

IN

BI

XXX

VR_SVID_CLK

VR_SVID_DATA

12

54.9_1%_2

DATE

PVBAT_CPU

C6615

C6614

2 1

2 1

CSC0805_DY

0.033UF_16V_2

162K_1%_2

21

R6603

100K_5%_NTC17.8K_1%_2

L6610

PAN_ETQP4LR36ZFC_4P

0.033UF_16V_2

21

162K_1%_2

R6608

100K_5%_NTC17.8K_1%_2

L6620

PAN_ETQP4LR36ZFC_4P

9

IN

VRP1V05S_VCCP

R6633

130_1%_2

2 1

2 1

21-OCT-2002

23

12

OUT

CSC0805_DY

21

C6623

21

R6605

21

R6604

28.7K_1%_2

43
21

21

C6625

21

R6610

21

43
21

C6635

0.1UF_16V_2

21

R6609

28.7K_1%_2

55

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PVCORE 1

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

D

PVCORE

1

++

3

2

1

3

2

1

+

C6600

470UF_2V

3

2

PVCORE

CC

C6601

470UF_2V

B

1

+

C6602

470UF_2V

C6603

470UF_2V

3

2

AA

REV

of

12

X01

57

1

8 7

6 5

4

3 2 1

D

OUT

OUT

R7671

RSC_0603_DY

C7671

CSC0402_DY

GPU_CSN1

GPU_CSP1

R6702

21

C6722

0.033UF_16V_2

R6705

162K_1%_2

21

R6703

43
21

L6710

PAN_ETQP4LR24AFM_4P

21

21

PVAXG

21

R6704

28.7K_1%_2100K_5%_NTC17.8K_1%_2

43
21

1

C6700

470UF_2V

+

3

2

PVBAT

12

PAD6710

POWERPAD_2_0610

2 1

C6710

2 1

10UF_25V_5

PVBAT_AXG

C6711

2 1

10UF_25V_5

OUT

13

12

PVBAT_AXG

12 13

IN

678

FDMS7692

21

U6710

PWM
GND DRVL

C6720

21

0.1UF_16V_22.2_5%_3

9

PAD

81

DRVHBST

72

SWSKIP#

6

VDD

P5V0A

FDMS0306AS

R6701

12

12

GSKIP#

IN

GPWM1

IN

3
4 5

TI_TPS51601DRBR_SON_8P

Q6710

D

NMOS_4D3S

G

S

3

214 5

678

Q6711

D

2 1

G

C6721

2 1

1UF_6.3V_2

S

3

214 5

2 1

B

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PVCORE 2

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5713

8 7

6 5

4

3 2 1

P3V3A

OCP=12AMP OCP=8AMP

VRP5V0A_LG

7

IN

P1V05S_CPUP1V05S_PCH

PAD6301

2 1

D

POWERPAD_2_0610

12

12

28

12

OUT

OUT

PVCORE_PG

PVAXG_PG

R6634

R6732

2K_5%_2

2 1

2K_5%_2

2 1

P15V0A

P3V3S

R123

21

52 35

OUT

DGPU_PWROK

31

PAD2

POWERPAD1X1M

D504

1 2

2

DIODE-BAT54-TAP-PHP_DY

NC

10K_5%_2

21

DGPU_PG

60110GA0367T_DY

13

56

IN

7

5V_PG

IN

R6999

100K_5%_2_DY

P3V3AL

21

2 1

C6998

0.1UF_25V_2

2 1

D6998

BAV99W_7_F

C6996

2 1

0.1UF_25V_2

3

2 1

C6997

0.1UF_25V_2

3

2 1

D6997

BAV99W_7_F

C6995

2 1

0.1UF_25V_2

IN

VRP5V0A

C6994

2 1

0.1UF_25V_2

7

D

CC

EMI Part

R6781

0_5%_2

21

56

P3V3S P3V3S

P3V3S

P1V05S_CPU

P1V5S_DGPU

52

55

PX_MODE EN_DGPU

IN OUT

C111

2 1

0.01UF_50V_2

C985

C984

2 1

B

0.1UF_25V_2_DY

P1V5

R6996

SHORT_0402

R6998

2 1

200K_5%_2

21

R6997

1K_5%_2

OUT

SKIP_3V_5V

21

OUT

ALWAYS_PW_EN

15

35

21

7

CORE_PWEN

EN_3V_5V

IN

IN

C6999

2 1

0.1UF_25V_2

7

35

PVBAT

C992

C991

2 1

2 1

0.1UF_25V_2_DY

8

7 6

5 4

C986

C987

C988

2 1

2 1

0.1UF_25V_2_DY

2 1

0.1UF_25V_2_DY

0.1UF_25V_2_DY

P5V0A

C995

C994

C993

2 1

0.1UF_25V_2_DY

0.1UF_25V_2_DY

2 1

2 1

0.1UF_25V_2_DY

C989

C980

C981

2 1

2 1

0.1UF_25V_2_DY

2 1

0.1UF_25V_2_DY

0.1UF_25V_2_DY

P1V5S_DGPU

C982

C990

2 1

0.1UF_25V_2_DY

0.1UF_25V_2_DY

CHANGE by

C983

2 1

2 1

0.1UF_25V_2_DY

0.1UF_25V_2_DY

XXX

C975

C976

2 1

2 1

0.1UF_25V_2_DY

0.1UF_25V_2_DY

PVCORE

DATE

2 1

0.1UF_25V_2_DY

21-OCT-2002

23

C977

2 1

0.1UF_25V_2_DY

PVCORE_DGPU

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

POWER TO EE PORT & EMI PART

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

B

AA

REV

of

X01

5714

1

8 7

6 5

4

3 2 1

P3V3A

P15V0A

R1053

1M_5%_2

2 1

D

Q561

IN

CORE_PWEN#

15

35

1

SSM3K7002FU

P15V0A_RC

3

DS

G

2

C999

2 1

2200pF_50V_2

P3V3S

R1071

2 1

3

Q559

DS

1

G

SSM3K7002FU_DY

2

P5V0S

R7004

0_5%_2

P5V0A

R7005

0_5%_2

P1V5

0_5%_2

1

2
5

1

2
5

R7006

Q567

21

Q558

8

7

6

D

NMOS_4D1S

FDC655BN

D

NMOS_4D1S

FDC655BN

21

Q560

D

NMOS_4D3S

AON7410

21

S

G

S

G

P3V3S

2.665A

4

36

C1014

2 1

P5V0S

8

10uF_6.3V_3

11

9

15

IN

IN

IN

P1V5_PG

PVCCSA_PG

VCCIO_PG

3.135A

4

36

C1012

35

RESUME_PWEN

IN

2 1

R703

100K_5%_2

21

R1070

100_5%_2

R1068

100_5%_2

R1069

100_5%_2

EN_P1V5

21

21

21

OUT

C681

2 1

CSC0402_DY0.1uF_16V_2

P1V5S

5.647A

1

S

2
3
45

G

C998

2 1

10uF_6.3V_3 10uF_6.3V_3

14

21 15

35

IN

CORE_PWEN

DIODE-BAT54-TAP-PHP

R842

100K_5%_2

2

D7000

NC

13

21

EN_P0V75

P3V3S

R1067

10K_5%_2

2 1

ALL_PWGD_IN

OUT

17

35

D

C1013

2 1

1000PF_50V_2

8

CC

IN

CORE_PWEN

14

35

21 15

R950

10K_5%_2

21

EN_P1V8

C868

2 1

OUT

10

0.01uF_50V_2

8

OUT

P3V3S

R1066

B

SSM3K7002FU_DY

2 1
3

RSC_0603_DY RSC_0603_DY

Q566

DS

1

G

2

P1V5S

21

R1073

3

220_5%_2_DY

Q568

DS

1

G

35

2

15

IN

CORE_PWEN#

SSM3K7002FU_DYSSM3K7002FU_DY

P0V75S

21

R841

3

22_5%_2_DY

Q545

DS

1

G

2

35

1521

CORE_PWEN

14

IN

R657

10K_5%_2

C843

2 1

EN_P1V0_VCCP => 1.05V

EN_P1V0_VCCP

21

C662

2 1

0.01uF_50V_2

OUT

R7017

10K_5%_2

2 1

R7016

0_5%_2

R7021

0_5%_2

21

21

VCCIO_PG

9

15

IN

9

35

IN

EN_PVCCSA

EN_PVCORECPU_PWEN

OUT

OUT

11

12

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

P5V0S & P3V3S

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5715

8 7

6 5

4

3 2 1

Green CLK

L1

FBM_11_160808_121T

200MA_0603

60140EA0319T

P3V3_RTC

15
14

R126

13

10_5%_2

12
11
10
9

17

21

RTC_32K_IN

GPU_27M_IN_1V8

C182

C183

C184

P3V3AL

P1V05S_PCH

P3V3A_LAN

GREEN_CLK_25M_OUT

GREEN_CLK_25M_IN

PCH_25M_IN
LAN_25M_IN

1

XTAL_IN

2

VDD

3

VDDIO_25M_B

4

R127

SHORT_0402

R125

33_5%_2

GND

21

5

25M_B

21

6

25M_A

7

GND

VS_SLG3NB250V_TQFN_16P

6019B0934701

FOR SG USE
SLG3NB300V SUPPORT 27MHZ

U9

16

V3.3A
VOUT

XTAL_OUT

GND

NC
NC

VBAT

32k

GND

VDDIO_25M_A

8

D

2 1

0.1UF_16V_2

2 1

0.1UF_16V_2

2 1

0.1UF_16V_2

P3V3AL

21

0.1UF_16V_2

C185

2 1

2.2UF_6.3V_2

C186

2 1

P1V8S

0.1UF_16V_2

C188

2 1

VBAT

26

IN

21

C187

22UF_6.3V_5

RTC_32K_IN

GPU_27M_IN_1V8

PCH_25M_IN

LAN_25M_IN

TYPICAL RTC_32K_IN TRACE <= 6
MAX. LENGTH <= 24

TYPICAL GPU_27M_IN TRACE <= 8
MAX. LENGTH <= 12

TYPICAL LAN_25M_IN TRACE <= 8
MAX. LENGTH <= 12

TYPICAL LAN_25M_IN TRACE <= 8
MAX. LENGTH <= 12

OUT
OUT
OUT
OUT

26

49

27

41

D

CC

P/N : 6019B0941101

FOR UMA USE
SLG3NB250V
P/N : 6019B0934701

FOR UMA
U9 : 6019B0934701
R126 : NA
C188 : NA

FOR SG
U9 : SLG3NB300V
R126 : MOUNT
C188 : MOUNT

P/N APPLY

2 1

X2

1

4

25MHz

6018B0044501

3
2

GREEN_CLK_25M_OUTGREEN_CLK_25M_IN

C181

2 1

27pF_50V_2

B

C180

27pF_50V_2

IF USE U9 ( SLG3NB250V )

MOUNT

X2
R1
L1
C180
C181
C182
C183
C184
C185
C186
C187
R906 (PAGE26)
R912 (PAGE27)
R414 (PAGE41)
R120 (PAGE49)

OPEN (PAGE26)

D4400
X501
R958
C874
C875

OPEN (PAGE27) OPEN (PAGE49)

X503
R1041
C962
C965

OPEN (PAGE41)

X400
C402
C403

X1
R29
C35
C36

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

GREEN CLK SLG3NB250

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5716

8 7

6 5

4

3 2 1

P1V8S

6026B0154901_CHIEFRIVER

CN510

R684

1K_5%_2

R749

10K_5%_2

R799

130_1%_2

R790

R683

2 1

21

TP4500

TP30

TP4501

TP30

21

PM_DRAM_PWRGD_CPU_R

21

BUF_PLT_RST#_CPU

21

2.2K_5%_2

H_SNB_IVB#

1

1

R789

2 1

1

BSS138LT1

AN34

AL33

AN33

AL32

AN32

AM34

AP33

AR33

Q539

C26

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

V8

SM_DRAMPWROK

RESET#

750_1%_2

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

P1V5

R807

1K_1%_2

2 1

3

DS

G

R801

1K_5%_2

2

CLOCKS

MISCDDR3

JTAG & BPM

PWR MANAGEMENT THERMAL MISC

21

DIMM_DRAMRST#

BCLK

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PRDY#
PREQ#

TRST#

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

OUT

0_5%_2

CLK_DMI_PCH_R_DP

A28

CLK_DMI_PCH_R_DN

A27

CLK_DP_PCH_R_DP

A16

CLK_DP_PCH_R_DN

A15

R639

R638

R689

R690

21
21

0_5%_2

1K_5%_2

21
21

1K_5%_2

CLK_DMI_PCH_DP
CLK_DMI_PCH_DN

P1V05S_CPU

27

IN

27

IN

D

CPU_DRAMRST#

R8

140_1%_2

SM_RCOMP0

AK1

SM_RCOMP1

A5

SM_RCOMP2

A4

AP29

XDP_PREQ#

AP27

XDP_TCLK

AR26

TCK

TMS

TDI

TDO

AR27
AP30

AR28
AP26

AL35

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

XDP_TMS
XDP_TRST#

XDP_TDI_R
XDP_TDO

XDP_DBRESET#

TP4502
TP4503

TP4504
TP4505
TP4506

TP4507
TP4508

TP4509

R693

R737

21
21

25.5_1%_2

21

200_1%_2

R694

1

TP30

1

TP30

1

TP30

1

TP30

1

TP30

1

TP30

1

TP30

1

TP30

OUT

17

CC

B

P3V3S

24

XDP_DBRESET#

25

XDP_TDO

XDP_TMS

XDP_TDI_R

XDP_PREQ#

XDP_TRST#

XDP_TCLK

R788

R792
R1076
R1074
R1075

R791
R1077

21

1K_5%_2

51_5%_2

21

51_5%_2

21

51_5%_2

21
21

51_5%_2_DY

51_5%_2

21

51_5%_2

21

P1V05S_CPU

AA

R4500

1K_5%_2_DY

NV_CLE

31

OUT

D

12

35

CPU_PROCHOT#

IN

P3V3A P1V5S

R14115

200_5%_2

B

IN

PM_DRAM_PWRGD
ALL_PWGD_IN

28
15

35

2 1

U500

1

VCC

B

2
3

NXP_74AHC1G09GV_SOT753_5P

6019B0773901

(OD AND GATE)

Y

A

GND

5
4

P1V05S_CPU

H_PECI

35

R748

2 1

C805

2 1

47pF_50V_2

C4502

R800

2 1

200_5%_2

2 1

0.1uF_16V_2

OUT

62_5%_2

31

OUT

28

BI

31

IN

17

IN

30

3546

IN

R750

56_5%_2

PM_THRMTRIP#

H_PM_SYNC

H_CPUPWRGD

PM_DRAM_PWRGD_CPU

BUF_PLT_RST#

PM_DRAM_PWRGD_CPU

21

27

IN

17

IN

2 1

CPU_PROCHOT#_R

21

1.5K_1%_1/16W

17

OUTIN

PCH_DDR_RST

CPU_DRAMRST#

C809

2 1

R805

2 1

0.047uF_16V_2

4.99K_1%_2

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU - 1

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5717

8 7

CN510

28
28
28
28

28
28
28

R686

28

28
28
28
28

28
28
28
28

28
28
28
28
28
28
28
28

28
28
28
28
28
28
28
28

28
28

28

28
28

21

D

P1V05S_CPU

B

24.9_1%_2

R686
WITHIN 500 MILS
OF THE CPU

DMI_TX0_DN

IN

DMI_TX1_DN

IN

DMI_TX2_DN

IN

DMI_TX3_DN

IN

DMI_TX0_DP

IN

DMI_TX1_DP

IN

DMI_TX2_DP

IN

DMI_TX3_DP

IN

DMI_RX0_DN

OUT IN

DMI_RX1_DN

OUT

DMI_RX2_DN

OUT

DMI_RX3_DN

OUT

DMI_RX0_DP

OUT

DMI_RX1_DP

OUT

DMI_RX2_DP

OUT

DMI_RX3_DP

OUT

FDI_TX0_DN

OUT

FDI_TX1_DN

OUT

FDI_TX2_DN

OUT

FDI_TX3_DN

OUT

FDI_TX4_DN

OUT

FDI_TX5_DN

OUT

FDI_TX6_DN

OUT

FDI_TX7_DN

OUT

FDI_TX0_DP

OUT

FDI_TX1_DP

OUT

FDI_TX2_DP

OUT

FDI_TX3_DP

OUT

FDI_TX4_DP

OUT

FDI_TX5_DP

OUT

FDI_TX6_DP

OUT

FDI_TX7_DP

OUT

FDI_FSYNC0

IN

FDI_FSYNC1

IN

FDI_INT

IN

FDI_LSYNC0

IN

FDI_LSYNC1

IN

CPU_EDP_COMPIO

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

A21

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HDP#

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

6 5

6026B0154901_CHIEFRIVER

PCI EXPRESS* - GRAPHICS

eDP Intel(R) FDI DMI

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]

PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

R736
WITHIN 500 MILS
OF THE CPU

CPU_PEG_ICOMPI

J22
J21
H22

PEG_RX0_C_DN

K33

PEG_RX1_C_DN

M35

PEG_RX2_C_DN

L34

PEG_RX3_C_DN

J35

PEG_RX4_C_DN

J32

PEG_RX5_C_DN

H34

PEG_RX6_C_DN

H31

PEG_RX7_C_DN

G33
G30
F35
E34
E32
D33
D31
B33
C32

PEG_RX0_C_DP

J33

PEG_RX1_C_DP

L35

PEG_RX2_C_DP

K34

PEG_RX3_C_DP

H35

PEG_RX4_C_DP

H32

PEG_RX5_C_DP

G34

PEG_RX6_C_DP

G31

PEG_RX7_C_DP

F33
F30
E35
E33
F32
D34
E31
C33
B32

PEG_TX0_DN

M29

PEG_TX1_DN

M32

PEG_TX2_DN

M31

PEG_TX3_DN

L32

PEG_TX4_DN

L29

PEG_TX5_DN

K31

PEG_TX6_DN

K28

PEG_TX7_DN

J30
J28
H29
G27
E29
F27
D28
F26
E25

PEG_TX0_DP

M28

PEG_TX1_DP

M33

PEG_TX2_DP

M30

PEG_TX3_DP

L31

PEG_TX4_DP

L28

PEG_TX5_DP

K30

PEG_TX6_DP

K27

PEG_TX7_DP

J29
J27
H28
G28
E28
F28
D27
E26
D25

R736

24.9_1%_2

IN
IN
IN
IN
IN
IN
IN

IN
IN
IN
IN
IN
IN
IN
IN

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

4

P1V05S_CPU

21

48
48
48
48
48
48
48
48

48
48
48
48
48
48
48
48

18
18
18
18
18
18
18
18

18
18
18
18
18
18
18
18

3 2 1

CLOSE TO CPU

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

18

IN

PEG_TX0_DN

PEG_TX1_DN

PEG_TX2_DN

PEG_TX3_DN

PEG_TX4_DN

PEG_TX5_DN

PEG_TX6_DN

PEG_TX7_DN

PEG_TX0_DP

PEG_TX1_DP

PEG_TX2_DP

PEG_TX3_DP

PEG_TX4_DP

PEG_TX5_DP

PEG_TX6_DP

PEG_TX7_DP

C628

C622

C629

C623

C626

C624

C601

C620

C631

C619

C630

C618

C627

C621

C625

C600

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

PEG_TX0_C_DN

PEG_TX1_C_DN

PEG_TX2_C_DN

PEG_TX3_C_DN

PEG_TX4_C_DN

PEG_TX5_C_DN

PEG_TX6_C_DN

PEG_TX7_C_DN

PEG_TX0_C_DP

PEG_TX1_C_DP

PEG_TX2_C_DP

PEG_TX3_C_DP

PEG_TX4_C_DP

PEG_TX5_C_DP

PEG_TX6_C_DP

PEG_TX7_C_DP

OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT

48

48

48

48

48

48

48

48

48

48

48

48

48

48

48

48

D

CC

B

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU - 2

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5718

8 7

6 5

4

3 2 1

D10

AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9

AJ11

AT8
AT9

AR8

AJ12

AT14
AT12

AT15

AA9
AA7

AB8
AB9

CN510

C9
A7

C8
A9
A8
D9
D8
G4
F4
F1

G1

G5
F5
F2
G2

J7
J8

K10

K9

J9

J10

K8
K7

M5

N4

N2
N1
M4

N5
M2
M1

R6

6026B0154901_CHIEFRIVER

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

DDR SYSTEM MEMORY B

CN510

6026B0154901_CHIEFRIVER

M_CLK_DDR0_DP

SA_CLK[0]

D

B

24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24

24
24
24

24
24
24

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

OUT
OUT
OUT

OUT
OUT
OUT

M_A_DQ<0>
M_A_DQ<1>
M_A_DQ<2>
M_A_DQ<3>
M_A_DQ<4>
M_A_DQ<5>
M_A_DQ<6>
M_A_DQ<7>
M_A_DQ<8>
M_A_DQ<9>
M_A_DQ<10>
M_A_DQ<11>
M_A_DQ<12>
M_A_DQ<13>
M_A_DQ<14>
M_A_DQ<15>
M_A_DQ<16>
M_A_DQ<17>
M_A_DQ<18>
M_A_DQ<19>
M_A_DQ<20>
M_A_DQ<21>
M_A_DQ<22>
M_A_DQ<23>
M_A_DQ<24>
M_A_DQ<25>
M_A_DQ<26>
M_A_DQ<27>
M_A_DQ<28>
M_A_DQ<29>
M_A_DQ<30>
M_A_DQ<31>
M_A_DQ<32>
M_A_DQ<33>
M_A_DQ<34>
M_A_DQ<35>
M_A_DQ<36>
M_A_DQ<37>
M_A_DQ<38>
M_A_DQ<39>
M_A_DQ<40>
M_A_DQ<41>
M_A_DQ<42>
M_A_DQ<43>
M_A_DQ<44>
M_A_DQ<45>
M_A_DQ<46>
M_A_DQ<47>
M_A_DQ<48>
M_A_DQ<49>
M_A_DQ<50>
M_A_DQ<51>
M_A_DQ<52>
M_A_DQ<53>
M_A_DQ<54>
M_A_DQ<55>
M_A_DQ<56>
M_A_DQ<57>
M_A_DQ<58>
M_A_DQ<59>
M_A_DQ<60>
M_A_DQ<61>
M_A_DQ<62>
M_A_DQ<63>

M_A_BS0
M_A_BS1
M_A_BS2

M_A_CAS#
M_A_RAS#
M_A_WE#

AP11

AN11

AL12
AM12
AM11

AL11
AP12
AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10
AF10

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AK8
AK9

AH8
AH9

AE8
AD9
AF9

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]
SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]
SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]
SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]
SA_DQ[41]

AJ9

SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]

V6

SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]

RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]

SA_CS#[0]

SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]

SA_ODT[0]

SA_ODT[1]
RSVD_TP[9]

RSVD_TP[10]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]

SA_DQS[1]

SA_DQS[2]

SA_DQS[3]

SA_DQS[4]

SA_DQS[5]

SA_DQS[6]

SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AB6

M_CLK_DDR0_DN

AA6

M_CKE0

V9

M_CLK_DDR1_DP

AA5

M_CLK_DDR1_DN

AB5

M_CKE1

V10

AB4
AA4
W9

AB3
AA3
W10

M_CS#0

AK3

M_CS#1

AL3
AG1
AH1

M_ODT0

AH3

M_ODT1

AG3
AG2
AH2

M_A_DQS0_DN

C4

M_A_DQS1_DN

G6

M_A_DQS2_DN

J3

M_A_DQS3_DN

M6

M_A_DQS4_DN

AL6

M_A_DQS5_DN

AM8

M_A_DQS6_DN

AR12

M_A_DQS7_DN

AM15

M_A_DQS0_DP

D4

M_A_DQS1_DP

F6

M_A_DQS2_DP

K3

M_A_DQS3_DP

N6

M_A_DQS4_DP

AL5

M_A_DQS5_DP

AM9

M_A_DQS6_DP

AR11

M_A_DQS7_DP

AM14

M_A_A<0>

AD10

M_A_A<1>

W1

M_A_A<2>

W2

M_A_A<3>

W7

M_A_A<4>

V3

M_A_A<5>

V2

M_A_A<6>

W3

M_A_A<7>

W6

M_A_A<8>

V1

M_A_A<9>

W5

M_A_A<10>

AD8

M_A_A<11>

V4

M_A_A<12>

W4

M_A_A<13>

AF8

M_A_A<14>

V5

M_A_A<15>

V7

OUT
OUT

OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

24

OUT

24

OUT

24

OUT

24

OUT

24

OUT

24

OUT

24
24

24
24

24
24
24
24
24
24
24
24

24
24
24
24
24
24
24
24

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25

M_B_DQ<0>

BI

M_B_DQ<1>

BI

M_B_DQ<2>

BI

M_B_DQ<3>

BI

M_B_DQ<4>

BI

M_B_DQ<5>

BI

M_B_DQ<6>

BI

M_B_DQ<7>

BI

M_B_DQ<8>

BI

M_B_DQ<9>

BI

M_B_DQ<10>

BI

M_B_DQ<11>

BI

M_B_DQ<12>

BI

M_B_DQ<13>

BI

M_B_DQ<14>

BI

M_B_DQ<15>

BI

M_B_DQ<16>

BI

M_B_DQ<17>

BI

M_B_DQ<18>

BI

M_B_DQ<19>

BI

M_B_DQ<20>

BI

M_B_DQ<21>

BI

M_B_DQ<22>

BI

M_B_DQ<23>

BI

M_B_DQ<24>

BI

M_B_DQ<25>

BI

M_B_DQ<26>

BI

M_B_DQ<27>

BI

M_B_DQ<28>

BI

M_B_DQ<29>

BI

M_B_DQ<30>

BI

M_B_DQ<31>

BI

M_B_DQ<32>

BI

M_B_DQ<33>

BI

M_B_DQ<34>

BI

M_B_DQ<35>

BI

M_B_DQ<36>

BI

M_B_DQ<37>

BI

M_B_DQ<38>

BI

M_B_DQ<39>

BI

M_B_DQ<40>

BI

M_B_DQ<41>

BI

M_B_DQ<42>

BI

M_B_DQ<43>

BI

M_B_DQ<44>

BI

M_B_DQ<45>

BI

M_B_DQ<46>

BI

M_B_DQ<47>

BI

M_B_DQ<48>

BI

M_B_DQ<49>

BI

M_B_DQ<50>

BI

M_B_DQ<51>

BI

M_B_DQ<52>

BI

M_B_DQ<53>

BI

M_B_DQ<54>

BI

M_B_DQ<55>

BI

M_B_DQ<56>

BI

M_B_DQ<57>

BI

M_B_DQ<58>

BI

M_B_DQ<59>

BI

M_B_DQ<60>

BI

M_B_DQ<61>

BI

M_B_DQ<62>

BI

M_B_DQ<63>

BI

M_B_BS0

25

OUT

M_B_BS1

25

OUT

M_B_BS2

25

OUT

M_B_CAS#

25

OUT

M_B_RAS#

25

OUT

M_B_WE#

25

OUT

AH11

AH12
AT11
AN14
AR14

AN15
AR15

AA10

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

RSVD_TP[11]
RSVD_TP[12]
RSVD_TP[13]

RSVD_TP[14]
RSVD_TP[15]
RSVD_TP[16]

SB_CS#[0]

SB_CS#[1]
RSVD_TP[17]
RSVD_TP[18]

SB_ODT[0]

SB_ODT[1]
RSVD_TP[19]
RSVD_TP[20]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_CLK_DDR2_DP
M_CLK_DDR2_DN
M_CKE2

M_CLK_DDR3_DP
M_CLK_DDR3_DN
M_CKE3

M_CS#2
M_CS#3

M_ODT2
M_ODT3

M_B_DQS0_DN
M_B_DQS1_DN
M_B_DQS2_DN
M_B_DQS3_DN
M_B_DQS4_DN
M_B_DQS5_DN
M_B_DQS6_DN
M_B_DQS7_DN

M_B_DQS0_DP
M_B_DQS1_DP
M_B_DQS2_DP
M_B_DQS3_DP
M_B_DQS4_DP
M_B_DQS5_DP
M_B_DQS6_DP
M_B_DQS7_DP

M_B_A<0>
M_B_A<1>
M_B_A<2>
M_B_A<3>
M_B_A<4>
M_B_A<5>
M_B_A<6>
M_B_A<7>
M_B_A<8>
M_B_A<9>
M_B_A<10>
M_B_A<11>
M_B_A<12>
M_B_A<13>
M_B_A<14>
M_B_A<15>

OUT
OUT

OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

25

OUT

25

OUT

25

OUT

25

OUT

25

OUT

25

OUT

25
25

25
25

25
25
25
25
25
25
25
25

25
25
25
25
25
25
25
25

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

D

CC

B

AA

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU - 3

DOC.NUMBER

CODE

SIZE

A3

CS

1310xxxxx-0-0

SHEET

of

5719

1

REV

X01

8 7

IMAX = 53A

C745

C737

C743

2 1

2 1

2 1

22uF_6.3V_5

22uF_6.3V_5

2 1

22uF_6.3V_5

22uF_6.3V_5

D

C725

C744

2 1

10uF_6.3V_5

C722

2 1

B

10uF_6.3V_5

8

C731

C739

2 1

22uF_6.3V_5

C749

2 1

2 1

22uF_6.3V_5

22uF_6.3V_5

C730

2 1

22uF_6.3V_5

C738

C723

2 1

10uF_6.3V_5

C748

2 1

10uF_6.3V_5

C742

2 1

2 1

10uF_6.3V_5

10uF_6.3V_5

C724

C729

2 1

2 1

10uF_6.3V_5

10uF_6.3V_5

7 6

6 5

PVCORE

AG35
AG34
AG33
AG32
AG31
AG30

C728

AG29
AG28
AG27

2 1

AG26

22uF_6.3V_5

AF31

AD35
AD34

C736

C727

AD33
AD32
AD31

2 1

AD30

22uF_6.3V_5

AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32

2 1

10uF_6.3V_5

AA31
AA30
AA29
AA28
AA27
AA26

C726

2 1

10uF_6.3V_5

CN510

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14
VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

6026B0154901_CHIEFRIVER

POWER

PEG AND DDR

CORE SUPPLY

SVIDSENSE LINES

VSS_SENSE_VCCIO

5 4

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK
VIDSOUT

VCC_SENSE

VSS_SENSE

VCCIO_SENSE

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

4

P1V05S_CPU

C755

C761

2 1

22uF_6.3V_5

C753

C707

2 1

22uF_6.3V_5

VCCIO IMAX = 8.5A

R755

130_1%_2

2 1

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

R751
R4538
R4539

2 1

2 1

VTT

22uF_6.3V_5

22uF_6.3V_5

PVCORE

R734

2 1

R735

2 1

C760

C759

100_1%_2

100_1%_2

3 2 1

C758

C706

C752

C756

2 1

2 1

2 1

22uF_6.3V_5

22uF_6.3V_5

2 1

22uF_6.3V_5

22uF_6.3V_5

C754

2 1

2 1

22uF_6.3V_5

22uF_6.3V_5

C757

2 1

2 1

22uF_6.3V_5

22uF_6.3V_5

P1V05S_CPU

R753

75_1%_2

2 1

21

43_5%_2

21

0_5%_2

21

0_5%_2

VR_SVID_ALERT#
VR_SVID_CLK
VR_SVID_DATA

VCCSENSE
VSSSENSE

OUT
OUT

12

OUT

12

OUT

12

OUT

12
12

P1V05S_CPU

R691

10_1%_210_1%_2

2 1

R692

2 1

CHANGE by

VCC_SENSE_VCCIO
VSS_SENSE_VCCIO

XXX

OUT
OUT

DATE

9
9

21-OCT-2002

23

SIZE

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU - 4

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

57

20

1

REV

X01

D

CC

B

AA

8 7

SANDY BRIDGE + IVY BRIDGE COMPTIBILITY DG 2.5.17.1

R4562

21

0_5%_2_DY

21

IN

DDR_WR_VREF01

R4561

213

G

2 1

1K_5%_2_DY

D

IMAX = 33A

C750

C746

C732

C735

C747

2 1

2 1

22uF_6.3V_5

22uF_6.3V_5

B

P1V8S

8

2 1

22uF_6.3V_5

2 1

22uF_6.3V_5

IMAX = 1.2A

C711

2 1

1uF_6.3V_2

CPUDDR_WR_VREF1_M

D S

Q4503

PCH_DDR_RST

C740

2 1

2 1

C710

22uF_6.3V_5

22uF_6.3V_5

C709

2 1

2 1

1uF_6.3V_2

10uF_6.3V_5

7 6

6 5

4

3 2 1

P0V75M_VREF P0V75M_VREF_H P1V5S

PAD4500

1 2

POWERPAD1X1M_DY

3

DS

Q538

PMV56XN

C808

DATE

21

G

1

2 1

470pF_50V_2_DY

21-OCT-2002

23

2

R4565

2 1

R4566

2 1

1K_1%_2_DY 1K_1%_2_DY

D

CC

B

PVSA

C7051

C7041

2 1

C721

2 1

10uF_6.3V_5

2 1

10uF_6.3V_5

10uF_6.3V_5

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU - 5

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

1

REV

X01

5721

21

IN

IN

17

21

DDR_WR_VREF02

27

R4564

0_5%_2_DY

2

G

R4563

2 1

1

1K_5%_2_DY

PCH_DDR_RST

D S

21

Q4504

PMV56XNPMV56XN

3

CPUDDR_WR_VREF2_M

17

27

21

IN

CORE_PWEN

14

15

35

IN

PVAXG

PVAXG

CN510

6026B0154901_CHIEFRIVER

21

R756

GFX_VCC_SENSE
GFX_VSS_SENSE

21

R757

100_1%_2 100_1%_2

C763

2 1

2 1

10uF_6.3V_5

R4567

100_5%_2

VCCSA_SENSE

VCCSA_VID0
VCCSA_VID1
VCCIO_SEL

P0V75M_VREF_H

DDR_WR_VREF01
DDR_WR_VREF02

C787

2 1

0.1uF_16V_2

C767

C762

2 1

10uF_6.3V_5

10uF_6.3V_5

21

VRPVSA

12

OUT

12

OUT

21

OUT

21

OUT

P1V5S

5A

C766

2 1

C768

2 1

10uF_6.3V_5

2 1

10uF_6.3V_5

10uF_6.3V_5

SYSTEM AGENT IMAX = 6A

11

IN

11

OUT

11

OUT

11

OUT

9

OUT

CHANGE by

XXX

VDDQ1

VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

AK35
AK34

AL1

B4
D1

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24
A19

C765

AT24

VAXG1 VAXG_SENSE

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

C741

C733

2 1

2 1

22uF_6.3V_5

22uF_6.3V_5

+

C807

2 1

330UF_2V_9MR_PANA_-35%

AR24
AR23

AR21

AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23

AN21

AN20
AN18

AN17
AM24
AM23
AM21
AM20
AM18
AM17

AL24
AL23

AL21

AL20
AL18

AL17
AK24
AK23
AK21
AK20
AK18
AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17
AH24
AH23

AH21

AH20
AH18
AH17

VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

C708

2 1

22uF_6.3V_5

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

POWER

LINES

GRAPHICS

1.8V RAIL

VSSAXG_SENSE

SENSE

SM_VREF

SA_DIMM_VREFDQ
SB_DIMM_VREFDQ

DDR3 -1.5V RAILS

MISC VREFSA RAIL

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

VCCIO_SEL

5 4

8 7

6026B0154901_CHIEFRIVER

CN510

CFG0

1

TP4520

1

TP4521

1

TP4522

1

TP4523

1

TP4524

1

TP4525

D

CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

AK28
AK29

AL26
AL27

AK26

AL29
AL30

AM31

AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29

AJ31

AH31

AJ33

AH33

AJ26

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
VSS_VAL_SENSE

RSVD5

RESERVED

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

B

CFG0

CFG2

CFG4

CFG5

CFG6

CFG7

8

R796

1K_1%_2

R797

1K_1%_2_DY

R798

1K_1%_2_DY

R794

1K_1%_2

R795

1K_1%_2

R793

1K_1%_2_DY

J15

RSVD27

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

21

21

CFG[2] : PCI Express* Static x16 Lane Numbering Reversal.

21

1 = Normal operation
0 = Lane numbers reversed

21

CFG[4] : eDP enable

1 = Disabled

21

21

0 = Enabled

CFG[6:5] : PCI Express Bifurcation:

00 = 1 x8, 2 x4 PCI Expres
01 = reserved
10 = 2 x8 PCI Express
11 = 1 x16 PCI Express

CFG[7] :PEG DEFER TRAINING

1: (Default) PEG Train immediately following RESETB deassertion
0: PEG Wait for BIOS for training

7 6

6 5

L7

RSVD28

AG7

RSVD29

AE7

RSVD30

RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD52

AK2
W8

AT26
AM33
AJ27

AH27
AH26

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

XDP_BCLK_ITP_DP

AN35

XDP_BCLK_ITP_DN

AM35

AT2
AT1
AR1

B1

KEY

RSVD31

VCC_DIE_SENSE

VSS_DIE_SENSE

RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5

RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9

RSVD_NCTF10

RSVD51

BCLK_ITP

BCLK_ITP#

RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13

TP4518
TP4519

CN510

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

1

TP30

1

TP30

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

5 4

4

6026B0154901_CHIEFRIVER

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

3 2 1

6026B0154901_CHIEFRIVER

CN510

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

AT19

VSS7

AT16

VSS8

AT13 AJ2

VSS9

AT10

VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13

AR25

VSS14

AR22

VSS15

AR19

VSS16

AR16

VSS17

AR13

VSS18

AR10

VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22

AP34

VSS23

AP31

VSS24

AP28

VSS25

AP25

VSS26

AP22

VSS27

AP19

VSS28

AP16

VSS29

AP13

VSS30

AP10

VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34

AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2
AM1

AL34

AL31

AL28
AL25
AL22
AL19
AL16
AL13
AL10

AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AJ25

AN7
AN4

AL7
AL4
AL2

AK7
AK4

VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

FOX_PZ98927_3641_41F_Huronriver_989P_CHIEFRIVER

INVENTEC

TITLE

CODE

SIZE

CS

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

AJ22

VSS81

AJ19

VSS82

AJ16

VSS83

AJ13

VSS84

AJ10

VSS85

AJ7

VSS86

AJ4

VSS87

AJ3

VSS88
VSS89

AJ1

VSS90

AH35

VSS91

AH34

VSS92

AH32

VSS93

AH30

VSS94

AH29

VSS95

AH28

VSS96

AH25

VSS98

AH22

VSS99

AH19

VSS100

AH16

VSS101

AH7

VSS102

AH4

VSS103

AG9

VSS104

AG8

VSS105

AG4

VSS106

AF6

VSS107

AF5

VSS108

AF3

VSS109

AF2

VSS110

AE35

VSS111

AE34

VSS112

AE33

VSS113

AE32

VSS114

AE31

VSS115

AE30

VSS116

AE29

VSS117

AE28

VSS118

AE27

VSS119

AE26

VSS120

AE9

VSS121

AD7

VSS122

AC9

VSS123

AC8

VSS124

AC6

VSS125

AC5

VSS126

AC3

VSS127

AC2

VSS128

AB35

VSS129

AB34

VSS130

AB33

VSS131

AB32

VSS132

AB31

VSS133

AB30

VSS134

AB29

VSS135

AB28

VSS136

AB27

VSS137

AB26

VSS138

Y9

VSS139

Y8

VSS140

Y6

VSS141

Y5

VSS142

Y3

VSS143

Y2

VSS144

W35

VSS145

W34

VSS146

W33

VSS147

W32

VSS148

W31

VSS149

W30

VSS150

W29

VSS151

W28

VSS152

W27

VSS153

W26

VSS154

U9

VSS155

U8

VSS156

U6

VSS157

U5

VSS158

U3

VSS159

U2

VSS160

MODEL,PROJECT,FUNCTION

CPU - 6

DOC.NUMBER

1310xxxxx-0-0

SHEET

of

57

22

1

REV

X01

D

CC

B

AA

8 7

6 5

4

3 2 1

FAN CONN

P5V0SP3V3S

C602

2 1

D

R598

R631

2 1

2 1

4.7K_5%_2

4.7K_5%_2

FAN_TACH1

35

OUT

CPUFAN1_ON#

35

IN

C530

2 1

CSC0402_DY

4.7uF_6.3V_3

C574

2 1

0.1uF_16V_2

CN500

1

1

2

2

3

3

4

ACES_50273_0047N_001_4P
6012A0081607

D

G1
G2

GG4

P3V3S

P3V3S

THERMAL SENSOR(LOCAL)
NCT7717U I2C / SMBus address is 1001000xb (x is R/W bit).

50

49 35

R1018

7.5K_1%_2

R115

10K_5%_2_DY

2 1

R114

10K_5%_2_DY

THM_CLK

BI BI

THERMTRIP#

OUT

21

21

U510

2

GND

3

ALERT#

NUVO_NCT7717U_SOT23_5P

6019B0914301

51

SDASCL

4

VDD

CO- LAY U2 (OPEN)

U2

2
3 4

TI_TMP302BDRLR_SOT_6P_DY

6019B0843501_DY

TRIPSET1TRIPSET0
GND
OUT# HYSTSET

VS

THM_DAT

61
5

22_5%_2

R116

P3V3S

21

C679

3535

21

50

700UA

0.1uF_16V_2

C4412

2 1

4.7uF_6.3V_3

CC

B

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

THERMAL & FAN

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5723

8 7

6 5

4

3 2 1

DDR3 (8mm) P/N : 6026B0221101

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

D

B

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

24

IN

24

IN

25

27

IN

25

27

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

19

IN

M_A_A<0>
M_A_A<1>
M_A_A<2>
M_A_A<3>
M_A_A<4>
M_A_A<5>
M_A_A<6>
M_A_A<7>
M_A_A<8>
M_A_A<9>
M_A_A<10>
M_A_A<11>
M_A_A<12>
M_A_A<13>
M_A_A<14>
M_A_A<15>

M_A_BS0
M_A_BS1
M_A_BS2
M_CS#0
M_CS#1
M_CLK_DDR0_DP
M_CLK_DDR0_DN
M_CLK_DDR1_DP
M_CLK_DDR1_DN
M_CKE0
M_CKE1
M_A_CAS#
M_A_RAS#
M_A_WE#
SA0_DIM0
SA1_DIM0
PCH_3S_SMCLK
PCH_3S_SMDAT

M_ODT0
M_ODT1

M_A_DQS0_DP
M_A_DQS1_DP
M_A_DQS2_DP
M_A_DQS3_DP
M_A_DQS4_DP
M_A_DQS5_DP
M_A_DQS6_DP
M_A_DQS7_DP
M_A_DQS0_DN
M_A_DQS1_DN
M_A_DQS2_DN
M_A_DQS3_DN
M_A_DQS4_DN
M_A_DQS5_DN
M_A_DQS6_DN
M_A_DQS7_DN

CN511

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10_AP

84

A11

83

A12

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

FOX_AS0A626_J8R6_7H_204P

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ<0>
M_A_DQ<1>
M_A_DQ<2>
M_A_DQ<3>
M_A_DQ<4>
M_A_DQ<5>
M_A_DQ<6>
M_A_DQ<7>
M_A_DQ<8>

M_A_DQ<9>
M_A_DQ<10>
M_A_DQ<11>
M_A_DQ<12>
M_A_DQ<13>
M_A_DQ<14>
M_A_DQ<15>
M_A_DQ<16>
M_A_DQ<17>
M_A_DQ<18>
M_A_DQ<19>
M_A_DQ<20>
M_A_DQ<21>
M_A_DQ<23>
M_A_DQ<22>
M_A_DQ<24>
M_A_DQ<25>
M_A_DQ<26>
M_A_DQ<27>
M_A_DQ<28>
M_A_DQ<29>
M_A_DQ<30>
M_A_DQ<31>
M_A_DQ<39>
M_A_DQ<38>
M_A_DQ<34>
M_A_DQ<35>
M_A_DQ<32>
M_A_DQ<33>
M_A_DQ<37>
M_A_DQ<36>
M_A_DQ<43>
M_A_DQ<42>
M_A_DQ<46>
M_A_DQ<47>
M_A_DQ<41>
M_A_DQ<40>
M_A_DQ<44>
M_A_DQ<45>
M_A_DQ<55>
M_A_DQ<54>
M_A_DQ<50>
M_A_DQ<51>
M_A_DQ<52>
M_A_DQ<53>
M_A_DQ<48>
M_A_DQ<49>
M_A_DQ<56>
M_A_DQ<57>
M_A_DQ<58>
M_A_DQ<59>
M_A_DQ<61>
M_A_DQ<60>
M_A_DQ<62>
M_A_DQ<63>

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

P1V5

P0V75S_DIMM0_VREF_DQ

P1V5

+

C712

2 1

C772

100uF_6.3V_DY

P3V3S

C4109

C810

2 1

2.2uF_16V_3

P0V75S_DIMM0_VREF_DQ

0.5A

C664

2 1

2.2uF_16V_3

P1V5

4.32A

C769

2 1

0.1uF_16V_2

2 1

0.1uF_16V_2

2 1

2 1

1uF_6.3V_2

0.1uF_16V_2

C776

2 1

2 1

1uF_6.3V_2

22uF_6.3V_5

DIMM_DRAMRST#

17

25

IN

C775

C774

2 1

2 1

22uF_6.3V_5

22uF_6.3V_5

C771

C770

P0V75S_DIMM0_VREF_CA

0.5A

C788

C665

2 1

0.1uF_16V_2

C773

2 1

2 1

2.2uF_16V_3

0.1uF_16V_2

CN511

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

FOX_AS0A626_J8R6_7H_204P

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72

127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

D

CC

P0V75S

203

VTT1

204

VTT2

G1

G1

G2

G2

1A

B

C833

C830

C831

2 1

2 1

1uF_6.3V_2

C832

2 1

1uF_6.3V_2

2 1

1uF_6.3V_2

1uF_6.3V_2

P1V5

P0V75S_DIMM0_VREF_CA

R759

2 1

R760

2 1

1K_1%_21K_1%_2

CHANGE by

XXX

R761

0_5%_2_DY

21

P0V75M_VREF

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

DDR3 - 1

DOC.NUMBER

CODE

SIZE

A3

CS

1310xxxxx-0-0

SHEET

24

of

57

1

REV

X01

AA

Note :
SO-DIMMA SPD Address is 0xA0

SO-DIMMA TS Address is 0x30

8

R838

R839

10K_5%_2

2 1

2 1

7 6

10K_5%_2

SA0_DIM0

SA1_DIM0

R4104

2 1

R662

P0V75M_VREF

21

0_5%_2_DY

24

IN

24

IN

R660

1K_1%_2 1K_1%_2

2 1

CPUDDR_WR_VREF1_M

R663

21

0_5%_2

SANDY BRIDGE + IVY BRIDGE DG4.14

5 4

8 7

6 5

4

3 2 1

DDR3 (4mm) P/N : 6026B0221601

C780

2 1

22uF_6.3V_5

0.1uF_16V_2

P0V75M_VREF

P1V5

C782

CN512

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

2 1

22uF_6.3V_5

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

FOX_AS0A626_U4RG_7H_204P

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

D

CC

P0V75S

203

VTT1

204

VTT2

G1

G1

G2

G2

1A

B

C836

2 1

2 1

1uF_6.3V_2

1uF_6.3V_2

2 1

2 1

1uF_6.3V_2

1uF_6.3V_2

C837

C834

C835

AA

19
19
19
19
19
19
19
19
19

D

B

19
19
19
19
19
19
19

19
19 19
19
19
19
19
19
19
19
19
19
19
19
19
25
25
24

27

24

27

19
19

19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19

M_B_A<0>

BI BI

M_B_A<1>

BI

M_B_A<2>

BI

M_B_A<3>

BI

M_B_A<4>

BI

M_B_A<5>

BI

M_B_A<6>

BI

M_B_A<7>

BI

M_B_A<8>

BI

M_B_A<9>

BI

M_B_A<10>

BI

M_B_A<11>

BI

M_B_A<12>

BI

M_B_A<13>

BI

M_B_A<14>

BI

M_B_A<15>

BI

M_B_BS0

IN
IN

M_B_BS2

IN

M_CS#2

IN

M_CS#3

IN

M_CLK_DDR2_DP

IN

M_CLK_DDR2_DN

IN

M_CLK_DDR3_DP

IN

M_CLK_DDR3_DN

IN

M_CKE2

IN

M_CKE3

IN

M_B_CAS#

IN

M_B_RAS#

IN

M_B_WE#

IN

SA0_DIM1

IN

SA1_DIM1

IN

PCH_3S_SMCLK

IN

PCH_3S_SMDAT

IN

M_ODT2

IN

M_ODT3

IN

M_B_DQS0_DP

IN

M_B_DQS1_DP

IN

M_B_DQS2_DP

IN

M_B_DQS3_DP

IN

M_B_DQS4_DP

IN

M_B_DQS5_DP

IN

M_B_DQS6_DP

IN

M_B_DQS7_DP

IN

M_B_DQS0_DN

IN

M_B_DQS1_DN

IN

M_B_DQS2_DN

IN

M_B_DQS3_DN

IN

M_B_DQS4_DN

IN

M_B_DQS5_DN

IN

M_B_DQS6_DN

IN

M_B_DQS7_DN

IN

CN512

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10_AP

84

A11

83

A12

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

FOX_AS0A626_U4RG_7H_204P

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_B_DQ<10>
M_B_DQ<11>
M_B_DQ<12>
M_B_DQ<13>
M_B_DQ<14>
M_B_DQ<15>
M_B_DQ<16>
M_B_DQ<17>
M_B_DQ<18>M_B_BS1
M_B_DQ<19>
M_B_DQ<20>
M_B_DQ<21>
M_B_DQ<22>
M_B_DQ<23>
M_B_DQ<24>
M_B_DQ<25>
M_B_DQ<26>
M_B_DQ<27>
M_B_DQ<28>
M_B_DQ<29>
M_B_DQ<31>
M_B_DQ<30>
M_B_DQ<36>
M_B_DQ<37>
M_B_DQ<34>
M_B_DQ<35>
M_B_DQ<32>
M_B_DQ<33>
M_B_DQ<39>
M_B_DQ<38>
M_B_DQ<41>
M_B_DQ<45>
M_B_DQ<46>
M_B_DQ<42>
M_B_DQ<44>
M_B_DQ<40>
M_B_DQ<43>
M_B_DQ<47>
M_B_DQ<48>
M_B_DQ<53>
M_B_DQ<54>
M_B_DQ<55>
M_B_DQ<49>
M_B_DQ<52>
M_B_DQ<51>
M_B_DQ<50>
M_B_DQ<58>
M_B_DQ<61>
M_B_DQ<62>
M_B_DQ<63>
M_B_DQ<57>
M_B_DQ<56>
M_B_DQ<59>
M_B_DQ<60>

P3V3S

M_B_DQ<0>
M_B_DQ<1>
M_B_DQ<7>
M_B_DQ<3>
M_B_DQ<4>
M_B_DQ<5>
M_B_DQ<6>
M_B_DQ<2>
M_B_DQ<8>
M_B_DQ<9>

C781

2 1

1uF_6.3V_2

DIMM_DRAMRST#

0.5A

C777

2 1

4.32A

2 1

22uF_6.3V_5

C789

2 1

2.2uF_16V_3

R739

21

19
19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI
BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

19

BI

P1V5

P0V75S_DIMM1_VREF_DQ

0.5A

C667

C784

P3V3S

C811

2 1

C783

2 1

2 1

2 1

0.1uF_16V_2

0.1uF_16V_2

0.1uF_16V_2

C668

2 1

2.2uF_16V_3

0.1uF_16V_2

P0V75S_DIMM1_VREF_DQ

R642

2 1

R665

P0V75M_VREF

21

C779

C778

2 1

1uF_6.3V_2

17

24

IN

P0V75S_DIMM1_VREF_CA

P1V5

P0V75S_DIMM1_VREF_CA

R740

1K_1%_21K_1%_2

2 1

0_5%_2_DY0_5%_2_DY

Note :
SO-DIMMA SPD Address is 0xA4

SO-DIMMA TS Address is 0x34

R809

10K_5%_2

2 1

SA1_DIM1

SA0_DIM1

25

IN

25

IN

R643

1K_1%_2 1K_1%_2

2 1

CPUDDR_WR_VREF2_M

R666

21

0_5%_2

R738

2 1

R808

10K_5%_2

2 1

SANDY BRIDGE + IVY BRIDGE DG4.14

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

DDR3 - 2

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

25

of

1

DOC.NUMBER

CODE

REV

X01

57

D

B

8 7

P3V3AL_RTC_BAT

CN4400

2 1

-

+

HDA_SYNC

21

R14086

IN

OUT

1K_5%_2

330_5%_2

ME_FLASH_EN

HDA_SDO_PCH

PCH_SPI_CS0#
PCH_SPI_SO

LOTES_AAA_BAT_063_P02_A_2P

6026B0219701

44

BI

26

26

BIOS ROM 4MB
MXIC_MX25L3206EM2I-12G

WINBOND_W25Q32BVSSIG

8

P3V3AL

21

P3V3_RTC

A2A1

3

C

21

BAT54C_30V_0.2A

21

IN

IF USE U9
D4400 OPEN

VBAT

HDA_SYNC_Q

R4705

1M_5%_2

2 1

35

OUT

16

2

SSM3K7002FU

D4400

R4400

R4704

33_5%_2

Flash Descriptor Security Overide

HDA_SDO_PCH :
High : Enable
Low : Disable

P3V3A

R991

21

3.3K_5%_2

U520

1

CE#

2

HOLD#

SO

3

WP#

4

VSS

ACES_91960_0084L_8P
6026B0150101

( BIOS & EC ROM VENDOR MUST SAME )

P/N : 6019B0794701
P/N : 6019B0704901

7 6

VDD

SCK

P5V0S

SI

1

Q565

G

3

DS

P3V3S

44

8
7
6

PCH_SPI_CLK_ROM

5

6011B0082901_ DY

AMC_AZ2015_01H_SOD52 3_2P_DY

P3V3A

R4706

2 1

1K_5%_2_DY

OUT

P3V3A

21

P3V3_RTC

EMI

D508

2 1

C859

EMI

1K_5%_2

AMC_AZ2015_01H_SOD523_2P_DY

6011B0082901_DY

R873

21

HDA_SDO

R945

2 1

3.3K_5%_2

R879

0_5%_2

6 5

R910

21

20K_5%_2

R964

21

20K_5%_2

R969

2 1

1uF_6.3V_2

2 1

D509

21

44

C878

1M_5%_2

2 1

330K_5%_2

44

OUT

HDA_SYNC_PCH

44

OUT

44

OUT

HDA_SDIN0

IN

P5V0S

1

Q553

G

SSM3K7002FU

2

C928

2 1

22pF_50V_2

HDA_SDO_R

3

DS

EMI

2 1

AMC_AZ2015_01H_SOD52 3_2P_DY

6011B0082901_ DY

C923

0.1UF_16V_2

21

PCH_SPI_CLK

PCH_SPI_SI

26

IN

26

IN

26

26

26

26

R958

21

C860

21

2 1

1uF_6.3V_2

1 2

PAD402

POWERPAD2X2M_DY

10M_5%_2_DY

R906

0_5%_2

XTAL32RTC_IN

21

XTAL32RTC_OUT

1uF_6.3V_2

R898

HDA_BITCLK

21

P3V3_RTC_RTCRST#

P3V3_RTC_SRTCRST#

PCH_INTVRMEN

R1086

HDA_BITCLK_PCH

21

33_5%_2

PCSPKR

P3V3A

26

26

26

26

26

PCH_SPI_CLK

PCH_SPI_CS1#

PCH_SPI_SI

PCH_SPI_SO

R975

33_5%_2

R952

33_5%_2

1K_5%_2_DY

26

26

26

OUT
OUT
OUT

OUT

IN

21

21

R953

R976

R857

51_5%_2

OUT
OUT
OUT

PCH_SPI_CLK

PCH_SPI_CS0#

PCH_SPI_CS1#

PCH_SPI_SI

PCH_SPI_SO

HDA_RST#_PCH

HDA_SDO_PCH

GPIO33

21

GPIO13

21

10K_5%_2

PCH_TCK

21

PCH_TMS

PCH_TDI

PCH_TDO

R947

0_5%_2

R946

0_5%_2

R948

0_5%_2

R989

0_5%_2

21

21

21

21

HDA_RST#

D510

BI BI
BI BI
BI
BI

1

4

RTC_32K_IN

A20
C20
D20
G22
K22
C17

N34

L34
T10
K34

E34
G34
C34
A34

A36

C36
N32

J3
H7
K5

H1

T3

Y14

T1

V4
U3

HSPI_CLK

HSPI_CS0#

HSPI_SI

HSPI_SO

5 4

4

2 1

18PF_50V_2_DY

X501

32.768KHZ_DY
6018A0001401_DY

3 2

U519

RTCX1

RTCX2

RTCRST#

SRTCRST#

INTRUDER#

INTVRMEN

HDA_BCLK

HDA_SYNC

SPKR

HDA_RST#

HDA_SDIN0

HDA_SDIN1

HDA_SDIN2

HDA_SDIN3

HDA_SDO

HDA_DOCK_EN#/GPIO33

HDA_DOCK_RST#/GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CLK

SPI_CS0#

SPI_CS1#

SPI_MOSI

SPI_MISO

ITL_PANTHERPOINT_FCBGA_989P

BI
BI

IN

2

18PF_50V_2_DY

16

RTC

IHDA

JTAG

SPI

35

35

35

35

C874

C875

3 2 1

For DB build
HM75 QPEG Q0
BD82PPSM

1

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LPC

SATA

LDRQ1#/GPIO23

SATA 6G

SATA3RCOMPO

SATA0GP/GPIO21

SATA1GP/GPIO19

LDRQ0#

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

P3V3A

PCH_TMS

26

IN

PCH_TDI

26

IN

PCH_TDO

26

IN

CHANGE by

XXX

P/N : 6019B0919101

LPC_AD<0>

C38

LPC_AD<1>

A38

LPC_AD<2>

B37

LPC_AD<3>

C37

LPC_FRAME#

D36
E36

1

K36
V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11
Y10

AB12
AB13

AH1

P3
V14
P1

R851

210_1%_2

R927

210_1%_2

R863

210_1%_2

R864

2 1

100_1%_2

R928

2 1

100_1%_2

R853

2 1

100_1%_2

TP30

TP4700

SERIRQ

SATA_HDD_RX_DN
SATA_HDD_RX_DP
SATA_HDD_TX_DN
SATA_HDD_TX_DP

SATA_ODD_RX_DN
SATA_ODD_RX_DP
SATA_ODD_TX_DN
SATA_ODD_TX_DP

SATAICOMPO

SATA3RCOMPO

SATA3RBIAS

LED_SATA#

2nd_WLAN_RF_OFF#

BBSTRAP0

21

21

21

37.4_1%_2

49.9_1%_2

750_1%_2

DATE

2 1

10K_5%_2

R934

21

R935

21

R890

21

21-OCT-2002

23

35

46

BI

35

46

BI

35

46

BI

35

46

OUT

OUT
OUT

OUT
OUT

BI

35

R876

35

BI

40

IN

40

IN

40
40

40

IN

40

IN

40
40

P3V3S

46

P1V05S_PCH

D506

AMC_AZ2015_01H_SOD523_2P_DY

6011B0082901_DY

R934,R935
WITHIN 500 MILS
OF THE PCH

P3V3S

R881

2 1

10K_5%_2

OUT
OUT

R933

21

10K_5%_2

IN

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PCH - 1

CODE

SIZE

A3

CS

1310xxxxx-0-0

SHEET

EMI

D505

2 1

EMI

21

AMC_AZ2015_01H_SOD523_2P_DY

6011B0082901_DY

36

46

30

DOC.NUMBER

26 57

D

6011B0082901_ DY

AMC_AZ2015_01H_SOD52 3_2P_DY

CC

B

D507

EMI

21

AA

REV

of

X01

1

8 7

6 5

4

3 2 1

P3V3A

0.1uF_16V_2

IN

IN
OUT
OUT

IN

IN
OUT
OUT

IN

IN
OUT
OUT

PCIE_WLAN_RX_C_DN
PCIE_WLAN_RX_C_DP
PCIE_WLAN_TX_C_DN
PCIE_WLAN_TX_C_DP

PCIE_CR_RX_C_DN
PCIE_CR_RX_C_DP
PCIE_CR_TX_C_DN
PCIE_CR_TX_C_DP

PCIE_LAN_RX_C_DN
PCIE_LAN_RX_C_DP
PCIE_LAN_TX_C_DN
PCIE_LAN_TX_C_DP

P3V3S

R878

10K_5%_2

R887

10K_5%_2_DY

R4739

10K_5%_2

D

R1030

10K_5%_2

R14067

10K_5%_2_DY

21

21

21

21

21

CLKREQ_WLAN#

CLKREQ_CR#

EDID_SELECT#

DGPU_PRSNT#

DGPU_PRSNT#

IN

IN

IN

IN

IN

P3V3A

R4742

10K_5%_2

R4880

1K_5%_2

21

21

CLKREQ_LAN#

PCH_DDR_RST

IN

IN

46
46
46
46

27

46

27

43

43

27

43
43
43

27

27

41
41
41
41

27

41

17

27

21

C915

C914

C939

C940

C917

C916

21
21

0.1uF_16V_2

0.1uF_16V_2

21
21

0.1uF_16V_2

0.1uF_16V_2

21
21

0.1uF_16V_2

PCIE_WLAN_TX_DN

PCIE_WLAN_TX_DP

PCIE_CR_TX_DN

PCIE_CR_TX_DP

PCIE_LAN_TX_DN

PCIE_LAN_TX_DP

P3V3A

R856

21

46
46

43
43

B

41
41

P3V3A P3V3S

2.2K_5%_2

2.2K_5%_2

21

BI

BI
BI

BI

PCH_3S_SMCLK

PCH_3A_SMCLK

PCH_3S_SMDAT

PCH_3A_SMDAT

24

25

27

24

25

27

2.2K_5%_2

R916

R915

21

8

CLK_PCIE_WLAN_DN

OUT

CLK_PCIE_WLAN_DP

OUT

CLK_PCIE_CR_DN

OUT

CLK_PCIE_CR_DP

OUT

CLK_PCIE_LAN_DN

OUT

CLK_PCIE_LAN_DP

OUT

P3V3S

2.2K_5%_2

R908

R909

21

21

2

SSM3K7002FU

DS

3
2

SSM3K7002FU

DS

3

G

Q547

G

Q548

7 6

10K_5%_2

P3V3A

1

1

R1048

R1050

27

46

IN

R1044

R1046

27

43

IN

R1049

R1047

41

R911

10K_5%_2

R4755

R858

R932

R921

0_5%_2

21
21

0_5%_2

0_5%_2

21
21

0_5%_2

0_5%_2

21
21

0_5%_2

27

IN

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

GPIO73

CLK_PCIE_WLAN_R_DN

CLK_PCIE_WLAN_R_DP

CLKREQ_WLAN#

CLK_PCIE_CR_R_DN

CLK_PCIE_CR_R_DP

CLKREQ_CR#

CLK_PCIE_LAN_R_DN

CLK_PCIE_LAN_R_DP

CLKREQ_LAN#

GPIO26

GPIO44

GPIO56

GPIO45

GPIO46

U519

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34
BG37

BH37

AY36

BB36

BJ38
BG38
AU36
AV36

BG40

BJ40

AY40
BB40

BE38
BC38

AW38

AY38

AB49
AB47

AA48
AA47

AB42
AB40

AK14
AK13

PETP4

PERN5
PERP5
PETN5
PETP5

PERN6
PERP6
PETN6
PETP6

PERN7
PERP7
PETN7
PETP7

PERN8
PERP8
PETN8
PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE1N
CLKOUT_PCIE1P

M1

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE2N
CLKOUT_PCIE2P

V10

PCIECLKRQ2#/GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4#/GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5#/GPIO44

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ#/GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6#/GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7#/GPIO46

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

ITL_PANTHERPOINT_FCBGA_989P

PCI-E*

5 4

GPIO11

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SMBUS

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

E12
H14
C9

A12
C8
G12

PCH_3A_SMCLK

PCH_3A_SMDAT

PCH_DDR_RST

TP_SMBUS_CLK

TP_SMBUS_DAT

TP SMB(I2C) ADDRESS IS 0X2C

GPIO74

C13
E14
M16

M7

T11

P10

PCH_THM_SMCLK

PCH_THM_SMDAT

P3V3A

Link

SML1ALERT#/PCHHOT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

Controller

H47

CHANGE by

M10

AB37
AB38

CLK_DMI_PCH_DN

AV22

CLK_DMI_PCH_DP

AU22

AM12
AM13

CLKIN_DMI_PCH_DN

BF18

CLKIN_DMI_PCH_DP

BE18

CLKIN_BUF_CPYCLK_DN

BJ30

CLKIN_BUF_CPYCLK_DP

BG30

CLKIN_BUF_DOT96_DN

G24

CLKIN_BUF_DOT96_DP

E24

CLKIN_SATA_DN

AK7

CLKIN_SATA_DP

AK5

CLKIN_BUF_REF14

K45

H45

0_5%_2

V47
V49

PCH_XCLK_RCOMP

Y47

K43
F47

K49

XXX

CLK_PEG_DN
CLK_PEG_DP

R912

21

R980
R981

R984
R1004

R973
R972

R937
R936

R1036

CLKIN_PCI_FB

PCH_25M_IN

XTAL25PCH_IN

XTAL25PCH_OUT

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N

CLOCKS

FLEX CLOCKS

CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

2 1

21

R996

10K_5%_2

CLKREQ_GPU#

OUT
OUT

OUT
OUT

EDID_SELECT#

DGPU_PRSNT#

R918

10K_5%_2

BI
BI

OUT

BI
BI

R917

10K_5%_2

BI
BI

48
48

17
17

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

R1043

90.9_1%_2

DATE

21-OCT-2002

27

27

17

21

47

47

21

35

35

IN
IN

P1V05S_PCH

21

IN

OUT

23

27

TP_SMBUS_CLK

TP_SMBUS_DAT

P3V3A

PCH_THM_SMCLK

PCH_THM_SMDAT

DGPU_PWR_EN

1

Q554

G

SSM3K7002FU

2

3

DS

XTAL25PCH_OUT

30

XTAL25PCH_IN

16

C962

6018B0044501_DY

2 1

27

27

27PF_50V_2_DY

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PCH - 2

CODE

SIZE

CS

A3

SHEET

IN

1M_5%_2_DY

1

4

X503

25MHZ_DY

DOC.NUMBER

1310xxxxx-0-0

R854

2 1

of

P3V3A

21

R965

30

R1041

2.2K_5%_2

P3V3A

2.2K_5%_2

3
2

5727

1

R922

2 1

D

21

R977

2.2K_5%_2 2.2K_5%_2

5552

CC

B

21

AA

C965

2 1

27PF_50V_2_DY

REV

X01

8 7

6 5

4

3 2 1

U519

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT/GPIO31

E10

BATLOW#/GPIO72

A10

RI#

ITL_PANTHERPOINT_FCBGA_989P

FDI_RXN0

FDI_RXN1

FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0

FDI_RXP1

FDI_RXP2

DMI

System Power Management

FDI

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SLP_S5#/GPIO63

SLP_LAN#/GPIO29

FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SUSCLK/GPIO62

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

IN
IN
IN
IN

IN
IN
IN
IN

OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT

R983

R982

DMI_RX0_DN
DMI_RX1_DN
DMI_RX2_DN
DMI_RX3_DN

DMI_RX0_DP
DMI_RX1_DP
DMI_RX2_DP
DMI_RX3_DP

DMI_TX0_DN
DMI_TX1_DN
DMI_TX2_DN
DMI_TX3_DN

DMI_TX0_DP
DMI_TX1_DP
DMI_TX2_DP
DMI_TX3_DP

PCH_DMI_ZCOMP

21

PCH_DMI2RBIAS

21

18
18
18
18

18
18

D

P1V05S_PCH

R983
WITHIN 500 MILS
OF THE PCH

18
18

18
18
18
18

18
18
18
18

49.9_1%_2

750_1%_2

P3V3S

R907

R868

R930

0_5%_2

R4782

0_5%_2

R926

0_5%_2

R966

R913

R849

PCH_SUSACK#

21

PCH_SYSRESET#

21

21

21

21

GPIO31

GPIO72

PM_RI#

SUS_PWR_DN_ACK

28

35

IN

17

28

IN

IN

OUT

IN

OUT

IN

PVCORE_PG

SB_PWRGD

PM_DRAM_PWRGD

RSMRST#

SUS_PWR_DN_ACK

SB_PWRBTN#

2 1

12

14

35

28

P3V3A

35

35

35

B

0.1uF_16V_2_DY

C877

0_5%_2_DY

10K_5%_2

2 1

10K_5%_2

2 1

10K_5%_2

2 1

10K_5%_2

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16
AV12
BC10
AV14
BB10

A18

E22

B9K3

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_TX0_DN
FDI_TX1_DN
FDI_TX2_DN
FDI_TX3_DN
FDI_TX4_DN
FDI_TX5_DN
FDI_TX6_DN
FDI_TX7_DN

FDI_TX0_DP
FDI_TX1_DP
FDI_TX2_DP
FDI_TX3_DP
FDI_TX4_DP
FDI_TX5_DP
FDI_TX6_DP
FDI_TX7_DP

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

PCH_DSWVRMEN

PCI_CLKRUN#

R861

R862

R860

GPIO29

R971

0_5%_2

TP4702

1

R4795

10K_5%_2

OUT
OUT
OUT
OUT
OUT

TP30

IN
IN
IN
IN
IN
IN
IN
IN

IN
IN
IN
IN
IN
IN
IN
IN

18
18
18
18
18
18
18
18

18
18
18
18
18
18
18
18

18

18

18

18

18

21

8.2K_5%_2

21

0_5%_2_DY

21

0_5%_2

21

0_5%_2

21

RSMRST#

PCIE_WAKE#

R867

21

SLP_S4#

SLP_S3#

H_PM_SYNC

OUT

OUT

OUT

D

P3V3_RTC

R956

2 1

28

35

IN

28

IN

35

35

17

41

P3V3S

P3V3A

R957

2 1

330K_5%_2_DY 330K_5%_2

CC

B

P3V3A

IN

IN

SUS_PWR_DN_ACK

PCIE_WAKE#

28

35

28

41

R959

10K_5%_2

R850

1K_5%_2

21

21

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PCH - 3

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5728

8 7

P3V3S

6 5

4

3 2 1

AF37
AF36

AE48
AE47

AK39
AK40

AN48

AM47

AK47

AJ48

AN47

AM49

AK49

AJ47

AF40
AF39

AH45
AH47
AF49
AF45

AH43
AH49
AF47
AF43

U519

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

ITL_PANTHERPOINT_FCBGA_989P

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK
SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

LVDS

CRT

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_CTRLCLK
DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P

Digital Display Interface

DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_CTRLCLK
DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

PCH_HDMI_CLK

M43

PCH_HDMI_DAT

M36

AT45
AT43

PCH_HDMI_HPD

BH41

PCH_HDMI_TX2_DN

BB43

PCH_HDMI_TX2_DP

BB45

PCH_HDMI_TX1_DN

BF44

PCH_HDMI_TX1_DP

BE44

PCH_HDMI_TX0_DN

BF42

PCH_HDMI_TX0_DP

BE42

PCH_HDMI_TXCL_DN

BJ42

PCH_HDMI_TXCL_DP

BG42

D

P3V3S

SSM3K7002FU

1

R834

1M_5%_2

PCH_HDMI_HPD

29

OUT

2 1

Q543

G

2

DS

HDMI_HPD

3

21

39

IN

CC

R831

20K_5%_2

39

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

BI

39

BI

29

IN

39
39
39
39
39
39
39
39

B

AA

OUT
OUT

OUT
BI

BI

R979

PCH_LCD_BKEN
PCH_LCDVDD_EN

PCH_LCD_PWM

PCH_LCD_CLK
PCH_LCD_DAT

PCH_LVD_IBG

38

D

R1001

2 1

2.2K_5%_2

38

38

R1045

38

2 1

2.2K_5%_2

38

2 1

2.37K_1%_2

38
38

38
38
38

38
38
38

OUT
OUT
OUT

PCH_CRT_B
PCH_CRT_G
PCH_CRT_R

37

OUT

37

OUT

21

150_1%_2

21

150_1%_2

21

150_1%_2

PCH_CRT_HSYNC
PCH_CRT_VSYNC

R1035
R1037
R1039

37
37
37

B

PCH_LCD_TXACL_DN

OUT

PCH_LCD_TXACL_DP

OUT

PCH_LCD_TXA0_DN

OUT

PCH_LCD_TXA1_DN

OUT

PCH_LCD_TXA2_DN

OUT

PCH_LCD_TXA0_DP

OUT

PCH_LCD_TXA1_DP

OUT

PCH_LCD_TXA2_DP

OUT

37
37

R1002
MINIMUM SPACING
OF 30 MILS

PCH_CRT_CLK

OUT

PCH_CRT_DAT

OUT

0_5%_2

R4804

21
21

R4805

0_5%_2

CLOSE TO PCH

PCH_CRT_HSYNC_PCH

PCH_CRT_VSYNC_PCH

PCH_DAC_IREF

R1002

1K_1%_2

2 1

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PCH - 4

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5729

8 7

6 5

4

3 2 1

30

26

D

30

30

P3V3S

GPIO55

IN

GPIO55 : TOP-BLOCK SWAP OVERRIDE
LOW=A16 SWAP OVERRIDE

HIGH=DEFAULT

BBSTRAP0

IN

BBSTRAP1

IN

DGPU_PWM_SELECT#

IN

BBSTRAP0
0
0
1
1

0
1
0
1

R1027

10K_5%_2

R1025

10K_5%_2

R1020

10K_5%_2

R14066

10K_5%_2

R14063

10K_5%_2

R14065

10K_5%_2

R14064

10K_5%_2

DGPU_HOLD_RST#

21

21

DGPU_SELECT#

21

DGPU_PWR_EN#

21

USB30_SMI#

21

ACCEL_INT#

21

21

B

IN

DGPU_PWR_EN#

30

55

P3V3A

BUF_PLT_RST#

17

3546

OUT

R1064

2 1

100K_5%_2

8

R1031

1K_5%_2_DY

R875

1K_5%_2_DY

R1029

1K_5%_2_DY

R999

1K_5%_2_DY

BOOT BIOSBBSTRAP1

LPC

Reserved (NAND)

-­SPI

GPIO3

GPIO4

P3V3S

10K_5%_2

R1022

21

DGPU_PWR_EN

3

DS

G

1

2

0.1uF_16V_2

5

U527

+

4

1
2

-

TC7SZ08FU

3

PLT_RST#

21

21

21

21

30

48

IN

30

IN

30

55

IN

30

IN

30

IN

P3V3S

27

5552

SSM3K7002FU

Q555

OUT

P3V3A

30

41

4348

OUT

OUT
OUT

OUT

41

CLK_LPC_EC
CLKIN_PCI_FB

CLK_LPC_DEBUG

43

48

C1005

35
27

46

21

30

IN

7 6

R403
R401
R402
R400

PLT_RST#

R923

47

47

47

47

30

48

30
30

55

30
30

IN

IN

OUT

OUT

21
21
21
21

OUT
OUT
OUT

30

IN

OUT

IN

30

IN

30

IN

10K_5%_2_DY

R1026

R1033

R997

22_5%_2

USB3_P1_RX_DN

USB3_P1_RX_DP

USB3_P1_TX_DN

USB3_P1_TX_DP

8.2K_5%_2

8.2K_5%_2

8.2K_5%_2

8.2K_5%_2

DGPU_HOLD_RST#
DGPU_SELECT#
DGPU_PWR_EN#

BBSTRAP1
DGPU_PWM_SELECT#
GPIO55

21

22_5%_2

21
21

22_5%_2

CLK_LPC_DEBUG_R

21

U519

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

BE28

USB3RN1

BC30

USB3RN2

BE32

USB3RN3

BJ32

USB3RN4

BC28

USB3RP1

BE30

USB3RP2

BF32

USB3RP3

BG32

USB3RP4

AV26

USB3TN1

BB26

USB3TN2

AU28

USB3TN3

AY30

USB3TN4

AU26

USB3TP1

AY26

USB3TP2

AV28

USB3TP3

AW30

USB3TP4

PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#

USB30_SMI#
GPIO3
GPIO4
ACCEL_INT#

PCH_PME#

CLK_LPC_EC_R
CLKIN_PCI_FB_R

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1#/GPIO50

C44

REQ2#/GPIO52

E40

REQ3#/GPIO54

D47

GNT1#/GPIO51

E42

GNT2#/GPIO53

F46

GNT3#/GPIO55

G42

PIRQE#/GPIO2

G40

PIRQF#/GPIO3

C42

PIRQG#/GPIO4

D44

PIRQH#/GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4 OC7#/GPIO14

ITL_PANTHERPOINT_FCBGA_989P

5 4

R960
R905
R902
R967
R899
R914

R961
R903
R904
R968
R900
R920

ID3

01 0

R848

R901

ID2

ID1

0000
00001 1

0 1 0

21
21

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2_DY

ID0

0

30

30

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18

RSVD

NVRAM

PCI

RSVD19
RSVD20
RSVD21
RSVD22

RSVD23

RSVD24

RSVD25

RSVD26
RSVD27

RSVD28
RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N

USB

USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59
OC1#/GPIO40

OC2#/GPIO41

OC3#/GPIO42
OC4#/GPIO43

OC5#/GPIO9

OC6#/GPIO10

AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5

AV10
AT8
AY5

BA2
AT12

BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

PCH_USBBIAS

B33

GPIO59

A14

BOARD_ID0

K20

BOARD_ID1

B17

BOARD_ID2

C16

BOARD_ID3

L16

BOARD_ID4

A16

BOARD_ID5

D14

2ND_WWAN_GPS_OFF#

C14

USB_P0_DN
USB_P0_DP
USB_P1_DN
USB_P1_DP

USB_P5_DN
USB_P5_DP

USB_P8_DN
USB_P8_DP
USB_P9_DN
USB_P9_DP

30

30

30

30

30

30

38

30

30

30

30

30

30

38

R951
WITHIN 500 MILS
OF THE PCH

CLOSE TO PCH

R951

22.6_1%_2

GPIO59

OUT

2ND_WWAN_GPS_OFF#

OUT

BOARD_ID0

OUT

BOARD_ID1

OUT

BOARD_ID2

OUT

BOARD_ID3

OUT

BOARD_ID4

OUT

BOARD_ID5

OUT

BOARD_ID0

OUT

BOARD_ID1

OUT

BOARD_ID2

OUT

BOARD_ID3

OUT

BOARD_ID4

OUT

BOARD_ID5

OUT

BOARD_ID5 ONLY FOR WEBCAN USE
FOR HD WEB CAM BOARD_ID5 PULL P3V3A
FOR VGA WEB CAM BOARD_ID5 PULL GND

ID4ID5

UMA-INTEL

1

SG-SEYMOUR
SG-THAMES

47

BI

USB3.0

47

BI

47

BI

USB2.0 DB (DeBug Port)

47

BI

38

BI

WEBCAM

38

BI

46

BI

WLAN COMBO

46

BI

47

BI

USB2.0 DB (DeBug Port)

47

BI

21

30

IN

30

IN

30

IN

30

IN

30

IN

30

IN

30

38

IN

30

IN

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PCH - 5

DOC.NUMBER

CODE

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

A3

CS

1310xxxxx-0-0

SHEET

10K_5%_2

10K_5%_2

of

1

P3V3A

D

CC

B

AA

REV

X01

5730

8 7

6 5

4

3 2 1

10K_5%_2

R14080

390_5%_2

OUT

21

P3V3S

17

IN

IN

OUT

PM_THRMTRIP#

D

P1V05S_CPU

35

31

35

17

R14081

2 1

56_5%_2_DY

17

IN

CC

B

AA

P3V3A

10K_5%_2

OUT

OUT

WLAN_RF_OFF#

BTOFF

GPIO24

31

46

31

D

GPIO15

OUT
OUT

OUT
OUT
OUT
OUT
OUT

14

OUT

31

OUT

PCI_SERR#

DGPU_HPD_INTR#

ODD_PRSNT#

GPIO37

HDD_LOCK_LED

TEMP_ALERT#

KB_RST#

DGPU_PWROK

GPIO37

31

35

31

31

40

31

31

31

31

35

31

3552

R924

R1088

R1081
R1082

R880
R974

R886

21

R866

21

R1080

21

R882

21

R870

21

R995

100K_5%_2_DY

R865

100K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

200K_5%_2

1K_5%_2_DY

10K_5%_2_DY

10K_5%_2

10K_5%_2

21

21

P3V3S

P3V3S

P3V3A

P3V3S

P3V3S

2 1

1K_5%_2_DY

R883

2 1

10K_5%_2

3552

R872

2 1

10K_5%_2

R963

2 1

10K_5%_2_DY

2 1

R874

2 1

R871

46

35

R847

31

31

R877
R869
R925

40

10K_5%_2

10K_5%_2

31

31

31

31

IN

35

IN

31

IN

35

IN

OUT

14

IN

2 1

1K_5%_2_DY

2 1

10K_5%_2

2 1

10K_5%_2_DY

31

IN

31

IN

OUT
OUT
OUT

PCI_SERR#

EC_SMI#

DGPU_HPD_INTR#

EC_SCI#

GPIO8

BTOFF

GPIO15

GPIO16

DGPU_PWROK

GPIO22

GPIO24

GPIO27

GPIO28

GPIO34

GPIO35

ODD_PRSNT#

GPIO37

GPIO38

GPIO39

HDD_LOCK_LED

TEMP_ALERT#

WLAN_RF_OFF#

B

T7
A42
H36
E38
C10

C4

G2

U2

D40

T5

E8
E16

P8

K1

K4

V8

M5

N2

M3

V13

V3

D6

A4

A45
A46

A5

A6

B3
B47

BD1

BD49

BE1

BE49

BF1

BF49

U519

BMBUSY#/GPIO0

TACH1/GPIO1

TACH2/GPIO6

TACH3/GPIO7

GPIO8

LAN_PHY_PWR_CTRL/GPIO12

GPIO15

SATA4GP/GPIO16

TACH0/GPIO17

SCLOCK/GPIO22

GPIO24

GPIO27

GPIO28

STP_PCI#/GPIO34

GPIO35

SATA2GP/GPIO36

SATA3GP/GPIO37

SLOAD/GPIO38

SDATAOUT0/GPIO39

SDATAOUT1/GPIO48

SATA5GP/GPIO49/TEMP_ALERT#

GPIO57

VSS_NCTF_1

VSS_NCTF_2

VSS_NCTF_3

VSS_NCTF_4

VSS_NCTF_5

VSS_NCTF_6

VSS_NCTF_7

VSS_NCTF_8

VSS_NCTF_9

VSS_NCTF_10

VSS_NCTF_11

VSS_NCTF_12

VSS_NCTF_13

VSS_NCTF_14

ITL_PANTHERPOINT_FCBGA_989P

GPIO

GPIO68

RCIN#

DF_TVS

NC_1

C40

GPIO69

B41
C41

GPIO71

A40

A20GATE

P4

PCH_PECI

AU16

PECI

KB_RST#

P5

H_CPUPWRGD

AY11

PM_THRMTRIP#_PCH

AY10
T14

NV_CLE

AY1
AH8
AK11
AH10
AK10
P37

BG2
BG48
BH3
BH47
BJ4
BJ44A44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

TACH4/GPIO68

TACH5/GPIO69

TACH6/GPIO70

TACH7/GPIO71

A20GATE

PROCPWRGD

THRMTRIP#

INIT3_3V#

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

NCTF

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

R994
R992

10K_5%_2

R993

10K_5%_2

1

21
21

21

TP312

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PCH - 6

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5731

8 7

6 5

4

3 2 1

P1V05S_PCH

D

1.61A

+

C4783

C904

2 1

220uF_2V_DY

C897

2 1

2 1

10UF_6.3V_3

1uF_6.3V_2

C889

C892

2 1

2 1

1uF_6.3V_2

1uF_6.3V_2

P1V05S_PCH

P1V05S_PCH

L520

21

3.8A

0603_DY

P1V05S_PCH

C851

2 1

3.8A

10uF_6.3V_5_DY

C4722

C937

C907

2 1

2 1

10UF_6.3V_3

2 1

1uF_6.3V_2

1uF_6.3V_2

C887

C905

2 1

1uF_6.3V_2

C866

2 1

2 1

1uF_6.3V_2

1uF_6.3V_2

P3V3S

R941

0_5%_2_DY

C911

2 1

21

178MA

0.1uF_16V_2

B

P1V5S_VCCAFDI_VRM

P1V05S_PCH

P1V05S_PCH

147mA

P1V05S_PCH

47mA

8

7 6

AU20 SOURCE IS
P1V05S_CPU

U519

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3] VCCDFTERM[2]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

ITL_PANTHERPOINT_FCBGA_989P

POWER

VCC CORE

VCCIO

FDI

P1V5S_VCCAFDI_VRM P1V5S

POWERPAD1X1M

5 4

CRT

LVDS

DMI HVCMOS

NAND / SPI

PAD4700

1 2

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCTX_LVDS[3]

VCCTX_LVDS[4]

VCCDFTERM[1]

VCCDFTERM[3]

VCCDFTERM[4]

21

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCSPI

U48

P3V3S_PCH_VCCADAC

U47

AK36
AK37

AM37
AM38

P1V8S_PCH_VCCTX_LVDS

AP36
AP37

V33

V34

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

V1

178mA

P3V3S

2mA

CHANGE by

1mA

P3V3S

C888

P1V8S

C903

2 1

P1V5S_VCCAFDI_VRM

2 1

0.1uF_16V_2

0.1uF_16V_2

XXX

147mA

10mA

C959

C945

P3V3A

C849

2 1

2 1

2 1

1uF_6.3V_2

C961

0.01uF_50V_2

C949

0.01uF_50V_2

P1V05S_PCH

75mA

DATE

2 1

0.1uF_16V_2

2 1

0.01uF_50V_2

C933

2 1

21-OCT-2002

L528

MLZ1608M100WT

250mA_0603

C960

2 1

L526

FBM_11_160808_121T

200mA_0603

C1000

2 1

22uF_6.3V_5 22uF_6.3V_5

P1V05S_PCH

47mA

C935

2 1

1uF_6.3V_2_DY

INVENTEC

TITLE

CODE

SIZE

CS

A3

23

P3V3S

63mA

21

P1V8S

40mA

21

AT20 SOURCE IS
P1V05S_CPU

1uF_6.3V_2

MODEL,PROJECT,FUNCTION

PCH - 7

DOC.NUMBER

1310xxxxx-0-0

SHEET

of

5732

1

REV

X01

D

CC

B

AA

D

B

P3V3S

C931

C963

2 1

2 1

0.1uF_16V_2

P1V05S_PCH

L530

MLZ1608M100WT

250mA_0603

MLZ1608M100WT

250mA_0603

P1V05S_PCH

BJ8 SOURCE IS
P1V05S_CPU

8 7

178mA

P1V05S_PCH

10uF_6.3V_5

R4874

21

0_5%_2_DY

P1V05S_PCH

803mA

C909

C910

2 1

2 1

22uF_6.3V_5

L531

75mA

21

75mA

21

P1V05S_PCH_VCCADPLLA

C967

C966

2 1

2 1

22uF_6.3V_5

2.2uF_6.3V_3

P1V05S_PCH_VCCADPLLB

C938

C973

2 1

2 1

22uF_6.3V_5

2.2uF_6.3V_3

P1V05S_PCH

50mA

P1V05S_PCH

95mA

P1V05S_PCH

2mA

C918

C919

C912

2 1

8

4.7uF_6.3V_3

2 1

2 1

0.1uF_16V_2

0.1uF_16V_2

P3V3A

1mA

C882

2 1

0.1uF_16V_2

C899

C895

2 1

2 1

10UF_6.3V_3

C968

2 1

0.1uF_16V_2

C974

2 1

0.1uF_16V_2

1uF_6.3V_2

1uF_6.3V_2

P1V05S_PCH

0.1uF_16V_2_DY

1uF_6.3V_2_DY

C898

2 1

1uF_6.3V_2

P1V5S_VCCAFDI_VRM

C900

2 1

C891

2 1

C896

2 1

C893

2 1

C883

P3V3_RTC

1mA

C857

2 1

7 6

6 5

R1051

21

0_5%_2_DY

C862

2 1

C906

2 1

C861

2 1

0.1uF_16V_2

147mA

1uF_6.3V_2

1uF_6.3V_2

1uF_6.3V_2

0.1uF_16V_2

0_5%_2_DY

R978

21

21

1uF_6.3V_2_DY

C858

C870

2 1

2 1

1uF_6.3V_2

0.1uF_16V_2

0.1uF_16V_2

U519

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3[5]

BH23

VCCAPLLDMI2

AL29

VCCIO[14]

AL24

DCPSUS[3]

AA19

VCCASW[1]

AA21

VCCASW[2]

AA24

VCCASW[3]

AA26

VCCASW[4]

AA27

VCCASW[5]

AA29

VCCASW[6]

AA31

VCCASW[7]

AC26

VCCASW[8]

AC27

VCCASW[9]

AC29

VCCASW[10]

AC31

VCCASW[11]

AD29

VCCASW[12]

AD31

VCCASW[13]

W21

VCCASW[14]

W23

VCCASW[15]

W24

VCCASW[16]

W26

VCCASW[17]

W29

VCCASW[18]

W31

VCCASW[19]

W33

VCCASW[20]

N16

DCPRTC

Y49

VCCVRM[4]

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO[7]

AF33

VCCDIFFCLKN[1]

AF34

VCCDIFFCLKN[2]

AG34

VCCDIFFCLKN[3]

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS[1]

V19

DCPSUS[2]

BJ8

V_PROC_IO

A22

VCCRTC

ITL_PANTHERPOINT_FCBGA_989P

POWER

Clock and Miscellaneous

CPU

RTC

USB

PCI/GPIO/LPCMISC

SATA

HDA

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

5 4

4

3 2 1

P1V05S_PCH

3.8A

N26
P26
P28
T27
T29

T23
T24
V23
V24
P24

T26
M26

AN23
AN24

P34

N20
N22
P20
P22

AA16
W16
T34

AJ2
AF13

AH13
AH14

AF14
AK1

AF11

AC16
AC17
AD17

T21

V21

T19

P32

0.1uF_16V_2

C885

C884

0.1uF_16V_2

C881

0.1uF_16V_2

P1V05S_PCH

P5V0A_PCH_V5REF_SUSU

C908

1uF_6.3V_2_DY

P5V0S_PCH_V5REF

C880

1uF_6.3V_2

C894

2 1

C865

C863

C864

21

1uF_6.3V_2

L519

0603_DY

P1V05S_PCH

3.8A

P1V05S_PCH

803mA

P3V3A

10mA

C886

21

2 1

1uF_6.3V_2

21

21

21

21

0.1uF_16V_2

0.1uF_16V_2

21

0.1uF_16V_2

21

21

C890

1uF_6.3V_2

CHANGE by

21

65mA

65mA

65mA

65mA

178mA

178mA

3.8A

XXX

P3V3A

P3V3A

P3V3A

P3V3A

P3V3S

P3V3S

P1V05S_PCH

P1V05S_PCH

P1V5S_VCCAFDI_VRM

147mA

DATE

21-OCT-2002

D530

BAT54_30V_0.2A

10_5%_2

C879

2 1

0.1uF_16V_2

D532

BAT54_30V_0.2A

10_5%_2

C964

2 1

1uF_6.3V_2

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PCH - 8

DOC.NUMBER

CODE

SIZE

A3

23

CS

1310xxxxx-0-0

SHEET

2

R970

NC

2

NC

R1042

P3V3A

13

P5V0A

1mA

21

D

P3V3S

13

P5V0S

21

1mA

CC

B

AA

REV

of

X01

5733

1

8 7

U519

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

D

B

8

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

ITL_PANTHERPOINT_FCBGA_989P

7 6

6 5

H46

VSS[259]

K18

VSS[260]

K26

VSS[261]

K39

VSS[262]

K46

VSS[263]

K7

VSS[264]

L18

VSS[265]

L2

VSS[266]

L20

VSS[267]

L26

VSS[268]

L28

VSS[269]

L36

VSS[270]

L48

VSS[271]

M12

VSS[272]

P16

VSS[273]

M18

VSS[274]

M22

VSS[275]

M24

VSS[276]

M30

VSS[277]

M32

VSS[278]

M34

VSS[279]

M38

VSS[280]

M4

VSS[281]

M42

VSS[282]

M46

VSS[283]

M8

VSS[284]

N18

VSS[285]

P30

VSS[286]

N47

VSS[287]

P11

VSS[288]

P18

VSS[289]

T33

VSS[290]

P40

VSS[291]

P43

VSS[292]

P47

VSS[293]

P7

VSS[294]

R2

VSS[295]

R48

VSS[296]

T12

VSS[297]

T31

VSS[298]

T37

VSS[299]

T4

VSS[300]

W34

VSS[301]

T46

VSS[302]

T47

VSS[303]

T8

VSS[304]

V11

VSS[305]

V17

VSS[306]

V26

VSS[307]

V27

VSS[308]

V29

VSS[309]

V31

VSS[310]

V36

VSS[311]

V39

VSS[312]

V43

VSS[313]

V7

VSS[314]

W17

VSS[315]

W19

VSS[316]

W2

VSS[317]

W27

VSS[318]

W48

VSS[319]

Y12

VSS[320]

Y38

VSS[321]

Y4

VSS[322]

Y42

VSS[323]

Y46

VSS[324]

Y8

VSS[325]

BG29

VSS[328]

N24

VSS[329]

AJ3

VSS[330]

AD47

VSS[331]

B43

VSS[333]

BE10

VSS[334]

BG41

VSS[335]

G14

VSS[337]

H16

VSS[338]

T36

VSS[340]

BG22

VSS[342]

BG24

VSS[343]

C22

VSS[344]

AP13

VSS[345]

M14

VSS[346]

AP3

VSS[347]

AP1

VSS[348]

BE16

VSS[349]

BC16

VSS[350]

BG28

VSS[351]

BJ28

VSS[352]

5 4

4

AA17

AA33
AA34
AB11
AB14
AB39

AB43

AC19
AC21

AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39

AD40
AD42
AD43
AD45
AD46

AD14
AD16

AF31

AG19
AG31

AG48
AH11

AH36
AH39
AH40
AH42
AH46

AK12

3 2 1

U519

H5

VSS[0]

VSS[1]

AA2

VSS[2]

AA3

VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]

AB4

VSS[9]
VSS[10]

AB5

VSS[11]

AB7

VSS[12]
VSS[13]

AC2

VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]

AD4

VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]
VSS[45]
VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]
VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]
VSS[61]

AG2

VSS[62]
VSS[63]
VSS[64]
VSS[65]

AH3

VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]
VSS[78]

AK3

VSS[79]

ITL_PANTHERPOINT_FCBGA_989P

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PCH - 9

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

1

REV

X01

5734

8 7

P3V3AL

20mA

L516

FBM_11_160808_121T

60140EA0319T

200mA_0603

21

P3V3S

R821

10K_5%_2

EC_SMI#

EC_SCI#

21

R998

10K_5%_2

21

R766

100K_5%_2

2

1 3

2

NC

1 3

2

D527

NC

DIODE-BAT54-TAP-PHP

13

21

D

31

OUT

P3V3S

31

OUT

P3V3AL

P5V0A

B

CHG_LED#

5

OUT

CHG_LED

35

IN

R10

Q102

1

G

SSM3K7002FU

( BIOS & EC ROM VENDOR MUST SAME )EC ROM 1MB

MXIC_MX25L8006EM2I-12G PN:6019B0795601

P3V3AL

EC_SPI_CS0#

35

IN

EC_SPI_SO

35

OUT

8

R773

3.3K_5%_2

21

C848

C796

2 1

2 1

0.1uF_16V_2

0.1uF_16V_2

D528

DIODE-BAT54-TAP-PHP

NC

EC_SMI#_D

D529

DIODE-BAT54-TAP-PHP

EC_SCI#_D

C792

2 1

0.1uF_16V_2

470_5%_2

2 1

5

3

DS

OUT

35

IN

2

PN:6019B0719601WINBOND_W25Q80BVSSIG

U511

1
2
3
4

VDD

CE#

HOLD#

SO

SCK

WP#

SI

VSS

ACES_91960_0084L_8P
6026B0150101

P3V3S

0.1uF_16V_2

2 1

2mA

FBM_11_160808_121T

60140EA0319T

200mA_0603

R822

C797

C817

2 1

2 1

0.1uF_16V_2

10K_5%_2

P3V3S

R767

21

10K_5%_2

31

OUT

P3V3AL

R802

21

100K_5%_2

ADP_SEL :

21

PU : 90W (SG)
PD : 65W (UMA)

R769

100K_5%_2_DY

TO TP-LED <-----

P5V0A

R14

27

560_5%_2

1

P3V3AL

21

Q103

2 1
3

DS

G

2

35

IN

35

IN

AC_LED#

AC_LED

SSM3K7002FU

C798

2 1

0.1uF_16V_2

R777

8

3.3K_5%_2

7
6

EC_SPI_CLK

5

EC_SPI_SI

7 6

6 5

L515

21

C794

2 1

0.1uF_16V_2

BI
BI
BI
BI

IN
IN
IN

OUT

BI

OUT
OUT

OUT

IN

OUT

IN
OUT
OUT
OUT
OUT
OUT

IN

IN

IN

IN
OUT

BI
BI

OUT
OUT
OUT

IN

OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

IN

IN

IN

IN

IN

IN

IN

IN

1

1
1
1

1

LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
BUF_PLT_RST#
CLK_LPC_EC
LPC_FRAME#

RSMRST#

A20GATE
SERIRQ

EC_RST#
KB_RST#
CHG_LED

ADP_SEL
RESUME_PWEN

DGPU_PWROK
GPU_THROT#
SLP_S3#
RF_AMBER_LED#
ME_FLASH_EN
ODD_PWEN#
WOL_PWEN#
TP_OFF_LED#

BATT_IN#
I_ADP
AC_OK
ADP_PRES
RF_WHITE_LED#
ADP_EN
PCH_THM_SMDAT
PCH_THM_SMCLK

EC_SPI_CLK
EC_SPI_CS0#
EC_SPI_SI
EC_SPI_SO

KSO16
KSO17
CORE_PWEN_D#

PCI_SERR#

SCAN_OUT<0>
SCAN_OUT<1>
SCAN_OUT<2>
SCAN_OUT<3>
SCAN_OUT<4>
SCAN_OUT<5>
SCAN_OUT<6>
SCAN_OUT<7>
SCAN_OUT<8>
SCAN_OUT<9>
SCAN_OUT<10>
SCAN_OUT<11>
SCAN_OUT<12>
SCAN_OUT<13>
SCAN_OUT<14>
SCAN_OUT<15>

SCAN_IN<0>
SCAN_IN<1>
SCAN_IN<2>
SCAN_IN<3>
SCAN_IN<4>
SCAN_IN<5>
SCAN_IN<6>
SCAN_IN<7>

46
46
46
46
3046

46 26

52

31

TP308

TP300
TP301
TP311

TP303

26
26
26
26
17
30

28

26

31
35

15

14

49

28

36
26
40
41
47

6
5
5
5
36

27

35
35
35

35

31

36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36

36
36
36
36
36
36
36
36

P3V3AL_EC_VSTBY

P3V3S_EC_VCC

11

114

929150

U514

10

LAD0_GPM0_3_X

9

LAD1_GPM1_3_X

8

LAD2_GPM2_3_X

7

LAD3_GPM3_3_X

13

LPCCLK_GPM4_3_X

6

LFRAME#_GPM5_3_X

17

LPCPD#_WUI6_GPE6_DN

126

GA20_GPB5_3_X

5

SERIRQ_GPM6_3_X

15

ECSMI#_GPD4_3_UP

23

ECSCI#_GPD3_UP

14

WRST#

4

KBRST#_GPB6_3_X

16

PWUREQ#_BBO_SMCLK2ALT_GPC7_3_UP

119

CRX0_GPC0_DN

123

CTX0_TMA0_GPB2_3_DN

80

DAC4_DCD0#_GPJ4_3_X

104

DSR0#_GPG6_X

33

GINT_CTS0#_GPD5_UP

88

PS2DAT1_RTS0#_GPF3_UP

81

DAC5_RIG0#_GPJ5_3_X

87

PS2CLK1_DTR0#_GPF2_UP

109

TXD_SOUT0_GPB1_UP

108

RXD_SIN0_GPB0_UP

71

ADC5_DCD1#_WUI29_GPI5_3_X

72

ADC6_DSR1#_WUI30_GPI6_3_X

73

ADC7_CTS1#_WUI31_GPI7_3_X

35

RTS1#_WUI5_GPE5_DN

34

PWM7_RIG1#_GPA7_UP

107

DTR1#_SBUSY_GPG1_ID7_DN

95

CTX1_WUI18_SOUT1_GPH2_SMDAT3_ID2_DN

94

CRX1_WUI17_SIN1_SMCLK3_GPH1_ID1_DN

105

FSCK

101

FSCE#

102

FMOSI

103

FMISO

56

KSO16_SMOSI_GPC3_3_DN

57

KSO17_SMISO_GPC5_3_DN

32

PWM6_SSCK_GPA6_UP

100

SSCE0#_GPG2_X

106

SSCE1#_GPG0_X

36

KSO0_PD0

37

KSO1_PD1

38

KSO2_PD2

39

KSO3_PD3

40

KSO4_PD4

41

KSO5_PD5

42

KSO6_PD6

43

KSO7_PD7

44

KSO8_ACK#

45

KSO9_BUSY

46

KSO10_PE

51

KSO11_ERR#

52

KSO12_SLCT

53

KSO13

54

KSO14

55

KSO15

26

VCC

VSTBY

VSTBY

VSTBY

VSTBY

CIR

UART port

EXTERNAL SERIAL FLASH

SPI ENABLE

KSI5

KSI4

KSI3_SLIN#

KSI2_INIT#

KSI1_AFD#

KSI0_STB#

6261605958

5 4

121

VSTBY

LPC

KBMX

KSI6

4

1

127

74

3

VBAT

AVCC

VSTBY

19

838482

EGAD_WUI25_GPE1_DN

EGCS#_WUI26_GPE2_DN

EGCLK_WUI27_GPE3_DN

L80HLAT_BAO_WUI24_GPE0_DN

GPIO

ITE_ITE8517E_G_LQFP_128P

122

113

VSS

VSS

VSS

KSI7

656463

VSS

1

49

27

122

113

TP24

20

L80LLAT_WUI7_GPE7_UP

WAKE UP

AVSS

75

LID_SW#
SB_PWRBTN#
USBPWR_EN

TP306

CAPS_LED#

HSPI_SI
HSPI_SO
HSPI_CLK
HSPI_CS0#
SB_PWRGD

93

HSCE#_WUI19_GPH3_ID3_DN

CLKRUN#_WUI16_GPH0_ID0_DN

A/D D/A

SM BUS

PECI_SMCLK2_WUI22_GPF6_3_UPLPCRST#_WUI4_GPD2_UP

PS/2

PWM

CLOCK

100K_5%_2

SMDAT2_WUI23_GPF7_3_UP

979699

98

HSCK_GPH4_ID4_DN

HMOSI_GPH6_ID6_DN

HMISO_GPH5_ID5_DN

RING#_PWRFAIL#_CK32KOUT_LPCRST#_GPB7_DN

VCORE

12

C816

2 1

0.1uF_16V_2

CHANGE by

3 2 1

38

47

IN

28

OUT

47

OUT

36

R303

21

SMCLK0_GPB3_X
SMDAT0_GPB4_X
SMCLK1_GPC1_X
SMDAT1_GPC2_X

PS2CLK0_TMB0_GPF0_UP

PS2DAT0_TMB1_GPF1_UP
PS2CLK2_WUI20_GPF4_UP
PS2DAT2_WUI21_GPF5_UP

PWM0_GPA0_UP
PWM1_GPA1_UP
PWM2_GPA2_UP
PWM3_GPA3_UP
PWM4_GPA4_UP
PWM5_GPA5_UP

TACH0A_GPD6_3_DN

TACH1A_TMA1_GPD7_3_DN

TMRI0_WUI2_GPC4_3_DN
TMRI1_WUI3_GPC6_3_DN

PWRSW_GPE4_3_UP

RI1#_WUI0_GPD0_3_UP

RI2#_WUI1_GPD1_UP

ADC0_GPI0_3_X
ADC1_GPI1_3_X
ADC2_GPI2_3_X
ADC3_GPI3_3_X

ADC4_WUI28_GPI4_3_X

TACH2_GPJ0_3_X

GPJ1_3_X
DAC2_TACH0B_GPJ2_3_X
DAC3_TACH1B_GPJ3_3_X

CK32KE_GPJ7_3_X

CK32K_GPJ6_3_X

OUT

26

OUT

26

OUT

26

OUT

26

OUT

28

OUT

110
111
115
116
11722
118

85
86
89
90

PWR_LED#

24

KB_BLON

25

CPU_PROCHOT#

28

AC_LED

29

CPUFAN1_ON#

30

EC_LCD_PWM

31

FAN_TACH1

47

ALL_PWGD_IN

48

ALWAYS_PW_EN

120

CPU_PWEN

124

125
18
21

112

MB_ID0

66

MB_ID1

67
68
69

ADP_ID

70

AMP_EN

76

WWAN_IND#

77

BT_IND

78

WLAN_IND#

79

2
128

EC_PECI
SUS_PWR_DN_ACK

CORE_PWEN#
ODD_MD#
TP_CLK
TP_DAT

EC_PWRBTN#
QWEB#
SLP_S4#

CORE_PWEN

1

TP307

R772

2.2K_5%_2

R771

2.2K_5%_2

OUT

OUT
OUT

OUT
OUT

IN
IN

OUT
OUT

IN
IN

OUT

IN
IN

IN

OUT

IN

R708

10K_5%_2

R324

10K_5%_2

21
21

IN

IN

R823
R775

23

47

28

14

35
35

5

21
21

P3V3S

THM_CLK
THM_DAT
BATT_CLK
BATT_DAT

28

15

40

21

10K_5%_2_DY

21

10K_5%_2_DY

36

47

1

12

17
35
23

1

15

17

14
15

1

15 21

THERMTRIP#

2 1

C795

44

1
1

46

P3V3S

BI
BI
BI
BI

21

R770

43_5%_2

TP305

TP310

TP309

0.1uF_16V_2

TP302
TP304

23
23
5

6

5

6

BI
BI

35

OUT

35

OUT

IN

DB

MB_ID0

0_5%_2

0_5%_2

R14102

R14103

2 1

2 1

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

ITE8517

CODE

XXX

DATE

21-OCT-2002

23

SIZE

A3

CS

1310xxxxx-0-0

SHEET

50
50

H_PECI

47

P3V3A

47

MB_ID0

MB_ID1

23

49

SI
10

0MB_ID1

0

DOC.NUMBER

35

D

17

IN

CC

P3V3AL

R828

R845

2 1

2 1

10K_5%_2_DY

10K_5%_2_DY

B

R844

R824

10K_5%_2

10K_5%_2

2 1

2 1

MV

PV

0
1

of

57

AA

1
1

REV

X01

1

8 7

6 5

4

3 2 1

R1078

21

D533

1

1 2

6011B0115101

P3V3A

D

NC

NC

2

330_5%_2

R1059

P3V3S

21

CC

B

POWER LED

KeyBoard CONN(30 pin)

CN508

OUT
OUT
OUT

IN
OUT
OUT

IN
OUT
OUT

IN

IN
OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

C790

2 1

SCAN_IN(1)
SCAN_IN(7)
SCAN_IN(6)
SCAN_OUT(9)
SCAN_IN(4)
SCAN_IN(5)
SCAN_OUT(0)
SCAN_IN(2)
SCAN_IN(3)
SCAN_OUT(5)
SCAN_OUT(1)
SCAN_IN(0)
SCAN_OUT<2>
SCAN_OUT<4>
SCAN_OUT<7>
SCAN_OUT<8>
SCAN_OUT<6>
SCAN_OUT<3>
SCAN_OUT<12>
SCAN_OUT<13>
SCAN_OUT<14>
SCAN_OUT<11>
SCAN_OUT<10>
SCAN_OUT<15>

R810

21

R815

21
21

R814

P5V0S

5

U512

+

1

2

-

TC7SET08FU

3

6019A0059801

100_5%_2

150_5%_2

150_5%_2

4

35

D

P3V3S

CAPS_LED#

35

IN

RF_W_LED#_AND

36

IN

RF_LED#_AND

36

IN

35
35
35
35
35
35
35
35

35

35

35
35
35
35
35
35
35
35
35
35
35
35
35

0.1uF_16V_2

RF_AMBER_LED#

35

IN

B

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

ACES_50690_0324N_001_32P

6012B0372601

RF_LED#_AND

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

OUT

G2

G

G1

G

36

47

26

IN

35

LED_SATA#

IN

PWR_LED#

LED_SINGLE_3PIN_B

NC

D534

NC

1

1 2

EVL_12_21_T3D_CP1Q2B12Y_2C_2P

6011B0115101

SATA LED & HDD HALTED LED

ESD

1
2

0_5%_2_DY

P5V0S

U547

TC7SET08FU

5

6019A0059801

+

-

3

R118

WHITE

4

21

2

360_5%_2

EVL_12_21_T3D_CP1Q2B12Y_2C_2P

P5V0S

C791

35

IN

2 1

0.1uF_16V_2

RF_WHITE_LED#

1

2

5

U513

+

4

-

TC7SET08FU

3

6019A0059801

RF_W_LED#_AND

OUT

36

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

KB CONN & LED

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5736

8 7

6 5

4

3 2 1

R717

21

75_1%_2_DY

R718

75_1%_2_DY

R715

75_1%_2_DY

21

21

P3V3S

21

P5V0S_CRTVDD

C3051

2 1

10uF_6.3V_5

P5V0S

U3050

15

OUTIN

2

GND

4 3

DIS EN

NUVO_NCT3521U_SOT23_5P

D

C3050

1uF_6.3V_2

2 1

R3050

1K_5%_2

CRT_R

CRT_G

CRT_B

37

37

37

37

37

OUT
OUT
OUT
OUT
OUT

CRT_R

CRT_G

CRT_B

CRT_HSYNC

CRT_VSYNC

PCH_CRT_R_CLK

PCH_CRT_R_DAT

PCH_CRT_R

29

IN

PCH_CRT_G

29

IN

PCH_CRT_B

29

IN

R716

R714

R719

150_1%_2

150_1%_2

2 1

2 1

2 1

C694

C692

150_1%_2

12pF_50V_2

2 1

2 1

FBM_10_160808_300T

FBM_10_160808_300T

FBM_10_160808_300T

C693

12pF_50V_2

12pF_50V_2

2 1

L512

L511

L513

21

21

21

P5V0S P5V0S P5V0S

21

C691

C690

C689

12pF_50V_2

12pF_50V_2

2 1

12pF_50V_2

2 1

2 1

D521

3

3

BAV99_DY

BAV99_DY

CRT_R

CRT_G

CRT_B

21

21

D519

D520

3

BAV99_DY

OUT
OUT
OUT

37

37

37

P3V3S

C674

2 1

1uF_6.3V_2

29

PCH_CRT_VSYNC

2

B

P3V3S

C695

2 1

1uF_6.3V_2

IN

PCH_CRT_HSYNC

CRT_HSYNC

CRT_VSYNC

29

37

37

2

2

3

R671

100K_5%_2

2 1

1

5

+

5

1

CRT_VSYNC

4

234

U506

-

TC7SZ126FU

3

1

5

+

5

1

CRT_HSYNC

4

234

U507

TC7SZ126FU

-

3

33_5%_2

R713

21
21

R670

1

D517

PHP_PESD5V2S2UT_SOT23_3P_DY

33_5%_2

OUTIN

OUTIN

37

37

CRT_HSYNC_CN

CRT_VSYNC_CN

OUTIN
OUT

P3V3S P5V0S_CRTVDD

R722

21

2.2K_5%_2

R672

21

2.2K_5%_2

R1112

0_5%_2

R1111

0_5%_2

21

21

PCH_CRT_R_CLK

PCH_CRT_R_DAT

2

D S

G

1

2

Q527

D S

G

1

Q528

SSM3K7002FUSSM3K7002FU

BI

PCH_CRT_CLK

PCH_CRT_DAT

29

29

37

37

2 1

2 1

2 1

2 1

2 1

2 1

2 1

CRT

37

37

2.2K_5%_2

2.2K_5%_2

3

3

0_5%_2_DY

R1107

0_5%_2_DY

R1109

0_5%_2_DY

R1108

33_5%_2_DY

R1106

33_5%_2_DY

R1100

0_5%_2_DY

R1105

0_5%_2_DY

R1101

CRT_R

37

IN

CRT_G

37

IN

CRT_B

37

IN

CRT_DAT

BI

37

IN
IN

BI

21

21

CRT_HSYNC_CN
CRT_VSYNC_CN
CRT_CLK

37

R720

R721

CRT_CLK

CRT_DAT

1

2

D518

PHP_PESD5V2S2UT_SOT23_3P_DY

3

GPU_CRT_R

GPU_CRT_G

GPU_CRT_B

GPU_CRT_HSYNC

GPU_CRT_VSYNC

GPU_CRT_CLK

GPU_CRT_DAT

P5V0S_CRTVDD

1

2
3
4
5
6
7
8

9
10
11
12
13
14
15

37

BIBI

37

BI

49

IN

49

IN

49

IN

49

IN

49

IN

49

BI

49

BI

CN502

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

SUYIN_070546HR015M251ZR_15P

G1

G

G2

G

6012B0318901

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CRT CONN

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5737

8 7

6 5

4

3 2 1

P3V3S_LCDVDD

C557

LCM

P3V3S

D

C599

2 1

NUVO_NCT3521U_SOT23_5P

1uF_6.3V_2

U501

GND

4 3

DIS EN

6019B0849401

2

P3V3S_LCDVDD

R595

21

100_5%_3

WEBCAM

30

30

USB_P5_DN

IN

USB_P5_DP

IN

C2252

CSC0402_DY

2 1

C572

2 1

4.7uF_6.3V_3

15

PCH_LCDVDD_EN

R597

100K_5%_2

2 1

0_5%_2

R2250

21
21

0_5%_2

R2251

C2253

2 1

CSC0402_DY

USB_P5_R_DN

USB_P5_R_DP

D511

2

IO

1

1

PHP_PRTR5V0U2X_SOT143_4P_DY

6019B0134501_DY

3

IO

4

VccGND

32

4

P5V0S

IN

OUT
OUT

29

BOARD_ID5 ONLY FOR WEBCAN USE
FOR HD WEB CAM BOARD_ID5 PULL P3V3A
FOR VGA WEB CAM BOARD_ID5 PULL GND

38

38

PVBAT_LCD

P3V3S

C597

1UF_25V_3

2 1

29

BI

29

BI

29

IN

29

IN

29

IN

29

IN

29

IN

29

IN

29

IN

29

IN

30

OUT

29

IN

38

IN

38

IN

38

IN

44

38

IN

38

OUT

C592

2 1

2 1

0.1uF_16V_2

PCH_LCD_CLK
PCH_LCD_DAT

PCH_LCD_TXA0_DN
PCH_LCD_TXA0_DP

PCH_LCD_TXA1_DN
PCH_LCD_TXA1_DP

PCH_LCD_TXA2_DN
PCH_LCD_TXA2_DP

PCH_LCD_TXACL_DN
PCH_LCD_TXACL_DP

BOARD_ID5
PCH_LCD_PWM
LCD_BKEN

USB_P5_R_DN
USB_P5_R_DP

DMIC_CLK
DMIC_DAT_CN

R572

2 1

C596

2 1

2.2K_5%_2

1000PF_50V_2_DY

P3V3S_LCDVDDP3V3S

R571

2 1

2.2K_5%_2

CN503

1

1OUTIN

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27
28
29
30

G

27

G

28
29
30

ACES_50203_03001_001_30P

6012B0431201

D

CC

G1
G2

4.7UF_6.3V_3

33_5%_2

44

44

B

38

47

DMIC_DAT

OUT

DMIC_CLK

IN

35

LID_SW#

IN

PCH_LCD_BKEN

29

IN

8

R626

C1026

D503

DIODE-BAT54-TAP-PHP

60110GA0367T

R627

2 1

DMIC_DAT_CN

21

C508

2 1

CSC0402_DY

2 1

10pF_50V_2_DY

2

NC

13

LCD_BKEN

R628

21

3K_5%_2

100K_5%_2

7 6

OUT

38

OUT

B

21

SD

G

1

PVBAT_LCD

3

Q511

AO3409_DY

6015B0022201_DY

AA

PVBAT

PAD508

1 2

POWERPAD1x1m

2

R623

C591

2 1

2 1

20K_5%_2_DY

0.22uF_16V_2_DY

38

R622

2 1

10K_5%_2_DY

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

LCD CONN

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

1

REV

X01

5738

8 7

6 5

4

3 2 1

D

D

HDMI

P5V0S_CRTVDD

SSM3K7002FU

R833

100K_5%_2

29

IN

29

IN

29

IN

29

IN

29

IN

29

IN

29

IN

29

IN

B

8

P0V0S_HDMI

3

Q542

DS

1

G

21

2

PCH_HDMI_TX2_DP

PCH_HDMI_TX2_DN

PCH_HDMI_TX1_DP

PCH_HDMI_TX1_DN

PCH_HDMI_TX0_DP

PCH_HDMI_TX0_DN

PCH_HDMI_TXCL_DP

PCH_HDMI_TXCL_DN

29

BI

29

BI

P3V3S

2.2K_5%_2

2.2K_5%_2

PCH_HDMI_CLK

PCH_HDMI_DAT

21

R780
R784
R785
R781
R782
R783
R829
R830

R746

R787

C824
C823
C803
C804
C799
C801
C800
C802

21

21

680_5%_2

21

680_5%_2

21

680_5%_2

21

680_5%_2

21

680_5%_2

21

680_5%_2

21

680_5%_2

21

680_5%_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

P3V3S

P3V3S

Q536

SSM3K7002FU

2

G

1

2

G

1

7 6

D S

3

D S

3

Q533

SSM3K7002FU

HDMI_TX2_C_DP

HDMI_TX2_C_DN

HDMI_TX1_C_DP

HDMI_TX1_C_DN

HDMI_TX0_C_DP

HDMI_TX0_C_DN

HDMI_TXCL_C_DP

HDMI_TXCL_C_DN

R778

2.2K_5%_2

R779

2.2K_5%_2

HDMI_CLK

HDMI_DAT

CN509

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13
14
15
16
17
18
19

G1

GND

13

G2

GND

14

G3

GND

15

G4

GND

16
17
18
19

SYN_100042GR019M191ZR_19P

6012B0361401

CC

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

HDMI_TX2_C_DP

39

IN

HDMI_TX2_C_DN

39

IN

HDMI_TX1_C_DP

39

IN

HDMI_TX1_C_DN

39

IN

HDMI_TX0_C_DP

39

39

39

39

39

39

39

39

39

P5V0S_CRTVDD

C12718

2 1

4.7uF_6.3V_3

IN

39

IN

39

IN

39

IN

39

BI

39

BI

29

OUT

P5V0S_CRTVDD

HDMI_TX0_C_DN
HDMI_TXCL_C_DP

HDMI_TXCL_C_DN

HDMI_CLK
HDMI_DAT

HDMI_HPD

3

BAV99_DY

D526

2 1

B

21

21

BI

D525

1

1

2

2

PANASONIC_DB3X313J0L_SOT_3P
6011B0148301

39

P5V0S_CRTVDD

3

3

AA

39

BI

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

HDMI CONN

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

1

REV

X01

5739

8 7

6 5

4

3 2 1

SATA HDD CABLE CONN on MB

P5V0S

CN525

1

1

2

2

3

D

C1007

C1008

2 1

2 1

26
26

26
26

SATA_HDD_RX_DP

OUT

SATA_HDD_RX_DN

OUT

SATA_HDD_TX_DN

IN

SATA_HDD_TX_DP

IN

C971
C972

C970
C969

22uF_6.3V_5

21

0.01uF_50V_2

21

0.01uF_50V_2

21

0.01uF_50V_2

21

0.01uF_50V_2

0.1uF_16V_2

SATA_HDD_RX_C_DP
SATA_HDD_RX_C_DN

SATA_HDD_TX_C_DN
SATA_HDD_TX_C_DP

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17
18
19
20

G

17

G

18

G

19

G

20

FOX_GS12201_1011_9H_20P

D

G1
G2
G3
G4

6012B0238201

CC

SATA ODD CABLE CONN on MB

P15V0A P5V0A P5V0S_ODD

B

R820

2 1

560K_1%_2

3

Q541

ODD_PWEN#

35

IN

SSM3K7002FU

DS

1

G

2

Q540

1

D

2
5

FDC655BN

C813

2 1

0.1uF_25V_2

NMOS_4D1S

S

G

26
26

26
26

4

36

OUT
OUT

IN
IN

SATA_ODD_RX_DP
SATA_ODD_RX_DN

SATA_ODD_TX_DN
SATA_ODD_TX_DP

P5V0S_ODD P3V3S

35

C815

C814

2 1

2 1

22uF_6.3V_5

C847
C846

C854
C844

0.1uF_16V_2

OUT

ODD_PRSNT#

21

0.01uF_50V_2

21

0.01uF_50V_2

21

0.01uF_50V_2

21

0.01uF_50V_2

31

ODD_MD#

IN

SATA_ODD_RX_C_DP

SATA_ODD_RX_C_DN

SATA_ODD_TX_C_DN

SATA_ODD_TX_C_DP

10K_5%_2

R818

1K_5%_2

0_5%_2_DY

R819

R843

21

CN514

1

1

2

2

3

3

4

4

5

5

6

6

7

7

21

8

8

9

9

10

10

11

11

12

21

12

13

13

14

14

15

15

16

16

17
18
19
20

G

17

G

18

G

19

G

20

FOX_GS12201_1011_9H_20P

G1
G2
G3
G4

B

6012B0238201

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SATA HDD & SATA ODD

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5740

8 7

6 5

4

3 2 1

DISCHARGE ELECTRICITY
Q400 , R412

200_5%_2_DY

R412

3

Q400

SSM3K7002FU_DY

1

P3V3A

DS

G

2

IN

WOL_PWEN#

35

D

R411

750K_1%_2

21

Q401

AM2321P

2

C408

SD

G

1

2 1

21

3

LDO MODE(RTL8165EH)
R413,C417,C420 OPEN

0.1UF_16V_2

LAN

R414

21

P3V3A_LAN

R406

1

2
3

5
6
7
8
9

10

11

12

10K_5%_2

0.1UF_16V_2

0.1UF_16V_2

MDIP0
MDIN0
NC
MDIP1
MDIN1
NC
NC
NC
NC
NC
NC
NC

1

TP30

21

XTAL2

21

49

46

474443

48

AVDD33

AVDD10

TML

RSET

AVDD33

U400

RTL8165EH

CLKREQB

DVDD10

NC

NC

151413

PCIE_LAN_RX_DP

PCIE_LAN_RX_DN

IN

C402

2 1

2 1

C403

42
42

42
42

42
42

42
42

LAN_25M_IN

27PF_50V_2_DY

2

4

27PF_50V_2_DY

IN
IN

OUT
OUT

IN
IN

OUT
OUT

XTAL2

3

X400

25MHZ_DY

6018B0044501_DY

1

XTAL1

LAN_TRD0_DP
LAN_TRD0_DN

LAN_TRD1_DP
LAN_TRD1_DN

LAN_TRD2_DP
LAN_TRD2_DN

LAN_TRD3_DP
LAN_TRD3_DN

0_5%_2

P1V0_LAN

2.49K_1%_2

16

B

P3V3A_LAN

P1V0_LAN

TP400

OUT

IN
IN

IN
IN

PCIE_LAN_RX_C_DP

OUT

PCIE_LAN_RX_C_DN

OUT

CLKREQ_LAN#

PCIE_LAN_TX_C_DP

PCIE_LAN_TX_C_DN

CLK_PCIE_LAN_DP

CLK_PCIE_LAN_DN

27

27

27

27

27

27

27

8

R405

C400
2 1

2 1
C401

C401, C400 CLOSE TO LAN CHIP PIN 22, 23

7 6

0.5A

R413

0_5%_3_DY

XTAL1

P1V0_LAN

424140439

45

CKXTAL2

CKXTAL1NCNC

REFCLK_N

REFCLK_P

HSIN

HSIP

19

17

18

16

P3V3A_LAN

21

P3V3A_LAN

37

38

GPO

LED0

DVDD33

EESK_LED1

EVDD10

HSON

HSOP

GND

20

21

22

24

23

P3V3A RISING TIME (10%~90%) MUST >1MS AND <100MS

P3V3_LAN_REG

C420

C417

X5R

2 1

2 1

0.1UF_16V_2_DY

4.7UF_6.3V_3_DY

LED_LANRXACT#

GPO_SMBALERT

LED_LANLINK#

P1V0_LAN_REG

36

REGOUT

35

VDDREG

34

VDDREG

33

ENSWREG

32

EEDI

31

EEDO_LED3

30

EECS

29

DVDD10

28

LANWAKEB

27

DVDD33

26

ISOLATEB

25

PERSTB

REA_RTL8165EH_VB_CGT_QFN_48P

RTL8161FH = 6019B0928101(10/100/1000)
RTL8165EH = 6019B0928301(10/100)

P1V0_LAN_EVDD

CLOSE TO LAN CHIP

C414

C416

2 1

0.1UF_16V_2

OUT
OUT
OUT

P3V3_LAN_REG

P1V0_LAN

41

C419

2 1

0.1UF_16V_2

42

41

42

EEDI_SDA

EECS_SCL

PCIE_WAKE#

PLT_RST#

28

OUT

41

OUT

IF THERE ARE NO OTHER APPLICATION, REMOVE R4021

2 1

PCIE_WAKE#

GPO_SMBALERT

5 4

PIN42PIN12 PIN39PIN27

C421

2 1

0.1UF_16V_2

0.1UF_16V_2

P3V3A_LAN

MOUNT R407, OPEN R4078

ENABEL SWITCHING REGULATOR

MOUNT R408, OPEN R407

DISABEL SWITCHING REGULATOR

MOUNT R408, OPEN R407

21

ENABLE LDO REGULATOR

(ONLY 10/100)

R407

0_5%_2_DY

2 1

0_5%_2

IN

21

10K_5%_2

21

10K_5%_2

30

R4031
R404

R408

PIN48PIN47

C423

C422

2 1

0.1UF_16V_2

OUT

4843

R4011

R4021

2 1

0.1UF_16V_2

28

41

R409
R410

21

10K_5%_2_DY

21

1K_1%_2_DY

P1V0_LAN_REG

TAITECH_SWF2520CF-2R2M-R15

6014B0200401

LDO MODE(RTL8165EH)
L400,C404,C405 OPEN

L400
1ST : 6014B0200401

2ND : 6014B0190301

P3V3A_LAN

1K_1%_2

21

15K_1%_2

21

P3V3A_LAN

L400

21

P3V3S

C404

X5R

CHANGE by

2 1

P1V0_LAN

C409

C406

2 1

0.1UF_16V_2_DY

C405

2 1

4.7UF_6.3V_3_DY

USE RTL8161FH
C406,C409,C411,C415 MOUNT

0.1UF_16V_2_DY

POWERPAD1X1M

PAD400

CLOSE TO LAN CHIP

C415

C411

2 1

2 1

1 2

0.1UF_16V_2_DY

21

C407

0.1UF_16V_2_DY

P1V0_LAN_EVDD

2 1

2 1

0.1UF_16V_2_DY

C410

1UF_16V_3

2 1

RTL8161FH(10/100/1000) / RTL8165EH(10/100)

LDO MODE

(ONLY 10/100)

SWITCHING
MODE

RTL8165EH

(10/100)

RTL8161FH

(10/100/1000)

MOUNT

R408

(0V)

L400,R413,R407
C404,C405,C417,C420

3.3V:ENABLE SWITCHING REGULATOR
OR EXTERNAL 1.05V INPUT MODE.

0V:ENABLE LDO REGULATOR

3.3V:ENABLE SWITCHING REGULATOR

0V:DISABLE SWITCHING REGULATOR

OPEN PART

L400,R413,R407
C404,C405,C417,C420

R408

INVENTEC

TITLE

CODE

SIZE

XXX

DATE

21-OCT-2002

23

A3

PIN13 PIN29 PIN45PIN41PIN9PIN6PIN3

C413

C412

2 1

2 1

0.1UF_16V_2

C407 , C410
CLOSE TO
RTL8165EH
PIN21

0.1UF_16V_2

MODEL,PROJECT,FUNCTION

LAN

DOC.NUMBER

1310xxxxx-0-0

CS

SHEET

of

41

C418

2 1

0.1UF_16V_2

0.1UF_16V_2

D

CC

B

AA

REV

X01

57

1

8 7

6 5

TRANSFORMER

4

3 2 1

D

OUT
OUT

IN
IN

OUT
OUT

IN
IN

LAN_TRD0_DN
LAN_TRD0_DP

LAN_TRD1_DN
LAN_TRD1_DP

LAN_TRD2_DN
LAN_TRD2_DP

LAN_TRD3_DN
LAN_TRD3_DP

0.01UF_50V_2

C470

2 1

41
41

41
41

41
41

41
41

CAP VALUE SHOULD BE

0.01UF ~ 0.4UF

B

42
42

42

42

42
42
42
42

U470 FOR GIGALAN
U502 FOR 10/100 LAN

1
3
2
4
6
5
7
9

8
10
12
11

LANKOM_LG_2405S_1_SMD_24P_DY

6016B0010601_DY

BOTH_NS0014_LF_16P

LAN_TRD0_CN_DP

OUT

LAN_TRD0_CN_DN

OUT

LAN_TRD1_CN_DP

IN

LAN_TRD2_CN_DP

OUT
OUT

LAN_TRD1_CN_DN

IN

LAN_TRD3_CN_DP

IN

LAN_TRD3_CN_DN

IN

U470

TCT1
TD1­TD1+
TCT2
TD2­TD2+
TCT3
TD3­TD3+
TCT4
TD4­TD4+

U502

1

RD+

2

RD-

3

CT1

4

NC1

7

TD+

8

TD-

6016B0008101

24

MCT1

22

MX1-

23

MX1+

21

MCT2

19

MX2-

20

MX2+

18

MCT3

16

MX3-

17

MX3+

15

MCT4

13

MX4-

14

MX4+

16

RX+

15

RX-

14

CT4

13

NC4

125

NC3NC2

116

CT3CT2

10

TX+

9

TX-

JACK500

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

SANTA_130452_06_8P

6026B0200401-002

G1

G2
A1
A2
B1
B2

P3V3A_LAN

G1
G2
A1
A2
B1
B2

LAN_TRD0_CN_DN
LAN_TRD0_CN_DP

LAN_TRD1_CN_DN

LAN_TRD1_CN_DP

LAN_TRD2_CN_DN
LAN_TRD2_CN_DP

LAN_TRD3_CN_DN
LAN_TRD3_CN_DP

LED_R_LANLINK#LAN_TRD2_CN_DN

LED_R_LANRXACT#

IN
IN

OUT
OUT

IN
IN

OUT
OUT

R731

510_5%_2

R745

510_5%_2

42
42

42
42

42
42

42
42

21
21

21

21

R471

R470

75_5%_2

C471

1000PF_2000V_6

2 1

LED_LANLINK#

LED_LANRXACT#

D

21

21

R473

R472

75_5%_2

75_5%_2

75_5%_2

CC

B

41

IN

41

IN

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

RJ45 & TRANSFORMER

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5742

8 7

6 5

4

3 2 1



RTS5239GR = 6019B0928001

PLT_RST#

30

48

41

IN

OUT

CLKREQ_CR#

D

CARE READER

27

ZDIFF : 100 OHM

PCIE_CR_TX_C_DP

27

IN

PCIE_CR_TX_C_DN

27

IN

CLK_PCIE_CR_DP

27

IN

CLK_PCIE_CR_DN

27

IN

OUT
OUT

PCIE_CR_RX_C_DP
PCIE_CR_RX_C_DN

27
27

0.1uF_16V_2

C702

2 1
2 1

0.1uF_16V_2

C703

PCIE_CR_RX_DP

PCIE_CR_RX_DN

P1V2_CR

100MA

6.2K_1%_2

P3V3S

C705

C704

C713

2 1

2 1

0.1uF_16V_2

4.7uF_6.3V_3

R700

2 1

C701

2 1

1000PF_50V_2

SD_CD#

SD_WP

25

TML

1

HSIP

2

HSIN

3

REFCLKP

4

REFCLKN

5

HSOP

6

HSON

21

C7061

2 1

0.1uF_16V_2

19

23

22

24

20

21

U532

PERST#

MS_INS#

GPIO

SP7

SD_CD#

CLKREQ#

SP6
SP5
SP4

DV33_18

CARD_3V3

SP3

DV12_S

3V3_IN

SP2

RREF

AV12

SP1

9

8

10

12

11

REALTEK_RTS5239_GR_QFN_24P

7

10uF_6.3V_5

IN
IN

18

SD_DATA2_R

17

SD_DATA3_R

16

SD_CMD_R

15

P1V8S_CARD

14

SD_CLK_R

13

SD_DATA0_R

6019B0928001

SD_DATA1_R

P1V2_S_CR

43

43

R119

10K_5%_2

21

R701
R702
R706

R7031
R704

P3V3S

R705

0_5%_2

C7111

2 1

4.7uF_6.3V_3

C7101

2 1

0.1uF_16V_2

21

0_5%_2

21

0_5%_2

21

0_5%_2

21

0_5%_2

21

0_5%_2

21

C7091

2 1

C716

2 1

SD_DATA2
SD_DATA3
SD_CMD

SD_CLK
SD_DATA0

CSC0402_DY

SD_DATA1

0.1uF_16V_2

D

43

BI

43

BI

43

BI

43

OUT

43

BI

43

BI

CC

P3V3S_CR

800MA

P1V8S_CARD

B

B

P3V3S_CR

C1050

2 1

800MA

10uF_6.3V_5

43

43

43

43

SD_DATA3

BI

SD_CMD

BI

SD_CLK

IN

SD_DATA0

BI

CN523

2

CMD

3

VSS

4

VDD

5

CLK

6

VSS

PLAS_CS1S_125_14P-002

6026B0103603-002

CD_WP_COM

DAT1DAT0

G11

GNDDAT3

G2

GND

12
11

SD_CD#

CD

10

SD_WP

WP

9

DAT2

SD_DATA2

87

SD_DATA1

OUT
OUT

43

43

43

BI

43

BI

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CARD READER

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5743

8 7

6 5

4

3 2 1

OUT
OUT
OUT
OUT

OUT

R503

DVDD1

GPIO0/DMIC-DATA

GPIO1/DMIC-CLK

PD#

SDATA-OUT

BIT-CLK

DVSS2

SDATA-IN

DVDD-IO

SYNC

RESET#

PCBEEP

ANALOG

SPKR_L_DP

SPKR_L_DN

SPKR_R_DN

SPKR_R_DP

AMP_EN

21

49

48

47

TML

SPDIFO

EAPD/COMBO_JACK

44

45

43

46

PVDD2

42

SPK-R+

SPK-R-

PVSS2

PVSS1

U528

REALTEK_ALC3201_GRT_MQFN_48P

Sense A

13

LINE2-R

LINE2-L

15

14

R512
PLACEMENT

NEAR
CODEC

Sense-B

MIC2-R

MIC2-L

16

JDREF

18

17

19

21

R512

C500,C503
PLACE NEST TO PIN 38

P5V0S_AUDIO_AVDD

X5R

2.2uF_6.3V_3

X5R

2.2uF_6.3V_3

X5R

MIC_REF-L

MIC_REF-R

C514

10uF_6.3V_5

2 1

X5R

P5V0S_AUDIO_AVDD

33.5mA

X5R

C520

2 1

4.7UF_10V_3

C500

C503

2 1

2 1

4.7UF_10V_3

PIN38PIN38

HP_R

OUT

HP_L

OUT
OUTIN
OUT

C513

2 1

1UF_6.3V_2

C519,C520
PLACE NEXT TO PIN 25

C519

2 1

0.1uF_16V_2

0.1uF_16V_2

45

45

45

45

C513,C515
PLACE NEXT TO PIN 27

C515

2 1

0.1uF_16V_2

P5V0S_PVDD_AUDIO

INT-SPKR CONN

44
44
44
44

X5R

C521

C522

10uF_10V_5

2 1

2 1

PIN39PIN39

SPKR_L_DP

IN

SPKR_L_DN

IN

SPKR_R_DN

IN

SPKR_R_DP

IN

ACES_50224_0040N_001_4P

SPKR_L_DP

SPKR_L_DN

SPKR_R_DN

SPKR_R_DP

0.1uF_16V_2

PIN46

6012B0069911

C523

2 1

0.1uF_16V_2

CN526

1

1

2

2

3

3

4

4 G2

1000PF_50V_2

2 1

2 1

1000PF_50V_2

1000PF_50V_2

2 1

2 1

1000PF_50V_2

P5V0S

L3

21

HCB1608KF_221T20

2A_0603

6014B0157601

G1

G1

G2

C524

EMI

C525

C526

EMI

C527

D

CC

B

41

40

SPK-L-

SPK-L+

MONO-OUT

MIC1-L

20

21

P5V0S_PVDD_AUDIO

1A

P5V0S_AUDIO_AVDD

33.5mA

39

372638

PVDD1

AVDD2

AVSS2

CPVEE

HP-OUT-R

HP-OUT-L

MIC1-VREFO-L

MIC1-VREFO-R

MIC2-VREFO

LDO-CAP

VREF

AVSS1

AVDD1

LINE1-R

LINE1-L

MIC1-R

22

24

23

C506

2 1

36

CBP

35

CBN

34
33
32
31
30
29
28
27

25

C512

2 1

20K_1%_2

MIC_R

MIC_L

45

IN

45

IN

44

44

AUDIO

44

44

35

P3V3S

D

C501,C502
PLACE NEXT TO PIN 1

C502

2 1

0.1uF_16V_2

R513

4.7K_5%_2_DY

26

44

26

26

26

26

44

HDA_RST#

IN

HDA_SDO

IN

HDA_BITCLK

HDA_SDIN0

26

OUT

HDA_SYNC

IN

HDA_RST#

IN

C504

2 1

CSC0402_DY

26

IN

21

22_5%_2

22_5%_2

PCSPKR

R514

SHORT_0402

R500

R501

38

21

21

38

21

IN

OUT

C505

2 1

CSC0402_DY

R506

1K_5%_2

DMIC_DAT

DMIC_CLK

21

21

R505

B

P3V3S

X5R

C501

2 1

1UF_6.3V_2

R502

33_5%_2

HDA_BITCLK_CODEC

HDA_SDIN0_CODEC

C516

2 1

0.1uF_16V_2

(INCLUDE THERMAL PAD)

4.7K_5%_2_DY

5mA

21

10K_5%_2_DY

1

2
3
4
5
6
7
8

9
10
11
12

DIGITAL

MOAT 40MIL

SENSE_A

P5V0S

R509

39.2K_1%_2

R510

20K_1%_2

21

21

SENSE_A

X5R

C509

2 1

5 4

45

45

8

7 6

HPS

IN

MICS

IN

R509,R510
PLACEMENT NEAR
CODEC

BLM18PG600SN1D

60140EA0314T

1uF_6.3V_2

L500

500MA_0603

CHANGE by

P5V0S_AUDIO_AVDD

21

X5R

XXX

33.5 MA

C511

2 1

10UF_10V_5

SIZE

DATE

21-OCT-2002

23

A3

PAD500

21

1 2

POWERPAD_2_0610

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

AUDIO CODEC

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

SHEET

of

5744

1

REV

X01

AA

8 7

6 5

4

3 2 1

D

2 1

IN
IN

44

MIC_R_JACK

MIC_L_JACK

C1003

100PF_50V_2

100PF_50V_2

MIC_REF-R

MIC_REF-L

L522

BLM18PG600SN1D

60140EA0314T

L524

BLM18PG600SN1D

L535

BLM18PG600SN1D

60140EA0314T

L527

BLM18PG600SN1D

21

21

R601

R600

2.2K_5%_2

2.2K_5%_2

1K_5%_2

R604

21
21

21
21

HP_L_R

HP_R_R

C957

2 1

2 1

1000PF_50V_2_DY

21

MIC_R_C

21

MIC_L_C

R605

1K_5%_2

R1060

75_5%_2

21
21

R1019

75_5%_2

C1004

1000PF_50V_2_DY

2 1
2 1

HP_L

HP_R

C876

C930

IN
IN

X5R

2.2UF_16V_3

2.2UF_16V_3

X5R

44

44

MIC_R

MIC_L

OUT
OUT

44

44

44

44

MIC JACK

Normal OPEN

JACK501

SINGA_2SJ2285_214252F_6P

6026B0223001

1

MICS

6

6

5

5

2

2

4

4
1

3

3

7

7

OUT

C929

C872

2 1

100PF_50V_2

D531

2

3

JACK502

OUT

1

7

7

3

3

1

1

4

4

2

2

5

5

6

6

HPS

HP_L_JACK

HP_R_JACK

C956

2 1

2 1

100PF_50V_2

JACK CHANGE TO 6026B0223001

HP JACK

Normal OPEN

PHP_PESD5V2S2UT_SOT23_3P

B

C609

2 1

0.1UF_16V_2_DY

X7R

C610

2 1

0.1UF_16V_2_DY

X7R

C611

2 1

0.1UF_16V_2_DY

X7R

C612

2 1

0.1UF_16V_2_DY

X7R

SINGA_2SJ2285_214252F_6P

6026B0223001

44

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

HP JACK & MIC JACK

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5745

8 7

6 5

4

3 2 1

WLAN CONN (MINICARD)

D

1.5A

P1V5SP3V3S

0.5A

D

IN

BI
BI
BI
BI

BI
BI

OUT

C685

2 1

2.2uF_6.3V_3_DY

26

35

26

35

26

35

26

35

26

35

30
30

35

P1V5S

2

D524

NC

1 3

DIODE-BAT54-TAP-PHP

BUF_PLT_RST#

C686

2 1

1000PF_50V_2

WLAN_RF_OFF#

17

IN

30 35 46

31

IN

CC

B

C785

C683

PERST#

USB_D-

C684

2 1

2 1

1uF_6.3V_2

0.1uF_16V_2

2

3.3V

4

GND

6

1.5V

8

10
12
14
1615
1817

GNDReserved

20
22
24
26

GND

2827

1.5VGND

30
32
34

GND

36
38
40

GND

42
44
46
4847

1.5VReserved

50

GND

5251

3.3VReserved

G2G1

G

LPC_FRAME#
LPC_AD<3>
LPC_AD<2>
LPC_AD<1>
LPC_AD<0>

USB_P8_DN
USB_P8_DP

WLAN_IND#

P3V3S

2 1

4.7uF_6.3V_3

CN507

1

1

TP1302

TP1300

CLKREQ_WLAN#

27

OUT

27

IN

27

IN

17

303546

IN

30

IN

27

OUT

27

OUT

27

IN

27

IN

26

IN

TP1301

CLK_PCIE_WLAN_DN
CLK_PCIE_WLAN_DP

BUF_PLT_RST#
CLK_LPC_DEBUG

PCIE_WLAN_RX_C_DN
PCIE_WLAN_RX_C_DP

PCIE_WLAN_TX_C_DN
PCIE_WLAN_TX_C_DP

2nd_WLAN_RF_OFF#

WAKE#

3

1

Reserved

5

1

Reserved

7

CLKREQ#
GND
REFCLK­REFCLK+

Reserved
GND
PERN0
PERP0

GND
PETN0
PETP0
GND
Reserved
Reserved
Reserved
Reserved
Reserved

Reserved

G

Reserved
Reserved
Reserved
Reserved
ReservedGND

Reserved

+3.3VAUX

SMB_CLK

SMB_DATA

USB_D+

LED_WWAN#

LED_WLAN#

LED_WPAN#

9
11
13

19
21
23
25

29
31
33
35
37
39
41
43
45

49

LOTES_AAA_PCI_093_P06_52P

B

SI build change to 6026B0221502

VENDOR ID :

(SSID)

SUBSYSTEM VENDOR ID :

DEVICE ID :

SUBSYSTEM ID :

HP P/N : 670285-001

MARILYN
ATHEROS
AR5B125

0X168C
0X0032
0X1838
0X103C
670036-001

RIPPLE3
FOXCONN
RALINK RT5390

0X1814
0X539A
0X1839
0X103C

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

WLAN & BT

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5746

8 7

6 5

4

3 2 1

USB 2.0 BOARD Cable CONN on MB

P5V0A

CN1

1

1

2

2

3

3

4

4

5
6
7
8

10
11
12

USBPWR_EN

USB_P1_DP
USB_P1_DN

USB_P9_DP
USB_P9_DN

47

35

IN

30

BI

30

BI

30

BI

30

BI

5

G 9
G

10
11
12

6012B0245913

6
7
8

D

G1 9
G2

ACES_50503_0124N_001_12P

POWER BUTTON CONN ON MB

P3V3A

CN504

1

1

2

2

21

2 1

0.1uF_16V_2

S1

S2

S3

S4

S5

S6

S7

S8

S9

S10

3

3

4

4

5

5

6

6

ENTERY_6916K_Q06M_00L_6P

6012B0245911

C50

G1

G

G2

G

CHANGE TO 600_900_900_1P

SCREW600_900_800_1P

SCREW600_900_800_1P

SCREW280_800_NP_1P

S11

1

S12

1

FAN

1

STD13

STDPAD_1.15_6.0_TOP

6052B0035901

3.4mm

S14

1

7 6

36

35
35

38

PWR_LED#

35

IN

EC_PWRBTN#

OUT

LID_SW#

OUT

P3V3A

R50

P3V3AL

B

FOR M/B

100K_5%_2

R51

21

100K_5%_2

1

SCREW280_700_NP_1P

1

SCREW280_800_1P

1

SCREW280_800_NP_1P

1

SCREW280_800_1P

1

SCREW280_800_1P

1

SCREW280_800_NP_1P

1

SCREW280_800_NP_1P

1

SCREW280_800_1P

1

SCREW280_800_NP_1P

1

SCREW280_800_NP_1P

8

TouchPad Module CONN

P3V3A

2 1

10uF_6.3V_5

1

BI
BI

BI
BI

TP_DAT
TP_CLK

TP_SMBUS_DAT
TP_SMBUS_CLK

35
35

27
27

2
3
4
5
6

ENTERY_6916K_Q06M_00L_6P

30

BI

30

BI

30

OUT

30

OUT

30

IN

30

IN

C825

CN516

1
2
3
4
5
6

G1

G

G2

G

6012B0245911

6014A0013901

USB_P0_DN
USB_P0_DP

USB3_P1_RX_DN
USB3_P1_RX_DP

USB3_P1_TX_DN
USB3_P1_TX_DP

L537

WCM_2012_900T

0.1UF_16V_2_DY

C2406

2 1

2 1

C2405

21
34

5 4

TOUCHPAD LED ON MB

P3V3S

510_5%_2

R23

21

D500

IN

C12712

TP_OFF_LED#

C997

2 1

22uF_6.3V_5

19_217_W1D_AP1Q2QY_3T

+

47

2 1

330UF_6.3V_DY

35

35

USB 3.0 CONN

R474

21

SHORT_0402

R475

21

SHORT_0402

L470

41
32

0.1UF_16V_2_DY

WCM_1210HS_600T_DY

USB3_P1_TX_C_DN
USB3_P1_TX_C_DP

L471

WCM_1210HS_600T_DY

6014B0177901_DY

R476

SHORT_0402

R477

SHORT_0402

CHANGE by

32
41

21

NUT PN :
6052B0160501

FIX3

1

FIX_MASK

FIX7

1

FIX_MASK

for GPU

S4700

1

SCREW330_600_1P

1

FIX_MASK

1

FIX_MASK

S4701

1

SCREW330_600_1P

D

FIX4

FIX8

CC

for CPU

S45031S45021S45011S4500

1

SCREW330_600_0_1P

SCREW330_600_0_1P

SCREW330_600_0_1P

SCREW330_600_0_1P

21

FIX2

FIX1

1

1

FIX_MASK

FIX_MASK

1

FIX_MASK

P5V0A

USBPWR_EN

IN

U525

1

GND

2

IN1

3

IN2

4

EN#

UPI_UP7534ARA8_15_MSOP_8P

OUT1
OUT2
OUT3

8
7
6
5

OC#

FIX5

FIX_MASK

P5V0A_USB3

+

C996

2 1

FIX6

1

330uF_6.3V

P5V0A_USB3

P5V0A_USB3

U529

PHP_PRTR5V0U2X_SOT143_4P_DY

1

D2400

1

10

21

SEMTECH_RCLAMP0524P.TCT_SLP2510P8_10P_DY

SEMTECH_RCLAMP0524P.TCT_SLP2510P8_10P_DY

3

1

IO

2

USB_P2_L_DN
USB_P2_L_DP

2
9

VccGND

4

4

IO

32

3

USB3_P1_RX_L_DN
USB3_P1_RX_L_DP

USB3_P1_TX_L_DN
USB3_P1_TX_L_DP

D2400

7 6

8

C12694

2 1

0.1uF_16V_2

CN518

1

VBUS

2

D-

3

D+

4

GND

5

SSRX-

6

SSRX+

7

GND

8

SSTX-

9

SSTX+

FOX_UEA111GC_R14EC_7H_9P

54

6012B0370301

USB2.0 CONN.
PN : 6012B0370102

C2404

2 1

B

22uF_6.3V_5_DY

G1

G1

G2

G2

G3

G3

G4

G4

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

USB 3.0 CONN & M/B TO D/B CONN

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

1

REV

X01

5747

8

7 6 5 4 3 2 1

FF

U4

CLOSE TO GPU

AF30

PCIE_RX0P

AE31

PCIE_RX0N

AE29

PCIE_RX1P

AD28

PCIE_RX1N

AD30

PCIE_RX2P

AC31

PCIE_RX2N

AC29

PCIE_RX3P

AB28

E

PEG_TX7_C_DP

18

BI

PEG_TX7_C_DN

18

BI

PEG_TX6_C_DP

18

BI

PEG_TX6_C_DN

18

BI

PEG_TX5_C_DP

18

D

C

FOR PARK-S3 PIN_N10 MUST NEED TO PULL DOWN TO GND

18

18
18

18
18

18
18

18
18

18
18

27
27

21

R62

BI
BI

BI
BI

BI
BI

BI
BI

BI
BI

BI
BI

BI
BI

GPU_PWRGD

10K_5%_2

PEG_TX5_C_DN

PEG_TX4_C_DP
PEG_TX4_C_DN

PEG_TX3_C_DP
PEG_TX3_C_DN

PEG_TX2_C_DP
PEG_TX2_C_DN

PEG_TX1_C_DP
PEG_TX1_C_DN

PEG_TX0_C_DP
PEG_TX0_C_DN

CLK_PEG_DP
CLK_PEG_DN

48

IN

PEG_SLT_RST#

PCIE_RX3N

AB30

PCIE_RX4P

AA31

PCIE_RX4N

AA29

PCIE_RX5P

Y28

PCIE_RX5N

Y30

PCIE_RX6P

W31

PCIE_RX6N

W29

PCIE_RX7P

V28

PCIE_RX7N

V30

PCIE_RX8P

U31

PCIE_RX8N

U29

PCIE_RX9P

T28

PCIE_RX9N

T30

PCIE_RX10P

R31

PCIE_RX10N

R29

PCIE_RX11P

P28

PCIE_RX11N

P30

PCIE_RX12P

N31

PCIE_RX12N

N29

PCIE_RX13P

M28

PCIE_RX13N

M30

PCIE_RX14P

L31

PCIE_RX14N

L29

PCIE_RX15P

K30

PCIE_RX15N

AK30

PCIE_REFCLKP

AK32

PCIE_REFCLKN

N10

AL27

PERSTB

AMD_SEYMOUR_XT_S3_FCBGA_631P

PCI EXPRESS INTERFACE

CLOCK

CALIBRATION

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

PCIE_CALRP

PCIE_CALRNPWRGOOD

AH30
AG31

AG29
AF28

AF27
AF26

AD27
AD26

AC25
AB25

Y23
Y24

AB27
AB26

Y27
Y26

W24

PEG_RX7_DP

W23

PEG_RX7_DN

V27

PEG_RX6_DP

U26

PEG_RX6_DN

U24

PEG_RX5_DP

U23

PEG_RX5_DN

T26

PEG_RX4_DP

T27

PEG_RX4_DN

T24

PEG_RX3_DP

T23

PEG_RX3_DN

P27

PEG_RX2_DP

P26

PEG_RX2_DN

P24

PEG_RX1_DP

P23

PEG_RX1_DN

M27

PEG_RX0_DP

N26

PEG_RX0_DN

R64

1.27K_1%_2

R66

2K_1%_2

21

21

Y22
AA22

BI
BI

BI
BI

BI
BI

BI
BI

BI
BI

BI
BI

BI
BI

BI
BI

48
48

48
48

48
48

48
48

48
48

48
48

48
48

48
48

P1V0S_DGPU

48

PEG_RX1_DN

48

IN OUT

PEG_RX2_DN

48

IN OUT

PEG_RX3_DN

48

IN

PEG_RX4_DN

48

IN

PEG_RX5_DN

48

IN

PEG_RX6_DN

48

IN

PEG_RX7_DN

48

IN OUT

PEG_RX0_DP

48

IN

PEG_RX1_DP

48

IN

PEG_RX2_DP

48

IN

PEG_RX3_DP

48

IN

PEG_RX4_DP

48

IN

PEG_RX5_DP

48

IN

PEG_RX6_DP

48

IN

PEG_RX7_DP

48

DGPU_HOLD_RST#

30

IN

100K_5%_2

PLT_RST#

30

41

43

IN

C42

C41

C46

C19

C47

C16

C24

C22

C43

C40

C45

C18

C25

C17

C23

C21

R30

C37

0.1UF_16V_2

21

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

0.1UF_16V_2

21

P3V3S_DGPU

1
2

5

U1

+

-

TC7SZ08FU

3

6019B0090701

0_5%_2_DY

4

R13

PEG_RX0_C_DNPEG_RX0_DN

PEG_RX1_C_DN

PEG_RX2_C_DN

PEG_RX3_C_DN

PEG_RX4_C_DN

PEG_RX5_C_DN

PEG_RX6_C_DN

PEG_RX7_C_DN

PEG_RX0_C_DP

PEG_RX1_C_DP

PEG_RX2_C_DP

PEG_RX3_C_DP

PEG_RX4_C_DP

PEG_RX5_C_DP

PEG_RX6_C_DP

PEG_RX7_C_DP

PEG_SLT_RST#

21

OUT

OUTIN

OUT
OUT
OUT

OUT

OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUTIN

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

18

48

E

D

C

THIS PART IS ONLY FOR INTEL PLATFORM

B

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SEYMOUR XT-S3

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

CHANGE by

8

7 6 5 4 3

XXX

DATE

21-OCT-2002

2 1

C

SHEET

of

48 57

B

A

REV

X01

8

7 6 5 4 3 2 1

MEM_ID3

MEM_ID2
0
0
0
0

STRAPS
TX_PWRS_ENB

TX_DEEMPH_EN
BIF_GEN2_EN_A
BIF_DEBUG_ACCESS

BIF_VGA_DIS
ROMIDCFG(2:0)

IF GPIO_22_EN=0 , THEN GPIO[11:13] DEFINES THE PRIMARY MEMORYAPERTURE SIZE

E

GPIO_13

0 512/256 MB (DEFAULT)
1

49
49
49
49
49
49

D

49

49
49
49
49
49
37

49

37

49

49
49
49

49

OUT

49
49
49

0
0
0
0

GPIO_12

IN
IN
IN
IN
IN
IN

OUT

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
IN
IN

PIN
GPIO0

GPIO1
GPIO2
GPIO4
GPIO7_BLON
GPIO9
GPIO[11:13]

0

GPIO25_TDI
GPIO24_TRSTB
GPUTHERM_INT#
GPU_GPIO2
GPU_GPIO0
GPU_GPIO1
GPIO27_TMS

GPU_GPIO9
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
GPU_GPIO23
GPU_CRT_VSYNC
GPU_CRT_HSYNC
GPU_GPIO22
BBEN
GPU_GPIO8

GPIO26_TCK
CTF
TESTEN
GPU_LCM_BLEN

MEM_ID1

MEM_ID0
0
0
1
1

0
1
0
1

DESCRIPTION OF DEFAULT SETTING
PCIE FULL TX OUTPUT SWING

PCIE TRANSMITTER DE-EMPHASIS ENABLED
PCIE GEN2 ENABLED
DEBUG SIGNALS MUXED OUT
CONTROL BACKLIGHT ON/OFF
VGA ENABLED
MEMORY APERTURE SIZE SELECT

1
01

MEMORY APERTURE SIZE

RESERVED

R40
R58
R46
R54
R49
R52
R73

R45
R48
R44
R43
R41
R39
R38
R42
R55
R53

R74
R47
R60
R59

GPIO_11

2Gb * 4 = 1GB
SAMSUNG C-DIE K4W2G1646C-HC11
HYNIX D-DIE H5TQ2G63DFR-11C
MICRON MT41J128M16HA-107G:D

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2_DY

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2_DY

21

10K_5%_2

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2

21

10K_5%_2

21

5.11K_1%_2

21

10K_5%_2

C

B

POW_SW0

0

1

+VDDC_GPU

1.1V
1V1

0.95V

0.9V

7 6 5 4 3

POW_SW1

0
0

A

1 0
1

8

P3V3S_DGPU

128M * 16 *4
128M * 16 *4
128M * 16 *4

PN : 6019B0818601

PN : 6019B0938301

P/N : APPLY

Q3

3

SSM3K7002FU

DS

G

2

P1V8S_DGPU

75MA

FBM_11_160808_121T

P1V0S_DGPU

125MA

FBM_11_160808_121T

1

R15

0_5%_2

L5

L6

U4

AF2

TXCAP_DPA3P

AF4

P1V8S_DGPU

R2

2 1

P1V8S_DGPU

P1V0S_DGPU

R3

10K_5%_2_DY

150MA

110MA

R33

2 1

10K_5%_2_DY

TP5

R61

2 1

2 1

10K_5%_2_DY

10K_5%_2_DY

MEM_ID3
MEM_ID2
MEM_ID1
MEM_ID0

P3V3S_DGPU

R57

21

4.7K_5%_2

2

D1

NC

60110GA0367T

499_1%_2

249_1%_2

13

P1V8S_DGPU

R24

2 1
21

R26

TP3

49

OUT

GPU_THROT#

35

OUT

21

C14

2 1

0.1UF_16V_2_DY

THERMTRIP#

CTF:
GPU CRITICAL TEMPER ATURE SHANG DOWN 110°C

R16

21

0_5%_2

20K_5%_2_DY

OUT

CTF

R21

21

23

35

DIODE-BAT54-TAP-PHP

49

IN

2 1

21

C53

C52

2 1

2 1

10UF_6.3V_3

21

C55

C57

2 1

2 1

10UF_6.3V_3

C35

22PF_50V_2_DY

C36

22PF_50V_2_DY

21

X1

21

6018B0054301_DY

3

2

4

1

P1V8S_DGPU

0.1UF_16V_2

0.1UF_16V_2

16

IN

R29

21

27MHZ_DY

5MA

GPU_27M_IN_1V8

R65

R67

1M_5%_2_DY

L7

FBM_11_160808_121T

0_5%_2_DY

0_5%_2_DY

50
50

21

OUT
OUT

49
49
49
50
50

1

49
49
49

49
49
49

56

49
56
49
49
49

49
49
49
49

49

52

OUT

C54

0.1UF_16V_2

21
21

GPU_GPIO0

OUT

GPU_GPIO1

OUT

GPU_GPIO2

OUT

GPU_THM_DAT

OUT

GPU_THM_CLK

OUT

GPU_LCM_BLEN

OUT

GPU_GPIO8

OUT

GPU_GPIO9

OUT

GPU_GPIO11

OUT

GPU_GPIO12

OUT

GPU_GPIO13

OUT

POW_SW0

OUT

GPUTHERM_INT#

CTF

OUT

POW_SW1

OUT

BBEN

OUT

GPU_GPIO22

OUT

GPU_GPIO23

OUT

GPIO24_TRSTB

OUT

GPIO25_TDI

OUT

GPIO26_TCK

OUT

GPIO27_TMS

OUT

TESTEN

OUT

PX_EN

R63

2 1

5.11K_1%_2

R120

21

0_5%_2

GPU_THERMDA
GPU_THERMDC

C29

2 1

10UF_6.3V_3

Y11

1

TP6

TP1

C59

2 1

0.1UF_16V_2

DVCLK

AE9

DVCNTL_0

L9

DVCNTL_1

N9

AE8
AD9

AC10

AD7
AC8
AC7
AB9
AB8
AB7
AB4
AB2

Y8
Y7

W6

V6

AC6
AC5

AA5
AA6

U1

W1

U3

Y6

AA1

R1
R3

U6

U10

T10
U8
U7

T9
T8
T7

P10

P4

P2
N6
N5
N3

Y9
N1
M4
R6

W10

M2

P8

P7
N8
N7

L6

L5

L3

L1

1

K4

K7 AH12

1

AF24

AB13

W8
W9
W7

AD10
AC14

AB16

AC16

AF14

AE14

AD14

AM28
AK28

AC22
AB22

T4

T2

R5

AD17
AC17

CHANGE by

DVO

DVCNTL_2

DVDATA_12
DVDATA_11
DVDATA_10
DVDATA_9
DVDATA_8
DVDATA_7
DVDATA_6
DVDATA_5
DVDATA_4
DVDATA_3
DVDATA_2
DVDATA_1
DVDATA_0

DPC_VDD18#3
DP_VSSR#13

DPC_VDD18#1
DPC_VDD18#2

DPC_VDD10#1
DPC_VDD10#2

DP_VSSR#14
DP_VSSR#15
DP_VSSR#16
DP_VSSR#17
DP_VSSR#18

I2C

SCL
SDA

GENERAL PURPOSE I/O

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB

JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
TESTEN
TESTEN_LEGACY

GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4

HPD1
PX_EN

VREFG

PLL/CLOCK

DPLL_PVDD
DPLL_PVSS

DPLL_VDDC

XTALIN
XTALOUT

XO_IN
XO_IN2

THERMAL

DPLUS
DMINUS

TS_FDO
TSVDD
TSVSS

AMD_SEYMOUR_XT_S3_FCBGA_631P

XXX

TXCAM_DPA3N

AG3

TX0P_DPA2P

AG5

TX0M_DPA2N

DPA

DPB

DPC

DAC1

SEYMOUR/PARK

SWAPLOCKA/R2SET

DDC/AUX

DDCDATA_AUX3N

DDCDATA_AUX5N

DATE

21-OCT-2002

2 1

TX1P_DPA1P
TX1M_DPA1N

TX2P_DPA0P
TX2M_DPA0N

TXCBP_DPB3P
TXCBM_DPB3N

TX3P_DPB2P
TX3M_DPB2N

TX4P_DPB1P
TX4M_DPB1N

TX5P_DPB0P
TX5M_DPB0N

TXCCP_DPC3P
TXCCM_DPC3N

TX0P_DPC2P
TX0M_DPC2N

TX1P_DPC1P
TX1M_DPC1N

TX2P_DPC0P
TX2M_DPC0N

DPC_CALR

SWAPLOCKB/C

NC/COMP

GENLK_CLK

GENLK_V2SYNC

NC/VDD2IDI
NC/VSS2IDI

NC/A2VDD

NC/A2VDDQ

TSVSSQ/A2VSSQ

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCCLK_AUX5P

DDC6CLK

DDC6DATA

AH3
AH1

AK3
AK1

AK5
AM3

AK6
AM5

AJ7
AH6

AK8
AL7

V4
U5

W3
V2

Y4
W5

AA3
Y2

R77

J8

150_5%_2

AM26

R

AK26

RB

AL25

G

AJ25

GB

AH24

B

AG25

BB

AH26

HSYNC

AJ27

VSYNC

R37

AD22

RSET

499_1%_2

AG24

AVDD

AE22

AVSSQ

AE23

VDD1DI

AD23

VSS1DI

AM12

NC/R2

AK12

NC/R2B

AL11

NC/G2

AJ11

NC/G2B

AK10

NC/B2

AL9

NC/B2B

AM10

NC/Y

AJ9

AL13
AJ13

AD19
AC19

AE20
AE17
AE19

AG13

AE6
AE5

AD2

AUX1P

AD4

AUX1N

AC11
AC13

AD13

AUX2P

AD11

AUX2N

AD20
AC20

AE16
AD16

AC1

GPU_CRT_CLK

AC3

GPU_CRT_DAT

TITLE

SIZE

C

21

GPU_CRT_R

GPU_CRT_G

GPU_CRT_B

GPU_CRT_HSYNC
GPU_CRT_VSYNC

21

70MA
45MA

FBM_11_160808_121T

OUT

OUT

OUT

OUT
OUT

P1V8S_DGPU

L9

21

P3V3S_DGPU

R106

R103

2.2K_5%_22.2K_5%_2

2 1

2 1

OUT
OUT

INVENTEC

MODEL,PROJECT,FUNCTION

SEYMOUR XT-S3

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

SHEET

of

49

FF

E

37

37

37

37

49

D

37

49

C

B

37
37

A

REV

X01

57

8 7

6 5

4

3 2 1

U4

D

P3V3S_DGPU

R32

2 1

10K_5%_2

R108

0_5%_2

21

BI

BI

GPU_THM_CLK

GPU_THM_DAT

R1017

0_5%_2

49

49

GPU_THM_R_CLK

21

GPU_THM_R_DAT

R31

2 1

10K_5%_2

2

2

1

Q11

G

SSM3K7002FU

DS

D S

Q12

G

SSM3K7002FU

1

3

3

THM_CLK

THM_DAT

23

35

BI

23

35

BI

P3V3S_DGPU

P3V3S_DGPU

NA

B

IN
IN

GPU_THERMDA
GPU_THERMDC

49
49

R56

C77

2 1

2 1

10K_5%_2_DY

0.1UF_16V_2_DY

U3

1

VDD

2

D+

3

D-

WINB_W83L771AWG_TSSOP_8P_DY

C5103

2 1

T_CRIT_A#

6019B0582601_DY

SCL
SDA

ALERT

GND

8

GPU_THM_R_CLK

7

GPU_THM_R_DAT

6
54

1000PF_50V_2_DY

AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27

AF32
AG27
AH32

W25
W26
W27

M32
N25
N27

R27

U25
U27

N11
N12
N13
N16
N18
N21

R12
R15
R17
R20

T21
U15

U17
U20

R11
T11

A3

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12

K28

PCIE_VSS#13

K32

PCIE_VSS#14

L27

PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18

P25

PCIE_VSS#19

P32

PCIE_VSS#20
PCIE_VSS#21

T25

PCIE_VSS#22

T32

PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25

V32

PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29

Y25

PCIE_VSS#30

Y32

PCIE_VSS#31

M6

GND#56
NC#5
NC#6
GND#59
GND#60
GND#61
GND#62

P6

GND#63

P9

GND#64
GND#65
GND#66
GND#67
GND#68

T13

GND#69

T16

GND#70

T18

GND#71
GND#72

T6

GND#73
GND#74
GND#75
GND#76

U9

GND#77

V13

GND#78

V16

GND#79

V18

GND#80

Y10

GND#81

Y15

GND#82

Y17

GND#83

Y20

GND#84
GND#85
GND#86

GND

GND#1

GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9

GND#10

GND#11

GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20

GND#21

GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30

GND#31

GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40

GND#41

GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50

GND#51

GND#52
GND#53
GND#54
GND#55

VSS_MECH#1

VSS_MECH#2
VSS_MECH#3

A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6

A32
AM1
AM32

D

CC

B

AA

AMD_SEYMOUR_XT_S3_FCBGA_631P

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SEYMOUR XT-S3

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5750

8 7

6 5

4

3 2 1

AA20
AA21
AB20
AB21

AA17
AA18
AB17
AB18

AA11
AA12

AM30

U4

MEM I/O

H13

VDDR1#1

H16

VDDR1#2

H19

VDDR1#3

J10

VDDR1#4

J23

VDDR1#5

J24

VDDR1#6

J9

VDDR1#7

K10

VDDR1#8

K23

VDDR1#9

K24

VDDR1#10

K9

VDDR1#11

L11

VDDR1#12

L12

VDDR1#13

L13

VDDR1#14

L20

VDDR1#15

L21

VDDR1#16

L22

VDDR1#17

LEVEL
TRANSLATION

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4

I/O

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

V12

VDDR4#1

Y12

VDDR4#2

U12

VDDR4#3

NC#1
NC#2

V11

NC#3

U11

NC#4

MEM CLK

L17

NC_VDDRHA

L16

NC_VSSRHA

PLL

PCIE_VDDR

L8

NC_MPV18

H7

SPV18

H8

SPV10

J7

SPVSS

AMD_SEYMOUR_XT_S3_FCBGA_631P

CORE

ISOLATED
CORE I/O

PCIE

POWER

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8

VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23

BIF_VDDC#1
BIF_VDDC#2

VDDCI#1

VDDCI#2

VDDCI#3

VDDCI#4

VDDCI#5

VDDCI#6

VDDCI#7

VDDCI#8

AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26

L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22

AA15
N15
N17
R13
R16
R18
Y21
T12
T15
T17
T20
U13
U16
U18
V21
V15
V17
V20
Y13
Y16
Y18
M11
M12

R21
U21

M13
M15
M16
M17
M18
M20
M21
N20

0.1UF_16V_2

C67

C105

2 1

C103

2 1

1UF_6.3V_2

C100

C98

2 1

1UF_6.3V_2

C91

C88

2 1

2.2UF_6.3V_2

C101

C49

2 1

1UF_6.3V_2

C93

C82

0.1UF_16V_2

0.1UF_16V_2

2 1

2 1

C68

0.1UF_16V_2

2 1

C102

2 1

1UF_6.3V_2

2 1

1UF_6.3V_2

2 1

2.2UF_6.3V_2

2 1

1UF_6.3V_2

C83

2 1

1UF_6.3V_2

P1V8S_DGPU_VDDR

C65

C66

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

C64

C62

2 1

2 1

1UF_6.3V_2

C85

C89

2 1

2 1

1UF_6.3V_2

C31

C33

2 1

2 1

10UF_6.3V_3

BIF_VDDC

C99

C97

2 1

1UF_6.3V_2

2 1

1UF_6.3V_2

C92

1UF_6.3V_2

C27

10UF_6.3V_3

2 1

4.7UF_6.3V_3

L2

HCB1608KF_221T20

2A_0603

10UF_6.3V_3

C4

C104

2 1

1UF_6.3V_2

C86

2 1

2 1

1UF_6.3V_2

C32

2 1

2 1

10UF_6.3V_3

IN

PVCORE_DGPU

21

6014B0157601

2 1

10UF_6.3V_3

C96

2 1

1UF_6.3V_2

1UF_6.3V_2

10UF_6.3V_3

52

14A

P1V8S_DGPU

440MA

P1V0S_DGPU

2A

C90

2 1

1UF_6.3V_2

D

PVCORE_DGPU

14A

CC

C87

C84

C94

2 1

2 1

1UF_6.3V_2

C69

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SEYMOUR XT-S3

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

51 57

1

REV

X01

P1V5S_DGPU

1.2A

D

C5185

2 1

2 1

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

2.2UF_6.3V_2

2 1

2 1

4.7UF_6.3V_3

4.7UF_6.3V_3

C161

C138

C158

C157

C76

C116

P1V8S_DGPU

219MA

P3V3S_DGPU

L8

MLZ1608M100WT

250MA_0603

21

C60

C63

2 1

10UF_6.3V_3

C61

2 1

0.1UF_16V_2

2 1

1UF_6.3V_2

60MA

C95

C30

P1V8S_DGPU

170MA

FBM_11_160808_121T

200MA_0603

L10

21

C81

B

P1V8S_DGPU

75MA

L13

FBM_11_160808_121T

200MA_0603

P1V8S_DGPU

50MA

L11

FBM_11_160808_121T

200MA_0603

P1V0S_DGPU

100MA

FBM_11_160808_121T

200MA_0603

8

2 1

2 1

0.1UF_16V_2

10UF_6.3V_3

C80

2 1

2 1

1UF_6.3V_2

P1V8S_DGPU_VDDR

0.1UF_16V_2

40MA

21

C115

21

C106

L12

21

7 6

2 1

C110

C79

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

C107

2 1

10UF_6.3V_3

0.1UF_16V_2

C112

2 1

2 1

0.1UF_16V_2

10UF_6.3V_3

8 7

P3V3S

BACO MODE

R109

2 1

Q16

G

1
2

10K_5%_2_DY

3

DS

2

P3V3S

U12

5

TC7SET08FU_DY

+

-

3

PX_EN#

4

SSM3K7002FU_DY

IN

49

IN

DGPU_PWROK

PX_MODE

DGPU_PWR_EN

PX_EN

SSM3K7002FU_DY

1

27

D

3055

14

31

35

OUT

14

5255

IN

6 5

P3V3S

5

+

1
2

-

C56

0.1UF_16V_2_DY

U10

TC7SET08FU_DY

4

21

PX_MODE

3

FOR PX5.0

21

R110 MOUNT

P5V0S

R110

0_5%_2

P5V0S

R111

2 1

1K_5%_2_DY

3

Q17

DS

1

G

R112

1

G

2

2 1

1K_5%_2_DY

3

DS

Q18

SSM3K7002FU_DY

2

OUT

VDDC_ON

1.0V_ON

4

P1V8S_DGPU

440MA

240MA

14

5552

AG15
AG16

P1V0S_DGPU

AG20

AG21

AG14

AH14 AE3
AM14
AM16
AM18

P1V8S_DGPU

440MA

AG17

P1V0S_DGPU

OUT

OUT

240MA

52

52

P1V8S_DGPU P1V8S_DGPU

AG22

AG23
AM20
AM22
AM24

R36

AG18

440MA

AG19

U4

3 2 1

U4

DP E/F POWER DP A/B POWER

DPEF_VDD18#1
DPEF_VDD18#2

DPEF_VDD10#1
DPEF_VDD10#2

DP_VSSR#19
DP_VSSR#20
DP_VSSR#21
DP_VSSR#22
DP_VSSR#23

AF16

DPEF_VDD18#3
DPEF_VDD18#4

AF22

DPEF_VDD10#3
DPEF_VDD10#4

AF23

DP_VSSR#24
DP_VSSR#25
DP_VSSR#26
DP_VSSR#27
DP_VSSR#28

21

AF17

DPEF_CALR

DPEF_VDD18#5

AF19

DP_VSSR#29

DPEF_VDD18#6

AF20

DP_VSSR#30

AMD_SEYMOUR_XT_S3_FCBGA_631P

DP PLL POWER

DPAB_VDD18#1

DPAB_VDD18#2

DPAB_VDD10#1
DPAB_VDD10#2

DP_VSSR#1

DP_VSSR#2
DP_VSSR#3
DP_VSSR#4
DP_VSSR#5

DPAB_VDD18#3
DPAB_VDD18#4

DPAB_VDD10#3
DPAB_VDD10#4

DP_VSSR#6
DP_VSSR#7
DP_VSSR#8
DP_VSSR#9

DP_VSSR#10

DPAB_CALR

DPAB_VDD18#5

DP_VSSR#11

DPAB_VDD18#6

DP_VSSR#12

AE11
AF11

AF6
AF7

AE1
AG1

AG6
AH5

AE13
AF13

AF8
AF9

AF10
AG9
AH8
AM6
AM8

AE10

AG8
AG7

AG10
AG11

R35

150_1%_2150_1%_2

P1V8S_DGPU

300MA

P1V0S_DGPU

220MA

P1V8S_DGPU

300MA

P1V0S_DGPU

220MA

21

D

CC

300MA

LVDS CONTROL

B

BACO MODE

52

52

8

IN

PVCORE_DGPU

IN

P1V0S_DGPU

1.0V_ON

ALPHA_AO3416_SOT23_3P_DY

VDDC_ON

2

3

D S

Q19

G

PMV56XN_DY

1

S

SD

S

D

D

Q20

G

G

G

7 6

BIF_VDDC

IN

PVCORE_DGPU

R113

0_5%_2

C58

C109

2 1

2 1

4.7UF_6.3V_3

4.7UF_6.3V_3

DEFULT IS PX5.0

51

21

LVTMDP

AMD_SEYMOUR_XT_S3_FCBGA_631P

CHANGE by

5 4

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

XXX

VARY_BL

TXOUT_U3P
TXOUT_U3N

TXOUT_L3P
TXOUT_L3N

DIGON

AB11
AB12

AH20
AJ19

AL21
AK20

AH22
AJ21

AL23
AK22

AK24
AJ23

AL15
AK14

AH16
AJ15

AL17
AK16

AH18
AJ17

AL19
AK18

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SEYMOUR XT-S3

DOC.NUMBER

CODE

SIZE

A3

CS

1310xxxxx-0-0

SHEET

52

of

57

1

REV

X01

B

AA

8 7

D

P1V5S_DGPU

R79

40.2_1%_2

2 1

R69

P1V5S_DGPU

B

R80

40.2_1%_2

C119

100_5%_2

2 1

2 1

0.1UF_16V_2

2 1

R81

C120

100_5%_2

2 1

P1V5S_DGPU

2 1

0.1UF_16V_2

BI

VM_RESET

54

6 5

54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54

R72

51_5%_2

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

21

DQA0(0)
DQA0(1)
DQA0(2)
DQA0(3)
DQA0(4)
DQA0(5)
DQA0(6)
DQA0(7)
DQA0(8)
DQA0(9)
DQA0(10)
DQA0(11)
DQA0(12)
DQA0(13)
DQA0(14)
DQA0(15)
DQA0(16)
DQA0(17)
DQA0(18)
DQA0(19)
DQA0(20)
DQA0(21)
DQA0(22)
DQA0(23)
DQA0(24)
DQA0(25)
DQA0(26)
DQA0(27)
DQA0(28)
DQA0(29)
DQA0(30)
DQA0(31)
DQA0(32)
DQA0(33)
DQA0(34)
DQA0(35)
DQA0(36)
DQA0(37)
DQA0(38)
DQA0(39)
DQA0(40)
DQA0(41)
DQA0(42)
DQA0(43)
DQA0(44)
DQA0(45)
DQA0(46)
DQA0(47)
DQA0(48)
DQA0(49)
DQA0(50)
DQA0(51)
DQA0(52)
DQA0(53)
DQA0(54)
DQA0(55)
DQA0(56)
DQA0(57)
DQA0(58)
DQA0(59)
DQA0(60)
DQA0(61)
DQA0(62)
DQA0(63)

R78

R68

R70

2 1

10_5%_2

C108

2 1

120PF_50V_2

240_1%_2

21
21

240_1%_2

R71

2 1

4

U4

GDDR5/DDR3

K27

DQA0_0

J29

DQA0_1

H30

DQA0_2

H32

DQA0_3

G29

DQA0_4

F28

DQA0_5

F32

DQA0_6

F30

DQA0_7

C30

DQA0_8

F27

DQA0_9

A28

DQA0_10

C28

DQA0_11

E27

DQA0_12

G26

DQA0_13

D26

DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MVREFDA
MVREFSA

MEM_CALRN0
MEM_CALRP0

DRAM_RST

CLKTESTA
CLKTESTB

MEMORY INTERFACE

F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17

C17

E17

D16

F15
A15

D14

F13

A13
C13
E11
A11
C11

F11

A9
C9
F9
D8
E7
A7
C7
F7
A5
E5

C3
E1
G7
G6
G1
G3

J6
J1
J3
J5

K26
J26

J25
K25

L10

K8

L7

4.99K_1%_2

AMD_SEYMOUR_XT_S3_FCBGA_631P

WCKA0B_0/DQMA0_1

WCKA1B_0/DQMA1_1

GDDR5 / DDR3

GDDR5/DDR3

MAA0_0/MAA_0

MAA0_1/MAA_1

MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4

MAA0_5/MAA_5
MAA0_6/MAA0_6
MAA0_7/MAA0_7

MAA1_0/MAA_8

MAA1_1/MAA_9
MAA1_2/MAA_10

MAA1_3/MAA_11

MAA1_4/MAA_12

MAA1_5/MAA_BA2
MAA1_6/MAA_BA0
MAA1_7/MAA_BA1

WCKA0_0/DQMA0_0

WCKA0_1/DQMA0_2

WCKA0B_1/DQMA0_3

WCKA1_0/DQMA1_0

WCKA1_1/DQMA1_2

WCKA1B_1/DQMA1_3

EDCA0_0/QSA0_0
EDCA0_1/QSA0_1
EDCA0_2/QSA0_2
EDCA0_3/QSA0_3
EDCA1_0/QSA1_0
EDCA1_1/QSA1_1
EDCA1_2/QSA1_2
EDCA1_3/QSA2_3

DDBIA0_0/QSA0_0B
DDBIA0_1/QSA0_1B
DDBIA0_2/QSA0_2B
DDBIA0_3/QSA0_3B
DDBIA1_0/QSA1_0B
DDBIA1_1/QSA1_1B
DDBIA1_2/QSA1_2B
DDBIA1_3/QSA1_3B

ADBIA0/ODTA0
ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0

CSA0B_1

CSA1B_0

CSA1B_1

CKEA0

CKEA1

WEA0B
WEA1B

MAA0_8/MAA_13

MAA1_8/RSVD

K17

MAA0(0)

J20

MAA0(1)

H23

MAA0(2)

G23

MAA0(3)

G24

MAA0(4)

H24

MAA0(5)

J19

MAA0(6)

K19

MAA0(7)

J14

MAA0(8)

K14

MAA0(9)

J11

MAA0(10)

J13

MAA0(11)

H11

MAA0(12)

G11

VM_A_BA2

J16

VM_A_BA0

L15

VM_A_BA1

E32

VM_R_ADQM#(0)

E30

VM_R_ADQM#(1)

A21

VM_R_ADQM#(2)

C21

VM_R_ADQM#(3)

E13

VM_R_ADQM#(4)

D12

VM_R_ADQM#(5)

E3

VM_R_ADQM#(6)

F4

VM_R_ADQM#(7)

H28

VM_R_ADQSA(0)

C27

VM_R_ADQSA(1)

A23

VM_R_ADQSA(2)

E19

VM_R_ADQSA(3)

E15

VM_R_ADQSA(4)

D10

VM_R_ADQSA(5)

D6

VM_R_ADQSA(6)

G5

VM_R_ADQSA(7)

H27

VM_R_ADQSA#(0)

A27

VM_R_ADQSA#(1)

C23

VM_R_ADQSA#(2)

C19

VM_R_ADQSA#(3)

C15

VM_R_ADQSA#(4)

E9

VM_R_ADQSA#(5)

C5

VM_R_ADQSA#(6)

H4

VM_R_ADQSA#(7)

L18

VM_R_ODTA0

K16

VM_R_ODTA1

H26

DDR_CLKA0

H25

DDR_CLKA0#

G9

DDR_CLKA1

H9

DDR_CLKA1#

G22

DDR_RASA0#

G17

DDR_RASA1#

G19

DDR_CASA0#

G16

DDR_CASA1#

H22

DDR_CSA0#_0

J22
G13

DDR_CSA1#_0

K13
K20

DDR_CKEA0

J17

DDR_CKEA1

G25

DDR_WEA0#

H10

DDR_WEA1#

G20

MAA13

G14

3 2 1

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

54

BI

53

54

OUT

53

54

OUT

53

54

OUT

53

54

OUT

54

OUT

54

OUT

54

OUT

54

OUT

54

OUT

54

OUT

54

OUT

54

OUT

54

OUT

54

OUT

54

BI

D

CC

B

AA

DDR_CLKA1

53

54

R84

R86

C130

56_5%_256_5%_2

21

DDR_CLKA1#

5353

5454

OUTIN

21

1

R95

56_5%_2

2

8

7 6

5 4

R94

56_5%_2

C144

0.01UF_50V_20.01UF_50V_2

21

DDR_CLKA0#DDR_CLKA0

OUTIN

CHANGE by

53

54

DATE

XXX

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SEYMOUR XT-S3

DOC.NUMBER

CODE

SIZE

A3

CS

1310xxxxx-0-0

SHEET

of

5753

1

REV

X01

21

2 1

8

7 6 5 4 3 2 1

U7

VREFC_U7

54

BI

VREFD_U7

54

BI

MAA0(0)

53

54

BI

MAA0(1)

53

54

BI

MAA0(2)

53

54

BI

MAA0(3)

53

54

BI

MAA0(4)

53

54

BI

MAA0(5)

53

54

BI

MAA0(6)

53

54

BI

MAA0(7)

53

54

BI

MAA0(8)

53

54

BI

MAA0(9)

53

54

BI

MAA0(10)

53

54

BI

MAA0(11)

53

54

BI

MAA0(12)

53

54

BI

MAA13

53

54

BI

VM_A_BA0

53

54

IN

VM_A_BA1

53

54

IN

VM_A_BA2

53

54

IN

DDR_CLKA0

53

54

IN

DDR_CLKA0#

53

54

IN

DDR_CKEA0

53

54

IN

VM_R_ODTA0

53

54

IN

DDR_CSA0#_0

53

54

IN

DDR_RASA0#

53

54

IN

DDR_CASA0#

53

54

IN

53

53
53

53
53

53
53

53

IN

BI
BI

BI
BI

BI
BI

BI

DDR_WEA0#

VM_R_ADQSA(2)
VM_R_ADQSA(1)

VM_R_ADQM#(2)
VM_R_ADQM#(1)

VM_R_ADQSA#(2)
VM_R_ADQSA#(1)

VM_RESET

E

54

54

243_1%_2

D

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10_AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15_BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

C_K_

K9

CKE_CKE0

K1

ODT_ODT0

L2

C_S__C_S_0_

J3

R_A_S_

K3

C_A_S_

L3

W_E_

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

D_Q_S_L_

B7

D_Q_S_U_

T2

R_E_S_E_T_

L8

ZQ_ZQ0

R99

2 1

J1

NC_ODT1

L1

NC_C_S_1_

J9

NC_CE1

L9

NC_ZQ1

SDRAM DDR3

96-BALL

VDDQ#A1

VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2

VDDQ#E9

VDDQ#F1

VDDQ#H2

VDDQ#H9

VSSQ#B1

VSSQ#B9

VSSQ#D1

VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9

VSSQ#G1

VSSQ#G9

E3

DQA0(16)

DQL0

F7

DQA0(17)

DQL1

F2

DQA0(22)

DQL2

F8

DQA0(19)

DQL3

H3

DQA0(20)

DQL4

H8

DQA0(21)

DQL5

G2

DQA0(18)

DQL6

H7

DQA0(23)

DQL7

D7

DQA0(15)

DQU0

C3

DQA0(9)

DQU1

C8

DQA0(13)

DQU2

C2

DQA0(11)

DQU3

A7

DQA0(12)

DQU4

A2

DQA0(8)

DQU5

B8

DQA0(14)

DQU6

A3

DQA0(10)

DQU7

P1V5S_DGPU

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

53

BI

54

BI

53

BI

53

BI

53

BI

54

53

BI

54

53

BI

54

53

BI

54

53

BI

54
54
54

53

BI

54

53

BI

54

53

BI

54

53

BI

54

53

BI

54

53

BI

54

53

BI

54

53

BI

54
54
54

54
54
54

54
54
54
54
54

54

54

53
53
53
53
53
53
53
53
53
53
53
53
53
53

53
53
53

53
53
53

53
53
53
53
53

53
53

53
53

53
53

53

BI
BI

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

IN
IN
IN

IN
IN
IN

IN
IN
IN
IN
IN

BI
BI

BI
BI

BI
BI

BI

VREFD_U8

MAA0(0)
MAA0(1)
MAA0(2)
MAA0(3)
MAA0(4)
MAA0(5)
MAA0(6)
MAA0(7)
MAA0(8)
MAA0(9)
MAA0(10)
MAA0(11)
MAA0(12)
MAA13

VM_A_BA0
VM_A_BA1
VM_A_BA2

DDR_CLKA0
DDR_CLKA0#
DDR_CKEA0

VM_R_ODTA0
DDR_CSA0#_0
DDR_RASA0#
DDR_CASA0#
DDR_WEA0#

VM_R_ADQSA(3)
VM_R_ADQSA(0)

VM_R_ADQM#(3)
VM_R_ADQM#(0)

VM_R_ADQSA#(3)
VM_R_ADQSA#(0)

VM_RESET

R96

243_1%_2

SAM_K4W2G1646B_HC12_FBGA_96P

P1V5S_DGPU

R101

VREFC_U7

54

BI

C

2 1

4.99K_1%_24.99K_1%_2

54 54

BI

C155

R100

2 1

2 1

0.1UF_16V_2

C143

2 1

P1V5S_DGPU

R92

2 1

R93

2 1

0.1UF_16V_2

VREFC_U8VREFD_U7

BI

C159

4.99K_1%_2 4.9 9K_1%_2

U8

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10_AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15_BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

C_K_

K9

CKE_CKE0

K1

ODT_ODT0

L2

C_S__C_S_0_

J3

R_A_S_

K3

C_A_S_

L3

W_E_

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

D_Q_S_L_

B7

D_Q_S_U_

T2

R_E_S_E_T_

L8

ZQ_ZQ0

2 1

J1

NC_ODT1

L1

NC_C_S_1_

J9

NC_CE1

L9

NC_ZQ1

SDRAM DDR3

SAM_K4W2G1646B_HC12_FBGA_96P

P1V5S_DGPU

R105

2 1

4.99K_1%_2

54

R104

2 1

2 1

4.99K_1%_2

0.1UF_16V_2

96-BALL

BI

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSSQ#B1
VSSQ#B9

VSSQ#D1

VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9

VSSQ#G1

VSSQ#G9

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VSS#A9

VSS#B3
VSS#E1
VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9
VSS#P1

VSS#P9

VSS#T1

VSS#T9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VREFD_U8

E3

DQA0(30)VREFC_U8

F7

DQA0(24)

F2

DQA0(27)

F8

DQA0(26)

H3

DQA0(28)

H8

DQA0(25)

G2

DQA0(31)

H7

DQA0(29)

D7

DQA0(3)

C3

DQA0(5)

C8

DQA0(2)

C2

DQA0(0)

A7

DQA0(4)

A2

DQA0(1)

B8

DQA0(6)

A3

DQA0(7)

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

P1V5S_DGPU

P1V5S_DGPU

C133

2 1

0.1UF_16V_2

2.64A

R91

R90

53
53
53

53
53
53

53
53
53
53
53

BI
BI

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI

BI
BI

BI
BI

BI

BI

IN
IN
IN

IN
IN
IN

IN
IN
IN
IN
IN

VREFC_U9
VREFD_U9

MAA0(0)
MAA0(1)
MAA0(2)
MAA0(3)
MAA0(4)
MAA0(5)
MAA0(6)
MAA0(7)
MAA0(8)
MAA0(9)
MAA0(10)
MAA0(11)
MAA0(12)
MAA13

VM_A_BA0
VM_A_BA1
VM_A_BA2

DDR_CLKA1
DDR_CLKA1#
DDR_CKEA1

VM_R_ODTA1
DDR_CSA1#_0
DDR_RASA1#
DDR_CASA1#
DDR_WEA1#

VM_R_ADQSA(4)
VM_R_ADQSA(7)

VM_R_ADQM#(4)
VM_R_ADQM#(7)

VM_R_ADQSA#(4)
VM_R_ADQSA#(7)

VM_RESET

243_1%_2

VREFC_U9

R87

53

54

BI

53

54

BI

53

BI

53

53

54

BI

53

53

54

BI

53

53

54

BI

53

53

54

BI

53

53

54

BI

53

54

53

54

53

53

54

BI

53

53

54

BI

53

53

54

BI

53

53

54

BI

53

53

54

BI

53

53

54

BI

53

53

54

BI

53

BI

54
54
54

54
54
54

54
54
54
54
54

53
53

53
53

53
53

53

54

2 1

54

4.99K_1%_2

C149

2 1

4.99K_1%_2

U6

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10_AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15_BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

C_K_

K9

CKE_CKE0

K1

ODT_ODT0

L2

C_S__C_S_0_

J3

R_A_S_

K3

C_A_S_

L3

W_E_

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

D_Q_S_L_

B7

D_Q_S_U_

T2

R_E_S_E_T_

L8

ZQ_ZQ0

2 1

J1

NC_ODT1

L1

NC_C_S_1_

J9

NC_CE1

L9

NC_ZQ1

SDRAM DDR3

SAM_K4W2G1646B_HC12_FBGA_96P

P1V5S_DGPU

21

R97

4.99K_1%_2

54

21

R98

2 1

4.99K_1%_2

0.1UF_16V_2

96-BALL

E3

VDDQ#A1

VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2

VDDQ#E9

VDDQ#F1

VDDQ#H2

VDDQ#H9

VSSQ#B1

VSSQ#B9

VSSQ#D1

VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9

VSSQ#G1

VSSQ#G9

DQL0

F7

DQA0(33)

DQL1

F2

DQA0(39)

DQL2

F8

DQA0(35)

DQL3

H3

DQA0(37)

DQL4

H8

DQA0(32)

DQL5

G2

DQA0(34)

DQL6

H7

DQA0(36)

DQL7

D7

DQA0(62)

DQU0

C3

DQA0(57)

DQU1

C8

DQA0(63)

DQU2

C2

DQA0(59)

DQU3

A7

DQA0(60)

DQU4

A2

DQA0(61)

DQU5

B8

DQA0(56)

DQU6

A3

DQA0(58)

DQU7

P1V5S_DGPU

B2

VDD#B2

D9

VDD#D9

G7

VDD#G7

K2

VDD#K2

K8

VDD#K8

N1

VDD#N1

N9

VDD#N9

R1

VDD#R1

R9

VDD#R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS#A9

B3

VSS#B3

E1

VSS#E1

G8

VSS#G8

J2

VSS#J2

J8

VSS#J8

M1

VSS#M1

M9

VSS#M9

P1

VSS#P1

P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

53

BI

53

BI

53

54

BI

53

54

BI

53

54

BI

53

54

BI

53

54

BI

53

54

BI

54
54

53

54

BI

53

54

BI

53

54

BI

53

54

BI

53

54

BI

53

54

BI

53

BI

53

BI

53

54

2.64A2.64A

54
54

54
54
54

54
54
54
54
54

54

P1V5S_DGPU

21

R76

VREFD_U9

BI

C113

4.99K_1%_2

21

R75

2 1

4.99K_1%_2

0.1UF_16V_2

VREFC_U10

54

BI

VREFD_U10DQA0(38)

54

BI

MAA0(0)

53

BI

MAA0(1)

53

BI

MAA0(2)

53

BI

MAA0(3)

53

BI

MAA0(4)

53

BI

MAA0(5)

53

BI

MAA0(6)

53

BI

MAA0(7)

53

BI

MAA0(8)

53

BI

MAA0(9)

53

BI

MAA0(10)

53

BI

MAA0(11)

53

BI

MAA0(12)

53

BI

MAA13

53

BI

VM_A_BA0

IN

VM_A_BA1

53

IN

VM_A_BA2

53

IN

DDR_CLKA1

53

IN

DDR_CLKA1#

53

IN

DDR_CKEA1

53

IN

VM_R_ODTA1

53

IN

DDR_CSA1#_0

53

IN

DDR_RASA1#

53

IN

DDR_CASA1#

53

IN

DDR_WEA1#

53

IN

VM_R_ADQSA(5)

53

BI

VM_R_ADQSA(6)

53

BI

VM_R_ADQM#(5)

53

BI

VM_R_ADQM#(6)

53

BI

VM_R_ADQSA#(5)

53

BI

VM_R_ADQSA#(6)

53

BI

VM_RESET

53

BI

R83

243_1%_2

VREFC_U10

54

BI

C123

U5

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10_AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15_BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

C_K_

K9

CKE_CKE0

K1

ODT_ODT0

L2

C_S__C_S_0_

J3

R_A_S_

K3

C_A_S_

L3

W_E_

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

D_Q_S_L_

B7

D_Q_S_U_

T2

R_E_S_E_T_

L8

ZQ_ZQ0

2 1

J1

NC_ODT1

L1

NC_C_S_1_

J9

NC_CE1

L9

NC_ZQ1

SDRAM DDR3

SAM_K4W2G1646B_HC12_FBGA_96P

P1V5S_DGPU

R85

2 1

4.99K_1%_2

54

R82

2 1

2 1

4.99K_1%_2

0.1UF_16V_2

96-BALL

E3

DQA0(41)

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#E1
VSS#G8

VSS#M1
VSS#M9
VSS#P1

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

DQL0

F7

DQA0(47)

DQL1

F2

DQA0(45)

DQL2

F8

DQA0(46)

DQL3

H3

DQA0(44)

DQL4

H8

DQA0(43)

DQL5

G2

DQA0(40)

DQL6

H7

DQA0(42)

DQL7

D7

DQA0(55)

DQU0

C3

DQA0(48)

DQU1

C8

DQA0(54)

DQU2

C2

DQA0(51)

DQU3

A7

DQA0(52)

DQU4

A2

DQA0(49)

DQU5

B8

DQA0(53)

DQU6

A3

DQA0(50)

DQU7

P1V5S_DGPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9

VSS#A9

B3

VSS#B3

E1
G8
J2

VSS#J2

J8

VSS#J8

M1
M9
P1
P9

VSS#P9

T1

VSS#T1

T9

VSS#T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

2.64A

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

53

BI

FF

E

D

P1V5S_DGPU

R88

VREFD_U10

BI

2 1

4.99K_1%_2

R89

C117

2 1

2 1

4.99K_1%_2

0.1UF_16V_2

C

CHANGE by

P1V5S_DGPU

C131

2 1

XXX

C124

C38

C125

C128

2 1

2 1

10UF_6.3V_3

2.2UF_6.3V_2

DATE

21-OCT-2002

C44

2 1

2 1

0.1UF_16V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

2 1

C127

C146

C147

2 1

2 1

0.1UF_16V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

VRAM DDR3

CODE

SIZE

C

CS

0.1UF_16V_2

DOC.NUMBER

1310xxxxx-0-0

SHEET

B

A

REV

X01

of

5754

P1V5S_DGPU

C141

2 1

C153

C152

C73

C75

C154

C134

C142

2 1

2 1

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

2.2UF_6.3V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

C160

2 1

2 1

0.1UF_16V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

P1V5S_DGPU

C118

2 1

P1V5S_DGPU

C132

C48

C129

C135

C70

C145

C71

C139

C137

C140

2 1

2 1

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

2.2UF_6.3V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

C151

2 1

2 1

0.1UF_16V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

C150

C122

2 1

2 1

2 1

10UF_6.3V_3

2.2UF_6.3V_2

C39

C121

C148

2 1

2 1

0.1UF_16V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

C136

2 1

2 1

2 1

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

B

HYNIX 1GB D-DIE
SAMSUNG 1GB C-DIE

PN : 6019B0938301
PN : 6019B0818601

A

8

7 6 5 4 3

8 7

6 5

4

3 2 1

GPU 1.05V

Q301

6.3A/30V

1

D

2
5

FDC655BN

6015B0032701

R301

0_5%_2

NMOS_4D1S

VRP1V05S_VCCP

9

12

D

IN

GPU_P15V0A_RC

C306

C305

C304

C303

2 1

2 1

2 1

2 1

2.2UF_6.3V_2_DY

2.2UF_6.3V_2_DY

2.2UF_6.3V_2_DY

2.2UF_6.3V_2_DY

P1V0S_DGPU

3.4A

4

S

36

G

C302

2 1

21

C301

2 1

2200pF_50V_2

10uF_6.3V_3

GPU 3.3V

IN

DGPU_PWR_EN#

30

55

R22

1K_5%_2

P3V3S

C28

21

P3V3S_DGPU

Q10

AM2321P

SD

2

G

1

R27

10K_5%_2

2 1

2 1

0.1UF_16V_2

SSM3K7002FU

60MA

3

R28

2 1

200_5%_2

3

DS

1

G

Q9

2

D

CC

DEFULT IS PX5.0

GPU 1.8V

P15V0A

P3V3A

B

MONUT R128
DEL R12 , Q6

30

55

27

3052

IN

IN

DGPU_PWR_EN#

DGPU_PWR_EN

SSM3K7002FU

100K_5%_2

R128

0_5%_2_DY

R12

21

21

1

3

DS

1

G

Q6

2

2 1

3

DS

G

2

R11

560K_1%_2

GPU_P15V0A_RC

Q5

SSM3K7002FU

P1V8S_DGPU

R124

0_5%_2

21

3.1A

Q4

4

S

3 6

G

NMOS_4D1S

FDC655BN

6.3A/30V

C13

2 1

0.01UF_50V_2

P1V8S

1

D

2
5

C72

2 1

2.2UF_6.3V_2

BACO MODE

14

52

IN

P3V3A

R18

100K_5%_2_DY

PX_MODE

SSM3K7002FU_DY

SSM3K7002FU_DY

21

1

G

Q13

P15V0A

Q14

1

G

3

DS

2

GPU_P15V0A_RC

R19

2 1

560K_1%_2_DY

3

DS

R20

0_5%_2_DY

21

2

R102

21

0_5%_2

GPU 1.5V

P1V5S_DGPU

1.2A

6015B0097401-001

1

S

2
3
4 5

G

NMOS_4D3S

AON7410

8A/30V

C51

2 1

0.01UF_50V_2_DY

P1V5

Q15

8

D

7
6

C74

2 1

2.2UF_6.3V_2

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

DGPU POWER EE

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

55

of

1

DOC.NUMBER

CODE

REV

X01

57

8 7

6 5

4

3 2 1

OCP=19AMP

PVCORE_DGPU

PAD6750

2 1

OCP=19A

560UF_2.5V

12

56

OUT

POWERPAD_2_0610

P5V0A

D

21

R6756

10_5%_2

1UF_6.3V_2

9.53K_1%_2

2 1

C6757

1UF_6.3V_2

R6758

2 1

C6754

2 1

OUT

IN

DGPU_PG

EN_DGPU

14

14

R6755

240K_5%_2

21

U6750

16

TON

VDDP

UGATE

VDD

PHASE

LGATE

PGOOD

CS

EN_DEM D1

GND

BOOT

G0

FB

G1

D0

VOUT

9

2

4

10

15 5
17

REA_RT8208BGQW_WQFN_16P

R6752

2.2_5%_3

13

12

VRPVCORE_DGPU_HG

11

VRPVCORE_DGPU_LG

8

7

POW_SW0

3

POW_SW1

14

6
1

21

IN

IN

C6753

0.1UF_16V_2

49

49

R6753

7.68K_1%_2

R6754

16.2K_1%_2

21

21
21

FDMS0308ASFDMC7696

PVBAT

NMOS_4D3S

G

G

678

3

678

3

Q6750

D

S

2145

D

S

2145

C6760

2 1

2 1

4.7UF_25V_5_DY

Q6751

R7675

2 1

RSC_0603_DYCSC0402_DY

C7675

2 1

CYN_PCMB063T_R68MS_4P

C6761

2 1

10UF_25V_5

L6750

C6762

CSC0805_DY

CHOKE_4PIN_2PIN

21

21

43

43

VRPVCORE_DGPUVRPVCORE_DGPU_PH

R6750

2K_1%_2

2 1

9.76K_1%_2

R6751

+

C6750

2 1

21

56

IN

VRPVCORE_DGPU

D

CC

B

P.S. R6750(R1)R6751(R2)R6753(R3)R6754(R4)

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

DGPU POWER

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

5756

8 7

6 5

4

3 2 1

USB BOARD

P/N󶁪6050A2493701

C9100

2 1

DGND_USB

22UF_6.3V_5

D

DGND_USBDGND_USB

USBPWR_EN_UB

57

IN

57

57

SCREW280_800_1P

SCREW280_800_1P

USB_P1_UB_DP

BI

USB_P1_UB_DN

BI

57

BI

57

BI

S9100

1

S9101

1

57

BI

57

BI

USB_P9_UB_DP

USB_P9_UB_DN

USB_P1_UB_DN
USB_P1_UB_DP

P5V0A_DB

1
2
3
4
5
6
7
8
9

10

11

12

SMDPAD12_100_28X118

DGND_USB

WCM_2012_900T

PAD4

1

2

3

4

5

6

7

8

9

10

11

12

DGND_USB

L9100

PHP_PRTR5V0U2X_SOT143_4P_DY

22uF_6.3V_5

USB_P1_UB_L_DN

21

USB_P1_UB_L_DP

34

1

DGND_USB

57

IN

C9103

2 1

U9101

2
IO

1

C9101

2 1

1uF_6.3V_2

USBPWR_EN_UB

P5V0A_USB2

32

3

IO

DGND_USB

4

4

VccGND

P5V0A_DB P5V0A_USB2

U9100

1

2
3
4

GMT_G547E1P81U_MSOP_8P

6019B0789501

DGND_USB

8

OUT

GND

7

OUT

IN

6

OUT

IN

5

EN

OC#

C9102

2 1

DGND_USB

+

330uF_6.3V

USB 2.0 CONN 1

CN9101

1

2
3
4

OCTEK_USB_04WREB_4P
6012B0397201

1
2
3
4

P5V0A_USB2

G1

G1

G2

G2

G3

G3

G4

G4

DGND_USB

P5V0A_USB2

C9104

B

57
57

BI
BI

USB_P9_UB_DN
USB_P9_UB_DP

DGND_USB DGND_USB

L9101

WCM_2012_900T

DGND_USB

2 1

22uF_6.3V_5

USB_P9_UB_L_DN

21

USB_P9_UB_L_DP

34

U9102

2

IO

1

1

PHP_PRTR5V0U2X_SOT143_4P_DY

VccGND

USB 2.0 CONN 2

CN9102

1

1

2

2

3

3

4

4

OCTEK_USB_04WREB_4P

32

3

IO

4

DGND_USB

4

6012B0397201

G1

G1

G2

G2

G3

G3

G4

G4

P5V0A_USB2

DGND_USB

POWER BUTTON BOARD

P/N󶁪6050A2493201

LID SW

DGND_PBN

57

OUT

DGND_PBN

POWER BUTTON

57

OUT

57

BI

57

BI

57

BI

57

BI

SCREW230_600_1P

DGND_TP

DGND_TP

SCREW230_600_1P

57

IN

57

IN

57

BI

57

BI

57

BI

57

BI

P3V3A_PBN

C9200

0.1uF_16V_2

2 1

LID_SW#_PBN

MAG_MH248BESO_SOT23_3P

S9201

1

DGND_PBN

SCREW230_600_1PSCREW230_600_1P

EC_PWRBTN#_PBN

TEMIC_NTC033_XJ1J_X160T_4P

6026B0052301

P3V3A_TP

TO MB

TP_DAT_TPB

TP_CLK_TPB

TP_SMBUS_DAT_TPB

TP_SMBUS_CLK_TPB

S9000

1

S9001

1

L_KEY_TPB

R_KEY_TPB

DGND_TP

TP_CLK_TPB

TP_DAT_TPB

P3V3A_TP

TP_SMBUS_DAT_TPB

TP_SMBUS_CLK_TPB

U9200

1

VDD

3

GND

2

OUT

6019B0602501

S9200

1

SW9200

1

DGND_TP

4

432

3

DGND_PBN

PAD9000

1

1

2

2

3

3

4

4

5

5

6

6

SMDPAD6_100_28X118

PAD9001

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

SMDPAD8_100_28X118

2
1

TO T/P MODULE

OUT
OUT

IN

PWR_LED#_PBN

EC_PWRBTN#_PBN

LID_SW#_PBN

57

57

57

21

21

DGND_PBN

D9201

DGND_PBN DGND_PBN DGND_PBN

POWER LED

PWR_LED#_PBN

57

IN

19_217_W1D_AP1Q2QY_3T

TOUCHPAD R / L BOARD

P/N󶁪6050A2493601

57

OUT

57

OUT

TP SMB(I2C) ADDRESS IS 0X2C

FIX9100

for Dauther Board

8

7 6

1

FIX_MASK

1

FIX_MASK

FIX9101

1

FIX_MASK FIX_MASKFIX_MASK

FIX9200

FIX_MASKFIX_MASK FIX_MASK

1

FIX92011FIX92021FIX9203

1

FIX9102

1

FIX9103

5 4

CHANGE by

XXX

DATE

P3V3A_PBN

21

21

D9202

LITEON_L13ESD5V0CA2_SOD523_2P_Y

D9100

6011B0028601

L_KEY_TPB

DIP_TMG_533_Q_T_R_6P

DGND_TP

R_KEY_TPB

DIP_TMG_533_Q_T_R_6P

DGND_TP

FIX9001

1

FIX_MASK

21-OCT-2002

23

21

21

D9203

DGND_PBN

SW9000

1
2
3

LITEON_L13ESD5V0CA2_SOD523_2P_Y

21

100_5%_2

R9200

4
5
6

L KEY

4
5
6

LITEON_L13ESD5V0CA2_SOD523_2P_Y

1
2
3

6026B0001201

SW9000,SW9001



PIN2,5 IS GND

SW9001

1

1

2

2

3

3

4
5
6

R KEY

4
5
6

6026B0001201

FIX_MASK

FIX_MASK

FIX9003

1

FIX9005

1

FIX_MASK

FIX9004

FIX9002

1

1

FIX_MASK

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CODE

SIZE

CS

A3

PAD9200

1

1

2

2

3

3

4

4

5

5

6

6

SMDPAD6_100_28X118

P3V3A_PBN

R9201

100_5%_2

2 1

21

DGND_TP

DGND_TP

USB, POWER BUTTON DB

DOC.NUMBER

1310xxxxx-0-0

SHEET

of

57

57

1

REV

X01

D

CC

B

AA