
DDD Discrete GDDR2
PV Build
2007.06.15
DATE CHANGE NO.
REV
DRAWER
DESIGN
CHECK
RESPONSIBLE
SIZE =
FILE NAME :
P/N
EE
3
XXXX-XXXXXX-XX
XXXXXXXXXXXX
DATE POWER
VER :
DATE
INVENTEC
TITLE
DDD Discrete
CODE
SIZE
A3
DOC. NUMBER
Model_No A01
CS
SHEET
REV
OF
551

TABLE OF CONTENTS
PAGE
5- DC& BATTERY CHARGER
6- SELECT & BATTERY CONN
7- SYSTEM POWER(3V/5V)
8- SYSTEM POWER(+V1.8/+V1.25S)
9- GRAPHIC POWER(+VGFX_CORE)
10- SYSTEM POWER(+VCCP/+V1.5S)
11- CPU POWER(VCC_CORE)
12- DDR TERMINATION VOLTAGE
13- POWER(SLEEP)
14- POWER(SEQUENCE)
PAGE
15- CLOCK_GENERATOR
16- MEROM-1
17- MEROM-2
18- MEROM-3
19- THERMAL&FAN CONTROLLER
20- Crestline-1
21- Crestline-2
22- Crestline-3
23- Crestline-4
24- Crestline-5
25- Crestline-6
26- DDR2-DIMM0
27- DDR2-DIMM1
28- DDR2-DAMPING
29- VGA CONN
30- LCM CONN
31- ICH8-1
32- ICH8-2
33- ICH8-3
34- ICH8-4
35- ICH8-5
PAGE
36- SYSTEM BIOS&ODD EXTEND/B
37- HDD&ODD CONN
38- USB CONN
39- KBC
40- KB&TP CONN
41- AUDIO CODEC
42- MDC CONN & AUDIO JACK
43- NIC 10/100- CONTROLLER
44- NIC 10/100- RJ45 CONN
45- MINICARD CONN & BLUETOOTH
46- NEW CARD & SD/MMC
47- LED & BUTTON
48- SCREW
49- ATI M64S-1
50- ATI M64S-2
51- ATI M64S-3
52- ATI M64S-4
53- VIDEO RAM-1
54- VIDEO RAM-2
CHANGE by
Thomas Ho
13-Jun-2007
INVENTEC
TITLE
DDD Discrete
CS
SHEET
DOC. NUMBERCODE
255
A3
REVSIZE
A01Model_No
OF

Merom/Penrym
(478 uFCPGA)
P.16
Clock Generator
ICS9LPRS355
P.15
MAIN BATT
System Charger &
DC/DC System power
V-RAM
P.53
LCM
P.30
VGA
P.29
FIXED ODD
SD/MMC
Conn
CARD READER
P.46
DDR2
LVDS
CRT
P.37
BLUETOOTH
USB0
Conn
USB1
Conn
USB2
Conn
ALCOR AU6371
(USB3)
P.45
P.38
P.38
P.38
P.46
ATI
M64S
SYSTEM
BIOS
PCI_EXPRESS
P.49
P.36
PATA
USB2.0
SPI
FSB
Crestline
965PM
(1299 PCBGA)
DMI
ICH8-M
676 BGA
HDA
LPC
P.20
SATA
LAN
PCI_EXPRESS
P.31
DDR2
DDR2
HDD
P.37
MINI CARD
CONN
(WLAN)
DDR II _SODIMM0
DDR II _SODIMM1
New Card
P.45
CONN
(USB4)
P.46
P.26
P.27
NIC 10/100
INTEL
82562GT
P.43
RJ45
P.44
MDC V1.5
CONNECTOR
RJ11
P.42
P.42
AUDIO CODEC
AD_1981HD
Mic IN
Headphone
P.41 P.41
P.41
Speaker
P.41
KBC
SMSC KBC1070
P.39
Keyboard TouchPad
P.40P.40
CHANGE by
Thomas Ho
13-Jun-2007
INVENTEC
TITLE
DDD Discrete
CODE
CS
SHEET
DOC. NUMBER
355
SIZE
A3
REV
A01Model_No
OF

Adapter
(90W)
LIMIT_SIGNAL
+VBDC
OCP
Charger
(BQ24703)
ADP_EN
OCP_OC#
ADP_PS0
ADP_PS1
CHGCTRL_3
ADP_PRES
AC_AND_CHG
ADP_PRES
KBC_PW_ON
5/3.3V
(TPS51120)
+V5A
+V3A
+V5AL
+V3AL
+V5S
+V3S
BATSELB
AC_AND_CHG
CHGCTRL_3
Selector
(Discrete)
+VBATR
+VBATA
BATCON
Main Battery
PWR_GOOD_3
PM_DPRSLPVR
PSI#
H_DPRSTP#
SLP_S5#_3R
SLP_S3#_3R
SLP_S3#_5R
IO POWER
(TPS51124)
ATI
GPU POWER
(TPS51511)
IMVP VI
(ADP3208)
SLP_S3#
+V1.8
+V1.25S
V1.8_PG
V1.25S_PG
+VDD_CORE
+VPCIE
VGA_PG
SLP_S3#
SLP_S3#
+VCC_CORE
LR
(G2997)
LR
(APL5913)
LR
VR_PWRGD_CK410
+V0.9S
M_VREF
+V1.5S
V1.5S_PG
+VCCP
VCCP_PG
CHANGE by
INVENTEC
TITLE
DDD Discrete
CODE
SIZE
13-Jun-2007Thomas Ho
A3
CS
SHEET
DOC. NUMBER
OF
455
REV
A01Model_No

SINGA_2DC_G726_I04_4P
JACK500
4
1
2
3
G1G2
0.1uF_25v
1
R503
15K_5%
2
R505
8.25K_1%
R511
14.3K_1%
DC JACK
3.3A_150mil
+VADPTR
C573
1
2
1
R512
100K_1%
2
12
1
2
2VREF
7-,14-
+VBDC
5-,6-
NFM60R30T222
1
C572
10pF_50v
2
C501
1
2
0.022uF_16v
R3
12
100K_1%
L505
3.3A_150mil
12
3
4
R504
1
2
270K_5%
+V5AL
5-,7-
8
U500-A
3
+
1
OUT
2
-
ON_LM393DR2G_SOP_8P
4
R502
1M_5%
12
+V5AL
5-,7-
8
U500-B
5
+
7
OUT
6
-
ON_LM393DR2G_SOP_8P
4
CHGCTRL_3
+VADP
5-,6-
1
100K_1%
R4
12
24K_1%
C574
0.1uF_25v
C502
12
0.1uF_16v
6-
R6
2
+VADP
5-,6-
AC_AND_CHG
1
2
C571
1
2
D4
1
3
2
PDS540_5A_40V
1
S
D
2
3
4
G
U503-D
FAIR_LM324AM_SOP_14P
1
2
10pF_50v
Q2
8
7
6
5
AM4825P_AP
ADP_PRES
+V3AL
Q8
1
S1
2
G1
6
D1
3
D2
5
G2
4
S2
UM6K1N
6-,39-
191K_1%
R26
12
1M_5%
+V5AL
5-,7-
0.1uF_16v
34
1
2
V+
IN+
OUT
R25
23.7K_1%
MICREL_LMC7101BIM5_SOT23_5P
V-
IN-
5
4
+
+
12
OUT
14
-
11
13
-
+VADP1
R7
12
20K_5%
6-,7-,39-,43-
R523
10K_5%
6-,7-,14-,31-,39-,40-,47-
1
R41
4.7K_5%
ALARM
2
R45
1
100K_5%
2
1
R517
C525 1
0.1uF_16v
2
C5
12
U1
5-
+VADP1
1
2
2
24703VREF
R67
12
100_5%
1
2
0.1uF_25v
1
R125
0_5%
2
Kevin sense
5-
1
R522
150K_5%
2
1
R518
140K_1%
2
1N4148
D500
1
R123
10K_1%
2
R533
12
100K_1%
C531
3
ANODE
U504
ANPEC_APL431LBAC_SOT23_3P
1
R124
0_5%
+VBATR
2
R8
12
0.003_1%_1W
1
R13
2
100_1%
2
1
1
2
4.7uF_6.3v
C524
1uF_6.3v
R535
12
124_1%
2
CATHODE
1
REF
5-,7-,8-,9-,11-,13-,30-,39-
+VADP2
R40
6-
0.018_1%_1W
12
C6
12
1uF_6.3v
R46
12
1.62K_1%
Kevin sense
R49
12
1K_5%
R524
100K_5%
12
1
R516
60.4K_1%
2
1
C27
2
1
R515
43.2K_1%
2
1
R534
9.1K_1%
2
2
R14
100_1%
1
U2
ACN
9
ACP
26
ACDET
5
ENABLE
28
ACSEL
19
ALARM
2
SRSET
3
ACSET
27
ACPRES
13
IBAT
4
VREF
7
COMP
NC
23
NC
TI_BQ24703_QFN_28P
1
2
1
C26
2
1
2
150pF_50v
1
2
R47
150_5%
C29
4.7uF_6.3v
C24
ACDRV#
BATDRV#
BATSET
BATDEP
THERMAL
FAIR_LM324AM_SOP_14P
U503-B
4
+
+
5
OUT
7
-
6
11
-
C532
12
2200pF_50v
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
1uF_25v
D502
1
4.7uF_25v
PWM#
BATP
VHSP
MMGZ2548B
2
258
22
VCC
21
16
SRP
15
SRN
12
24
18
VS
20
6
1
17
GND
1114
NC
10
NC
29
R514
12
237K_1%
C522
2
1
1
2
1
R537
10K_5%
2
Q13
2
E
1
B
C
3
MMBT3906
1
R538
47K_5%
2
R5
1K_5%
3
1
D1
CHENMKO_BAT54_3P
1
2
1
R66
20K_1%
2
1
C28
2
180pF_50v
1
2
FAIR_LM324AM_SOP_14P
U503-A
4
+
+
3
OUT
1
-
2
11
-
Q14
1
B
MMBT3906
SSM3K7002F
1
R88
10K_5%
SSM3K7002F
2
R48
174K_1%
R65
7.87K_1%
C22
1
2
G
1
Q18
Q17
1
G
0.1uF_25v
Q508
3
D
G
S
2
SSM3K7002F
2
S
D
3
3
D
S
2
1
CHANGE by
1
2
2
E
C
3
1
22uF_25v
2
C25
OPEN
R531
4.7K_5%
C518
1
2
1
R145
133K_1%
2
1
R148
80.6K_1%
2
12
412K_1%
1
S
2
3
FDS4435BZ
1
R44
0_5%
2
1
R9
13.7K_1%
2
1
R10
300K_0.1%
2
1
R11
24K_0.1%
2
1
R12
8.87K_1%
2
Thomas Ho
R87
G
FAIR_LM324AM_SOP_14P
U503-C
4
+
+
10
OUT
8
-
11
9
-
C85
1
2
6800pF_25v
5-
H_STPCLK
32-
OCP_OC#
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
1
R120
215K_1%
2
1
R122
80.6K_1%
2
Q6
8
D
7
6
L500
54
12
PLFC1045R_10uH
1
D22
SSM34_3A40V
Q3
3
D
G
S
2
SSM3K7002F
13-Jun-2007
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
R146
2
1
100K_5%
R147
12
383K_1%
R149
12
36.5K_1%
3
1
D506
BAT54C_30V_0.2A
2
1
2
2
C530
1uF_10v
Place near L19
2
E
Q10
1
B
MMBT3906
C
Q512
1
2
C23
2
5
UM6K1N
R121
1M_5%
2
G1
G2
1K_1%
12
S1
D1
D2
S2
R43
1
6
3
4
1
2
C503
10uF_25v
C504
10uF_25v
3
1
R89
330K_5%
2
R506
0.015_1%_1W
12
12
R42
1K_1%
0.033uF_16v
1
Kevin sense
Note:
R9640
12
1K_5%
6CELLSEL#=1,Vcharger=12.6V
1
6CELLSEL#=0,Vcharger=16.8V
6-
6CELLSEL#
INVENTEC
TITLE
DDD Discrete
DC &BATTERY CHARGER
CODE
SIZE
A3
DOC. NUMBER
Model_No A01
CS
SHEET
D15
3
1
C402
2
1uF_25v
1
R397
10_5%
2
7-
+V5S
1
2
5-
+VBDC
C521
1
1
2
2
high power trace
OF
+V5S
1
BAT54S_30V_0.2A
MAX_LX5
R90
220K_5%
H_STPCLK
5-,6-
4.7uF_25v
REV
555

CHGCTRL_3
CHENKO_LL4148_2P
FIX39
FIX_MASK
FIX40
FIX_MASK
FIX41
FIX_MASK
FIX42
FIX_MASK
C523
1000pF_50v
2
5-,39-
D505
CN4001
TYCO_1746707_1_6P
G1
G2
EX17_BAT_GND
SCREW2.8_7_1P
S26
EX17_BAT_GND
1
C527
0.047uF_10v
2
1
R525
12
1K_5%
1
1
2
1
R526
470K_5%
2
+VBATA_EX17_BAT
CN4000
SYN_200046MR006G101ZR_6P
1
1
2
2
3
3
4
4
5
G
5
6
G
6
1
2
3
4
5
6
SCREW2.8_7_1P
S27
EX17_BAT_GND
17.0’W BATTERY EXTEND/B
1
R528
470K_5%
2
3
D
G
S
2
Q511
SSM3K7002F
1
2
3
4
G
5
G
6
EX17_BAT_GND
S28
EX17_BAT_GND
G1
G2
SCREW2.8_7_1P
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
5
U502
24
TC7S14F
3
AC_AND_CHG
ADP_PRES
5-
5-,7-,39-,43-
+VADP
5-
1
R70
10K_5%
2
R513
12
3K_5%
Q11
SSM3K7002F
2
S
D
G
1
D501
21
MMGZ2548B
+V3AL
220K_5%
3
+VADP2
5-
Q507
1
S
2
3
4
AM4825P_AP
5-,6-,7-,14-,31-,39-,40-,47-
12
R71
+VBATA
6-
CHENKO_LL4148_2P
2
D504
1
G
8
D
7
6
5
12
1.5M_5%
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
5- 6-
2
PAD500
3
1
4
POWERPAD_4A
Q500
8
1
S
D
2
7
3
6
5
4
G
AM4825P_AP
Q7
3
D
G
1
S
2
SSM3K7002F
SSM3K7002F
R50
SSM3K7002F
3
Q4
D
G
1
S
2
+VBATA+VBDC
1
R68
470K_5%
2
1
R69
4.7K_5%
2
Q509
3
D
1
G
S
2
THM_MAIN#
R7014
220K_5%
D2004
CHENKO_LL4148_2P
1
R9660
12
0_5%_OPEN
1
2
C34
OPEN
2
CHANGE by
SDA_MAIN
SCL_MAIN
+V3AL
D2007
CHENMKO_BAV99
+V3AL
39-
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
1
5
2
2
3
74HC1G14GV
+V3AL
R508
10K_5%
3939-
5-,6-,7-,14-,31-,39-,40-,47-
1
3
2
5-,6-,7-,14-,31-,39-,40-,47-
1
R9657
100K_0.5%
2
U7003
4
39-
Thomas Ho
5-,6-,7-,14-,31-,39-,40-,47-
1
1
R507
10K_5%
2
2
1
3
2
D2006
CHENMKO_BAV99
BATCON
10_5%
R9661
12
12
10_5%R9662
C71
2
47pF_50v
C7005
1
0.1uF_16v
2
15-Jun-2007
1
R16
10K_5%
2
SYN_200046MR006G100ZU_6P
R17
12
100_5%
1
2
INVENTEC
TITLE
DDD Discrete
SELECT & BATTERY CONN
CODE
SIZE
A3
CS
SHEET
5-
6CELLSEL#
MAIN BATT
CN501
1
1
2
2
3
3
4
4
5
7
5
7
6
8
6
8
C505
0.1uF_25v
DOC. NUMBER
OF
655
REV
A01Model_No

ADP_PRES
KBC_PW_ON
13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
+V3A
PAD505
POWERPAD_2_0610
1
C717
2
1uF_6.3v
5-,6-,39-,43-
39-
17.4K_1%
4.7uF_25v
CYNTEC_PCMC063_3R3
1
C718
2
330uF_4v
C357
R367
+VBATP
7-
2
1
2
L520
12
1
2
1
+V5AL
5
3
1
2
+VBATR
5-,7-
U19
4
TC7SET32FU
R400
7.32K_1%
C356
4.7uF_25v
5-,8-,9-,11-,13-,30-,39-
POWERPAD_4A
12
51120GND
S1_D2
5
67
4
S2
Q34
FDS6900AS
PAD3
D1
G1
G2
+VBATP
7-
3
4
2VREF
5-,7-,14-
1
C378
2
1000pF_50v
51120GND
7
8
VO2
COMP2
TI_TPS51120_QFN_32P
9
EN5
10
EN3
C355
0.1uF_16v
12
R366
1
4.7_5%
1
2
8
3
+V3AL
5-,6-,14-,31-,39-,40-,47-
1
C374
4.7uF_6.3v
2
11
PGOOD2
12
2
EN2
13
VBST2
14
DRVH2
15
LL2
16
DRVL2
R683
15.4K_1%
+V5AL
5-,7-
C3731
4.7uF_6.3v
2
PGND2
17
CS2
18
1
2
6
VFB2
VREG3
19
5
GND
V5FILT
20
1
2
3
2
1
4
VO1
VFB1
VREF2
COMP1
SKIPSEL
TONSEL
PGOOD1
CS1
VIN
VREG5
PGND1
23
22
21
24
1
R682
7.32K_1%
2
R684
12
10_5%
C376
0.1uF_16v
R401
12
0_5%
U18
33
32
31
30
29
EN1
28
VBST1
27
DRVH1
26
LL1
25
DRVL1
1
2
51120GND
C375
1uF_10v
32-,39-
RSMRST#
1
2
R398
12
4.7_5%
C406
4.7uF_25v
8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
2VREF
C377
12
0.1uF_16v
51120GND
SLP_S3#_3R
5-,7-,14-
5-
7.32K_1%
R686
12
MAX_LX5
30K_1%
R685
12
8
65
7
D
G
1S23
4
SI4800DY
765
8
D
G
S
Q37
FDS6690AS
41
23
Q38
1
2
+VBATP
7-
C405
1
C404
2
4.7uF_25v
4.7uF_25v
L523
12
SLF10040_4R7N7R0
C753
220uF_6.3v
1
1
C754
2
1uF_6.3v
2
8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V5A
PAD506
POWERPAD_2_0610
Thomas Ho 13-Jun-2007
INVENTEC
TITLE
DDD Discrete
SYSTEM POWER(3V/5V/12V)
CODE
DOC. NUMBERSIZE
A3
Model_No A01
CS
SHEET OFCHANGE by
REV
557

R134
12
43.2K_1%
R135
12
30K_1%
51124GND
51124GND
R138
12
30K_1%
R136
12
20.5K_1%
+V1.8
9-,10-,12-,13-,20-,23-,24-,26-,27-
PAD501
POWERPAD_2_0610
1
C526
2
220uF_2.5v
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
C42
1
2
4.7uF_25v
L501
12
C43
4.7uF_25v
1
2
CYNTEC_PCMC063_1R5
FDS6676AS
Q12
SI4800DY
Q9
8765
D
8
765
D
S
123
G
41S23
G
4
V1.8_PG
SLP_S4#_3R
0.1uF_16v
12-,32-
C79
12
14-
R91
12
4.7_5%
R127
12
0_5%_OPEN
6
VO2
7
PGOOD2
8
EN2
VBST2
10
DRVH2
TI_TPS51124RGER_QFN_24P
11
LL2
12
DRVL2
PGND2
13
R128
12
0_5%
51124GND
5
VFB2
TONSEL
TRIP2
V5FILT
14
1
R131
15.4K_1%
2
7-,9-,10-,12-,13-,14-,32-,39-,43-,46-
SLP_S3#_3R
U3
2
1
4
3
VO1
GND
VFB1
25
GND
24
PGOOD1
23
EN1
229
VBST1
21
DRVH1
20
LL1
19
DRVL1
TRIP1
V5IN
PGND1
17
15
16
18
14-
V1.25S_PG
C78
R132
12
7-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
4.7_5%
12
0.1uF_16v
+V5A
G
41S23
G
4
R129
12
1
R130
15.4K_1%
2
1
2
C77
1uF_10v
10_5%
C76
1
2
4.7uF_6.3v
8765
D
Q22
FDS8884
8765
D
Q19
1S23
FDS6690AS
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
C86
1
2
4.7uF_25v
L502
12
PCMC063T_2R2MN
1
2
C87
4.7uF_25v
PAD503
POWERPAD_2_0610
1
C555
220uF_2.5v_R35
2
+V1.25S
10-,20-,24-,34-
INVENTEC
TITLE
DDD Discrete
CHANGE by
Thomas Ho
13-Jun-2007
SYSTEM POWER(+V1.8/+V1.25S)
CODE
CS
SHEET
DOC. NUMBERSIZE
855
A3
REV
A01Model_No
OF

+VPCIE
49-,50-,51-
POW_SW
+V1.8
8-,10-,12-,13-,20-,23-,24-,26-,27-
C347
OPEN
C343
12
10uF_6.3v
2
3
4
5
6
7
8
9
21
U15
NC
VLDO
VLDOFB
GND
ODOFF
OD
COMP
VOSW
TML-PAD
20
1
VBST
DRVH
VLDOIN
DRVL
PGND
V5IN
PGOOD
ENSW
ENLDO
VSWFB
TI_TPS51511_RHL_20P
11
10
C307
G
432
54
G
1
6
8D7
S
123
Q516
56789
1
2
Q32
SI7686DP_T1_E3
9
1
2
R327
12
0_5%
19
18
LL
17
16
R330
1
15
CS
14
10K_1%
13
12
R333
12
10K_1%
C345
0.1uF_16v
12
+V5A
2
7-,8-,10-,11-,12-,13-,14-,29-,30-,34-,38-
1
2
C346
4.7uF_6.3v
SI7336ADP
14-
VGA_PG
1
R328
2
1
2
R331
12
0_5%
VGAP_AGND
12.4K_1%
R329
20K_1%
1
R338
39K_1%
2
1
2
C344
1
2
22uF_6.3v
C342
1
2
1uF_10v
49-
C309
1
2
4.7uF_25v
D511
SSM34_3A40V
+VBATR
5-,7-,8-,11-,13-,30-,39-
C306
1
24.7uF_25v
4.7uF_25v
L515
12
MPC1040_0R88
C349
1
2
OPEN
1
R335
10K_1%
2
330uF_2v_9mR_Panasonic
1
R334
36.5K_1%
2
VGAP_AGND
C304
2
PAD504
3
1
4
POWERPAD_4A
12
+VDD_CORE
49-,51-
1
2
C285
220uF_2.5v_R35
SLP_S3#_3R
7-,8-,10-,12-,13-,14-,32-,39-,43-,46-
R336
12
150K_1%
1
2
C7006
0.1uF_16v
C348
1
0.1uF_16v
2
INVENTEC
TITLE
DDD Discrete
GRAPHIC POWER (+VGFX_CORE)
CHANGE by OF
Thomas Ho
2-Jun-2007
A3
CODE
CS
SHEET
DOC. NUMBER
955
REVSIZE
A01Model_No

+V5A
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V1.8
8-,9-,12-,13-,20-,23-,24-,26-,27-
G9338
SC339
C89
0.1uF_16v
VCCP_PG
0 ohm
OPEN
+V5A
1
2
+V1.25S
1
2
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
GMT_G9338_ADJTBUf_SOT23_6P
1
2
3
1
R156
OPEN
2
14-
R578
OPEN
0 ohm
R577
0 ohm
OPEN
R576R579
OPEN
0 ohm
8-,20-,24-,34-
C533
4.7uF_6.3v
12
OPEN
VCC
GND
PGD
U6
FDS6690AS
8
7
6
5
R157
6
DRV
5
ADJ
4
EN
C88
OPEN
7-,8-,9-,12-,13-,14-,32-,39-,43-,46-
1
2
Q515
D
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
1
S
2
3
4
G
1
R158
47_5%
2
C90
1
2
0.033uF_16v
1
R153
OPEN
2
1
R160
113_1%
2
1
R159
100_1%
2
1
2
C535
10uF_6.3v
PAD502
POWERPAD_2_0610
C534
1
2
10uF_6.3v
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
C669
1
2
1uF_10v
U12
6
VCNTL
7
POK
82
EN
VIN
GND
9
1
ANPEC_APL5913_KAC_TRL_SOP_8P
C268
1
2
22uF_6.3v
+V1.5S
13-,18-,24-,34-,45-,46-
PAD1
C299
39pF_50v
POWERPAD_2_0610
1
R276
27.4K_1%
2
1
R274
30K_1%
2
C267
C702
1
1
2
2
22uF_6.3v
5
VIN
3
VOUT
4
VOUT
FB
14-
V1.5S_PG
1uF_10v
1
2
SLP_S3#_3R
Added for VGA
R322
100K_5%
1
2
C339
0.1uF_16v
+V3S
1
2
+V5A
C340
0.1uF_16v
1
2
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
U14
1
POK
2
VEN
36
VIN
4
VPP
GMT_G964_25_SOP8_8P
C212
1
4.7uF_6.3v
2
8
GND
7
ADJ
VO
5
NC
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
R323
10K_5%
2
1
2
R286
OPEN
POWERPAD_2_0610
C305
1
10uF_6.3v
2
+V2.5S
13-,49-,50-,51-
PAD2
CHANGE by
Thomas Ho
13-Jun-2007
INVENTEC
TITLE
DDD Discrete
SYSTEM POWER(+VCCP/+V1.5S)
CODE
SIZE
A3
DOC. NUMBER
Model_No A01
CS
SHEET
OF
REV
5510

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
VR_PWRGD_CK505
PWR_GOOD_3
VR_PWRGD_CK505
C664
330pF_50v
12
R222
1.65K_1%
0.012uF_16v
11-,15-
H_DPRSTP#
PM_DPRSLPVR
14-
11-,15-
12
C263
+V3S
R226
1K_5%
PSI#
C261
220pF_25v
12
1
2
1
2
17-
17-,20-,31-
20-,32-
R223
1
68K_1%
C264
680pF_50v
1
2
2
1
2
12
1K_5%_OPEN
R217
12
OPEN
C262
18pF_50v
+V5S
VCOREGND
5-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
11-
CSREF
18-
VCCSENSE
18-
1
2
VCOREGND
C665
1000pF_50v
R589
12
0_5%
VSSSENSE
CHENKO_LL4148_2P_OPEN
R227
H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0
R219
12
OPEN
R220
12
499_1%
VCOREGND
C663
4700pF_25v
1
2
12
3
4
5
6
7
8
9
10
11
12
C643
1000pF_50v
VCOREGND
D12
21
R229
12
665K_1%_OPEN
12
EN
PWRGD
PGDELAY
CLKEN
FBRTN
FB
COMP
SS
ST
VARFREQ
VRTT
TTSEN
1
2
C266
0.1uF_16v_OPEN
R9643
0_5%
18181818181818-
45
44
46
49
48
47
PSI
TML
VID0
DPRSLP
DPRSTP
U9
ADI_ADP3208_LFCSP_48P
CLIM
LLINE
PMON
PMONFS
17
16
13
14
15
2
R225
113K_1%
1
VCOREGND
VID1
VID243VID3
CSCOMP
CSFEF19CSSUM
18
1
2
42
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C265
12
0.1uF_16v_OPEN
5
2
3
TI_SN74LVC1G17DCKR_SC70_5P_OPEN
1
U10
32-
4
SB_3S_VRMPWRGD
2
+V5A
7-,8-,9-,10-,12-,13-,14-,29-,30-,34-,38-
2
R587
10_5%
1
C214
1
2
C642
2.2uF_16v
2
R228
76.8K_1%
1
2.2uF_16v
R190
12
4.7_5%
R191
12
4.7_5%
R172
12
100_5%
2
BAT54A
1uF_16v
+VBATR
41
40
39
VID4
VID5
VID6
RAMP20RPM22RT
VRPM
21
2
R195
150K_1%
1
274K_1%
2
C215
1000pF_50v
2
R588
100K_5%
1
37
SP
VCC
BST1
DRVH1
SW1
PVCC1
DRVL1
PGND1
PGND2
DRVL2
PVCC2
SW2
DRVH2
BST2
GND
23 38
24
R193
215K_1%
12
12
C216
0.01uF_16v
R194
1
1
2
VCOREGND
1
220K_1%
1
C217
2
330pF_50v
1
2
VCOREGND
36
35
34
33
32
31
30
29
28
27
26
25
VCOREGND
C164
1000pF_50v
R591
12
169K_1%
R590
12
169K_1%
R192
D510
3
2
1
C161
12
C162
1
2
12
C163
1uF_16v
5-,7-,8-,9-,11-,13-,30-,39-
1
R569
220K_5%
2
NTC thermistor, place near L16
OPEN
1
2
C550
100uF_25v
4.7uF_25v
1
2
+VBATR
C575
5-,7-,8-,9-,11-,13-,30-,39-
C122
1
2
C119
1
2
4.7uF_25v
4.7uF_25v
C123
1
2
4.7uF_25v
C124
1
2
4.7uF_25v
FDS6676AS
X 3
Q23
1
2
1
2
C121
4.7uF_25v
Q26
FDS6676AS
CHANGE by
C120
4.7uF_25v
G
4
G
41S23
56789
Q21
SI7686DP_T1_E3
G
321
4
L503
CYNTEC_PCMC104T_R36MN_2P
+VCC_CORE
18-
12
G
4321
G
3
4
G
4
Q25
8765
FDS6676AS
D
S
12
56789
Q27
SI7686DP_T1_E3
8765
D
Q24
FDS6676AS
S
23
1
R163
OPEN
C107
OPEN
C213
OPEN
1
2
R189
OPEN
1
2
CSREF
2
R570
10_1%
1
11-
2
R571
10_1%
1
L508
12
1
2
1
2
CYNTEC_PCMC104T_R36MN_2P
765
8
D
1S23
8765
D
INVENTEC
TITLE
DDD Discrete
CPU POWER(VCC_CORE)
CODE
SIZE
A3
CS
13-Jun-2007Thomas Ho
SHEET
11 55
REVDOC. NUMBER
A01Model_No
OF

SLP_S4#_3R
SLP_S3#_3R
8-,32-
7-,8-,9-,10-,13-,14-,32-,39-,43-,46-
+V1.8
8-,9-,10-,13-,20-,23-,24-,26-,27-
1
2
C82
4.7uF_6.3v
+V5A
7-,8-,9-,10-,11-,13-,14-,29-,30-,34-,38-
+V0.9S
28-
U5
GMT_G2997F6U_MSOP10_10P
11
TML1VDDQSNS
10
VIN VLDOIN
9
S5
8
GND4PGND
7
S3
6
C81
1uF_10v
1
2
VTTREF
C49
0.1uF_16v
11
2
20-,26-,27-
VTTSNS
VTT
2
3
5
M_VREF
1
2
C47
10uF_6.3v
2
C48
10uF_6.3v
NOTE: DDR2 REGULATOR
CHANGE by
INVENTEC
TITLE
DDD Discrete
DDR TERMINATION VOLTAGE
SIZE
2-Jun-2007Thomas Ho
A3
DOC. NUMBERCODE
CS
12 55
REV
A01Model_No
OFSHEET

7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
+V3A
6
5
2
C408
1
2
0.047uF_16v
1
FDC655BN
R430
120K_1%
12
13-
GATE_3S GATE_5S
+V3S
10-,11-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
Q39
4
D
S
3
G
1
1
R414
47_5%
C389
10uF_6.3v
2
2
7-,8-,9-,10-,11-,12-,14-,29-,30-,34-,38-
R435
120K_1%
12
13-
+V5A
6
D
5
2
13
FDC655BN
C409
1
2
0.047uF_16v
Q36
+V5S
5-,11-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
4
S
G
GATE_3S
1
C390
2
10uF_6.3v
1
R415
100_5%
2
Added for VGA
R144
120K_1%
12
13-
C84
1
2
0.047uF_16v
+V1.8
8-,9-,10-,12-,20-,23-,24-,26-,27- 51-,52-,53-,54-
6
5
2
1
FDC655BN
6
5
2
13
FDC655BN
+V1.8S
Q15
4
D
S
3
G
Q16
4
D
S
G
R161
100_5%
+V2.5S
10-,49-,50-,51-
C308
1
1
1
2
1
2
C97
10uF_6.3v
R287
100_5%
10uF_6.3v
2
2
R460
100_5%
+V1.5S
10-,18-,24-,34-,45-,46-
1
2
SLP_S3#_3R
Q41
3
D
1
G
S
SSM3K7002F
2
1
C437
0.033uF_16v
2
SLP_S3#_3R
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
7-,8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
7-,8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
SSM3K7002F
Q43
G
1
+VBATR
+V3A
D
S
5-,7-,8-,9-,11-,13-,30-,39-
1
R462
47K_5%
2
1
B
Q47
MMBT3904
1
R431
100K_5%
2
SSM3K7002F
3
2
3
C
E
2
1
R461
130K_1%
2
+VBATR
5-,7-,8-,9-,11-,13-,30-,39-
1
2
E
B
1
C
Q42
3
D
1
G
S
2
R463
2.7K_5%
2
Q44
MMBT3906
3
Q45
1
G
SSM3K7002F
R432
12
1K_5%
3
D
S
2
D16
1
MMGZ2548B
2
1
R437
0_5%
2
13- 13-
1
R434
0_5%
2
Q33
1
G
SSM3K7002F
3
D
S
2
1
SSM3K7002F
SSM3K7002F
1
R436
0_5%
2
Q20
3
D
1
G
S
2
GATE_3SGATE_5S
1
R433
0_5%
2
INVENTEC
TITLE
DDD Discrete
POWER(SLEEP)
CODE REV
SIZE
A3
CHANGE by OF
Thomas Ho 13-Jun-2007
CS
SHEET
Q40
3
D
G
S
2
DOC. NUMBER
Model_No A01
5513

5-,6-,7-,14-,31-,39-,40-,47-
1
R444
100K_1%
2
C413
1
2
0.1uF_16v
+V3AL+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
C414
1
0.1uF_16v
2
5
PHP_74LVC1G17_SOT753_5P
4
2
U524
3
1
R443
100K_5%
2
39-
VCC1_POR#_3
PWR_GOOD_3
SLP_S3#_3R
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
7-,8-,9-,10-,12-,13-,32-,39-,43-,46-
9-
VGA_PG
+V3S
5-,11-,13-,19-,29-,30-,32-,34-,37-,40-,41-,42-
+V5S
1
V1.25S_PG
V1.5S_PG
V1.8_PG
VCCP_PG
11-,14-
12
R98
1K_5%
DAP202K
R102
2
1K_5%
8-
10-
8-
10-
R99
12
68.1K_1%
R103
12
102K_1%
D5
R137
1
10K_5%
R97
12
10K_5%
R93
12
10K_5%
R95
1
10K_5%
CHENKO_LL4148_2PD6
21
R143
12
140K_1%
1
3
2
2
2
R100
49.9K_1%
1
2
1
2
1
2
C46
0.1uF_16v
R96
12
20K_5%
C45
1000pF_50v
1
2
R105
OPEN
R104
12
20K_5%
ON_LM393DR2G_SOP_8P
R140
12
100K_5%
C44
1
2
0.1uF_16v
R101
12
1M_5%
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
U4-A
8
3
+
1
OUT
2
4
2VREF
5-,7-
R94
12
1M_5%
1
2
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
8
U4-B
5
+
7
OUT
6
-
ON_LM393DR2G_SOP_8P
4
+V3A
7-,13-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
R141
10K_5%
2
39-
C80
PWR_GOOD_KBC
0.1uF_16v
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
1
R139
10K_5%
2
11-,14-
PWR_GOOD_3
CHANGE by
INVENTEC
TITLE
DDD Discrete
POWER(SEQUENCE)
CS
SHEET
DOC. NUMBER
OF
14 55
REV
A01Model_No
SIZE CODE
13-Jun-2007Thomas Ho
A3

+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
L517
BLM18AG471SN1D
2
1
10uF_6.3v
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
CLKREQ_R_SATA#
15-,32-
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
2
10K_5%
R642
1
CPU_BSEL1
CPU_BSEL2
CLK_3S_REF
FSA
1
0
17-,2017-,2015-
C693
1
2
CLKREQ_R_MCH#
VR_PWRGD_CK505
FSB
FSC
0
1
0
1
R646
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
OPEN
20-
FSB CLOCK
FREQUENCY
12
R362
10K_5%
11-
667
800
R644
+V3S
*CLKREQ# pin controls SRC Table.
Byte5: bit6 =0(PWD)
SRC0
CR#_A
Byte5: bit7=0, disable CR#_A; 1,enable CR#_A
Byte5: bit2 =0(PWD)
SRC0
CR#_C
Byte5: bit3=0, disable CR#_C; 1,enable CR#_C
Byte5: bit6 =1
SRC2
Byte5: bit2 =1
SRC2
Layout note: All decoupling 0.1uF disperse closed to pin
C322
C714
1
1
2
2
0.1uF_16v
1
2
C321
0.1uF_16v
1
2
0.1uF_16v
+V3S
10K_5%R289
12
CPU_BSEL0
C351
1
CLK_R3S_ICH48
2
22pF_50v
10K_5%
12
10K_5%
1
R364
475_1%
2
12
HOST CLOCK
FREQUENCY
166
200
CLKREQ_R_SATA#
CLK_R3S_DEBUG
ICH_3S_SMCLK
ICH_3S_SMDATA
15-,32-
39-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C352
1
OPEN
2
CLK_R3S_MINICARD
19-,26-,27-,3219-,26-,27-,32-
1
C716
33pF_50v
2
Please place close to CLKGEN within 500mils
Byte5: bit4 =0(PWD)
CR#_B
SRC1
Byte5: bit5=0, disable CR#_B; 1,enable CR#_B
Byte5: bit0 =0(PWD)
CR#_D
SRC1
Byte5: bit1=0, disable CR#_D; 1,enable CR#_D
C319
C316
1
2
0.1uF_16v
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
10K_5%_OPEN
R356
12
17-,20-
2.2K_5%
12
R350
32-
33_5%
12
12
R361
45-
X501
14.31818MHZ
12
1
2
C715
33pF_50v
30PPM
C318
1
2
0.1uF_16v
+VCCP
R352
R357
OPEN
33_5%
+V3S
12
10K_5%
12
R353
Byte5: bit4 =1
SRC4
Byte5: bit0 =1
SRC4
2
1
475_1%R288
R360
1
2
1
2
C315
0.1uF_16v
33_5%
CLK_3S_ICH48
CLKREQ_SATA#
CLKREQ_MCH#
CLK_3S_DEBUG
CLK_3S_MINICARD
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
Layout note: All decoupling 0.1uF disperse closed to pin
L518
BLM18AG471SN1D
1
2
1
C694
10uF_6.3v
2
U516
26
VDDSRC_IO
45
VDDSRC_IO
36
VDDSRC_IO
12
VDD96_IO
39
VDDSRC
61
VDDREF
20
VDDPLL3_IO
49
VDDCPU_IO
9
VDD48
2
VDDPCI
55
VDDCPU
16
VDD
10
SUB_48MHZ_FSLA
57
FSLB_TEST_MODE
62
REF0_FSLC_TEST_SEL
1
PCI0_CR#_A
3
PCI1_CR#_B
4
PCI2_TME
5
PCI3
56
CK_PWRGD_PD#
64
SCLK
63
SDTAT
60
X1
59
X2
8
GNDPCI
11
GND48
15
GND
19
GND
23
GNDSRC
29
GNDSRC
42
GNDSRC
58
GNDREF
52
GNDCPU
ICS_ICS9LPRS355BGLFT_TSSOP_64P
Byte6: bit7=0, disable CR#_E; 1,enable CR#_E
CR#_E
SRC6
Byte6: bit6=0, disable CR#_F; 1,enable CR#_F
CR#_F
SRC8
Byte6: bit5=0, disable CR#_G; 1,enable CR#_G
CR#_G
SRC9
Byte6: bit4=0, disable CR#_H; 1,enable CR#_H
CR#_H
SRC10
1
2
27MHz_NonSS_SRCT1_SE1
27MHz_SS_SRCC1_SE2
C323
C695
1
10uF_6.3v
2
0.1uF_16v
48
NC
38
PCI_STOP#
37
CPU_STOP#
51
CPUT1_F
50
CPUC1_F
54
CPUT0
53
CPUC0
CPUT2_ITP_SRCT8
CPUC2_ITP_SRCC8
SRCC0_DOTT_96
SRCT0_DOTC_96
47
46
33
SRCT11_CR#_H
32
SRCC11_CR#_G
34
SRCT10
35
SRCC10
30
SRCT9
31
SRCC9
44
SRCT7_CR#_F
43
SRCC7_CR#_E
41
SRCT6
40
SRCC6
6
PCI4_27_Select
7
PCI_F5_ITP_EN
27
SRCT4
28
SRCC4
24
SRCT3_CR#_C
25
SRCC3_CR#_D
21
SRCT2_SATAT
22
SRCC2_SATAC
17
18
13
14
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C325
1
1
2
2
0.1uF_16v
0.1uF_16v
CLK_R_MCHBCLK
CLK_R_MCHBCLK#
CLK_R_CPUBCLK
CLK_R_CPUBCLK#
CLK_R_XDP
CLK_R_XDP#
CLK_REQH#
CLK_REQG#
CLK_R_PCIE_NEWCARD
CLK_R_PCIE_NEWCARD#
CLK_R_PCIE_MINI2
CLK_R_PCIE_MINI2#
CLK_R_DREF
CLK_R_DREF#
CLK_3S_KBPCI
CLK_3S_ICHPCI
CLK_R_PEG_MCH
CLK_R_PEG_MCH#
CLK_R_PCIE_ICH
CLK_R_PCIE_ICH#
CLK_R_SATA1
CLK_R_SATA1#
C324
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
R271
10K_5%_OPEN
C320
1
2
0.1uF_16v
CLK_3S_REF
1
2
C317
0.1uF_16v
C326
1
2
0.1uF_16v
ITP_EN =0
SRC8/SRC8#
ITP_EN =1
ITP/ITP#
15-
1
1
R270
10K_5%_OPEN
2
2
2
475_1%
475_1%
22_5% 12
12
12
R645
12
R647
R2691
12
R655
R359
R34933_5%
R351
10K_5%
R348
OPEN
1
2
12
12
22_5%
22_5%
LAYOUT NOTES : THE R684 , R685 , R683 CLOSED TO U21
CHANGE by
Thomas Ho
13-Jun-2007
1
R654
R268
10K_5%
10K_5%
2
3232-
2121-
1616-
19-
19-
4645-
46-
CLK_R_PCIE_NEWCARD
46-
CLK_R_PCIE_NEWCARD#
4545-
5050-
3933-
2020-
3232-
3131-
+V3S+V3S
R363
12
OPEN
R358
12
10K_5%
39-
CLK_R3S_KBC14
32-
CLK_R3S_ICH14
INVENTEC
TITLE
DDD Discrete
CLOCK_GENERATOR
CODE
CS
SHEET
DOC. NUMBER
SIZE
A3
PCISTOP#_3
CPUSTOP#_3
CLK_R_MCHBCLK
CLK_R_MCHBCLK#
CLK_R_CPUBCLK
CLK_R_CPUBCLK#
CLK_R_XDP
CLK_R_XDP#
CLK_R_REQH#
CLK_R_REQG#
CLK_R_PCIE_MINI2
CLK_R_PCIE_MINI2#
CLK_R_DREF
CLK_R_DREF#
CLK_R3S_KBPCI
CLK_R3S_ICHPCI
CLK_R_PEG_MCH
CLK_R_PEG_MCH#
CLK_R_PCIE_ICH
CLK_R_PCIE_ICH#
CLK_R_SATA1
CLK_R_SATA1#
27_Selet =0
LCD_SST 100MHZ
27_Selet =1
27MHZ non-spread clock
OF
15 55
REV
A01Model_No

H_A#(35:3)
H_ADSTB#1
H_STPCLK#
H_A20M#
H_FERR#
H_IGNNE#
H_INTR
H_NMI
H_SMI#
21-
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
H_REQ#(4:0) H_RS#(2:0)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)
21-
313131-
313131-
21-
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
H_ADSTB#0
21-
CN506-1
J4
A3#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L2
A13#
P4
A14#
P1
A15#
R1
A16#
M1
ADSTB0#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L1
REQ4#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U1
A23#
R4
A24#
T5
A25#
T3
A26#
W2
A27#
W5
A28#
Y4
A29#
U2
A30#
V4
A31#
W3
A32#
AA4
A33#
AB2
A34#
AA3
A35#
V1
ADSTB1#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD01
N5
RSVD02
T2
RSVD03
V3
RSVD04
B2
RSVD05
C3
RSVD06
D2
RSVD07
D22
RSVD08
D3
RSVD09
F6
RSVD010
FOX_PZ4782K_274M_41_478P
GMCH
CPU
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
ADDR GROUP 0
INIT#
CONTROL
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
ADDR GROUP 1
TDO
TMS
XDP/ITP SIGNALS
TRST#
DBR#
THERMAL
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
ICH
H CLK
BCLK0
BCLK1
RESERVED
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
TDI
AB3
AB5
AB6
C20
+VCCP
10mils/10mils
ICH8
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
56_5%
12
R166
D21
A24
B25
C7
A22
A21
+VCCP
21-
H_ADS#
21-
H_BNR#
21-
H_BPRI#
21-
H_DEFER#
21-
H_DRDY#
21-
H_DBSY#
21-
H_BREQ#0
31-
H_INIT#
21-
H_LOCK#
19-,21-
H_CPURST#
21-
H_TRDY#
21-
H_HIT#
21-
H_HITM#
19-
H_BPM0_XDP#
19-
H_BPM1_XDP#
19-
H_BPM2_XDP#
19-
H_BPM3_XDP#
19-
H_BPM4_PRDY#
16-,19-
H_BPM5_PREQ#
16-,19-
H_TCK
16-,19-
TDI_FLEX
19-
H_TDO
16-,19-
H_TMS
19-,32-
XDP_DBRESET#
19-
H_THERMDA
19-,49-
THERM_MINUS
19-,20-,31-
PM_THRMTRIP#
15-
CLK_R_CPUBCLK
15-31-
CLK_R_CPUBCLK#
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
R240
2
1
51_5%
H_RS#(0)
H_RS#(1)
H_RS#(2)
R630
12
51_5%
R234
2
1
51_5%
R235
2
1
51_5%
R639
12
51_5%
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
21-
16-,19-
H_BPM5_PREQ#
16-,19-
TDI_FLEX
16-,19-
H_TMS
16-,19-
H_TCK
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
1
R165
56_5%
CLOSED TO CPU
2
51 ohm +/-1% pull-up to +VCCP
(VCCP) if ITP is implemented
19-
1
R233
51_5%
2
H_TRST#
PM_THRMTRIP# should be T at CPU
CHANGE by
Thomas Ho
2-Jun-2007
INVENTEC
TITLE
DDD Discrete
MEROM-1
CODESIZE
A3
CS
SHEET
16 55
REVDOC. NUMBER
A01Model_No
OF

H_D#(63:0)
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#(63:0)
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
1
R543
1K_1%
2
1
2
R544
2K_1%
GTLREF
Layout note: Zo=55 ohm,
0.5" max for GTLREF.
17-,21-
212121-
17-,21-
H_DSTBN#1
H_DSTBP#1
H_DINV#1
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
CN506-2
H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)
H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)
212121-
15-,2015-,2015-,20-
1
2
R164
OPEN
1
2
R547
OPEN
C549
1
2
0.1uF_16v_OPEN
Place C549(0.1uF_16V) close to the TEST4 pin.
Make sure TEST4 routing is reference
to GND and away from other noisy signals.
E22
D0#
F24
D1#
E26
D2#
G22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
DATA GRP 0
D9#
J24
D10#
J23
D11#
H22
D12#
F26
D13#
K22
D14#
H23
D15#
J26
DSTBN0#
H26
DSTBP0#
H25
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L23
D20#
M24
D21#
L22
D22#
M23
D23#
P25
D24#
P23
D25#
P22
DATA GRP 1
D26#
T24
D27#
R24
D28#
L25
D29#
T25
D30#
N25
D31#
L26
DSTBN1#
M26
DSTBP1#
N24
DINV1#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
MISC
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL0
B23
BSEL1
C21
BSEL2
FOX_PZ4782K_274M_41_478P
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
DATA GRP 2DATA GRP 3
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
1
2
R238
OPEN
11-,20-,31-
12
R546 27.4_1%
12
R545 54.9_1%
12
27.4_1%R236
12
R237
H_DPRSTP#
54.9_1%
CLOSED TO CPU
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)
H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)
21-
H_DSTBN#3
21-
H_DSTBP#3
21-
H_DINV#3
31-
H_DPSLP#
21-
H_DPWR#
21-
H_CPUSLP#
11-
PSI#
Place series resistor (R211 = 1K ohm) on H_PWRGD_XDP without stub
17-,21-
17-,21-
212121-
H_D#(63:0)
H_DSTBN#2
H_DSTBP#2
H_DINV#2
H_D#(63:0)
R239
12
1K_5%
31-
H_PWRGD
19-
H_PWRGD_XDP
CHANGE by
INVENTEC
TITLE
DDD Discrete
MEROM-2
CODE
SIZE
2-Jun-2007Thomas Ho
A3
CS
SHEET
DOC. NUMBER
17 55
REV
A01Model_No
OF

PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (NORTH SIDE
PRIMARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE
PRIMARY)
SOUTH SIDE SECONDARY
NORTH SIDE SECONDARY
C171
1
2
10uF_6.3v
C580
1
2
10uF_6.3v
C165
1
2
10uF_6.3v
C125
1
2
10uF_6.3v
C612
1
2
10uF_6.3v
C608
1
2
10uF_6.3v
1
C617
2
330uF_2v_6mR
1
C605
2
330uF_2v_6mR
1
2
1
2
C173
1
2
10uF_6.3v
C172
1
10uF_6.3v
2
C576
1
2
10uF_6.3v
C167
1
2
10uF_6.3v
C645
10uF_6.3v
C607
10uF_6.3v
1
C548
2
1
C618
2
1
2
1
2
1
2
1
2
C615
1
2
10uF_6.3v
C610
1
2
10uF_6.3v
330uF_2v_6mR
330uF_2v_6mR
C129
10uF_6.3v
C222
10uF_6.3v
C169
10uF_6.3v
C166
10uF_6.3v
C613
1
2
10uF_6.3v
C606
1
2
10uF_6.3v
C174
1
2
10uF_6.3v
C170
1
2
10uF_6.3v
C168
1
2
10uF_6.3v
C218
1
2
10uF_6.3v
1
2
1
2
C614
10uF_6.3v
C644
10uF_6.3v
C127
1
2
10uF_6.3v
C128
1
10uF_6.3v
2
C126
1
2
10uF_6.3v
C619
1
2
10uF_6.3v
C616
1
2
10uF_6.3v
C609
1
2
10uF_6.3v
+VCC_CORE
11-,18-
CN506-3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
AA10
VCC053
AA12
VCC054
AA13
VCC055
AA15
VCC056
AA17
VCC057
AA18
VCC058
AA20
VCC059
AB9
VCC060
AC10
VCC061
AB10
VCC062
AB12
VCC063
AB14
VCC064
AB15
VCC065
AB17
VCC066
AB18
VCC067
FOX_PZ4782K_274M_41_478P
VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099
VCC0100
VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCA01
VCCA02
VCCSENSE
VSSSENSE
+VCC_CORE
11-,18-
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
VID0
AF5
VID1
AE5
VID2
AF4
VID3
AE3
VID4
AF3
VID5
AE2
VID6
AF7
AE7
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
C611
1
2
220uF_2.5v
11-
H_VID0
11-
H_VID1
11-
H_VID2
11-
H_VID3
11-
H_VID4
11-
H_VID5
11-
H_VID6
LAYOUT NOTE:
ROUTE VCCSENSE AND VSSSENSE TRACE AT
24.7 OHM WITH 50 MIL SPACEING
PLACE PU AND PD WITHIN I INCH OF CPU
+VCC_CORE
11-,18-
1
R197
100_1%
2
1
R200
100_1%
2
11-
11-
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
C221
1
2
0.1uF_16v
VCCSENSE
VSSSENSE
C220
1
2
0.1uF_16v
LAYOUT NOTE:
PLACE C2461 NEAR PIN B26
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)
C219
C579
1
1
2
2
0.1uF_16v
0.1uF_16v
10-,13-,24-,34-,45-,46-
0.01uF_16v
C551
1
2
+V1.5S
C578
0.1uF_16v
1
2
1
2
1
2
C577
0.1uF_16v
C552
10uF_6.3v
INVENTEC
TITLE
DDD Discrete
MEROM-3
DOC. NUMBER
CHANGE by
Thomas Ho 2-Jun-2007
CODE
CS
SHEET
Model_No
A3
REVSIZE
A01
OF
5518

CN506-4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
AF2
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
FOX_PZ4782K_274M_41_478P
VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
+VCCP
C692
1
2
H_THERMDA
THERM_MINUS
DPLUS
THERM_3S_WARN#
0.1uF_16v
19-
H_BPM5_PREQ#
H_BPM4_PRDY#
H_BPM3_XDP#
H_BPM2_XDP#
H_BPM1_XDP#
H_BPM0_XDP#
H_PWRGD_XDP
16-
16-,49-
49-
1616-
1616-
1616-
17-
16-
H_TCK
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
PWM_3S_FAN#
THERM_3S_WARN#
12
R632
54.9_1%
39-
19-
C554
2200pF_50v
12
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
CN5
1
GND0 GND1
3
OBSFN_A0
5
OBSFN_A1
7
GND2 GND3
9
OBSDATA_A0
11
OBSDATA_A1
13 14
GND4
15
OBSDATA_A2
17
OBSDATA_A3
19 20
GND6
21
OBSFN_B0
23
OBSFN_B1
25
GND8 GND9
27
OBSDATA_B0
29
OBSDATA_B1
31
GND10 GND11
33
OBSDATA_B2
35
OBSDATA_B3
37 38
GND12
39
PWRGOOD_HOOK0
41
HOOK1
43 44
VCC_OBS_AB
45
HOOK2
47
HOOK3
49
GND14 GND15
51
SDA
53
SCL
55
TCK1 TDI
57
TCK0
59 60
GND16
SAMTEC_BSH_030_01_L_D_A_TR_60P_OPEN
ITPCLK_HOOK4
ITPCLK#_HOOK5
RESET#_HOOK6
XDP CONNECTOR
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
+V5S
U501
5
1
4
2
3
TC7SET08F
2200pF_50v
R521
12
2.2K_5%
Q504
3
2
D
S
G
AO3409
R520
12
5.6K_5%
1
1
2
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C7004
1
2
0.1uF_16v
C553
U7002
1
12
VCC
2
DXP1
3
DXN
4
DXP2
5
OT1#
MAX_MAX6695_SOP_10P
2
4
OBSFN_C0
6
OBSFN_C1
8
10
OBSDATA_C0
12
OBSDATA_C1
GND5
16
OBSDATA_C2
18
OBSDATA_C3
GND7
22
OBSFN_D0
24
OBSFN_D1
26
28
OBSDATA_D0
30
OBSDATA_D1
32
34
OBSDATA_D2
36
OBSDATA_D3
GND13
40
42
VCC_OBS_CD
46
48
DBR#_HOOK7
50
52
TDO
54
TRSTn
56
58
TMS
GND17
C506
0.01uF_16v
ENTERY_3802_B03S_01E_3P
FAN CONN
OT2#
SMBDATA
ALERT#
SMBCLK
GND
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
+VCCP
R230
CN502
1
1
2
G
G1
2
3
G
G2
3
10
9
8
7
6
CHANGE by
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
1
R231
1K_5%
2
C691
1
2
0.1uF_16v
1K_5%
12
12
0_5%_OPEN
R551
12
0_5%_OPEN
Thomas Ho 13-Jun-2007
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
+VCCP
2
R232
54.9_1%
1
15-
CLK_R_XDP
15-
CLK_R_XDP#
16-,21-
H_CPURST#
16-,32-
XDP_DBRESET#
16-
H_TDO
16-
H_TRST#
16-
TDI_FLEX
16-
H_TMS
R552
16-,20-,31-
15-,26-,27-,32-
32-,33-
15-,26-,27-,32-
49-
PM_THRMTRIP#
ICH_3S_SMDATA
THERM_SCI#
ICH_3S_SMCLK
OTEMP#
INVENTEC
TITLE
DDD Discrete
THERMAL&FAN
SIZE
CODE
A3
CS
SHEET
DOC. NUMBER
Model_No A01
REV
OF
5519

MCH_CFG(5)
MCH_CFG(13:12)
XOR/ALLZ
NOTE: CFG[2:0] STRP : 001b : 533 MT/S
+V1.8
8-,9-,10-,12-,13-,20-,23-,24-,26-,27-
LOW=DMIx2
HIGH=DMIx4
00=PARTIAL CLOCK GATING DISABLE
01=XOR MODE ENABLE
10=ALL-Z MODE ENABLE
11=NORMAL OPERATION
011b : 667 MT/S
1
R540
20_1%
2
1
R554
20_1%
2
Note: R1351,R1352
For Calero : 80.6 ohm
For Crestline : 20 ohm
20-
20-
MCH_CFG(7)
(CPU Strap)
SM_RCOMP
SM_RCOMP#
LOW=RSVD
HIGH=Mobile CPU
MCH_CFG(16)
(FSB Dynamic
ODT)
MCH_CFG(9)
PCIE Graphics
Lane
LOW=Dynamic ODT
Disable
HIGH=Dynamic ODT
Enable
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
MCH_CFG(18)
MCH_CFG(19)
MCH_CFG(20) MCH_CFG(19)
MCH_CFG(18)
VCC SELECT
MCH_CFG(20)
(PCIE BACKWARD
INTERPOERABILITY
MODE
12
R250 10K_5%
12
R246
R248 10K_5%
12
20-
20-
20-
R206
OPEN
10K_5%
1
2
PM_PWROK
LOW=1.05V
HIGH=1.5V
LOW=ONLY SDVO OR PCIE X1 IS
OPERATIONAL
HIGH=SDVO AND PCIE X1 ARE
OPERATING SIMULTANEOUSLY
VIA THE PEG PORT
15-,20-
CLKREQ_R_MCH#
20-,26-
PM_EXTTS#0
20-,27-
PM_EXTTS#1
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
1
R244
R245
OPEN
OPEN
2
2
20-,32-,39-
MCH_CFG(19)
(DMI LANE
REVERSAL)
LOW=NORMAL
HIGH=LANES REVERSED
MCH_CFG(17:3)
CPU_BSEL1
MCH_CFG(18)
MCH_CFG(20)
BM_BUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PLT_RST#
PM_THRMTRIP#
PM_DPRSLPVR
LOW=Reverse Lane
HIGH=Normal operation
MCH_CFG(11)
PSB 4X CLK
ENABLE
CPU_BSEL0
CPU_BSEL2
15-,1720-
202020-
3211-,17-,3120-,2620-,27-
33-,4616-,19-,3111-,32-
15-,17-
15-,17-
R205
1K_5%
R167
LOW=CALISTOGA
HIGH=RESERVED
MA_A(14)
MB_A(14)
1
1
R173
1K_5%
2
2
MCH_CFG(3)
MCH_CFG(4)
MCH_CFG(5)
MCH_CFG(6)
MCH_CFG(7)
MCH_CFG(8)
MCH_CFG(9)
MCH_CFG(10)
MCH_CFG(11)
MCH_CFG(12)
MCH_CFG(13)
MCH_CFG(14)
MCH_CFG(15)
MCH_CFG(16)
MCH_CFG(17)
12
100_5%
NOTE :
USE 4K-OHM RESISTOR WHEN INSTALLING
PULL-UP/PULL-DOWN RESISTOR ON ANY
MCH-CFG CONNECTION/PINS.
U510-2
P36
26-,2827-,28-
RSVD1
P37
RSVD2
R35
RSVD3
N35
RSVD4
AR12
RSVD5
AR13
RSVD6
AM12
RSVD7
AN13
RSVD8
J12
RSVD9
AR37
RSVD10
AM36
RSVD11
AL36
RSVD12
AM37
RSVD13
D20
RSVD14
H10
RSVD20
B51
RSVD21
BJ20
RSVD22
BK22
RSVD23
BF19
RSVD24
BH20
RSVD25
BK18
RSVD26
BJ18
RSVD
RSVD27
BF23
RSVD28
BG23
RSVD29
BC23
RSVD30
BD24
RSVD31
BJ29
RSVD32
BE24
RSVD33
BH39
RSVD34
AW20
RSVD35
BK20
RSVD36
C48
RSVD37
D47
RSVD38
B44
RSVD39
C44
RSVD40
A35
RSVD41
B37
RSVD42
B36
RSVD43
B34
RSVD44
C34
RSVD45
P27
CFG_0
N27
CFG_1
N24
CFG_2
C21
CFG_3
C23
CFG_4
F23
CFG_5
N23
CFG_6
G23
CFG_7
J20
CFG_8
C20
CFG_9
R24
CFG_10
L23
CFG_11
CFG
J23
CFG_12
E23
CFG_13
E20
CFG_14
K23
CFG_15
M20
CFG_16
M24
CFG_17
L32
CFG_18
N33
CFG_19
L35
CFG_20
G41
PM_BM_BUSY#
L39
PM_DPRSTP#
L36
PM_EXT_TS#_0
J36
PM_EXT_TS#_1
AW49
PWROK
AV20
RSTIN#
N20
THRMTRIP#
BK51
BK50
BJ51
BL50
BL49
G36
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2
PM
DPRSLPVR
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
ITL_CRESTLINE_DIS_FCBGA_1299P
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
SM_CS#_0
SM_CS#_1
DDR MUXING
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
DPLL_REF_CLK
DPLLREF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
DFGT_VR_EN
GRAPHICS VID
CL_CLK
CL_DATA
ME
CL_PWROK
CL_RST#
CL_VREF
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1
MISC
TEST_2
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
BL15
BK14
BK31
BL31
AR49
AW4
B42
C42
H48
H47
K44
K45
AN47
AJ38
AN42
AN46
AM47
AJ39
AN41
AN45
AJ46
AJ41
AM40
AM44
AJ47
AJ42
AM39
AM43
E35
A39
C38
B39
E36
AM49
AK50
AT43
AN49
AM50
H35
K36
G39
G40
A37
R32
TP39
TP40
TP41
TP42
TP43
1
R177
20K_5%
2
1515-
DMI_TXN(0)
DMI_TXN(1)
DMI_TXN(2)
DMI_TXN(3)
DMI_TXP(0)
DMI_TXP(1)
DMI_TXP(2)
DMI_TXP(3)
DMI_RXN(0)
DMI_RXN(1)
DMI_RXN(2)
DMI_RXN(3)
DMI_RXP(0)
DMI_RXP(1)
DMI_RXP(2)
DMI_RXP(3)
20-,32-,39-
MCH_CFG(16)
MCH_CFG(9)
MCH_CFG(7)
MCH_CFG(5)
26-,2826-,2827-,2827-,28-
26-,2826-,2827-,2827-,28-
26-,2826-,2827-,2827-,28-
CLK_R_PEG_MCH
CLK_R_PEG_MCH#
32-
32-
32-
32-
32-
CL_CLK0
32-
CL_DATA0
PM_PWROK
32-
CL_RST#0
15-,20-
CLKREQ_R_MCH#
32-
MCH_ICH_SYNC#
1
R607
0_5%
2
CHANGE by
20202020-
26-
M_CLK_DDR0
26-
M_CLK_DDR1
27-
M_CLK_DDR2
27-
M_CLK_DDR3
26-
M_CLK_DDR0#
26-
M_CLK_DDR1#
27-
M_CLK_DDR2#
27-
M_CLK_DDR3#
M_CKE0
M_CKE1
M_CKE2
M_CKE3
M_CS0#
M_CS1#
M_CS2#
M_CS3#
M_ODT0
M_ODT1
M_ODT2
M_ODT3
20-
SM_RCOMP
20-
SM_RCOMP#
20-
SM_RCOMP_VOH
20-
SM_RCOMP_VOL
DMI_TXN(3:0)
DMI_TXP(3:0)
DMI_RXN(3:0)
DMI_RXP(3:0)
Thomas Ho
1
1
R203
OPEN
2
+V1.8
R204
OPEN
2
8-,9-,10-,12-,13-,20-,23-,24-,26-,27-
1
R555
1K_1%
2
1
C558
1
R541
3K_1%
2
0.01uF_16v
2
1
C559
1
R556
1K_1%
2
0.01uF_16v
2
C588
1
2
0.1uF_16v
13-Jun-2007
1
2
12-,26-,27-
C145
0.1uF_16v
+V1.25S
1
1
R201
R202
OPEN
OPEN
2
2
M_VREF
20-
1
C536
2
2.2uF_16v
1
2
2.2uF_16v
8-,10-,24-,34-
1
R573
1K_1%
2
1
R572
392_1%
2
C537
SM_RCOMP_VOH
20-
SM_RCOMP_VOL
INVENTEC
TITLE
DDD Discrete
CRESTLINE-1
CODE
SIZE
A3
CS
SHEET
DOC. NUMBER
OF
20 55
REV
A01Model_No

U510-3
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#_0
E51
LVDSA_DATA#_1
F49
LVDSA_DATA#_2
G50
LVDSA_DATA_0
E50
LVDSA_DATA_1
F48
LVDSA_DATA_2
G44
LVDSB_DATA#_0
B47
LVDSB_DATA#_1
B45
LVDSB_DATA#_2
E44
LVDSB_DATA_0
A47
LVDSB_DATA_1
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL0
P33
TV_DCONSEL1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
ITL_CRESTLINE_DIS_FCBGA_1299P
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
MCH_HSWING
21-
N43
PEG_COMPI
M43
PEG_COMPO
J51
PEG_RX#_0
L51
PEG_RX#_1
N47
PEG_RX#_2
T45
PEG_RX#_3
T50
PEG_RX#_4
U40
PEG_RX#_5
Y44
PEG_RX#_6
Y40
PEG_RX#_7
AB51
PEG_RX#_8
W49
PEG_RX#_9
AD44
PEG_RX#_10
AD40
PEG_RX#_11
LVDS
TV
VGA
AG46
PEG_RX#_12
AH49
PEG_RX#_13
AG45
PEG_RX#_14
AG41
PEG_RX#_15
J50
PEG_RX_0
L50
PEG_RX_1
M47
PEG_RX_2
U44
PEG_RX_3
T49
PEG_RX_4
T41
PEG_RX_5
W45
PEG_RX_6
W41
PEG_RX_7
AB50
PEG_RX_8
Y48
PEG_RX_9
AC45
PEG_RX_10
AC41
PEG_RX_11
AH47
PEG_RX_12
AG49
PEG_RX_13
AH45
PEG_RX_14
AG42
PEG_RX_15
N45
PEG_TX#_0
U39
PEG_TX#_1
U47
PEG_TX#_2
N51
PEG_TX#_3
R50
PEG_TX#_4
PCI-EXPRESS GRAPHICS
T42
PEG_TX#_5
Y43
PEG_TX#_6
W46
PEG_TX#_7
W38
PEG_TX#_8
AD39
PEG_TX#_9
AC46
PEG_TX#_10
AC49
PEG_TX#_11
AC42
PEG_TX#_12
AH39
PEG_TX#_13
AE49
PEG_TX#_14
AH44
PEG_TX#_15
M45
PEG_TX_0
T38
PEG_TX_1
T46
PEG_TX_2
N50
PEG_TX_3
R51
PEG_TX_4
U43
PEG_TX_5
W42
PEG_TX_6
Y47
PEG_TX_7
Y39
PEG_TX_8
AC38
PEG_TX_9
AD47
PEG_TX_10
AC50
PEG_TX_11
AD43
PEG_TX_12
AG39
PEG_TX_13
AE50
PEG_TX_14
AH43
PEG_TX_15
+VCCP
1
R598
221_1%
2
1
R599
C666
1
100_1%
2
0.1uF_16v
2
+VCC_PEG
R253
12
50505050505050505050505050505050-
50505050505050505050505050505050-
21212121212121212121212121212121-
21212121212121212121212121212121-
MCH_HRCOMP
24-
24.9_1%
PEG_C_RXN0
PEG_C_RXN1
PEG_C_RXN2
PEG_C_RXN3
PEG_C_RXN4
PEG_C_RXN5
PEG_C_RXN6
PEG_C_RXN7
PEG_C_RXN8
PEG_C_RXN9
PEG_C_RXN10
PEG_C_RXN11
PEG_C_RXN12
PEG_C_RXN13
PEG_C_RXN14
PEG_C_RXN15
PEG_C_RXP0
PEG_C_RXP1
PEG_C_RXP2
PEG_C_RXP3
PEG_C_RXP4
PEG_C_RXP5
PEG_C_RXP6
PEG_C_RXP7
PEG_C_RXP8
PEG_C_RXP9
PEG_C_RXP10
PEG_C_RXP11
PEG_C_RXP12
PEG_C_RXP13
PEG_C_RXP14
PEG_C_RXP15
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
21-
R596
24.9_1%
Close to NB
0.1uF_16v
C657
PEG_TXN0 PEG_C_TXN0
PEG_TXN2
PEG_TXN3 PEG_C_TXN3
PEG_TXN4 PEG_C_TXN4
PEG_TXN5 PEG_C_TXN5
PEG_TXN6 PEG_C_TXN6
PEG_TXN7 PEG_C_TXN7
PEG_TXN8 PEG_C_TXN8
PEG_TXN9 PEG_C_TXN9
PEG_TXN10 PEG_C_TXN10
PEG_TXN11 PEG_C_TXN11
PEG_TXN12 PEG_C_TXN12
PEG_TXN13 PEG_C_TXN13
PEG_TXN14 PEG_C_TXN14
PEG_TXN15
PEG_TXP0 PEG_C_TXP0
PEG_TXP1 PEG_C_TXP1
PEG_TXP2 PEG_C_TXP2
PEG_TXP3 PEG_C_TXP3
PEG_TXP4 PEG_C_TXP4
PEG_TXP5 PEG_C_TXP5
PEG_TXP6
PEG_TXP7 PEG_C_TXP7
PEG_TXP8 PEG_C_TXP8
PEG_TXP9 PEG_C_TXP9
PEG_TXP10 PEG_C_TXP10
PEG_TXP11 PEG_C_TXP11
PEG_TXP12 PEG_C_TXP12
PEG_TXP13 PEG_C_TXP13
PEG_TXP14 PEG_C_TXP14
PEG_TXP15
12
21-
C274
21-
C651
2121-
C653
C655
21-
C227
21-
C649
21-
C630
21-
C631
21-
C183
21-
C623
21-
C636
21-
C629
21-
C147
21-
C633
21-
C627
21-
C656
21-
C275
21-
C650
21-
C652
21-
C654
21-
C228
21-
C648
21-
C628
21-
C634
21-
C185
21-
C624
21-
C635
21-
C626
21-
C184
21-
C632
21-
C625
21-
MCH_HSCOMP#
MCH_HSCOMP
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
1
2
0.1uF_16v
1
2
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
1
2
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
2
1
0.1uF_16v
1
2
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
21-
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
21-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
50-
R582
54.9_1%
R581
54.9_1%
PEG_C_TXN1PEG_TXN1
PEG_C_TXN2
PEG_C_TXN15
PEG_C_TXP6
PEG_C_TXP15
12
12
+VCCP
+VCCP
H_D#(63:0)
Trace need be 10 mils wide with 20 mils
17-
Layout notes:
MCH_HSWING
MCH_HRCOMP
MCH_HSCOMP
MCH_HSCOMP#
H_CPURST#
H_CPUSLP#
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
1
R603
1K_1%
2
1
R605
1
2K_1%
2
2
C668
0.1uF_16v
21-
2121-
16-,1917-
H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)
H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)
H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)
H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)
U510-1
E2
H_D#_0
G2
H_D#_1
G7
H_D#_2
M6
H_D#_3
H7
H_D#_4
H3
H_D#_5
G4
H_D#_6
F3
H_D#_7
N8
H_D#_8
H2
H_D#_9
M10
H_D#_10
N12
H_D#_11
N9
H_D#_12
H5
H_D#_13
P13
H_D#_14
K9
H_D#_15
M2
H_D#_16
W10
H_D#_17
Y8
H_D#_18
V4
H_D#_19
M3
H_D#_20
J1
H_D#_21
N5
H_D#_22
N3
H_D#_23
W6
H_D#_24
W9
H_D#_25
N2
H_D#_26
Y7
H_D#_27
Y9
H_D#_28
P4
H_D#_29
W3
H_D#_30
N1
H_D#_31
AD12
H_D#_32
AE3
H_D#_33
AD9
H_D#_34
AC9
H_D#_35
AC7
H_D#_36
AC14
H_D#_37
AD11
H_D#_38
AC11
H_D#_39
AB2
H_D#_40
AD7
H_D#_41
AB1
H_D#_42
Y3
H_D#_43
AC6
H_D#_44
AE2
H_D#_45
AC5
H_D#_46
AG3
H_D#_47
AJ9
H_D#_48
AH8
H_D#_49
AJ14
H_D#_50
AE9
H_D#_51
AE11
H_D#_52
AH12
H_D#_53
AJ5
H_D#_54
AH5
H_D#_55
AJ6
H_D#_56
AE7
H_D#_57
AJ7
H_D#_58
AJ2
H_D#_59
AE5
H_D#_60
AJ3
H_D#_61
AH2
H_D#_62
AH13
H_D#_63
B3
H_SWING
C2
H_RCOMP
W1
H_SCOMP
W2
H_SCOMP#
B6
H_CPURST#
E5
H_CPUSLP#
B9
H_AVREF
A9
H_DVREF
ITL_CRESTLINE_DIS_FCBGA_1299P
CHANGE by
HOST
H_ADSTB#_0
H_ADSTB#_1
HPLL_CLK#
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
Thomas Ho 13-Jun-2007
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)
16-
H_ADS#
16-
H_ADSTB#0
16-
H_ADSTB#1
16-
H_BNR#
16-
H_BPRI#
16-
H_BREQ#0
16-
H_DEFER#
16-
H_DBSY#
15-
CLK_R_MCHBCLK
15-
CLK_R_MCHBCLK#
17-
H_DPWR#
16-
H_DRDY#
16-
H_HIT#
16-
H_HITM#
16-
H_LOCK#
16-
H_TRDY#
17-
H_DINV#0
17-
H_DINV#1
17-
H_DINV#2
17-
H_DINV#3
17-
H_DSTBN#0
17-
H_DSTBN#1
17-
H_DSTBN#2
17-
H_DSTBN#3
17-
H_DSTBP#0
17-
H_DSTBP#1
17-
H_DSTBP#2
17-
H_DSTBP#3
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
TITLE
SIZE DOC. NUMBER
A3
16-
H_A#(35:3)
16-21-
H_REQ#(4:0)
16-
H_RS#(2:0)
H_RS#(0)
H_RS#(1)
H_RS#(2)
INVENTEC
DDD Discrete
Crestline-2
CODE
Model_No A01
CS
SHEET
OF
5521
REV

MA_DATA(63:0)
26-
U510-4
AR43
SA_DQ0
AW44
SA_DQ1
BA45
SA_DQ2
AY46
SA_DQ3
AR41
SA_DQ4
AR45
SA_DQ5
AT42
SA_DQ6
AW47
SA_DQ7
BB45
SA_DQ8
BF48
SA_DQ9
BG47
SA_DQ10
BJ45
SA_DQ11
BB47
SA_DQ12
BG50
SA_DQ13
BH49
SA_DQ14
BE45
SA_DQ15
AW43
SA_DQ16
BE44
SA_DQ17
BG42
SA_DQ18
BE40
SA_DQ19
BF44
SA_DQ20
BH45
SA_DQ21
BG40
SA_DQ22
BF40
SA_DQ23
AR40
SA_DQ24
AW40
SA_DQ25
AT39
SA_DQ26
AW36
SA_DQ27
AW41
SA_DQ28
AY41
SA_DQ29
AV38
SA_DQ30
AT38
SA_DQ31
AV13
SA_DQ32
AT13
SA_DQ33
AW11
SA_DQ34
AV11
SA_DQ35
AU15
SA_DQ36
AT11
SA_DQ37
BA13
SA_DQ38
BA11
SA_DQ39
BE10
SA_DQ40
BD10
SA_DQ41
BD8
SA_DQ42
AY9
SA_DQ43
BG10
SA_DQ44
AW9
SA_DQ45
BD7
SA_DQ46
BB9
SA_DQ47
BB5
SA_DQ48
AY7
SA_DQ49
AT5
SA_DQ50
AT7
SA_DQ51
AY6
SA_DQ52
BB7
SA_DQ53
AR5
SA_DQ54
AR8
SA_DQ55
AR9
SA_DQ56
AN3
SA_DQ57
AM8
SA_DQ58
AN10
SA_DQ59
AT9
SA_DQ60
AN9
SA_DQ61
AM9
SA_DQ62
AN11
SA_DQ63
ITL_CRESTLINE_DIS_FCBGA_1299P
SA_BS_0
SA_BS_1
SA_BS_2
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
DDR SYSTEM MEMORY A
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVEN#
SA_WE#
BB19
BK19
BF29
BL17
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BE18
AY20
BA19
26-,28-
TP28
MA_CAS#
MA_DM(0)
MA_DM(1)
MA_DM(2)
MA_DM(3)
MA_DM(4)
MA_DM(5)
MA_DM(6)
MA_DM(7)
MA_DQS(0)
MA_DQS(1)
MA_DQS(2)
MA_DQS(3)
MA_DQS(4)
MA_DQS(5)
MA_DQS(6)
MA_DQS(7)
MA_DQS#(0)
MA_DQS#(1)
MA_DQS#(2)
MA_DQS#(3)
MA_DQS#(4)
MA_DQS#(5)
MA_DQS#(6)
MA_DQS#(7)
MA_A(0)
MA_A(1)
MA_A(2)
MA_A(3)
MA_A(4)
MA_A(5)
MA_A(6)
MA_A(7)
MA_A(8)
MA_A(9)
MA_A(10)
MA_A(11)
MA_A(12)
MA_A(13)
26-,2826-,2826-,28-
26-,28-
26-,28-
MA_BS0#
MA_BS1#
MA_BS2#
26-
26-
26-
26-,28-
MA_RAS#
MA_WE#
MB_DATA(63:0)
MA_DM(7:0)
MA_DQS(7:0)
MA_DQS#(7:0)
MA_A(13:0)
27-
U510-5
AP49
SB_DQ0
AR51
SB_DQ1
AW50
SB_DQ2
AW51
SB_DQ3
AN51
SB_DQ4
AN50
SB_DQ5
AV50
SB_DQ6
AV49
SB_DQ7
BA50
SB_DQ8
BB50
SB_DQ9
BA49
SB_DQ10
BE50
SB_DQ11
BA51
SB_DQ12
AY49
SB_DQ13
BF50
SB_DQ14
BF49
SB_DQ15
BJ50
SB_DQ16
BJ44
SB_DQ17
BJ43
SB_DQ18
BL43
SB_DQ19
BK47
SB_DQ20
BK49
SB_DQ21
BK43
SB_DQ22
BK42
SB_DQ23
BJ41
SB_DQ24
BL41
SB_DQ25
BJ37
SB_DQ26
BJ36
SB_DQ27
BK41
SB_DQ28
BJ40
SB_DQ29
BL35
SB_DQ30
BK37
SB_DQ31
BK13
SB_DQ32
BE11
SB_DQ33
BK11
SB_DQ34
BC11
SB_DQ35
BC13
SB_DQ36
BE12
SB_DQ37
BC12
SB_DQ38
BG12
SB_DQ39
BJ10
SB_DQ40
BL9
SB_DQ41
BK5
SB_DQ42
BL5
SB_DQ43
BK9
SB_DQ44
BK10
SB_DQ45
BJ8
SB_DQ46
BJ6
SB_DQ47
BF4
SB_DQ48
BH5
SB_DQ49
BG1
SB_DQ50
BC2
SB_DQ51
BK3
SB_DQ52
BE4
SB_DQ53
BD3
SB_DQ54
BJ2
SB_DQ55
BA3
SB_DQ56
BB3
SB_DQ57
AR1
SB_DQ58
AT3
SB_DQ59
AY2
SB_DQ60
AY3
SB_DQ61
AU2
SB_DQ62
AT2
SB_DQ63
ITL_CRESTLINE_DIS_FCBGA_1299P
SB_BS_0
SB_BS_1
SB_BS_2
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
DDR SYSTEM MEMORY B
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVEN#
SB_WE#
AY17
BG18
BG36
BE17
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
AV16
AY18
BC17
27-,28-
MB_CAS#
TP29
MB_A(0)
MB_A(1)
MB_A(2)
MB_A(3)
MB_A(4)
MB_A(5)
MB_A(6)
MB_A(7)
MB_A(8)
MB_A(9)
MB_A(10)
MB_A(11)
MB_A(12)
MB_A(13)
27-,28-
27-,28-
27-,2827-,2827-,28-
27-
27-
27-,28-
MB_RAS#
MB_WE#
27-
MB_DQS(7:0)
MB_DQS#(7:0)
MB_A(13:0)
MB_BS0#
MB_BS1#
MB_BS2#
MB_DM(7:0)
INVENTEC
TITLE
DDD Discrete
CRESTLINE-3
SIZEOFCODE
A3
CHANGE by SHEET
Thomas Ho
2-Jun-2007
CS
DOC. NUMBER REV
Model_No
5522
A01

+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
+V1.8
8-,9-,10-,12-,13-,20-,23-,24-,26-,27-
U510-7
AT35
VCC_1
AH28
AC32
AC31
AK32
AH32
AH31
AH29
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BG32
BG33
BG35
BH32
BH34
BH35
BK32
BK33
BK34
BK35
AU30
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AN14
AT34
AJ31
AJ28
AF32
BF33
BF34
BJ32
BJ33
BJ34
BL33
AF21
AF26
AJ20
R30
R20
T14
W13
W14
Y12
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
POWER
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
ITL_CRESTLINE_DIS_FCBGA_1299P
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
AW45
BC39
BE39
BD17
BD4
AW8
AT6
1
2
C130
0.1uF_16v
C131
11
2
0.1uF_16v
C108
1
2
0.22uF_10v
2
C109
0.47uF_6.3v
+VCCP
1
2
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
C620
1
2
220uF_2.5v
308 mils from
the Edge
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
C621
22uF_6.3v
C622
1
2
0.22uF_10v
PLACE THE EDGE
C144
1
2
0.47uF_6.3v
1
2
C141
1uF_10v
C137
1
2
22uF_6.3v
Cavity Capacitors
C112
1
2
0.1uF_16v
C176
1
2
0.22uF_10v
C146
1
2
1uF_10v
C179
1
2
0.22uF_10v
1
2
C560
220uF_2.5v
C143
1
2
0.1uF_16v
C139
1
2
0.22uF_10v
+V1.8
8-,9-,10-,12-,13-,20-,23-,24-,26-,27-
C95
1
2
22uF_6.3v
C180
1
2
0.1uF_16v
Cavity Capacitors
1
2
1
2
C142
0.1uF_16v
C96
1
2
22uF_6.3v
C178
0.1uF_16v
CHANGE by
U510-6
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37
VCC_NCTF_37
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
ITL_CRESTLINE_DIS_FCBGA_1299P
Thomas Ho
POWER
4-Jun-2007
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
B2
C1
48-
MCHGND3
48-
BL1
BL51
A51
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
4848-
MCHGND4
MCHGND5
MCHGND6
+VCCP
INVENTEC
TITLE
DDD Discrete
CRESTLINE-4
DOC. NUMBER
CODESIZE REV
A3
CS
SHEET
23 55
A01Model_No
OF

10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
+VCCP
+V1.25S
8-,10-,20-,24-,34-
L509
12
BLM11A121S
L506
12
BLM11A121S
L7
12
BLM18PG121SN1
1
C583
2
22uF_6.3v
1
C582
2
22uF_6.3v
1
2
8-,10-,20-,24-,34-
C270
0.1uF_16v
+V1.25S
C223
1
2
10uF_6.3v
1
C91
2
C585
1
2
0.1uF_16v
C584
1
2
0.1uF_16v
+V1.25S
1
2
47uF_4v
+V1.5S
10-,13-,18-,34-,45-,46-
C225
1
2
0.1uF_16v
+V1.25S_PEGPLL
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V1.25S_PEGPLL
24-
8-,10-,20-,24-,34-
1
C94
47uF_4v
1
2
24-
C182
0.1uF_16v
C93
1
2
22uF_6.3v
1
2
C224
1
2
0.022uF_16v
C134
1uF_6.3v
2
+V1.25S
1
2
C132
4.7uF_6.3v
8-,10-,20-,24-,34-
C586
0.1uF_16v
1
2
C136
1uF_6.3v
+V3S
1
2
C673
0.1uF_16v
C92
1
2
22uF_6.3v
C111
1
2
22uF_6.3v
1
2
C138
1uF_6.3v
1
2
C110
0.1uF_16v
U510-8
J32
VCCSYNC
A33
VCCA_CRT_DAC_1
B33
VCCA_CRT_DAC_2
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM_1
AV19
VCCA_SM_2
AU19
VCCA_SM_3
AU18
VCCA_SM_4
AU17
VCCA_SM_5
AT22
VCCA_SM_7
AT21
VCCA_SM_8
AT19
VCCA_SM_9
AT18
VCCA_SM_10
AT17
VCCA_SM_11
AR17
VCCA_SM_NCTF_1
AR16
VCCA_SM_NCTF_2
BC29
VCCA_SM_CK_1
BB29
VCCA_SM_CK_2
C25
VCCA_TVA_DAC_1
B25
VCCA_TVA_DAC_2
C27
VCCA_TVB_DAC_1
B27
VCCA_TVB_DAC_2
B28
VCCA_TVC_DAC_1
A28
VCCA_TVC_DAC_2
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS_1
H42
VCCD_LVDS_2
ITL_CRESTLINE_DIS_FCBGA_1299P
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
VCC_AXD_NCTF
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
VCC_DMI
POWER
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
VCC_TX_LVDS
VCC_HV_1
VCC_HV_2
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
VCC_RXR_DMI_1
VCC_RXR_DMI_2
VTTLF1
VTTLF2
VTTLF3
U13
VTT_1
U12
VTT_2
U11
VTT_3
U9
VTT_4
U8
VTT_5
U7
VTT_6
U5
VTT_7
U3
VTT_8
U2
VTT_9
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
BK24
BK23
BJ24
BJ23
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
C667
C647
C175
0.47uF_6.3v
1
2
1
2
0.47uF_6.3v
1
2
0.47uF_6.3v
C226
0.1uF_16v
1
2
1
2
C135
1uF_10v
C269
1uF_10v
1
2
1
2
C177
4.7uF_6.3v
1
2
Place on the Edge
C133
1
2
22uF_6.3v
C670
1
2
10uF_6.3v
1
R252
10_5%
2
3
D14
+VCCP
1
CHENMKO_BAT54_3P
C675
1
2
10uF_6.3v
+V1.25S
C181
1
2
0.47uF_6.3v
8-,10-,20-,24-,34-
C140
2.2uF_16v
+V1.25S
8-,10-,20-,24-,34-
1
2
+V3S
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
C272
1
2
220uF_2.5v
+V1.25S
C557
0.1uF_16v
C273
1
2
220uF_2.5v
C646
1
2
220uF_2.5v
8-,10-,20-,24-,34-
C587
1
2
0.1uF_16v
1
2
+VCC_PEG
+V1.8
8-,9-,10-,12-,13-,20-,23-,26-,27-
C556
22uF_6.3v
21-
R614
12
0_5%_OPEN
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
R613
12
0_5%
+V1.25S
+VCCP
8-,10-,20-,24-,34-
CHANGE by
INVENTEC
TITLE
DDD Discrete
Cresline-5
SIZE CODE DOC. NUMBER REV
A3
CS
14-Jun-2007Thomas Ho
24 55
A01Model_No
OFSHEET

U510-9
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
AB20
VSS_8
AB23
VSS_9
AB26
VSS_10
AB28
VSS_11
AB31
VSS_12
AC10
VSS_13
AC13
VSS_14
AC3
VSS_15
AC39
VSS_16
AC43
VSS_17
AC47
VSS_18
AD1
VSS_19
AD21
VSS_20
AD26
VSS_21
AD29
VSS_22
AD3
VSS_23
AD41
VSS_24
AD45
VSS_25
AD49
VSS_26
AD5
VSS_27
AD50
VSS_28
AD8
VSS_29
AE10
VSS_30
AE14
VSS_31
AE6
VSS_32
AF20
VSS_33
AF23
VSS_34
AF24
VSS_35
AF31
VSS_36
AG2
VSS_37
AG38
VSS_38
AG43
VSS_39
AG47
VSS_40
AG50
VSS_41
AH3
VSS_42
AH40
VSS_43
AH41
VSS_44
AH7
VSS_45
AH9
VSS_46
AJ11
VSS_47
AJ13
VSS_48
AJ21
VSS_49
AJ24
VSS_50
AJ29
VSS_51
AJ32
VSS_52
AJ43
VSS_53
AJ45
VSS_54
AJ49
VSS_55
AK20
VSS_56
AK21
VSS_57
AK26
VSS_58
AK28
VSS_59
AK31
VSS_60
AK51
VSS_61
AL1
VSS_62
AM11
VSS_63
AM13
VSS_64
AM3
VSS_65
AM4
VSS_66
AM41
VSS_67
AM45
VSS_68
AN1
VSS_69
AN38
VSS_70
AN39
VSS_71
AN43
VSS_72
AN5
VSS_73
AN7
VSS_74
AP4
VSS_75
AP48
VSS_76
AP50
VSS_77
AR11
VSS_78
AR2
VSS_79
AR39
VSS_80
AR44
VSS_81
AR47
VSS_82
AR7
VSS_83
AT10
VSS_84
AT14
VSS_85
AT41
VSS_86
AT49
VSS_87
AU1
VSS_88
AU23
VSS_89
AU29
VSS_90
AU3
VSS_91
AU36
VSS_92
AU49
VSS_93
AU51
VSS_94
AV39
VSS_95
AV48
VSS_96
AW1
VSS_97
AW12
VSS_98
AW16
VSS_99
ITL_CRESTLINE_DIS_FCBGA_1299P
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
U510-10
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
ITL_CRESTLINE_DIS_FCBGA_1299P
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
CHANGE by
INVENTEC
TITLE
DDD Discrete
CRESTLINE-6
SIZE DOC. NUMBER
CODE
A3
CS
2-Jun-2007Thomas Ho
SHEET
25 55
REV
A01Model_No
OF

R22
10K_5%
MA_A(13:0)
1
1
R21
10K_5%
2
2
MA_DQS#(7:0)
MA_DM(7:0)
MA_DQS(7:0)
22-
22-,28-
MA_A(14)
22-
22-
20-,28-
M_CLK_DDR0
M_CLK_DDR0#
M_CLK_DDR1
M_CLK_DDR1#
ICH_3S_SMCLK
ICH_3S_SMDATA
MA_BS2#
MA_BS0#
MA_BS1#
M_CS0#
M_CS1#
M_CKE0
M_CKE1
MA_CAS#
MA_RAS#
MA_WE#
M_ODT0
M_ODT1
22-,28-
22-,2822-,2820-,2820-,282020202020-,2820-,2822-,2822-,2822-,28-
15-,19-,27-,3215-,19-,27-,32-
20-,2820-,28-
CN503-1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10_AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
FOX_AS0A426_NARN_7F_200P
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
22-
MA_DATA(63:0)
+V1.8
8-,9-,10-,12-,13-,20-,23-,24-,27-
Layout notes: Place these Caps closed So-Dimm0
1
2
C515
0.1uF_16v
1
2
C513
0.1uF_16v
1
2
1
2
C511
0.1uF_16v
+V3S
1
C520
0.1uF_16v
1
2
2
C512
C509
1
2.2uF_16v
2
0.1uF_16v
10-,11-,13-,14-,15-,19-,20-,24-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C519
2.2uF_16v
C33
0.1uF_16v
C516
C510
1
1
2.2uF_16v
2.2uF_16v
2
22
M_VREF
12-,20-,27-
1
1
2
2
C32
2.2uF_16v
1
2.2uF_16v
C517
1
2
C514
2.2uF_16v
1
2
PM_EXTTS#0
C508
100uF_6.3v_OPEN
20-
CN503-2
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
G1
GND0
G2
GND1
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
FOX_AS0A426_NARN_7F_200P
SO DIMM0_9.2mm
INVENTEC
TITLE
DDD Discrete
DDR2-DIMM-0
CODE
SIZE
CHANGE by OF
Thomas Ho 2-Jun-2007
A3
DOC. NUMBER
Model_No A01
CS
SHEET
REV
5526

MB_A(13:0)
22-,28-
MB_A(14)
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
1
R72
10K_5%
2
1
R73
MB_DM(7:0)
10K_5%
2
MB_DQS(7:0)
MB_DQS#(7:0)
22-
22-
20-,28-
22-
MB_BS2#
MB_BS0#
MB_BS1#
M_CS2#
M_CS3#
M_CLK_DDR2
M_CLK_DDR2#
M_CLK_DDR3
M_CLK_DDR3#
M_CKE2
M_CKE3
MB_CAS#
MB_RAS#
MB_WE#
ICH_3S_SMCLK
ICH_3S_SMDATA
M_ODT2
M_ODT3
CN504-1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10_AP
90
A11
89
A12
116
A13
86
A14
84
A15
22-,28-
22-,2822-,2820-,2820-,282020202020-,2820-,2822-,2822-,2822-,28-
15-,19-,26-,3215-,19-,26-,32-
20-,2820-,28-
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
FOX_AS0A42X_N2RX_RVS_5.2mm_200P
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
22-
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
+V1.8
8-,9-,10-,12-,13-,20-,23-,24-,26-,27-
C53
1
2
0.1uF_16v
MB_DATA(63:0)
Layout note: Place these Caps closed So-Dimm1
C58
1
2
0.1uF_16v
C31
0.1uF_16v
1
2
1
2
C51
C63
0.1uF_16v
1
2
C68
0.1uF_16v
1
2
2.2uF_16v
1
2
C66
2.2uF_16v
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C30
1
2
2.2uF_16v
0.1uF_16v
C528
C37
12
12
0.01uF_16v_OPEN120.01uF_16v_OPEN
M_VREF
121
C75
+V1.8
8-,9-,10-,12-,13-,20-,23-,24-,26-,27-
C674
12
0.01uF_16v_OPEN
0.01uF_16v_OPEN
12
C71
1
2.2uF_16v
2
12-,20-,26-
C74
2.2uF_16v
2
C50
0.01uF_16v_OPEN
1
2
C56
2.2uF_16v
C39
C61
1
2
2.2uF_16v
PM_EXTTS#1
C529
1
2
0.01uF_16v_OPEN
C83
1
2
100uF_6.3v_OPEN
20-
CN504-2
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
G1
GND0
G2
GND1
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
FOX_AS0A42X_N2RX_RVS_5.2mm_200P
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
SO DIMM1 5.2mm
FOR EMI TEST
CHANGE by
INVENTEC
TITLE
DDD Discrete
DDR2-DIMM1
CODE
CS
SHEET
DOC. NUMBERSIZE
27 55
2-Jun-2007Thomas Ho
A3
REV
A01Model_No
OF

+V0.9S
12-,28-
C60
1
22
0.1uF_16v
C55
2
0.1uF_16v
+V0.9S
12-,28-
1
R64
12
R39 56_5%
R119 56_5%
12
R86 56_5%
12
12
R28
12
12
1
12
R55
1
R31 56_5%
R63 56_5%
12
12
R54
12
12
12
R29
12
1
12
12
R32
12
R57 56_5%
R33 56_5%
12
12
R58 56_5%
12
R34
12
12
12
12
R60
12
R61 56_5%
R56 56_5%
1
R37 56_5%
12
12
R62
12
R27
12
R38 56_5%
1
1
2
C17
0.1uF_16v
C52
0.1uF_16v
1
2
1
2
C59
0.1uF_16v
C73
0.1uF_16v
1
2
1
2
C19
0.1uF_16v
C11
0.1uF_16v
1
2
11
2
C21
0.1uF_16v
C10
0.1uF_16v
1
2
1
2
C18
0.1uF_16v
C13
0.1uF_16v
1
2
1
2
C62
0.1uF_16v
C72
0.1uF_16v
1
2
1
2
C20
0.1uF_16v
C12
0.1uF_16v
C16
1
2
C67
1
2
C65
1
22
1
2
0.1uF_16v
C54
0.1uF_16v
0.1uF_16v
0.1uF_16v
1
1
2
LAYOUT NOTES : PLACE ONE CAP CLOSE TO EVERY 2 PULL UP RESISTOR TERMINATED TO +V0.9S
56_5%
2
56_5%
56_5%R51
56_5%R75
2
56_5%R106
56_5%
2
56_5%
56_5%R53
56_5%R30
56_5%
56_5%R52
2
56_5%R76
56_5%R107
56_5%
56_5%
56_5%R59
56_5%R35
56_5%R36
56_5%
2
56_5%
56_5%
MA_A(0)
MA_A(1)
MA_A(2)
MA_A(3)
MA_A(4)
MA_A(5)
MA_A(6)
MA_A(7)
MA_A(8)
MA_A(9)
MA_A(10)
MA_A(11)
MA_A(12)
MA_A(13)
20-,26-
20-,26-
20-,27-
20-,27-
20-,26-
20-,26-
20-,27-
20-,27-
22-,26-
22-,26-
22-,26-
22-,26-
22-,26-
22-,26-
20-,26-
20-,26-
20-,27-
20-,27-
22-,26-
20-,26-
M_CKE0
M_CKE1
M_CKE2
M_CKE3
M_ODT0
M_ODT1
M_ODT2
M_ODT3
MA_BS0#
MA_BS1#
MA_BS2#
MA_WE#
MA_CAS#
MA_RAS#
M_CS0#
M_CS1#
M_CS2#
M_CS3#
MA_A(13:0)
MA_A(14)
+V0.9S
12-,28-
R110
R78
R118
R109
R108
R77
R79
R112
R80
R113
R81
R114
R82
R83
R115
R116
R111
R84
R117
R74
R85
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
1
2
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
C64
0.1uF_16v
C70
0.1uF_16v
1
2
1
2
C14
0.1uF_16v
C69
0.1uF_16v
MB_A(0)
MB_A(1)
MB_A(2)
MB_A(3)
MB_A(4)
MB_A(5)
MB_A(6)
MB_A(7)
MB_A(8)
MB_A(9)
MB_A(10)
MB_A(11)
MB_A(12)
MB_A(13)
1
2
1
2
C15
0.1uF_16v
C57
0.1uF_16v
22-,27-
MB_BS0#
22-,27-
MB_BS1#
22-,27-
MB_BS2#
22-,27-
MB_WE#
22-,27-
MB_CAS#
22-,27-
MB_RAS#
22-,27-
MB_A(13:0)
20-,27-
MB_A(14)
Thomas Ho 27-Sep-2003
Thomas Ho 27-Sep-2003
Thomas Ho
27-Sep-2003
INVENTEC
TITLE
DDD Discrete
DDD Discrete
DDD Discrete
DDR2-DAMPING
SIZE DOC. NUMBER
CODE
Model_No X01
Model_No X01
A3
A3
A3
Model_No A01
CS
CS
CS
SHEET
OFCHANGE by
REV
5528
5528
5528

CLOSE TO CRESTLINE
L9
BLM18BB100SN1D
49-
CRT_R
49-
CRT_G
49-
CRT_B
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
CRT_DDCDATA
CRT_DDCCLK
12
12
BLM18BB100SN1D
BLM18BB100SN1D
+V3S
1
R608
2.2K_5%
2
49-
49-
L513 L11
L12
12
1
C280
12pF_50v
2
1
2
R612
2.2K_5%
1
2
L10
12
1
C681
12pF_50v
2
R611
2.2K_5%
BLM18BB100SN1D
BLM18BB100SN1D
12
L13
12
1
C281
12pF_50v
2
Q28
3
2
D
S
G
2N7002W
1
Q29
2
3
D
S
2N7002W
G
1
BLM18BB100SN1D
D509
1
3
2
D508
3
CHENMKO_BAV99
CLOSE TO VGA CONN
1
2
CHENMKO_BAV99
+V5S
5-,11-,13-,14-,19-,30-,32-,34-,37-,40-,41-,42-
D507
1
3
2
CHENMKO_BAV99
33_5%
R162
12
C1 C2
D7
126_VCC
29-
12
33_5%
R539
CHENMKO_CHPZ6V2_3P
A
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
C671
1
2.2K_5%R610
2.2K_5%
CRT_L_R
CRT_L_G
CRT_L_B
D9
C672
2
10uF_6.3v
C1 C2
1
2
0.1uF_16v
R609
12
12
ALLTOP_SK_C10523_15P
CHENMKO_CHPZ6V2_3P
A
10
11
12
13
14
15
1
2
3
4
5
6
7
8
9
CN505
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
G1
G
G2
G
CRT_HSYNC
CRT_VSYNC
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
4949-
1
1
R242
R243
10K_5%
10K_5%
2
2
+V5A
CHENKO_LL4148_2P
21
C300
12
0.1uF_16v
D13
PHP_74LVC2G126DP_TSSOP_8P
C271
12
0.22uF_6.3v
126_VCC
29-
U512
1
8
1OE
Vcc
2
7
1A
2OE
6
3
1Y
2Y
5
4
2A
GND
INVENTEC
TITLE
DDD Discrete
VGA CONN
SIZE
CHANGE by
Thomas Ho
2-Jun-2007
CODE DOC. NUMBER
A3
Model_No A01
CS
SHEET OF
REV
5529

LVDS_VDD_EN
LID_SW#_3
LCM_BKLTEN
+V5A
7-,8-,9-,10-,11-,12-,13-,14-,29-,34-,38-
1
R500
47K_5%
2
R501
12
47K_5%
C500
Q505
3
D
G
50-
C507
1
2
100pF_50v
1
SSM3K7002F
S
2
1
2
0.01uF_16v
+V5S
5-,11-,13-,14-,19-,29-,32-,34-,37-,40-,41-,42-
U7001
32-,47-
49-
5
1
4
2
NC7SZ08M5
3
R7006
12
100_5%
+V3A
7-,13-,14-,32-,33-,34-,36-,43-,45-,46-,47-
Q1
S
4
TPC6107
+VBATR
5-,7-,8-,9-,11-,13-,39-
INV_PWM_3
Place closed to connector
G
63
5
2
D
1
1
SSM3K7002F
(20/5)
1
2
1
R20
100_5%
2
Q5
3
D
G
S
2
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#2
LVDSA_DATA2
LVDSA_DATA#1
LVDSA_DATA1
LVDSA_DATA#0
LVDSA_DATA0
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA0
LVDSB_DATA#1
LVDSB_DATA1
LVDSB_DATA#2
LVDSB_DATA2
50-
10uF_6.3v
1
C1
49-
495050-
505050505050-
5050505050505050-
2
0.1uF_16v
1
2
C2
C9
1000pF_50v
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C4
1
2
1
R23
2.2K_5%
2
C3
1
2
0.1uF_25v
1
R1
2.2K_5%
2
0.1uF_16v
CN6002
20
20
19
19
18
G2
G
18
17
G
G1
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_87213_2080_20P
CN6003
20
19
G2
18
G1
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ACES_87213_2000N_1_20P
CHANGE by
Thomas Ho 13-Jun-2007
INVENTEC
TITLE
DDD Discrete
LCM CONN
CODE
SIZE
A3
DOC. NUMBER
Model_No A01
CS
SHEET
REV
OF
5530

CN514
+
2
-
1
SYN_060003MA002G201NL_2P
BAT54C
RTCBAT
D515
+V3AL
MDC_3S_BITCLK
MDC_3S_SYNC
AZ_3S_BITCLK
5-,6-,7-,14-,39-,40-,47-
3
12
1
R704
1K_5%
2
1
R312
1M_5%
2
MDC_3S_RST#
AZ_3S_SYNC
AZ_3S_RST#
AZ_3S_SDIN0
MDC_3S_SDIN1
AZ_3S_SDOUT
MDC_3S_SDOUT
SATA_C_RXN0
SATA_C_RXP0
SATA_C_TXN0
SATA_C_TXP0
CLK_R_SATA1#
CLK_R_SATA1
R313
12
47K_5%
12
R369
12
42-
12
42-
R370
12
42-
12
41-
12
41-
R664 33_5%
R371
12
41-,42-
4142-
12
R372
41-
12
R373
42-
37373737-
CLOSE TO ICH8
1515-
1
R404
24.9_1%
2
+V_RTC
332K_1%R277
1
2
1
2
31-,34-,39-
C740
1uF_6.3v
C331
1uF_6.3v
33_5%
33_5%
33_5%R375
33_5%R665
33_5%
33_5%
33_5%
0_5%_OPEN
1
R278
OPEN
2
C380 3300pF_50v
12
R9636
12
C329
12
27pF_50v
C328
12
27pF_50v
1
R304
OPEN
2
+V1.5S_PCIE_ICH
C379
12
X1
1
2
3
4
+V_RTC
31-,34-,39-
32-,34-
3300pF_50v
32.768KHZ
1
R306
332K_1%
2
1
R316
24.9_1%
2
SATA_TXN0
1
R298
10M_5%
2
LAN_JCLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
TP27
SATA_TXP0
U519-1
AG25
RXTC1
AF24
RXTC2
AF23
RTCRST#
AD22
INTRUDER#
AF25
INTVRMEN
AD21
LAN100_SLP
B24
43-
GLAN_CLK
D22
43-
LAN_RSTSYNC
C21
43-
LAN_RXD0
B21
43-
LAN_RXD1
C22
43-
LAN_RXD2
D21
43-
LAN_TXD0
E20
43-
LAN_TXD1
C20
43-
LAN_TXD2
AH21
GLAN_DOCK#_GPIO13
D25
GLAN_COMPI
C25
GLAN_COMPO
AJ16
HDA_BIT_CLK
AJ15
HDA_SYNC
AE14
HDA_RST#
AJ17
HDA_SDIN0
AH17
HDA_SDIN1
AH15
HDA_SDIN2
AD13
HDA_SDIN3
AE13
HDA_SDOUT
AE10
HDA_DOCK_EN#_GPIO33
AG14
HDA_DOCK_RST#_GPIO34
AF10
SATALED#
AF6
SATA0RXN
AF5
SATA0RXP
AH5
SATA0TXN
AH6
SATA0TXP
AG3
SATA1RXN
AG4
SATA1RXP
AJ4
SATA1TXN
AJ3
SATA1TXP
AF2
SATA2RXN
AF1
SATA2RXP
AE4
SATA2TXN
AE3
SATA2TXP
AB7
SATA_CLKN
AC6
SATA_CLKP
AG1
SATARBIAS#
AG2
SATARBIAS
LPC
RTC
FWH4_LFRAME#
LDRQ1#_GPIO23
CPUPWRGD_GPIO49
LAN / GLAN
IHDA
SATA
ITL_ICH8_M_BGA_676P
FWH0_LAD0
FWH1_LAD1
FWH2_LAD2
FWH3_LAD3
LDRQ0#
A20GATE
DPRSTP#
DPSLP#
IGNNE#
CPU
STPCLK#
THRMTRIP#
IDE
DDACK#
DDREQ
A20M#
FERR#
RCIN#
DD10
DD11
DD12
DD13
DD14
DD15
DCS1#
DCS3#
DIOR#
DIOW#
IDEIRQ
IORDY
INIT#
INTR
SMI#
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
E5
F5
G8
F6
C4
G9
E6
AF13
39-
EC_3S_A20GATE
16-
AG26
AF26
AE26
AD24
AG29
AF27
AE24
AC20
AH14
AD23
NMI
AG28
AA24
AE27
AA23
TP8
V1
DD0
U2
DD1
V3
DD2
T1
DD3
V4
DD4
T5
DD5
AB2
DD6
T6
DD7
T3
DD8
R2
DD9
T4
V6
V5
U1
V2
U6
AA4
DA0
AA1
DA1
AB3
DA2
Y6
Y5
W4
W3
Y2
Y3
Y1
W5
17-
H_A20M#
H_DPSLP#
17-
H_PWRGD +V3S
16-
H_IGNNE#
16-
H_INIT#
16-
H_INTR
16-
H_NMI
16-
H_SMI#
16-
H_STPCLK#
39-,45-
LPC_3S_AD(0)
39-,45-
LPC_3S_AD(1)
39-,45-
LPC_3S_AD(2)
39-,45-
LPC_3S_AD(3)
39-,45-
LPC_3S_FRAME#
11-,17-,20-
H_DPRSTP#
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
R670
12
10K_5%
39-
PM_3S_KBCCPURST#
R279
12
24.9_1%
+V3S
Close to ICH8
1
R408
OPEN
+VCCP
2
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
37373737373737373737373737373737-
373737-
3737-
373737373737-
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
1
R281
56_5%
2
16-
H_FERR#
+VCCP
1
R280
56_5%
2
16-,19-,20-
PM_THRMTRIP#
PIDE_3S_D(0)
PIDE_3S_D(1)
PIDE_3S_D(2)
PIDE_3S_D(3)
PIDE_3S_D(4)
PIDE_3S_D(5)
PIDE_3S_D(6)
PIDE_3S_D(7)
PIDE_3S_D(8)
PIDE_3S_D(9)
PIDE_3S_D(10)
PIDE_3S_D(11)
PIDE_3S_D(12)
PIDE_3S_D(13)
PIDE_3S_D(14)
PIDE_3S_D(15)
PIDE_3S_A(0)
PIDE_3S_A(1)
PIDE_3S_A(2)
PIDE_3S_CS#(0)
PIDE_3S_CS#(1)
PIDE_3S_IOR#
PIDE_3S_IOW#
PIDE_3S_DACK#
PIDE_3S_IRQ
PIDE_3S_IORDY
PIDE_3S_DREQ
Thomas Ho 13-Jun-2007
INVENTEC
TITLE
DDD Discrete
ICH8-1
SIZE
A3
DOC. NUMBER REVCODE
Model_No A01
CS
SHEETCHANGE by OF
5531

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
1
1
R649
2.2K_5%
2
2
R275
1
R294
12
ICH_3S_SMCLK
ICH_3A_SMCLK
ICH_3A_SMDATA
ICH_3S_SMDATA
15-,19-,26-,27-
32-
32-
15-,19-,26-,27-
R648
2.2K_5%
R293
10K_5%
33_5%
2
33_5%
+V3A
1
2
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
R295
10K_5%
2
32-
7-,8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
SLP_S3#_3R
WOL_EN
GPIO12
PM_RI#
GPIO10
GPIO14
32-
1
2
43-,44-
323232-,393232-,45323232-,4532-
5-,3232-,3932-,393232-
32-,41-
32-
32-
32-,46-
32-
32-
32-
32-
32-,41-
C338
0.1uF_16v
LED_3S_LANLINK#
SPI_CS1#
CL_RST#1
ICH_3A_ALERT_CLK
ICH_3A_ALERT_DAT
PCIE_WAKE#
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
OCP_OC#
PCI_3S_CLKRUN#
PCI_3S_SERIRQ
GPIO38
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
A_3S_ICHSPKR
GPIO48
GPIO39
NEWCARD_SD#
GPIO27
GPIO20
GPIO18
GPIO17
ISO_PREP#
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
CL_VREF0
Q517
1
SSM3K7002F
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
R406 OPEN
12
12
R668 10K_5%
12
12
R658 OPEN
12
R387
1
R667 OPEN
12
12
12
+V3S
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
R319
3.24K_1%
2
CL_VREF1
1
R318
453_1%
2
LED_LANLINK#
3
D
G
S
2
12
R300
12
12
R314 OPEN
2
1
12
R303
12
R385
12
R384
1
2
12
R659 0_5%_OPEN
12
R689
R382
R688
R405
R403
10K_5%
8.2K_5%
12
1
8.2K_5%
2
8.2K_5%1
2
8.2K_5%12
+V3S
OPENR386
OPENR378
0_5%_OPEN
2
10K_5%R402
10K_5%R691
32-
10K_5%
10K_5%R308
10K_5%R377
OPEN
10K_5%
10K_5%
1K_5%R376
SB_3S_VRMPWRGD
3.24K_1%
C330
1
2
0.1uF_16v
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
5-,11-,13-,14-,19-,29-,30-,34-,37-,40-,41-,42-
1
R273
10K_5%
2
+V5S
PCIE_C_RXN2
PCIE_C_RXP2
PCIE_C_TXN2
PCIE_C_TXP2
SSM3K7002F
2
S
G
1
D
3
Q31
Q30
3
D
G
S
2
SSM3K7002F
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
R388
10K_5%
2
1
SPI_CLK
SPI_CE#
SPI_SI
SPI_SO
PCIE_C_RXN5
PCIE_C_RXP5
PCIE_C_TXN5
PCIE_C_TXP5
+V3A
ICH_3A_SMCLK
ICH_3A_SMDATA
+V3S
CL_RST#1
ICH_3A_ALERT_CLK
ICH_3A_ALERT_DAT
SUS_STAT#_3
XDP_DBRESET#
BM_BUSY#
LED_LANLINK#
PCISTOP#_3
CPUSTOP#_3
PCI_3S_CLKRUN#
PCIE_WAKE#
PCI_3S_SERIRQ
THERM_SCI#
11-
OCP_OC#
RUNSCI0#_3
ISO_PREP#
LID_SW#_3
GPIO12
GPIO17
GPIO18
VGA_RST#
GPIO27
NEWCARD_SD#
CLKREQ_R_SATA#
GPIO38
GPIO39
GPIO48
A_3S_ICHSPKR
MCH_ICH_SYNC#
R297
+V3A
1
2
1
R299
453_1%
2
36-,3936-,39-
36-,3936-,39-
323232-,453232-
32-
4116-,19-
20-
32-
1515-
32-,39-
32-,4532-,3919-,33-
R656
5-,3233-,3932-,4130-,47323232-
333232-,4615323232-
32-,41-
20-
45454545-
46464646-
12
100K_5%
12
12
12
12
GPIO20
0.1uF_16v
0.1uF_16v
R317
TP22
32-
TP23
C710
C712
15_5%
SPI_CS1#
TP24
C711
C713
R321
R320 15_5%
0.1uF_16v
12
0.1uF_16v
12
15_5%
12
BT_OFF
U519-3
AJ26
SMBLCK
AD19
SMBDATA
AG21
LINKALERT#
AC17
SMLINK0
AE19
SMLINK1
AF17
RI#
SUS_STAT#_LPCPD#
AD15
SYS_RESET#
AG12
BMBUSY#_GPIO0
AG22
SMBALERT#_GPIO11
AE20
STP_PCI#_GPIO15
AG18
STP_CPU#_GPIO25
AH11
CLKRUN#_GPIO32
AE17
WAKE#
AF12
SERIRQ
AC13
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
TACH1_GPIO1
AJ9
TACH2_GPIO6
AH9
TACH3_GPIO7
AE16
GPIO8
AC19
GPIO12
AG8
TACH0_GPIO17
AH12
GPIO18
AE11
GPIO20
AG10
SCLOCK_GPIO22
AH25
QRT_SATAE0_GPIO27
AD16
QRT_SATA1_GPIO28
AG13
SATACLKREQ#_GPIO35
AF9
SLOAD_GPIO38
AJ11
SDATAOUT0_GPIO39
AD10
SDATAOUT1_GPIO48
AD9
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
PCIE_TXN2
PCIE_TXP2
PCIE_TXN4
PCIE_TXP4
32-,39-
45-
SMB
SYS GPIO
GPIO
MISC
ITL_ICH8_M_BGA_676P
U519-4
P27
PERN1
P26
PERP1
N29
PETN1
N28
PETP1
M27
PERN2
M26
PERP2
L29
PETN2
L28
PETP2
K27
PERN3
K26
PERP3
J29
PETN3
J28
PETP3
H27
PERN4
H26
PERP4
G29
PETN4
G28
PETP4
F27
PERN5
F26
PERP5
E29
PETN5
E28
PETP5
D27
PERN6_GLAN_RXN
D26
PERP6_CLAN_RXP
C29
PETN6_GLAN_TXN
C28
PETP6_GLAN_TXP
C23
SPI_CLK
B23
SPI_CS0#
E22
SPI_CS1#
D23
SPI_MOSI
F21
SPI_MISO
AJ19
OC0#
AG16
OC1#_GPIO40
AG15
OC2#_GPIO41
AE15
OC3#_GPIO42
AF15
OC4#_GPIO43
AG17
OC5#_GPIO29
AD12
OC6#_GPIO30
AJ18
OC7#_GPIO31
AD14
OC8#
AH18
OC9#
ITL_ICH8_M_BGA_676P
SATA0GP_GPIO21
SATA1GP_GPIO19
SATA2GP_GPIO36
SATA
GPIO
SATA3GP_GPIO37
CLK14
CLK48
Clocks
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
S4_STATE#_GPIO26
PWROK
DPRSLPVR_GPIO16
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
Power MGT
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
Controller Link
CL_RST#
MEM_LED_GPIO24
ME_EC_ALERT_GPIO10
EC_ME_ALERT_GPIO14
WOL_EN_GPIO9
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
PCI-Express
DMI3TXN
Direct Media Interface
DMI3TXP
DMI_CLKN
DMI_CLKP
DMI_ZCOMP
DMI_IRCOMP
SPI
USB
USBRBIAS#
USBRBIAS
AJ12
AJ10
AF11
AG11
AG9
G5
D3F4
AG23
AF21
AD18
AH27
AE23
AJ14
AE21
C2
AH20
AG27
E1
E3
AJ25
F23
AE18
F22
AF19
D24
AH23
AJ23
AJ27
AJ24
AF22
AG19
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
3232-
V27
V26
U29
U28
Y27
Y26
W29
W28
AB26
AB25
AA29
AA28
AD27
AD26
AC29
AC28
T26
T25
Y23
Y24
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
F2
USB_RBIAS_PN
F3
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
R663
8.2K_5%
2
TP52
20-,39-
CL_VREF0
CL_VREF1
PM_PWROK
TP25
Place within 500 mils of ICH
1
1
R379
R374
8.2K_5%
8.2K_5%
2
2
39-
NPCI_RESET#
15-
CLK_R3S_ICH14
15-
CLK_R3S_ICH48PM_RI#
TP26
7-,8-,9-,10-,12-,13-,14-,32-,39-,43-,46-
SLP_S3#_3R
8-,12-
SLP_S4#_3R
38-
SLP_S5#_3R
20-,39-
PM_PWROK
11-,20-
PM_DPRSLPVR
47-
PWR_SWIN2#_3
43-
LAN_RST#
7-,39-
R411
1
2045-
2045-
20-
45323232-
RSMRST#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_RST#0
XMIT_OFF#
GPIO10
GPIO14
WOL_EN
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
Signal has integrated pull-up of 18K ohm-42K ohm .
Thomas Ho
OPEN
2
20-
DMI_RXN(0)
20-
DMI_RXP(0)
20-
DMI_TXN(0)
20-
DMI_TXP(0)
20-
DMI_RXN(1)
20-
DMI_RXP(1)
20-
DMI_TXN(1)
20-
DMI_TXP(1)
20-
DMI_RXN(2)
20-
DMI_RXP(2)
20-
DMI_TXN(2)
20-
DMI_TXP(2)
20-
DMI_RXN(3)
20-
DMI_RXP(3)
20-
DMI_TXN(3)
20-
DMI_TXP(3)
15-
CLK_R_PCIE_ICH#
15-
CLK_R_PCIE_ICH
38-
USB_P0-
38-
USB_P0+
38-
USB_P1-
38-
USB_P1+
38-
USB_P2-
38-
USB_P2+
46-
USB_P3-
46-
USB_P3+
46-
USB_P4-
46-
USB_P4+
45-
USB_P6-
45-
USB_P6+
R705
12
22.6_1%
R307
12
10K_5%
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
ISOLATION
+V1.5S_PCIE_ICH
DMI_IRCOMP_R
Close to ICH8
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
+V3A
1
R669
OPEN
2
D513CHENMKO_BAT54_3P
13
39-
+V3A
R309
12
8.2K_5%
INVENTEC
TITLE
DDD Discrete
ICH8-2
CS
SHEETCHANGE by
DOC. NUMBER
SIZE
A3
31-,34-
1
R310
24.9_1%
2
1
R651
10K_5%_OPEN
2
LOW_BAT#_3
OF
32 55
REVCODE
A01Model_No

10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
PCI_3S_FRAME#
PCI_3S_IRDY#
PCI_3S_TRDY#
PCI_3S_STOP#
PCI_3S_SERR#
PCI_3S_DEVSEL#
PCI_3S_PERR#
PCI_3S_LOCK#
PCI_3S_REQ#(0)
PCI_3S_REQ#(1)
PCI_3S_REQ#(2)
PCI_3S_REQ#(3)
PCI_3S_INTA#
PCI_3S_INTB#
PCI_3S_INTC#
PCI_3S_INTD#
PCI_3S_INTE# PCI_3S_INTE#
PCI_3S_INTF#
PCI_3S_INTG#
RUNSCI0#_3
THERM_SCI#
PCI_3S_INTH#
33-
33-
33-
33-,39-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
32-,39-
19-,32-
33-
R672
R412
R410
R395
R390
R396
R697
R694
R693
R393
R671
R674
R391
R696
R409
R673
R407
R392
R389
R690
R383
R695
8.2K_5%
12
12
8.2K_5%
8.2K_5%1
2
8.2K_5%
12
8.2K_5%
12
2
8.2K_5%1
12
8.2K_5%
8.2K_5%
1
2
2
8.2K_5%1
12
8.2K_5%
8.2K_5%12
8.2K_5%
12
8.2K_5%12
8.2K_5%
12
8.2K_5%12
8.2K_5%
12
8.2K_5%12
8.2K_5%12
8.2K_5%
12
8.2K_5%1
2
8.2K_5%
1
2
8.2K_5%12
PCI_3S_INTA#
PCI_3S_INTB#
PCI_3S_INTC#
PCI_3S_INTD#
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
F9
33-
B5
33-
C5
33-
A10
33-
U519-2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9 C_BE0#
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PIRQA#
PIRQB#
PIRQC#
PIRQD#
ITL_ICH8_M_BGA_676P
REQ1#_GPIO50
GNT1#_GPIO51
REQ2#_GPIO52
GNT2#_GPIO53
REQ3#_GPIO54
GNT3#_GPIO55
PCI
Interrupt I/F
PIRQE#_GPIO2
PIRQF#_GPIO3
PIRQG#_GPIO4
PIRQH#_GPIO5
REQ0#
GNT0#
C_BE1#
C_BE2#
C_BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
PAR
A4
D7
E18
C18
B19
F18
A11
C10
C17
E15
F16
E17
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
AG24
B10
G7
F8
G11
F12
B3
R394
33333333-
33-
33-
33-
33-33-
12
10K_5%
33-
333333-
33-,39-
333333-
15-
PCI_3S_INTF#
PCI_3S_INTG#
PCI_3S_INTH#
PCI_3S_REQ#(0)
PCI_3S_REQ#(1)
PCI_3S_REQ#(2)
PCI_3S_REQ#(3)
PCI_3S_IRDY#
PCI_3S_DEVSEL#
PCI_3S_PERR#
PCI_3S_LOCK#
PCI_3S_SERR#
PCI_3S_STOP#
PCI_3S_TRDY#
PCI_3S_FRAME#
CLK_R3S_ICHPCI
Boot BIOS from SPI
1
R413
GNT0# = 0
1K_5%
SPI_CS1# = 1
2
20-,46-
PLT_RST#
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
5
U13
2
4
PHP_74LVC1G17_SOT753_5P
3
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
R368
12
PCIE_RST#
50-
330_5%
NC7SZ08M5
U16
4
+V3A
37-,39-,45-
BUF_PLT_RST#
1
R296
100K_5%
2
5
1
32-
2
3
VGA_RST#
CHANGE by
Thomas Ho 2-Jun-2007
INVENTEC
TITLE
DDD Discrete
ICH8-3
CODE
SIZE
A3
DOC. NUMBER
Model_No A01
CS
SHEET
REV
OF
5533

+V_RTC +VCCP
31-,39-
1
C703
0.1uF_16v
2
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,38-
10-,13-,18-,24-,34-,45-,46-
1
0.1uF_16v
2
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
+V5A
+V1.5S
12
KC_FBM_11_160808_101_T_2P
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V5S
13
R692
2
10_1%
+V3S
CHENMKO_BAT54_3P D512
D514CHENMKO_BAT54_3P
1
C734
1
2
0.1uF_16v
C333
1
2
220uF_2.5v
+V1.5S_PCIE_ICH
31-,32-,34-
C332
1
2
0.1uF_16v
1
R675
100_5%
C704
5-,11-,13-,14-,19-,29-,30-,32-,37-,40-,41-,42-
L19
3
12
1
2
C336
0.1uF_16v
1
2
C726
1uF_10v
1
2
C337
0.1uF_16v
+V1.5S
10-,13-,18-,24-,34-,45-,46-
+V1.5S
10-,13-,18-,24-,34-,45-,46-
+V1.5S
10-,13-,18-,24-,34-,45-,46-
L522
12
BLM11A121S
C732
10uF_6.3v
C733
1uF_6.3v
1
2
1
2
1uF_6.3v
1
1uF_6.3v
2
C381
C383
1
2
+V1.5S
10-,13-,18-,24-,34-,45-,46-
1
C407
0.1uF_16v
+V1.5S
10-,13-,18-,24-,34-,45-,46-
+V3_LAN
C334
0.1uF_16v
34-,43-,44-,45-
1
2
1
C719
4.7uF_6.3v
2
+V1.5S
10-,13-,18-,24-,34-,45-,46-
1
C386
+V1.5S
10-,13-,18-,24-,34-,45-,46-
+V1.5S_PCIE_ICH
31-,32-,34-
+V3S
0.1uF_16v
2
L519
12
BLM11A121S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
2
C722
10uF_6.3v
2
1
2
C720
2.2uF_16v
U519-6
AD25
VCCRTC
A16
V5REF1
T7
V5REF2
G4
V5REF_SUS
AA25
VCC1_5_B1
AA26
VCC1_5_B2
AA27
VCC1_5_B3
AB27
VCC1_5_B4
AB28
VCC1_5_B5
AB29
VCC1_5_B6
D28
VCC1_5_B7
D29
VCC1_5_B8
E25
VCC1_5_B9
E26
VCC1_5_B10
E27
VCC1_5_B11
F24
VCC1_5_B12
F25
VCC1_5_B13
G24
VCC1_5_B14
H23
VCC1_5_B15
H24
VCC1_5_B16
J23
VCC1_5_B17
J24
VCC1_5_B18
K24
VCC1_5_B19
K25
VCC1_5_B20
L23
VCC1_5_B21
L24
VCC1_5_B22
L25
VCC1_5_B23
M24
VCC1_5_B24
M25
VCC1_5_B25
N23
VCC1_5_B26
N24
VCC1_5_B27
N25
VCC1_5_B28
P24
VCC1_5_B29
P25
VCC1_5_B30
R24
VCC1_5_B31
R25
VCC1_5_B32
R26
VCC1_5_B33
R27
VCC1_5_B34
T23
VCC1_5_B35
T24
VCC1_5_B36
T27
VCC1_5_B37
T28
VCC1_5_B38
T29
VCC1_5_B39
U24
VCC1_5_B40
U25
VCC1_5_B41
V23
VCC1_5_B42
V24
VCC1_5_B43
V25
VCC1_5_B44
W25
VCC1_5_B45
Y25
VCC1_5_B46
AJ6
VCCSATAPLL
AE7
VCC1_5_A1
AF7
VCC1_5_A2
AG7
VCC1_5_A3
AH7
VCC1_5_A4
AJ7
VCC1_5_A5
AC1
VCC1_5_A6
AC2
VCC1_5_A7
AC3
VCC1_5_A8
AC4
VCC1_5_A9
AC5
VCC1_5_A10
AC10
VCC1_5_A11
AC9
VCC1_5_A12
AA5
VCC1_5_A13
AA6
VCC1_5_A14
G12
VCC1_5_A15
G17
VCC1_5_A16
H7
VCC1_5_A17
AC7
VCC1_5_A18
AD7
VCC1_5_A19
D1
VCCUSBPLL
F1
VCC1_5_A20
L6
VCC1_5_A21
L7
VCC1_5_A22
M6
VCC1_5_A23
M7
VCC1_5_A24
W23
VCC1_5_A25
TP16
F17
VCCLAN1_05_1
TP17
G18
VCCLAN1_05_2
F19
VCCLAN3_03_1
G20
VCCLAN3_03_2
A24
VCCGLANPLL
A26
VCCGLAN1_5_1
A27
VCCGLAN1_5_2
B26
VCCGLAN1_5_3
B27
VCCGLAN1_5_4
B28
VCCGLAN1_5_5
B25
VCCGLAN3_3
ITL_ICH8_M_BGA_676P
CORE
VCCA3GP
VCCP
ARXATX
PCI
VCCPSUS
USB_CORE
VCCPUSB
GLAN POWER
VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4
VCC1_05_5
VCC1_05_6
VCC1_05_7
VCC1_05_8
VCC1_05_9
VCC1_05_10
VCC1_05_11
VCC1_05_12
VCC1_05_13
VCC1_05_14
VCC1_05_15
VCC1_05_16
VCC1_05_17
VCC1_05_18
VCC1_05_19
VCC1_05_20
VCC1_05_21
VCC1_05_22
VCC1_05_23
VCC1_05_24
VCC1_05_25
VCC1_05_26
VCC1_05_27
VCC1_05_28
VCCDMIPLL
VCC_DMI_1
VCC_DMI_2
V_CPU_IO_1
V_CPU_IO_2
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
CORE
VCC3_3_6
VCC3_3_7
VCC3_3_8
VCC3_3_9
VCC3_3_10
IDE
VCC3_3_11
VCC3_3_12
VCC3_3_13
VCC3_3_14
VCC3_3_15
VCC3_3_16
VCC3_3_17
VCC3_3_18
VCC3_3_19
VCC3_3_20
VCC3_3_21
VCC3_3_22
VCC3_3_23
VCC3_3_24
VCCHDA
VCCSUSHDA
VCCSUS1_05_1
VCCSUS1_05_2
VCCSUS1_5_1
VCCSUS1_5_2
VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5
VCCSUS3_3_6
VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9
VCCSUS3_3_10
VCCSUS3_3_11
VCCSUS3_3_12
VCCSUS3_3_13
VCCSUS3_3_14
VCCSUS3_3_15
VCCSUS3_3_16
VCCSUS3_3_17
VCCSUS3_3_18
VCCSUS3_3_19
VCCCL1_05
VCCCL1_5
VCCCL3_3_1
VCCCL3_3_2
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
R29
AE28
AE29
AC23
AC24
AF29
AD2
AC8
AD8
AE8
AF8
AA3
U7
V7
W1
W6
W7
Y7
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
AC12
AD11
J6
AF20
AC16
J7
C3
AC18
AC21
AC22
AG20
AH28
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
G22
A22
F20
G21
TP18
TP19
TP20
TP21
C721
1
2
0.1uF_16v_OPEN
1
2
C361
1
2
0.1uF_16v
+V1.25S
8-,10-,20-,24-
C706
1
2
22uF_6.3v
C388
C335
1
2
0.1uF_16v
0.1uF_16v
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
C387
2
0.1uF_16v
C7007
1
0.1uF_16v
2
+V3_LAN
34-,43-,44-,45-
1
2
+V3A
1
2
C382
0.1uF_16v
1
2
1
2
CHANGE by
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
C360
1
0.1uF_16v
2
+V1.5S
10-,13-,18-,24-,34-,45-,46-
C709
1
2
C363
1
2
0.1uF_16v
0.1uF_16v
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C705
1
2
0.1uF_16v
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
0.01uF_16v
C364
1
C708
2
10uF_6.3v
+VCCP
10-,15-,16-,17-,18-,19-,21-,23-,24-,31-,34-
1
C707
2
4.7uF_6.3v
+V3S
+V3S
C385
0.1uF_16v
C365
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
0.1uF_16v
1
C359
2
0.1uF_16v
+V3S
C384
0.1uF_16v
1
2
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
C358
2
0.1uF_16v
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
+V3A
1
C362
2
4.7uF_6.3v
INVENTEC
TITLE
DDD Discrete
ICH8-4
SIZE
CODE
A3
CS
Thomas Ho
2-Jun-2007
SHEET OF
34 55
REVDOC. NUMBER
A01Model_No

U519-5
A23
VSS001
A5
VSS002
AA2
VSS003
AA7
VSS004
A25
VSS005
AB1
VSS006
AB24
VSS007
AC11
VSS008
AC14
VSS009
AC25
VSS010
AC26
VSS011
AC27
VSS012
AD17
VSS013
AD20
VSS014
AD28
VSS015
AD29
VSS016
AD3
VSS017
AD4
VSS018
AD6
VSS019
AE1
VSS020
AE12
VSS021
AE2
VSS022
AE22
VSS023
AD1
VSS024
AE25
VSS025
AE5
VSS026
AE6
VSS027
AE9
VSS028
AF14
VSS029
AF16
VSS030
AF18
VSS031
AF3
VSS032
AF4
VSS033
AG5
VSS034
AG6
VSS035
AH10
VSS036
AH13
VSS037
AH16
VSS038
AH19
VSS039
AH2
VSS040
AF28
VSS041
AH22
VSS042
AH24
VSS043
AH26
VSS044
AH3
VSS045
AH4
VSS046
AH8
VSS047
AJ5
VSS048
B11
VSS049
B14
VSS050
B17
VSS051
B2
VSS052
B20
VSS053
B22
VSS054
B8
VSS055
C24
VSS056
C26
VSS057
C27
VSS058
C6
VSS059
D12
VSS060
D15
VSS061
D18
VSS062
D2
VSS063
D4
VSS064
E21
VSS065
E24
VSS066
E4
VSS067
E9
VSS068
F15
VSS069
E23
VSS070
F28
VSS071
F29
VSS072
F7
VSS073
G1
VSS074
E2
VSS075
G10
VSS076
G13
VSS077
G19
VSS078
G23
VSS079
G25
VSS080
G26
VSS081
G27
VSS082
H25
VSS083
H28
VSS084
H29
VSS085
H3
VSS086
H6
VSS087
VSS_NCTF_01
J1
VSS088
J25
J26
J27
K23
K28
K29
VSS_NCTF_02
VSS089
VSS_NCTF_03
VSS090
VSS_NCTF_04
VSS091
VSS_NCTF_05
J4
VSS092
VSS_NCTF_06
J5
VSS093
VSS_NCTF_07
VSS_NCTF_08
VSS094
VSS_NCTF_09
VSS095
VSS_NCTF_010
VSS096
K3
VSS_NCTF_011
VSS097
K6
VSS_NCTF_012
VSS098
ITL_ICH8_M_BGA_676P
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
48-
48-
48-
48-
ICHGND1
ICHGND4
ICHGND7
ICHGND10
CHANGE by
INVENTEC
TITLE
DDD Discrete
ICH8-5
CODE DOC. NUMBER
SIZE
A3
CS
4-Jun-2007Thomas Ho
SHEET
35 55
REV
A01Model_No
OF

7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
+V3A
SPI_CE#
SPI_SO
32-,39-
32-,39-
R429
12
12
R428
0_5%_OPEN
15_5%R427
3.3K_5%
1
2
U523
1
CE#
2
SO
3
WP#
4
VSS
SST_25VF080B_SOIC_8P
HOLD#
8
VDD
7
6
SCK
5
SI
3.3K_5%R457
12
32-,39-
32-,39-
39-
SPI_HOLD#
SPI_CLK
SPI_SI
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
C433
0.1uF_16v
2
SYN_800032MR050S125ZL_50P
EX17_ODD_GND
FIX47
FIX_MASK
FIX48
FIX_MASK
FIX49
FIX_MASK
FIX50
FIX_MASK
G4
G3
G2
G1
G
G
G
G
CN6001
50
50
49
49
48
48
47
47
46
46
45
45
44
44
43
43
42
42
41
41
40
40
39
39
38
38
37
37
36
36
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
EX17_ODD_GND
17’W ODD EXTEND/B
SYN_800290FB050G100ZL_50P
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
G1
46
G
46
G2
47
G
47
48
48
49
49
50
50
CN6000
EX17_ODD_GND
EX17_ODD_GND
SCREW2.8_7_1P
S29
EX17_ODD_GND
SCREW2.8_7_1P
S30
EX17_ODD_GND
SCREW2.8_7_1P
S22
EX17_ODD_GND
SCREW2.8_7_1P
S23
EX17_ODD_GND
SYN_800032MR050S125ZL_50P
EX15_ODD_GND
FIX51
FIX_MASK_0.8
FIX52
FIX_MASK_0.8
FIX53
FIX_MASK_0.8
FIX54
FIX_MASK_0.8
G4
G3
G2
G1
G
G
G
G
CN5001
50
50
49
49
48
48
47
47
46
46
45
45
44
44
43
43
42
42
41
41
40
40
39
39
38
38
37
37
36
36
35
35
34
34
33
33
32
32
31
31
30
30
29
29
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
EX15_ODD_GND
15.4’W ODD EXTEND/B
CHANGE by
SYN_800290FB050G100ZL_50P
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
G1
46
G
46
G2
47
G
47
48
48
49
49
50
50
CN5000
EX15_ODD_GND
EX15_ODD_GND
SCREW2.8_7_1P
S31
EX15_ODD_GND
SCREW2.8_7_1P
S32
EX15_ODD_GND
INVENTEC
TITLE
DDD Discrete
SYSTEM BIOS&ODD EXT/B
CODE
SIZE
13-Jun-2007Thomas Ho
A3
CS
SHEET
DOC. NUMBER
36 55
REV
A01Model_No
OF

BUF_PLT_RST#
3131-
3131-
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
33-,39-,45-
SATA_C_TXP0
SATA_C_TXN0
SATA_C_RXN0
SATA_C_RXP0
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
1
R586
8.2K_5%
PIDE_3S_IRQ
2
31-
PIDE_3S_IORDY
31-
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
2
C6411
0.1uF_16v
C604
1
2
C393
12
C394 3300pF_50v
CLOSE TO SATA CONN
PIDE_3S_D(15:0)
1
R585
4.7K_5%
2
(20/5)
1
2
0.1uF_16v
3300pF_50v
12
PIDE_3S_DREQ
PIDE_3S_IOR#
PIDE_3S_IOW#
PIDE_3S_DACK#
PIDE_3S_A(1)
PIDE_3S_A(0)
PIDE_3S_A(2)
PIDE_3S_CS#(0)
PIDE_3S_CS#(1)
C603
10uF_6.3v
SATA_RXN0
SATA_RXP0
+V5S
31-
31-
3131-
31-
31-
3131-
3131-
R595
12
33_5%
PIDE_3S_D(8)
PIDE_3S_D(7)
PIDE_3S_D(9)
PIDE_3S_D(6)
PIDE_3S_D(10)
PIDE_3S_D(5)
PIDE_3S_D(11)
PIDE_3S_D(4)
PIDE_3S_D(12)
PIDE_3S_D(3)
PIDE_3S_D(13)
PIDE_3S_D(2)
PIDE_3S_D(14)
PIDE_3S_D(1)
PIDE_3S_D(15)
PIDE_3S_D(0)
CN510
1
GND
2
A+
3
A-
4
GND
5
B-
6
B+
7
GND
8
V3.3
9
V3.3
10
V3.3
11
GND
12
GND
13
GND
14
V5
15
V5
16
V5
17
GND
18
RESERVED
19
GND
20
V12
21
V12
22
V12
ALLTOP_SKC166J4_12204_L_22P
SYN_800194MR050S117ZL_50P
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
CN507
G1
G1
G2
G2
G
G2
G
G1
CHANGE by
Thomas Ho
13-Jun-2007
INVENTEC
TITLE
DDD Discrete
HDD & ODD CONN
SIZE CODE REV
A3
DOC. NUMBER
Model_No A01
CS
SHEET
OF
5537

7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V5A
(20/5)
1
C372
0.01uF_16v
2
SLP_S5#_3R
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V5A
(20/5)
1
C311
0.01uF_16v
2
SLP_S5#_3R
U520
1
GND
2
IN
3
32-,38-
IN6OUT
4
EN
GMT_G545B1P8U_MSOP_8P
U514
1
GND
2
IN
IN3OUT
4
EN
GMT_G545B1P8U_MSOP_8P
+V5A_USB_0
38-
C370
1
+V5A_USB_0
38-
(20/5)
8
OUT
7
OUT
5
OC#
1
2
C723
22uF_6.3v
USB_P0-
USB_P0+
32-
32-
L521
1
4
WCM_2012_900T
USB_L_P0-
2
USB_L_P0+
3
2
0.1uF_16v
1
2
C371
1000pF_50v
CN511
1
VCC
2
D-
3
G1
G
D+
4
G2
G
G
ALLTOP_C10777_104A3_L_4P
Close to USB CON
+V5A_USB_1
38-
C310
+V5A_USB_1
38-
(20/5)
8
OUT
7
OUT
6
532-,38-
OC#
1
2
C689
22uF_6.3v
USB_P1-
USB_P1+
32-
32-
L516
1
4
USB_L_P1-
2
USB_L_P1+
3
WCM_2012_900T
1
2
Close to USB CON
0.1uF_16v
1
2
C312
1000pF_50v
CN508
1
VCC
2
D-
3
G1
G
D+
4
G2
G
G
ALLTOP_C10777_104A3_L_4P
+V5A_USB_2
38-
7-,8-,9-,10-,11-,12-,13-,14-,29-,30-,34-,38-
+V5A
(20/5)
1
C417
0.01uF_16v
2
SLP_S5#_3R
U522
1
GND
2
IN
3
IN6OUT
4
32-,38-
EN
GMT_G545B1P8U_MSOP_8P
+V5A_USB_2
OUT
7
OUT
5
OC#
1
2
C737
22uF_6.3v
USB_P2-
USB_P2+
32-
32-
L524
1
4
WCM_2012_900T
USB_L_P2-
2
USB_L_P2+
3
38-
(20/5)
8
Close to USB CON
1
2
C416
0.1uF_16v
1
2
C415
1000pF_50v
CN512
1
VCC
2
D-
3
G1
G
D+
4
G2
G
G
ALLTOP_C10777_104A3_L_4P
INVENTEC
TITLE
DDD Discrete
USB CONN
CODE
Close to USB CON
CHANGE by
Thomas Ho 2-Jun-2007
SIZE
A3
DOC. NUMBER
Model_No A01
CS
SHEET
REV
OF
5538

+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
1
C735
2
0.1uF_16v
SCAN_3S_OUT(11:0)
SCAN_3S_IN(7:0)
LPC_3S_AD(3:0)
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
40-,47-
31-,39-,45-
LPC_3S_AD(3)
LPC_3S_AD(2)
LPC_3S_AD(1)
LPC_3S_AD(0)
SCAN_3S_IN(0)
SCAN_3S_IN(1)
SCAN_3S_IN(2)
SCAN_3S_IN(3)
SCAN_3S_IN(4)
SCAN_3S_IN(5)
SCAN_3S_IN(6)
SCAN_3S_IN(7)
1
C736
1
2
2
0.1uF_16v
40-,47-
SCAN_3S_OUT(12)
SCAN_3S_OUT(13)
IM_5S_CLK
IM_5S_DATA
RUNSCI0#_3
PCI_3S_CLKRUN#
PCI_3S_SERIRQ
CLK_R3S_KBPCI
LPC_3S_FRAME#
NPCI_RESET#
C741
0.1uF_16v
4040-
32-,3332-
32-
15-
31-,39-,4532-
1
C368
0.1uF_16v
2
SCAN_3S_OUT(0)
SCAN_3S_OUT(1)
SCAN_3S_OUT(2)
SCAN_3S_OUT(3)
SCAN_3S_OUT(4)
SCAN_3S_OUT(5)
SCAN_3S_OUT(6)
SCAN_3S_OUT(7)
SCAN_3S_OUT(8)
SCAN_3S_OUT(9)
SCAN_3S_OUT(10)
SCAN_3S_OUT(11)
4040-
+V3S
R698
12
10K_5%
1
C391
2
0.1uF_16v
5-,6-,7-,14-,31-,39-,40-,47-
1
C369
2
0.1uF_16v
U17
21
KOS00
20
KOS01
19
KOS02
18
KOS03
17
KOS04
16
KOS05
13
KOS06
12
KOS07
10
KOS08
9
KOS09
8
KOS10
7
KOS11
6
KOS12
5
KOS13
29
KSI0
28
KSI1
27
KSI2
26
KSI3
25
KSI4
24
KSI5
23
KSI6
22
KSI7
41
EMCLK
42
EMDAT
35
IMCLK
36
IMDAT
40
KDAT
38
KCLK
76
nEC_SCI
55
CLKRUN#
57
SER_IRQ
54
PCI_CLK
51
LAD3
50
LAD2
48
LAD1
46
LAD0
52
LFRAME#
53
LRESET#
45
LPCPD#
1
NC
2
NC
3
NC
30
NC
31
NC
32
NC
33
NC
34
NC
43
NC
44
NC
62
NC
63
NC
64
NC
65
NC
66
NC
67
NC
94
NC
+V3AL
49
14
106
119
84
39
58
VCC1
VCC1
VCC1
VCC1
VCC1
VCC1
Keyboard / Mouse Interface
SIRQ
Mgmt
Power
LPC Bus
Access Bus
Intreface
Miscellaneous
AGND
VSS
VSS
VSS
VSS
11
72
82
47
56
37
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
5-,6-,7-,14-,31-,39-,40-,47-
+V_RTC
31-,34-
1
R439
0_5%_OPEN
15
CAP
VCC2
VSS
VSS
104
2
1
R7013
0_5%
2
68
OUT0
OUT1
VCC0
OUT7
OUT8
OUT9
OUT10
OUT11
GPIO01
GPIO02
GPIO03
GPIO04
GPIO05
GPIO07
GPIO08
GPIO09
GPIO11
GPIO012
GPIO013
GPIO014
GPIO015
GPIO016
GPIO017
GPIO019
Genrel Purpose I/O Interface
GPIO020
GPIO021
GPIO024
GPIO025
GPIO026
GPIO027
GPIO028
GPIO029
GPIO030
GPIO031
GPIO032
AB1A_CLK
AB1A_DATA
AB1B_CLK
AB1B_DATA
XTAL1
XTAL2
CLOCKI
32KHZ_OUT_GPIO22
nRESET_OUT
TEST_PIN
VCC1_PWRGD
nBAT_LED
nPWR_LED
nFDD_LED
mDMS_LED
PWEGD
VSS
117
SMSC_KBC1070_VTQFP_128P
+V3AL
1
R440
2
OPEN
TP35
TP13
TP12
TP30
TP31
TP36
6-
BATCON
TP37
7-,8-,9-,10-,12-,13-,14-,32-,43-,46-
12
TP32
12
R701
TP47
TP48
TP49
R709
12
C366
4.7uF_6.3v
1
2
C4101
2
0.1uF_16v
124
125
123
122
121
120
118
107
79
80
81
83
85
86
87
88
89
90
91
92
101
102
61
103
105
4
73
108
74
93
98
99
100
126
112
111
110
109
70
71
59
75
60
69
77
113
115
114
116
78
95
NC
96
NC
97
NC
127
NC
128
NC
C367
1
2
0.1uF_16v
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
7-
47-
314119-
5-,6-
47-
40-
SCAN_3S_OUT(14)
40-
SCAN_3S_OUT(15)
6-
31-,39-
10K_5%R676
1K_1%
5-,6-,7-,43-
10K_5%
4133-
15-
+V3S
1
C392
0.1uF_16v
2
KBC_PW_ON
BAT_GRN_LED#
PM_3S_KBCCPURST#
A_SD
PWM_3S_FAN#
CHGCTRL_3
PWR_SWIN#_3
TP14
TP15
THM_MAIN#
EC_3S_A20GATE
SLP_S3#_3R
ADP_PRES
A_EAPD
PCI_3S_SERR#
CLK_R3S_KBC14
2
10K_5%
12
R442 1K_5%
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
12
R708 8.2K_5%
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
39-
LED_3_NUM#
+VBATR
ACES_87216_2406_24P_OPEN
32-
1
2
10K_5%R445
1
2
R446 10K_5%
+V3AL
X2
32.768KHZ
C412
1
2
15pF_50v
CN509
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
G1
25
21
22
G2
22
26
23
23
24
24
DEBUG PORT
LOW_BAT#_3
7-,32-
RSMRST#
5-,6-,7-,14-,31-,39-,40-,47-
1234
C411
1
2
15pF_50v
5-,7-,8-,9-,11-,13-,30-
SPI_CLK
SPI_CE#
SPI_SI
SPI_SO
+V3AL
5-,6-,7-,14-,31-,39-,40-,47-
R9645
12
SCL_MAIN
SDA_MAIN
PM_PWROK
VCC1_R_POR#_3
VCC1_POR#_3
BAT_AMBER_LED#
STBY_LED#
LED_3_CAPS#
PWR_GOOD_KBC
15-
31-,39-,45-
33-,37-,45-
31-,39-,4531-,39-,4531-,39-,4531-,39-,45-
39-,4739-,47393932-,3632-,3632-,3632-,363632-
R9646
12
5.1K_5%
5.1K_5%
R700
12
100K_5%
CLK_R3S_DEBUG
LPC_3S_FRAME#
BUF_PLT_RST#
LPC_3S_AD(0)
LPC_3S_AD(1)
LPC_3S_AD(2)
LPC_3S_AD(3)
STBY_LED#
LED_3_CAPS#
LED_3_NUM#
VCC1_R_POR#_3
SPI_HOLD#
SPI_CS1#
+V3S
2
R699
100K_5%
1
48-
CRACK_GPIO8
66-
1
R441
20-,32-
39-,4739-,47-
391447-
14-
EC_3S_A20GATE
31-,39-
R702
12
10K_5%
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
CHANGE by
INVENTEC
TITLE
DDD Discrete
KBC
CODE
CS
DOC. NUMBER
39 55
13-Jun-2007Thomas Ho
A3
REVSIZE
A01Model_No
OFSHEET

SCAN_3S_OUT(15)
SCAN_3S_OUT(10)
SCAN_3S_OUT(11)
SCAN_3S_OUT(14)
SCAN_3S_OUT(13)
SCAN_3S_OUT(12)
SCAN_3S_OUT(3)
SCAN_3S_OUT(6)
SCAN_3S_OUT(8)
SCAN_3S_OUT(7)
SCAN_3S_OUT(4)
SCAN_3S_OUT(2)
SCAN_3S_IN(0)
SCAN_3S_OUT(1)
SCAN_3S_OUT(5)
SCAN_3S_IN(3)
SCAN_3S_IN(2)
SCAN_3S_OUT(0)
SCAN_3S_IN(5)
SCAN_3S_IN(4)
SCAN_3S_OUT(9)
SCAN_3S_IN(6)
SCAN_3S_IN(7)
SCAN_3S_IN(1)
39393939393939393939393939-,40-,47393939-,4039-,4039-,4739-,4039-,403939-,4039-,4039-,40-
CN4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
G1
21
25
22
G2
26
22
23
23
24
24
ACES_88746_240N_24P
+V3AL
5-,6-,7-,14-,31-,39-,47-
47K_5%
56
189
SCAN_3S_IN(0)
SCAN_3S_IN(1)
SCAN_3S_IN(2)
SCAN_3S_IN(3)
SCAN_3S_IN(4)
SCAN_3S_IN(5)
SCAN_3S_IN(6)
SCAN_3S_IN(7)
410732
RS500
IM_5S_DATA
IM_5S_CLK
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,41-,42-
1
1
R324
R325
4.7K_5%
3939-
4.7K_5%
2
2
C341
680pF_50v
+V5S
1
2
(15/5)
TOUCH PAD CNTR
ACES_88746_060N_6P
6
6
5
5
4
G
G2
4
3
G1
G
3
2
2
1
1
CN7
KEYBOARD CONN
FIX25
FIX_MASK
FIX26
FIX_MASK
FIX27
FIX_MASK
FIX28
FIX_MASK
FIX29
FIX_MASK
FIX30
FIX_MASK
FIX35
FIX_MASK
FIX36
FIX_MASK
+V5S_TP
IM_5S_DATA_TP
IM_5S_CLK_TP
40-
4040-
GROUND_TP
SCAN_3S_IN(7:0)
0.1uF_16v_OPEN
SMDPAD_6P
6
5
4
3
2
1
PAD3002
0.1uF_16v_OPEN
TOUCH PAD BOARD
39-,40-,47-
TP_L
TP_R
C3000
C3001
GROUND_TP
40-
GROUND_TP
40-
1
2
1
2
PAD3000
12
2
1
SMDPAD_2P
PAD3001
1122
SMDPAD_2P
PAD3004
1
2
12
SMDPAD_2P
PAD3003
12
1
2
SMDPAD_2P
GROUND_TP
GROUND_TP
TP_R
TP_L
IM_5S_CLK_TP
IM_5S_DATA_TP
+V5S_TP
40-
CN3000
40-
40-
40-
40-
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
G
G1
9
10
G
G2
10
11
11
12
12
ACES_88707_120N_12P
GROUND_TP
GROUND_TP
INVENTEC
TITLE
CHANGE by SHEET
Thomas Ho 2-Jun-2007
A3
DDD Discrete
KB & TP CONN
CODE
DOC. NUMBER
Model_No A01
CS
REVSIZE
OF
5540

AZ_3S_SDOUT
AZ_3S_BITCLK
AZ_3S_SDIN0
AZ_3S_SYNC
AZ_3S_RST#
HP_SENSE
ISO_PREP#
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,42-,45-,46-,47-,48-,49-,50-,51-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,42-,45-,46-,47-,48-,49-,50-,51-
3131313131-,42-
41-,42-
32-
R447
OPEN
C399
1
OPEN
2
A_3S_ICHSPKR
C260
0.1uF_16v
R716
4.7K_5%_OPEN
1
R448
0_5%_OPEN
2
C418
22pF_50v_OPEN
PCBEEP
A_EAPD
+V3S +V3S
R417
2
1
0_5%
1
1
C400
2
1
2
R451
R420
R419
R418
R449
1
2
1
2
C419
4139-,41-
2
0.1uF_16v
39_5%
12
12
OPEN
2
1
OPEN
12
10K_5%
12
OPEN
0.1uF_16v
12
10
11
43
44
31
33
40
45
46
18
19
20
12
47
48
AD_1981HD_LQFP_48P
AUDIO_VCC
41-,42-
1
R726
10K_5%
2
C744
R714
12
Q522
3
1uF_10v
D
32-
1
G
S
2
SSM3K7002F
C38
C40
C41
C449
C448
C420
0.1uF_16v
5
SDATA_OUT
6
BIT_CLK
8
SDATA_IN
SYNC
RESET#
GPIO_0_JS_1
GPIO_1_JS_0
2
GPIO_2
3
GPIO_3
NC
NC
NC
NC
NC
CD_L
CD_GND
CD_R
EAPD
S_PDIF_OUT
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
12
0.1uF_16v
1
2
1
2
150K_1%
R715
10K_5%
DVSS
4
For EMI Test
AUDIO_VCC2
1
25
9
DVDD
AVDD
DVDD
U20
AVSS
AVSS
DVSS
26
42
7
R470
12
0_5%
41-
1
1
2
2
41-
C401
1
2
0.1uF_16v
38
VREF_FILT
AVDD
PORT_A_L
PORT_A_R
PORT_B_L
PORT_B_R
MIC_BIAS_B
PORT_F_L
PORT_F_R
MIC_BIAS_F
PORT_C_L
PORT_C_R
MIC_BIAS_C
PORT_D_L
PORT_D_R
MIC_BIAS_D
PORT_E_L
PORT_E_R
MONO_OUTPCBEEP
SENSE_A_SRC_B
SENSE_B_SRC_A
PCBEEP
C745
0.1uF_16v
BLM21A121S
1
2
27
1uF_10v
39
41
21
22
28
16
17
30
23
24
29
35
36
32
14
15
37
13
34
AUDIO_VCC
L20
12
C426
0.1uF_16v
C422
12
1
2
C423
1uF_10v
R454
12
0_5%_OPEN
C429
12
1uF_10v_OPEN
A_MIC_L
EXT_MIC_L
41-,42-
42-
HP_OUT_L
42-
HP_OUT_R
41-
A_MIC_L
41-
A_MIC_R
41-
LINE_OUT_L
41-
LINE_OUT_R
12
R453 2.67K_1%
12
R423
R456
12
39.2K_1%
Q46
SSM3K7002F
R452
2
1
20K_1%
Q49
C421
12
SSM3K7002F
1uF_10v_OPEN
41-
42-
0.47uF_10v
C447
2.67K_1%
3
D
S
2
3
D
S
2
12
1
C427
1uF_6.3v
2
AUDIO_VCC2
41-
2
R424
100K_5%
1
G
1
C403
1
2
0.1uF_16v
AUDIO_VCC2
41-
1
R478
47K_5%
2
1
G
C446
1
2
0.1uF_16v
C769
12
R731
12
100K_5%
R479
12
0_5%
1
C770
2
68pF_50v
41-,42-
42-
100pF_50v
R733
2
10K_5%
1
C428
0.1uF_16v
2
HP_SENSE
MIC_SENSE
1
100pF_50v
MIC_REF1
AUDIO_VCC
41-,42-
1
C431
10uF_6.3v
0.22uF_16v
C739
1
2
3
4
U527
1OUT
1IN1IN+
GND
41-
12
41-
12
0.22uF_16v
C738
VDD+
2OUT
2IN-
2IN+
LINE_OUT_R
LINE_OUT_L
41-
12
C768
TLV2462CDGKR_SSOP_8P
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
U21
ANPEC_APL5151_SOT23_5P
1
2
LINE_C_OUT_R
LINE_C_OUT_L
AUDIO_VCC
41-,42-
MIC_REF1
5
VOUT
4
BP
C430
0.01uF_16v
AA_SD
R719
12
20K_1%
12
20K_1%
R718
41-
VIN
GND
SHDN#
41-
8
7
6
5
100pF_50v
12
C766
0.1uF_16v
12
C764
1
2
12
3
10K_5%
R720
12
10K_1%
C752
1
2
0.1uF_16v
4.7uF_6.3v
100pF_50v
12
100K_5%
1
CHANGE by
SUS_STAT#_3
+V5S
R734
C432
1
2
1uF_10v
C425
1uF_10v
U525
1
SHUTDOWN#
27
BYPASS
3
IN+
4
IN-
TI_TPA6211A1DRB_QFN_8P
12
0.22uF_16v
C748
R732
12
47K_5%
R730
12
47K_5%
R729
12
0_5%
1
C762
2
68pF_50v
AUDIO_VCC
C765
12
0.47uF_10v
MIC_REF1
C767
C763
12
R728
R727
10K_5%
41-
1
2
2
Thomas Ho
R717
32-
39-
A_SD
A_EAPD
1
2
10uF_6.3v
8
VO-
GND
6
VDD
5
VO+
9
TML
41-,42-
A_MIC_R
41-
42-
EXT_MIC_R
2
1
47K_5%
Q518
3
D
G
1
S
12
2
SSM3K7002F
39-,41-
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-,42-
0.1uF_16v
C424
1
1
2
2
C747
1
2
C751
100pF_50v
G
1
1
2
0.1uF_16v
C750
42-
42-
12
C749
1uF_10v
3
D
Q519
SSM3K7002F
S
2
R455
12
0_5%
SPK_OUT_L-
SPK_OUT_L+
100pF_50v
41-
C746
+V5S
AA_SD
INVENTEC
TITLE
DDD Discrete
2-Jun-2007
AUDIO CODEC
SIZE
CODE
A3
CS
SHEET
DOC. NUMBER
41 55
REV
A01Model_No
OF

EXT_MIC_L
EXT_MIC_R
MIC_SENSE
C743
1
2
41-
4141-
10uF_6.3v
AUDIO_VCC
1
R713
470_5%
2
1
R712
3.9K_5%
2
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
+V5S
5-,11-,13-,14-,19-,29-,30-,32-,34-,37-,40-,41-
R480
12
41-
1
R710
2
1
3.9K_5%
2
470_5%
R711
C742
1
2
10uF_6.3v
L526
12
BLM21A121S
L527
12
BLM21A121S
C761
470pF_50v
1
2
C760
470pF_50v
1
2
MIC JACK
JACK503
1
2
6
3
4
5
AMP_1720003_1_6P
AZ_3S_RST#
330K_5%_OPEN
R476
12
10K_5%_OPEN
R475
12
31-,41-
1K_5%_OPEN
1
Q48
SSM3K7002F_OPEN
C444
0.047uF_10v_OPEN
SSM3K7002F_OPEN
1
G
S
D
2
3
Q523
SSM3K7002F_OPEN
3
D
G
S
2
12
1
G
S
D
3
2
Q520
SSM3K7002F_OPEN
Q521
SSM3K7002F_OPEN
1
G
S
D
2
Q524
12
C443
4.7uF_6.3v_OPEN
1
G
S
D
2
3
3
SPK_OUT_L-
SPK_OUT_L+
CN3
1
41-
1
2
41-
2
ACES_87213_0200_2P
SPEAKER CNTR
MDC_3S_SDOUT
MDC_3S_SYNC
MDC_3S_SDIN1
20 MIL
C452
0.1uF_16v
60.4_1%
12
12
60.4_1%
+V3S
C1041
1
2
10uF_6.3v
R742
R725
1
R477
1K_5%
1
R481
1K_5%
2
2
L528
12
BLM11A121S
L525
12
BLM11A121S
1
2
C445
470pF_50v
1
2
C450
470pF_50v
JACK502
1
2
6
3
4
5
AMP_1720003_1_6P
C7011
12
1uF_6.3v
HEADPHONE JACK
1
2
2
10K_5%_OPEN
MDC_3S_BITCLKMDC_3S_RST#
0_5%
R474
12
12
R471
0_5%
R473
1
2
100uF_6.3v
1
1
2
2
REVERSED
REVERSED
3.3Vmain-aux
Azalia_BCLKAzalia_RST#
C759
C758
100uF_6.3v
R421
10K_5%_OPEN
47K_5%_OPEN
2
4
6
8
GND
10
GND
12
G4
G
G5
G
G6
G
12
12
1
R472
31-
HP_OUT_L
HP_OUT_R
G
G1
G2
G
HP_SENSE
41-
4141-
R422
47K_5%_OPEN
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
CN513
1
31-
313131-
GND
3
Azalia_SDO
5
GND
7
Azalia_SYNC
9
Azalia_SDI
11
G1
G
G2
G
G3
G
TYCO_1_1775014_2_12P
INVENTEC
TITLE
DDD Discrete
MDC CNTR
CHANGE by
Thomas Ho 4-Jun-2007
A3
MDC CNTR
DOC. NUMBER
CODESIZE
Model_No A01
CS
SHEET
REV
OF
5542

7-,8-,9-,10-,12-,13-,14-,32-,39-,46-
SLP_S3#_3R
ADP_PRES
4.7uF_6.3v
5-,6-,7-,39-
+V3_LAN
C36
0.1uF_16v
C7013
34-,43-,44-,45-
1
2
220K_5%
7-,13-,14-,30-,32-,33-,34-,36-,45-,46-,47-
+V3A
1
2
1
R339
12
2
1
2
C728
C729
0.1uF_16v
0.1uF_16v
+V3_LAN
34-,43-,44-,45-
U518
5
NC7SZ02M5X
4
3
1
2
C397
0.1uF_16v
R681
12
0_5%
C731
0.1uF_16v
1
2
34-,43-,44-,45-
+V3_LAN
+V3_LAN
34-,43-,44-,45-
5
U7004
2
4
PHP_74LVC1G17_SOT753_5P
3
2
X502
C396
12
25MHZ
22pF_50v
34-,43-,44-,45-
32-
LAN_RST#
1
C395
12
22pF_50v
Q2015
4
D
S
G
FDC638P
R9655
12
220K_5%
+V3_LAN
34-,43-,44-,45-
1
2
1
C724
5
63
4.7uF_6.3v
2
SSM3K7002F
Q2016
1
G
1
100_5%
2
3
D
S
2
R9656
+V3_LAN
34-,43-,44-,45-
D2005
1
2
1N4148
R7021
12
100K_5%
C7008
0.22uF_6.3v
1
1
2
0.1uF_16v
TD2+
TD2-
TD1+
TD1-
1
2
0.1uF_16v
1
2
C398
0.1uF_16v
619_1%
R661
12
12
619_1%
R662
4444-
R678
12
110_1%
4444-
1
C725
2
10uF_6.3v
U521
1
VCC
2
VCCA
3
VSSA
4
RBIAS10
5
RBIAS100
6
VSSA2
7
VCCA2
8
ADV10_LAN_DISABLE#
VSS
9
VCCT
10
TDP
11
TDN
12
VCCT
13
VSS
14
VCCT
15
RDP
16
RDN
17
VCCT
18
VSS
19
VCCR
20
VSSR
21
TESTN
22
VSSR
23
VCCR
24 25
VSS
1
ITL_82562GT_SSOP_BU1_48P
2
R680
200_1%
JTXD2
JTXD1
JTXD0
JRSTSYNC
VCCP
JCLK
VSSP
JRXD2
VCCP
JRXD1
JRXD0
VSSP
ACTLED#
SPDLED#
ISOL_TCK
ISOL_EXEC
ISOL_TI
LILED#
TOUT
VSS
VCC
48
47
X2
46
X1
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
31313131-
12
31-
3131-
44-
32-,44-
LAN_TXD2
LAN_TXD1
LAN_TXD0
LAN_RSTSYNC
31-
LAN_JCLK
0_5%R7019
LAN_RXD2
LAN_RXD1
LAN_RXD0
LED_3S_LANACT#
LED_3S_LANLINK#
+V3_LAN
2
C727
1
2
C730
CHANGE by
INVENTEC
TITLE
DDD Discrete
NIC 10/100- CONTROLLER
CODE
SIZE
12-Jun-2007Thomas Ho
A3
CS
SHEET
DOC. NUMBER
43 55
REV
A01Model_No
OF

TD2+
TD2-
RJ45_TA+
RJ45_TA-
+V3_LAN
34-,43-,45-
R188
R218
330_5%
330_5%
12
12
U515
CT
TD+
7
6
CT
4344-
44-
TD-
8
RX+
16
14
CT
RX-
15
LANKOM_LF_H80P_1_SOP_16P
C313
1
2
0.1uF_16v
11
10
TX+
9
TX-
1
RD+
2
RD-
3
CT
C314
1
2
0.1uF_16v
R679
110_1%
PLACED CLOSE TO U521
44-43-
RJ45_TB+
44-
RJ45_TB-
43-
TD1+
43- 44-
TD1-
12
2
2
R266
75_1%
R267
1
75_1%
1
RJ45_TB+
RJ45_TB-
RJ45_TA+
RJ45_TA-
C690
1
2
2200pF_2000v
444444-
1
1
R7002
R7001
75_1%
75_1%
2
2
JACK501
B1B1 B2 B2
1
TX+
2
TX-
3
RX+
4
P4
5
P5
6
RX-
7
P7
8
P8
A1 A1 A2A2
G1
G
G2
G
FOX_JM3611A_R2125_7F_RJ45_12P
43-
32-,43-
LED_3S_LANACT#
LED_3S_LANLINK#
CHANGE by
INVENTEC
TITLE
DDD Discrete
NIC 10/100- RJ45
SIZE
2-Jun-2007Thomas Ho
A3
CODE
CS
SHEET
DOC. NUMBER
OF
44 55
REV
A01Model_No

PCIE_WAKE#
WLAN_PRIORITY
BT_PRIORITY
CLK_R_PCIE_MINI2#
CLK_R_PCIE_MINI2
BUF_PLT_RST#
CLK_R3S_MINICARD
PCIE_C_RXN2
PCIE_C_RXP2
PCIE_C_TXN2
PCIE_C_TXP2
CL_CLK1
CL_DATA1
CL_RST#1
32454515-
1515-
33-,37-,39-,45-
15-
3232-
3232-
323232-
R737
R736
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,46-,47-,48-,49-,50-,51-
+V1.5S
1
2
1
2
0_5%_OPENR738
1
0_5%_OPEN
2
12
0_5%_OPEN
C434
0.1uF_16v
C442
1
2
11
13
15 16
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51 52
G1
C441
1
2
10uF_6.3v
0.1uF_16v
CN515
1
WAKE#
3
Reserved
5
Reserved
7
CLKREQ#
9
GND
REFCLKREFCLK+
GND
Reserved
Reserved
GND
PERn0
PERp0
GND 1.5V
GND
PETn0
PETp0
GND
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GG
TYCO_1720007_1_52P
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PERST#
+3.3Vaux
SMB_CLK
SMB_DATA
USB_DUSB_D+
LED_WWAN#
LED_WLAN#
LED_WPAN#
2
3.3V
4
GND
6
1.5V
8
10
12
14
18
GND
20
22
24
26
GND
28
30
32
34
GND
36
38
40
GND
42
44
46
48
1.5V
50
GND
3.3V
G2
10-,13-,18-,24-,34-,46-
C435
1
2
0.1uF_16v
1
2
31-,3931-,3931-,3931-,3931-,39-
C440
0.1uF_16v
33-,37-,39-,45-
1
C436
2
4.7uF_6.3v
LPC_3S_FRAME#CLK_R_REQG#
LPC_3S_AD(3)
LPC_3S_AD(2)
LPC_3S_AD(1)
LPC_3S_AD(0)
32-,45-
XMIT_OFF#
BUF_PLT_RST#
WLAN CONN
R261,R262,R263,R264,R265 place as close to LPC signal as possible to minimize stub length for LPC bus
(will be NI for FCS)
+V3_LAN
34-,43-,44-
1
2
C439
0.1uF_16v
1
2
C438
10uF_6.3v
BT_OFF
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,46-,47-
1
R9630
10K_5%
2
32-
PMV65XP
R9631
12
220K_5%
Q2004
3
2
D
S
G
1
LED_BLUETOOTH
WLAN_PRIORITY
BT_PRIORITY
C7009
1
2
10uF_6.3v
32-
USB_P6+
32-
USB_P6-
454545-
BLUETOOTH CONN
BLUETOOTH_VCC
C7010
1
2
0.1uF_16v
1
R9634
R9633 0_5%_OPEN
0_5%_OPEN
2
12
CN6004
8
G2
7
G1
6
5
4
3
2
1
ACES_8213_0800N_8P
LED_BLUETOOTH
45-
R9632
100K_5%
1
2
Q2005
1
G
SSM3K7002F
XMIT_OFF#
47-
WL_BT_LED#
3
D
S
2
Q2006
3
1
G
SSM3K7002F
D
S
2
32-,45-
INVENTEC
TITLE
DDD Discrete
MINICARD CONN & BLUETOOTH
CHANGE by OF
Thomas Ho
14-Jun-2007
A3
DOC. NUMBERSIZE
CODE
Model_No A01
CS
SHEET
REV
5545

+V1.8_SD
+V3S
46-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
USB_P3+
USB_P3-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V3S
3232-
46-
XI
46-
XO
C772
C774
1
2
1uF_10v
C775
1
0.1uF_16v
2
1
0.1uF_16v
2
C756
0.1uF_16v
C757
12
18pF_50v
C776
12
18pF_50v
1
R724
1M_5%
2
46-
1
X503
12MHZ
2
46-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
R721
12
C755
47K_5%
1
0.1uF_16v
2
270_5%
+V3S
1
2
12
R723
0.1uF_16v
XI
1
2
3
4
5
6
7
8
9
10
11
12
+V1.8_SD
C773
1
2
VDD
REXT
VD33P
DP
DM
U526
VSS33P
ALCOR_AU6371_LQFP_48P
XI
XO
GNDU
VDDU
NC
NC
46-
+VCC_SD
46-
1
C771
2
2.2uF_16v
+VCC_SD
48
47
GND
V18
14
13
46-
40
41
46
42
43
44
45
CFWTNCF_V33
CHIPRESETN
CARDDATA11
CARDDATA12
CARDDATA13
CARDDATA14
CARDDATA15
VDDH
VSSH17XDCDN
MSINS16READER_EN
SMCDN
CFCDN
18
21
19
20
15
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
12
47K_5%
10K_5%
R425
12
SDDATA3
SD_CMD
XO SD_WP
SD_CLK
46-
37
38
39
CARDDATA7
CARDDATA8
CARDDATA9
CARDDATA10
SDCDN
CONTROLOUT4
CONTROLOUT5
22
23
24
R735
46-
46-
46-
46-
CARDDATA6
CARDDATA5
CARDDATA4
CARDDATA3
CARDDATA2
CARDDATA1
CARDDATA0
GPON6
CONTROLOUT0
CONTROLOUT1
CONTROLOUT2
CONTROLOUT3
+V3S
SDDATA3
46-
36
46-
35
34
46-
33
46-
32
31
46-
30
29
28
46-
27
26
25
46-
CN8
1
DAT3
2
CMD
3
CD_WP_COM
VSS
4
VDD
5
CLK
6
VSS
7
DAT0 DAT1
PLAS_CS165_14P
SDDATA2
SDDATA1
SDDATA0
SD_WP
SD_CMD
SD_CLK
SD_CD#
GND
GND
CD
WP
DAT2
G1
G2
12
46-
11
10
46- 32-
46-
9
8
46-
SD/MMC CONN
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,47-
+V3A
+V3AUX_EXP
46-
C298
C700
1
1
2
10uF_6.3v
2
NEWCARD_SD#
0_5%_OPEN
SLP_S3#_3R
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C699
1
0.1uF_16v
2
C295
1
2
4.7uF_6.3v
+V3S
R290
SD_CD#
CPUSB#
0_5%_OPEN
46-
SDDATA2
SDDATA1SDDATA0
0.1uF_16v
R7012
12
32-
7-,8-,9-,10-,12-,13-,14-,32-,39-,43-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
+V1.5_EXP
46-
+V3_EXP
+V3AUX_EXP
46-
R292
R291
1
1
1
2
2
2
4.7K_5%
4.7K_5%
C353
C327
1
1
0.1uF_16v
0.1uF_16v
2
2
+V1.5S
13
14
15
U11
NC
AUXIN
OC
SHDN
TML-PAD
AUXOUT
STBY
1
1.5VIN3.3VIN
1.5VOUT
3.3VOUT
2
3
16
17
18
19
20
21
+V3S
C697
1
2
46-
CLK_R_PCIE_NEWCARD#
1
2
0.1uF_16v
PCIE_C_TXP5
PCIE_C_TXN5
PCIE_C_RXP5
PCIE_C_RXN5
CLK_R_PCIE_NEWCARD
CLK_R_REQH#
PERST#
R365
C354
1
1
0.1uF_16v
2
0_5%_OPEN
2
C701
10
9
8
7
6
0.1uF_16v
1
2
C696
+V1.5_EXP
464646-
20-,33-
1
2
10-,13-,18-,24-,34-,45-
0.1uF_16v
11
12
1.5VIN
CPPE
1.5VOUT
CPUSB
PERSTRCLKEN
GND
SYSRST
3.3VIN43.3VOUT
5
GMT_G577BSR91U_TQFN_20P
C296
4.7uF_6.3v
FOX_1CH411AWC_VA_26P
3232-
3232-
151546-
CPPE#
15-
46-
USB_P4+
32-
USB_P4-
46-
C297
1
10uF_6.3v
2
CPPE#
CPUSB#
PERST#
PLT_RST#
+V3_EXP
46-
C294
1
2
10uF_6.3v
26
26
G
25
G6
25
G
24
G5
24
G
23
G4
23
G
22
G3
22
G
21
G2
21
G
20
G1
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
CN6
NEW CARD CONN
CHANGE by
Thomas Ho
13-Jun-2007
INVENTEC
TITLE
DDD Discrete
NEW CARD & SD/MMC
SIZE CODE DOC. NUMBER
A3
CS
SHEET
OF
46 55
REV
A01Model_No

POWER BUTTON
+V3AL_DB
47-
R2003
12
100K_5%
1
C2000
1000pF_50v
2
DB_DGND
WIRELESS BUTTON
SCAN_3S_OUT(0)_DB SCAN_3S_IN(0)_DB
39-,47-
POWER / STANDBY LED
STBY_LED#_DB
+V3S_DB
47-
1
R9629
270_5%
2
WL_BT_LED#_DB
S53
DB_DGND
47-
SCREW5.05_8_10_1P
SCREW5.05_8_10_1P
S21
DB_DGND
47-
PWR_SWIN#_3_DB
+V3AL_DB
3
2
1
D2002
CHENMKO_BAV99
SW2000
1
G1 G2
2
FOX_1BT002_0021L_4P
DB_DGND
D2003
47-
LITEON_LTW_C190DA5
WLAN LED
D2001
EVL_19_21_B7C_ZQ1R2_3T_2P
SCAN_3S_OUT(0)_DB
FOX_1BT002_0021L_4P
DB_DGND
47-
3
4
DB_DGND
R2002
12
21
270_5%
D2000
EVL_21SUYC
21
21
47-
+V3S_DB
+V3AL_DB
WL_BT_LED#_DB
STBY_LED#_DB
SCAN_3S_IN(0)_DB
PWR_SWIN#_3_DB
DB_DGND
SW2001
1
G1
2
39-,40-,47-
+V3AL_DB
12
270_5%
R2000
47-
474739-,4739-,40-,4747-
LED&SWITCH BOARD
3
G2
4
47-
DB_DGND
SMDPAD_10P
DB_DGND
+V3S_DB
PAD2000
1
2
3
4
5
6
7
8
9
10
LID SWITCH
LID_SW#_3_LB
+V3A_LB
47-
PAD512
1
47-
2
3
LID_SW#_3_LB
DIPPAD_3P
LB_GND LB_GND LB_GND
47-
C7000
100pF_50v
1
2
0.01uF_16v
+V3A_LB
47-
MAG_MH_248_SOT23_3P
C7001
1
2
1
2
U7000
VDD
OUT
3
GND
LB_GND
LID SW/B
+V3A
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
1
+V3A
LID_SW#_3
30-,32-
2
R9644
100K_5%
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
CN6005
1
1
2
G
G1
2
3
G
G2
3
ACES_87213_0300N_3P
LID SW/B CONN
47-
FIX32
FIX_MASK
FIX19
FIX_MASK
FIX20
FIX_MASK
FIX22
FIX_MASK
FIX23
FIX_MASK
FIX24
FIX_MASK
LED_3_CAPS#
PWR_SWIN#_3
CAP LED
D8
39-
LITEON_LTW_C190DA5
+V3A
39-,47-
1
D
3
SSM3K7002F
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
21
7-,13-,14-,30-,32-,33-,34-,36-,43-,45-,46-,47-
G
Q2001
S
2
PWR_SWIN#_3
R152
12
270_5%
32-
PWR_SWIN2#_3
WL_BT_LED#
STBY_LED#
SCAN_3S_OUT(0)
SCAN_3S_IN(0)
39-,47-
C7012
470pF_50v
+V3A
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,48-,49-,50-,51-
5-,6-,7-,14-,31-,39-,40-,47-
+V3AL
CN2
1
1
2
2
3
3
4
45-
4
5
39-
5
6
39-,40-
6
7
39-,40-
7
8
8
9
G
G1
9
10
G
G2
1
2
10
ACES_88746_100N_10P
BATTERY-CHARGE LED
R171
BAT_AMBER_LED#
BAT_GRN_LED#
D11
39-
39-
EVL_21SUYC
2
1
D10
21
LITEON_LTW_C190DA5
270_5%
12
1
R170
270_5%
5-,6-,7-,14-,31-,39-,40-,47-
2
+V3AL
INVENTEC
TITLE
DDD Discrete
CHANGE by
Thomas Ho
14-Jun-2007
BUTTON & LED
SIZE
CODE
A3
CS
SHEET
47 55
REVDOC. NUMBER
A01Model_No
OF

SCREW2.8_8_9_1P
S1
SCREW2.8_8_10_1P
S3
SCREW2.8_8_10_1PS5
SCREW2.8_8_10_1P
S7
SCREW2.8_8_10_1P
S2
SCREW2.8_8_9_1P
S4
SCREW2.8_8_10_1P
S6
SCREW2.8_8_9_1P
S8
S51
S52
S47
SCREW3.9_6_1P
SCREW3.9_6_1P
SCREW2.1_2.2_5_1P
CPU
MDC
SCREW3.9_6_1P
S16
SCREW3.9_6_1P
S15
SCREW2.1_2.2_5_1P
S50
SCREW3.7_4_6_1P
S19
MINI CARD
SCREW1.2_2.4_5_1P
S17
VGA
SCREW3.7_4_6_1P
S20
SCREW1.2_2.4_5_1P
S18
FIX7
FIX_MASK
FIX8
FIX_MASK
FIX9
FIX_MASK
FIX10
FIX_MASK
FIX11
FIX_MASK
FIX12
FIX_MASK
FIX37
FIX_MASK
FIX38
FIX_MASK
SCREW2.8_8_9_1P
S9
SCREW2.8_8_10_1P
S11
MAIN BOARD
SCREW2.8_8_10_1P
S10
S54 SCREW2.5_4_1P
SCREW2.5_4_1PS55
MCHGND3
ICHGND1
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
39-,48-
Q2007
1
G
3
D
S
2
CRACK_GPIO8
R9647
100K_5%
2
23-
SSM3K7002F
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
39-,48-
Q2011
1
G
3
D
S
2
CRACK_GPIO8
R9651
100K_5%
2
35-
SSM3K7002F
MCHGND4
ICHGND4
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
39-,48-
R9648
Q2008
100K_5%
2
G
1
23-
SSM3K7002F
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
39-,48-
R9652
Q2012
100K_5%
2
G
1
35-
SSM3K7002F
Crack test for PV build only
3
D
S
2
3
D
S
2
CRACK_GPIO8
CRACK_GPIO8
MCHGND5
ICHGND7
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
39-,48-
Q2009
1
G
3
D
S
2
CRACK_GPIO8
R9649
100K_5%
2
23-
SSM3K7002F
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
39-,48- 39-,48-
Q2013
1
G
3
D
S
2
CRACK_GPIO8
R9653
100K_5%
2
35-
SSM3K7002F
CHANGE by
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
39-,48-
R9650
Q2010
100K_5%
2
G
1
MCHGND6
23-
SSM3K7002F
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
1
R9654
Q2014
100K_5%
2
G
35-
ICHGND10
1
SSM3K7002F
Thomas Ho 13-Jun-2007
3
D
S
2
3
D
S
2
CRACK_GPIO8
CRACK_GPIO8
INVENTEC
TITLE
DDD Discrete
SCREW
CODE
SIZE
A3
CS
SHEET
Model_No
REVDOC. NUMBER
A01
OF
5548

STRAPS
TX_PWRS_ENB
TX_DEEMPH_EN
BIF_DEBUG_ACCESS
PLL_IBIAS_RD_1
PLL_IBIAS_RD_0
ROMIDCFG(3:0)
PIN
GPIO0
GPIO1
GPIO4
GPIO6
GPIO5
GPIO[13:11,9]
X = DESIGN DEPENDANT
0 = DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
MEM_ID3
MEM_ID2
MEM_ID1
0
0
0
0
1
0
0
0
01
0
1
1
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
10-,13-,49-,50-,51-
+V2.5S
12
BLM11A121S
+VPCIE
0
0
0
1
0
0
L17
9-,49-,50-,51-
12
L512
MEM_ID0
R216
OPEN
BLM11A121S
+VDD_CORE
9-,51-
+VPCIE
BLM18BB100SN1D
L4
12
BLM11A121S
9-,49-,50-,51-
L6
12
VDD_MPLL
C256
1
0.1uF_16v
2
10uF_6.3v
DESCRIPTION OF DEFAULT SETTINGS
PCIE FULL TX OUTPUT SWING
PCIE TRANSMITTER DE-EMPHASIS ENABLED
DEBUG SIGNALS MUXED OUT
BIAS CURRENT FOR PCIE PHY PLL MSBIT
BIAS CURRENT FOR PCIE PHY PLL LSBIT
DISABLE EXTERNAL BIOS ROM
GPIO_13
GPIO_12
GPIO_9
00
0
1
1
0
1
1
128M memory aperture
0
256M memory aperture
0
64M memory aperture
0
0
vendor
X
0
samsung (128MB)
1
samsung (64MB)
1
0
0
0
0
+V3S
VDD_PLL
1
2
C156
C677
0.1uF_16v
infineon (128MB)
infineon (64MB)1
hynix (128MB)
hynix (64MB)1
1
2
1
2
+V3S
1
2
LCM_BKLTEN
49-
GPIO11
GPIO13
POW_SW
4949-
9-
GPIO12_ATI
1
R584
OPEN
2
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
C257
10uF_6.3v
R616
12
50-
OSC_IN
2
R617
X X X X
reserved
R212
10K_5%
R264
12
499_1%
C292
1
0.1uF_16v
2
180_5%
1
102_1%
X
1
0
0
1
30-
GPIO9
XTALOUT
LVDS_DDC_DATA
LVDS_DDC_CLK
1
2
OSC_SPREAD
R265
12
499_1%
XTALIN
MEM_ID0
MEM_ID1
MEM_ID2
MEM_ID3
49-
OTEMP#
+V3S
50-
50-
GPIO0
GPIO1
GPIO4
GPIO5
GPIO6
R187
1K_5%
U511-2
AH7
VID_0
AG9
VID_1
AF9
VID_2
AJ7
VID_3
AG7
VID_4
AF7
VID_5
AH6
VID_6
AG6
VID_7
AL6
VHAD_0
AK6
VHAD_1
AK5
VPHCTL
AJ4
VPCLK0
AJ5
VIPCLK
AL5
PSYNC
AD9
3030-
49494949-
4949-
494949-
5019-
1
2
DVALID
AA4
SDA
AA5
SCL
AK4
DVPCNTL_MVP_0
AL3
DVPCNTL_MVP_1
V2
DVPCNTL_0
V1
DVPCNTL_1
W3
DVPCNTL_2
W1
DVPCLK
Y1
DVPDATA_0
Y2
DVPDATA_1
Y3
DVPDATA_2
AA2
DVPDATA_3
AA3
DVPDATA_4
AB1
DVPDATA_5
AB2
DVPDATA_6
AB3
DVPDATA_7
AC1
DVPDATA_8
AC3
DVPDATA_9
AD1
DVPDATA_10
AD2
DVPDATA_11
AD3
DVPDATA_12
AF3
DVPDATA_13
AG3
DVPDATA_14
AH3
DVPDATA_15
AG1
DVPDATA_16
AH2
DVPDATA_17
AH1
DVPDATA_18
AJ3
DVPDATA_19
AJ1
DVPDATA_20
AJ2
DVPDATA_21
AK2
DVPDATA_22
AK3
DVPDATA_23
Y4
GPIO_0
V3
GPIO_1
V4
GPIO_2
V5
GPIO_3
U3
GPIO_4
U2
GPIO_5
T4
GPIO_6
T5
GPIO_7_BLON
T7
GPIO_8_ROMSO
T8
GPIO_9_ROMSI
R1
GPIO_10_ROMSCK
R2
GPIO_11
R3
GPIO_12
P1
GPIO_13
P3
GPIO_14_HPD2
N1
GPIO_15_PWRCNTL0
N2
GPIO_16_SSIN
P4
GPIO_17_THERMAL_INT
P7
GPIO_18_HPD3
P8
GPIO_19_CTFB
P5
GPIO_20_PWRCNTL1
V7
GPIO_21_BB_EN
N3
GPIO_22_ROMCSB
Y5
GPIO_23_CLKREQB
M4
GPIO_24_JMODE
M5
GPIO_25_TDI
M7
GPIO_26_TCK
M8
GPIO_27_TMS
L8
GPIO_28_TDO
Y8
GENERICA
Y7
GENERICB
V8
GENERICC
AC11
VREFG
AH12
DPLL_PVDD
AG12
DPLL_PVSS
AH31
PCIE_PVDD
AH30
PCIE_PVSS
A9
MPVDD
B9
MPVSS
AJ31
XTALIN
AJ30
XTALOUT
AE12
DPLL_VDDC
AD11
NC_10
PART 2 OF 6
VIP / I2C
External TMDS
General
ATI_M62S_BGA_632P
Integrated
DAC / CRT
DAC2 (TV/CRT2)
Monitor
ThermalPLL &
Test
TXCM
TXCP
TX0M
TX0P
TX1M
TX1P
TX2M
TX2P
TPVDD
TPVSS
TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4
TXVSS_1
TXVSS_2
TXVSS_3
TXVSS_4
TXVSS_5
TXVSS_6
NC_5
NC_6
NC_7
NC_8
NC_9
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
COMP
V2SYNC
H2SYNC
A2VDD
A2VDDQ
A2VSSQ
VDD2DI
VSS2DI
R2SET
HPD1
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
DDC3DATA
DDC3CLK
TS_FDO
DPLUS
DMINUS
TESTEN
PLLTEST
AK9
AL9
AJ9
AJ10
AL10
AK10
AL11
AK11
AL7
AK7
AJ12
AJ13
AK13
AL13
AJ8
AH9
AH11
AJ11
AK12
AL12
AE11
AF11
AK8
AL8
AG11
AL28
R
AK28
RB
AL27
G
AK27
GB
AL26
B
AK26
BB
AK29
AK30
AJ28
AL29
AH28
AJ27
AJ26
AL17
R2
AK17
R2B
AL15
G2
AK15
G2B
AL14
B2
AK14
B2B
AJ17
C
AJ15
Y
AJ14
AE16
AF16
AH14
AH16
AG16
AF18
AE18
AG14
AA8
AJ29
AH29
AC5
AC4
AF4
AH4
AE14
AE5
AE4
AH26
AD12
29-
29-
29-
2929-
R255
12
499_1%
R619
12
0_5%
R620
12
0_5%
R621
12
0_5%
R262
12
0_5%_OPEN
R263
12
715_1%
29-
CRT_DDCDATA
29-
CRT_DDCCLK
TP50
TP51
1
2
CRT_R
CRT_G
CRT_B
CRT_HSYNC
CRT_VSYNC
C688
1
10uF_6.3v
2
R618
R259
19-
16-,19-
R261
12
1K_5%
+V2.5S
10-,13-,49-,50-,51-
C7003
1
0.1uF_16v
2
C686
1uF_6.3v
R256
12
75_1%
12
12
75_1%
12
12
75_1%
12
C676
1
10uF_6.3v
2
DPLUS
THERM_MINUS
C687
1
0.1uF_16v
2
R257
0_5%
R258
0_5%
R260
0_5%
R7005
12
0_5%
C679
1
2
1uF_6.3v
+VDDDI
C680
1
1uF_6.3v
2
C282
1
0.1uF_16v
2
49-
+V2.5S
1
2
CHANGE by
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-,51-
49-
GPIO0
GPIO1
GPIO4
GPIO5
GPIO6
GPIO13
GPIO12_ATI
10-,13-,49-,50-,51-
GPIO11
GPIO9
MEM_ID0
MEM_ID1
MEM_ID3
MEM_ID2
R186
12
49-
10K_5%
49-
R593
12
49-
10K_5%
49-
12
49-
10K_5%_OPEN
49-
R214
12
49-
10K_5%_OPEN
49-
R627 10K_5%
49494949-
R626
1
1
2
2
10K_5%_OPEN
+V2.5S
10-,13-,49-,50-,51-
L510
12
BLM11A121S
+V2.5S
10-,13-,49-,50-,51-
L511
12
BLM11A121S
C678
0.1uF_16v
+V2.5S
10-,13-,49-,50-,51-
L15
2
1
BLM11A121S
C291
1
0.1uF_16v
2
+VDDDI
49-
TITLE
SIZE
31-Jan-2007Thomas Ho
A3
+V3S
R215
2
1
10K_5%
R184
12
10K_5%_OPEN
R185
12
10K_5%_OPEN
R594
R311
12
10K_5%_OPEN
R213
12
10K_5%_OPEN
12
10K_5%_OPEN
R629
12
R623 10K_5%_OPEN
12
R625
2
1
10K_5%_OPEN
R624
R628
1
1
2
2
10K_5%
10K_5%
10K_5% R622
INVENTEC
DDD Discrete
DOC. NUMBER
CODE
CS
SHEET
OF
49 55
REV
A01Model_No

PEG_C_TXP0
PEG_C_TXN0
PEG_C_TXP1
PEG_C_TXN1
PEG_C_TXP2
PEG_C_TXN2
PEG_C_TXP3
PEG_C_TXN3
PEG_C_TXP4
PEG_C_TXN4
PEG_C_TXP5
PEG_C_TXN5
PEG_C_TXP6
PEG_C_TXN6
PEG_C_TXP7
PEG_C_TXN7
PEG_C_TXP8
PEG_C_TXN8
PEG_C_TXP9
PEG_C_TXN9
PEG_C_TXP10
PEG_C_TXN10
PEG_C_TXP11
PEG_C_TXN11
PEG_C_TXP12
PEG_C_TXN12
PEG_C_TXP13
PEG_C_TXN13
PEG_C_TXP14
PEG_C_TXN14
PEG_C_TXP15
PEG_C_TXN15
CLK_R_DREF
CLK_R_DREF#
PCIE_RST#
+V2.5S
10-,13-,49-,50-,51-
U511-1
AC30
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
2121-
1515-
33-
AC31
AC29
AB29
AB31
AB30
AA31
AA30
AD29
AD30
AC28
AC27
AG25
W30
W31
W29
V29
V31
V30
U31
U30
P30
P31
P29
N29
N31
N30
M31
M30
K30
K31
K29
J29
J31
J30
H31
H30
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
PCIE_REFCLKP
PCIE_REFCLKN
RSVD_1
RSVD_2
PERSTB
Clock
PART 1 OF 6
P
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
PCIE_CALRN
PCIE_CALRP
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_CALI
AA28
AA27
AA25
AA24
Y28
Y27
Y25
Y24
V28
V27
V25
V24
T28
T27
T25
T24
P28
P27
P25
P24
M28
M27
M25
M24
L28
L27
L25
L24
J28
J27
G28
G27
AF25
AE25
AE23
R208
R209
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
12
12
C240
0.1uF_16v
2
1
C238
0.1uF_16v
12
C231
0.1uF_16v
12
C278
0.1uF_16v
12
C239
0.1uF_16v
12
C235
0.1uF_16v
12
C232
0.1uF_16v
12
C234
12
0.1uF_16v
C237
0.1uF_16v
1
2
C236
0.1uF_16v
12
C230
0.1uF_16v
12
C233
0.1uF_16v
2
1
C199
0.1uF_16v
12
C200
0.1uF_16v
12
C229
0.1uF_16v
12
C188
0.1uF_16v
12
C186
0.1uF_16v
12
C189
12
0.1uF_16v
C195
0.1uF_16v
2
1
C193
0.1uF_16v
12
C187
0.1uF_16v
12
C190
0.1uF_16v
12
C198
0.1uF_16v
12
C194
0.1uF_16v
12
C191
0.1uF_16v
12
C192
0.1uF_16v
2
1
C196
0.1uF_16v
12
C197
0.1uF_16v
12
C149
0.1uF_16v
12
C150
0.1uF_16v
2
1
C152
0.1uF_16v
2
1
C153
0.1uF_16v
12
2
R207 2K_1%
1
562_1%
1.47K_1%
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
21-
PEG_C_RXP0
PEG_C_RXN0
PEG_C_RXP1
PEG_C_RXN1
PEG_C_RXP2
PEG_C_RXN2
PEG_C_RXP3
PEG_C_RXN3
PEG_C_RXP4
PEG_C_RXN4
PEG_C_RXP5
PEG_C_RXN5
PEG_C_RXP6
PEG_C_RXN6
PEG_C_RXP7
PEG_C_RXN7
PEG_C_RXP8
PEG_C_RXN8
PEG_C_RXP9
PEG_C_RXN9
PEG_C_RXP10
PEG_C_RXN10
PEG_C_RXP11
PEG_C_RXN11
PEG_C_RXP12
PEG_C_RXN12
PEG_C_RXP13
PEG_C_RXN13
PEG_C_RXP14
PEG_C_RXN14
PEG_C_RXP15
PEG_C_RXN15
+VPCIE
L16
BLM18BA220SN1
12
1
2
+V2.5S
10-,13-,49-,50-,51-
BLM11A121S
9-,49-,51-
C290
C288
1
2
0.1uF_16v
L14
12
C289
1
2
OSC_SPREAD
10uF_6.3v
0.1uF_16v
49-
49-
C301
OPEN
1
2
R284
OPEN
AF20
AG20
AJ18
AH20
AF23
AF21
AL18
AJ22
AJ25
AK18
AK23
AK25
AJ21
AL23
AL25
AG18
AH18
12
22pF_50v
R283
2
1
0_5%
12
22_5%
R282
U511-6
PART 6 OF 6
LVDDR_1
LVDDR_2
LVDDC_1
LVDDC_2
LVSSR_1
LVSSR_2
LVSSR_3
LVSSR_4
LVSSR_5
LVSSR_6
LVSSR_7
LVSSR_8
LVSSR_9
LVSSR_10
LVSSR_11
LPVDD
LPVSS
VARY_BL
Control
LVDS channel
TXCLK_UP
TXCLK_UN
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
DIGON
ATI_M62S_BGA_632P
2
1
X500
27MHZ
25PPM
R9659
12
1M_1%
1
C303
2
U513
1
XIN_CLKIN XOUT
2
VSS
3
SRS
4
ModOUT
1
C302
22pF_50v
2
VDD
PD#
REF
8
7
6
5
PULSECORE_P1819BF_08ST_SOIC_8P
NOSTUFF FOR M76
OPTION FOR EMI TEST
AA7
AC6
AD21
AE21
AJ24
AJ23
AK24
AL24
AG21
AH21
AG23
AH23
AL19
AK19
AJ20
AJ19
AK20
AL20
AK21
AL21
AK22
AL22
49-
R211
12
10K_5%
30-
INV_PWM_3
30-
LVDS_VDD_EN
30-
LVDSA_CLK
30-
LVDSA_CLK#
30-
LVDSA_DATA0
30-
LVDSA_DATA#0
30-
LVDSA_DATA1
30-
LVDSA_DATA#1
30-
LVDSA_DATA2
30-
LVDSA_DATA#2
30-
LVDSB_CLK
30-
LVDSB_CLK#
30-
LVDSB_DATA0
30-
LVDSB_DATA#0
30-
LVDSB_DATA1
30-
LVDSB_DATA#1
30-
LVDSB_DATA2
30-
LVDSB_DATA#2
R254
12
49-
OPEN
XTALOUTXTALIN
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,51-
1
OSC_IN
C276
0.1uF_16v
2
ATI_M62S_BGA_632P
INVENTEC
TITLE
DDD Discrete
CODE DOC. NUMBER REV
SIZE
A3
31-Jan-2007Thomas Ho
CS
50 55
A01Model_No
OFSHEETCHANGE by

+V1.8S
13-,51-,52-,53-,54-
10-,13-,49-,50-
C287
10uF_6.3v
C660
1uF_6.3v
C598
1
2
10uF_6.3v
C597
1
1uF_6.3v
2
C591
1
1uF_6.3v
2
+V2.5S
C247
1
1uF_6.3v
2
C661
1
1uF_6.3v
2
C640
1
2
10uF_6.3v
C639
1
1uF_6.3v
2
C637
1
1uF_6.3v
2
+V3S
10-,11-,13-,14-,15-,19-,20-,24-,26-,27-,29-,30-,31-,32-,33-,34-,37-,39-,41-,42-,45-,46-,47-,48-,49-,50-
1
1
R210
0_5%
2
2
C662
1
1
10uF_6.3v
2
2
C157
1
2
10uF_6.3v
C594
1
1uF_6.3v
2
C210
1
1uF_6.3v
2
L18
12
BLM11A121S
C255
1
1uF_6.3v
2
C658
1
1uF_6.3v
2
C248
1
1uF_6.3v
2
C659
1
0.1uF_16v
2
C599
1
2
10uF_6.3v
C638
1
1uF_6.3v
2
C205
1
1uF_6.3v
2
C293
1
2
10uF_6.3v
+V1.8S
13-,51-,52-,53-,54-
L3
12
BLM11A121S
C148
1
10uF_6.3v
2
C154
1
0.1uF_16v
2
C259
1
0.1uF_16v
2
C155
1
1uF_6.3v
2
1
2
C258
1uF_6.3v
AC18
AC16
AC14
AC12
U511-4
A15
VDDR1_1
A22
VDDR1_2
A28
VDDR1_3
A4
VDDR1_4
A8
VDDR1_5
B8
VDDR1_6
C9
VDDR1_7
D1
VDDR1_8
H1
VDDR1_9
H11
VDDR1_10
H12
VDDR1_11
H14
VDDR1_12
H16
VDDR1_13
H18
VDDR1_14
H20
VDDR1_15
H21
VDDR1_16
B31
VDDR1_17
M1
VDDR1_18
AA9
VDD_CT_1
Y9
VDD_CT_2
V9
VDD_CT_3
T9
VDD_CT_4
J11
VDD_CT_5
J20
VDD_CT_6
J21
VDD_CT_7
L9
VDD_CT_8
VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
AF1
VDDR4_1
AF2
VDDR4_2
AE1
VDDR5_1
AE2
VDDR5_2
M2
NC_1
M3
NC_2
L4
NC_3
AE7
NC_4
A10
VDDRH_1
A19
VDDRH_2
B10
VSSRH_1
B19
VSSRH_2
V11
BBN_1
U11
BBN_2
R11
BBP_1
P11
BBP_2
PART 4 OF 6
Memory I/O
I/O Internal
P
Memory
Back Bias
ATI_M62S_BGA_632P
PCIE_VDDC_10
PCI-Express
PCIE_VDDC_11
PCIE_VDDC_12
Core
PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDC_1
PCIE_VDDC_2
PCIE_VDDC_3
PCIE_VDDC_4
PCIE_VDDC_5
PCIE_VDDC_6
PCIE_VDDC_7
PCIE_VDDC_8
PCIE_VDDC_9
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
AF30
AF31
AF29
AF27
AF28
AG29
AG30
AG31
AA23
AC24
AC25
AE26
AE27
AE28
L23
M23
P23
T23
V23
Y23
L11
L14
L17
L20
M12
M15
M18
M21
AC20
P14
P17
P20
R12
R15
R18
R21
AD20
U14
U17
U20
V12
V15
V18
V21
Y11
Y14
Y17
Y20
AA12
AA15
AA18
AA21
P9
J12
J14
J16
J18
C279
1
10uF_6.3v
2
C286
1
10uF_6.3v
2
C284
1
10uF_6.3v
2
C283
1
10uF_6.3v
2
C211
1
10uF_6.3v
2
C202
1
1uF_6.3v
2
C209
1
1uF_6.3v
2
C252
1
1uF_6.3v
2
C683
1
10uF_6.3v
2
C208
1
1uF_6.3v
2
C242
1
1uF_6.3v
2
1
2
C253
1
2
C685
1
2
1
2
1
2
C254
1uF_6.3v
1uF_6.3v
1uF_6.3v
C206
1uF_6.3v
C241
1uF_6.3v
1
2
1
2
1
2
C246
1uF_6.3v
C249
1uF_6.3v
C682
1uF_6.3v
C204
1
1uF_6.3v
2
1
1uF_6.3v
2
C245
1
1uF_6.3v
2
C251
1
1uF_6.3v
2
C684
1
1uF_6.3v
2
12
BLM11A121S
+VDD_CORE
L5
C277C201
1
0.1uF_16v
2
1
2
1
2
1
2
BLM18PG121SN1
C203
1uF_6.3v
C207
1uF_6.3v
C243
1uF_6.3v
9-,49-,51-
+VPCIE
L8
12
+VDD_CORE
C244
1
1uF_6.3v
2
C250
1
1uF_6.3v
2
9-,49-,50-
9-,49-,51-
CHANGE by
Thomas Ho 31-Jan-2007
INVENTEC
TITLE
DDD Discrete
SIZE DOC. NUMBER
CODE REV
A3
Model_No A01
CS
OFSHEET
5551

13-,51-,52-,53-,54-
+V1.8S
1
R579
100_1%
2
1
R578
100_1%
2
VM_R_ADA(63:0)
C593
1
0.1uF_16v
2
+V1.8S
13-,51-,52-,53-,54-
1
R576
100_1%
2
1
R577
100_1%
2
C592
1
0.1uF_16v
2
53-,54-
VM_R_ADA(0)
VM_R_ADA(1)
VM_R_ADA(2)
VM_R_ADA(3)
VM_R_ADA(4)
VM_R_ADA(5)
VM_R_ADA(6)
VM_R_ADA(7)
VM_R_ADA(8)
VM_R_ADA(9)
VM_R_ADA(10)
VM_R_ADA(11)
VM_R_ADA(12)
VM_R_ADA(13)
VM_R_ADA(14)
VM_R_ADA(15)
VM_R_ADA(16)
VM_R_ADA(17)
VM_R_ADA(18)
VM_R_ADA(19)
VM_R_ADA(20)
VM_R_ADA(21)
VM_R_ADA(22)
VM_R_ADA(23)
VM_R_ADA(24)
VM_R_ADA(25)
VM_R_ADA(26)
VM_R_ADA(27)
VM_R_ADA(28)
VM_R_ADA(29)
VM_R_ADA(30)
VM_R_ADA(31)
VM_R_ADA(32)
VM_R_ADA(33)
VM_R_ADA(34)
VM_R_ADA(35)
VM_R_ADA(36)
VM_R_ADA(37)
VM_R_ADA(38)
VM_R_ADA(39)
VM_R_ADA(40)
VM_R_ADA(41)
VM_R_ADA(42)
VM_R_ADA(43)
VM_R_ADA(44)
VM_R_ADA(45)
VM_R_ADA(46)
VM_R_ADA(47)
VM_R_ADA(48)
VM_R_ADA(49)
VM_R_ADA(50)
VM_R_ADA(51)
VM_R_ADA(52)
VM_R_ADA(53)
VM_R_ADA(54)
VM_R_ADA(55)
VM_R_ADA(56)
VM_R_ADA(57)
VM_R_ADA(58)
VM_R_ADA(59)
VM_R_ADA(60)
VM_R_ADA(61)
VM_R_ADA(62)
VM_R_ADA(63)
R182
4.7K_5%
1
2
R181
4.7K_5%
U511-3
E29
E30
E31
D31
C29
B29
B30
A29
E26
D26
E25
D25
G23
G21
E21
D21
C28
B28
B27
A27
C25
A25
C24
B24
C23
B23
A23
B22
C20
B20
A20
C19
C8
C7
B7
A7
A5
C4
B4
A3
G9
E9
D9
G7
G5
F5
G4
F4
B3
B2
C2
C1
E3
F3
F2
F1
G2
G1
H3
H2
K2
L3
L2
L1
F30
F31
L5
L7
J7
1
1
R180
243_1%
2
2
Part 3 of 6
DQ_0
DQ_1
DQ_2
DQ_3
MEMORY
DQ_4
DQ_5
DQ_6
DQ_7
DQ_8
DQ_9
DQ_10
DQ_11
DQ_12
DQ_13
DQ_14
DQ_15
DQ_16
DQ_17
DQ_18
DQ_19
DQ_20
DQ_21
DQ_22
DQ_23
DQ_24
DQ_25
DQ_26
DQ_27
DQ_28
DQ_29
DQ_30
DQ_31
DQ_32
DQ_33
DQ_34
DQ_35
DQ_36
DQ_37
DQ_38
DQ_39
DQ_40
DQ_41
DQ_42
DQ_43
DQ_44
DQ_45
DQ_46
DQ_47
DQ_48
DQ_49
DQ_50
DQ_51
DQ_52
DQ_53
DQ_54
DQ_55
DQ_56
DQ_57
DQ_58
DQ_59
DQ_60
DQ_61
DQ_62
DQ_63
MVREFD
MVREFS
TEST_MCLK
TEST_YCLK
MEMTEST
ATI_M62S_BGA_632P
read strobe
write strobe
MA_0
MA_1
MA_2
MA_3
MA_4
MA_5
MA_6
MA_7
MA_8
MA_9
MA_10
MA_11
MA_BA0
MA_BA1
MA_A12
MA_BA2
DQMb_0
DQMb_1
DQMb_2
DQMb_3
DQMb_4
DQMb_5
DQMb_6
DQMb_7
QS_0
QS_1
QS_2
QS_3
QS_4
QS_5
QS_6
QS_7
QS_0B
QS_1B
QS_2B
QS_3B
QS_4B
QS_5B
QS_6B
QS_7B
ODT0
ODT1
CLK0
CLK1
CLK0b
CLK1b
RAS0b
RAS1b
CAS0b
CAS1b
CS0b_0
CS0b_1
CS1b_0
CS1b_1
CKE0
CKE1
WE0b
WE1b
DRAM_RST
B14
A14
B13
E14
B17
A17
C15
G16
E16
C14
A12
B12
C12
53-,54-
TP44
53-,54-
VM_R_A_BA0
VM_R_A_BA1
D14
B15
G14
D30
G25
C26
C21
C5
D6
D2
K3
C30
D23
B26
B21
B6
E7
E2
J2
C31
E23
A26
A21
A6
D7
E1
J1
E20
C11
A18
A11
B18
B11
G20
D12
D20
E12
E18
G18
G11
E11
D18
G12
D16
C10
J5
VM_R_AA(0)
VM_R_AA(1)
VM_R_AA(2)
VM_R_AA(3)
VM_R_AA(4)
VM_R_AA(5)
VM_R_AA(6)
VM_R_AA(7)
VM_R_AA(8)
VM_R_AA(9)
VM_R_AA(10)
VM_R_AA(11)
VM_R_AA(12)
52-,53-
52-,5452-,53-
52-,54-
+V1.8S
R183
12
4.7K_5%
53-,54-
5353535354545454-
5353535354545454-
5353535354545454-
5354-
5354-
53-
54-
53-
54-
53-
54-
53-
54-
VM_R_AA(12:0)
VM_R_ADQM#(0)
VM_R_ADQM#(1)
VM_R_ADQM#(2)
VM_R_ADQM#(3)
VM_R_ADQM#(4)
VM_R_ADQM#(5)
VM_R_ADQM#(6)
VM_R_ADQM#(7)
VM_R_ADQSA(0)
VM_R_ADQSA(1)
VM_R_ADQSA(2)
VM_R_ADQSA(3)
VM_R_ADQSA(4)
VM_R_ADQSA(5)
VM_R_ADQSA(6)
VM_R_ADQSA(7)
VM_R_ADQSA#(0)
VM_R_ADQSA#(1)
VM_R_ADQSA#(2)
VM_R_ADQSA#(3)
VM_R_ADQSA#(4)
VM_R_ADQSA#(5)
VM_R_ADQSA#(6)
VM_R_ADQSA#(7)
VM_R_ODTA0
VM_R_ODTA1
DDR_CLKA0
DDR_CLKA1
DDR_CLKA0#
DDR_CLKA1#
DDR_RASA0#
DDR_RASA1#
DDR_CASA0#
DDR_CASA1#
DDR_CSA0_0#
DDR_CSA1_0#
DDR_CKEA0
DDR_CKEA1
DDR_WEA0#
DDR_WEA1#
MEM_RST
13-,51-,52-,53-,54-
AA26
AA29
AC26
AD31
AE29
AE30
AE31
AA11
AA14
AA17
AA20
AD14
AF12
AF14
AD16
AD18
AH25
AK31
AL30
U511-5
F28
G26
G29
G30
G31
H29
J25
J26
L26
L29
L30
L31
M26
M29
P26
R29
R30
R31
T26
U29
V26
Y26
Y29
Y30
Y31
A13
A2
C18
A24
A30
AA1
AA6
AC2
AC7
AE3
AL4
AE6
AG2
AE9
AK1
AJ6
AL2
B1
C13
PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
CORE GND
ATI_M62S_BGA_632P
Part 5 of 6
PCI-Express GND
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
B25
J8
B5
D11
C17
C22
C27
D29
C3
C6
D3
D28
F29
D4
F11
F12
F14
F16
F18
F20
F21
F23
F25
F7
F9
G3
G6
H23
J3
J4
J6
K1
L12
L15
L18
L21
L6
M11
M14
M17
M20
M6
P12
P15
P18
P21
P6
AC21
R14
R17
R20
T6
U1
U12
U15
U18
U21
AE20
V14
V17
V20
P2
V6
W2
Y12
Y15
Y18
Y21
Y6
M9
1
2
R568
1
56_5%
C570
470pF_50v
52-,54-
52-,54-
2
DDR_CLKA1# DDR_CLKA1#
DDR_CLKA1 DDR_CLKA1
52-,54-
52-,54-
R565
12
56_5%
Layou Note: Put these resisters close to the V-RAM.
R542
12
56_5%
C538
1
2
470pF_50v
52-,53-
52-,53-
DDR_CLKA0# DDR_CLKA0#
DDR_CLKA0 DDR_CLKA0
52-,53-
52-,53-
R559
12
56_5%
CHANGE by
INVENTEC
TITLE
DDD Discrete
SIZE
CODE
31-Jan-2007Thomas Ho
A3
DOC. NUMBER REV
CS
SHEET OF
52 55
A01Model_No

VM_R_AA(12:0)
52-,53-,54-
VM_R_A_BA0
VM_R_A_BA1
+V1.8S
U7
VM_R_ADA(11)
VM_R_ADA(15)
VM_R_ADA(9)
VM_R_ADA(12)
VM_R_ADA(14)
VM_R_ADA(8)
VM_R_ADA(13)
VM_R_ADA(10)
VM_R_ADA(19)
VM_R_ADA(21)
VM_R_ADA(16)
VM_R_ADA(20)
VM_R_ADA(22)
VM_R_ADA(17)
VM_R_ADA(23)
VM_R_ADA(18)
VM_R_ADQSA(1)
VM_R_ADQSA#(1) VM_R_ADQSA(3)
VM_R_ADQSA(2)
VM_R_ADQSA#(2) VM_R_ADQSA(0)
VM_R_ADQM#(1)
VM_R_ADQM#(2)
DDR_CSA0_0#
DDR_RASA0#
DDR_CASA0#
DDR_WEA0#
DDR_CKEA0
VM_R_ODTA0
52-,53-,54-
52-,53-,54-
DDR_CLKA0
DDR_CLKA0#
52525252525252525252525252525252-
5252- 525252-
5252-
52-,5352-,5352-,5352-,5352-,5352-,53-
VM_R_AA(0)
VM_R_AA(1)
VM_R_AA(2)
VM_R_AA(3)
VM_R_AA(4)
VM_R_AA(5)
VM_R_AA(6)
VM_R_AA(7)
VM_R_AA(8)
VM_R_AA(9)
VM_R_AA(10)
VM_R_AA(11)
VM_R_AA(12)
52-,5352-,53-
H3
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
LDQS
LDQS#
UDQS
UDQS#
LDM
UDM
CS#
RAS#
CAS#
WE#
CKE
ODT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
CK
CK#
VREF
VDDL
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
NC
NC
NC
H1
H9
H7
G2
F9
F1
G8
D7
D3
C8
B1
D1
D9
C2
B9
F7
E8
B7
A8
F3
B3
L8
K7
L7
K3
K2
K9
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
L2
L3
J8
K8
INF_HYB18T256161BF_TFBGA_84P
13-,51-,52-,53-,54-
A1
E1
J9
M9
R1
C542
1
2
C561
0.1uF_16v
+V1.8S
1
2
1uF_6.3v
13-,51-,52-,53-,54-
1
R560
4.99K_1%
2
1
R558
4.99K_1%
2
C543
+V1.8S
L1
12
BLM11A221S
13-,51-,52-,53-,54-
VM_R_AA(12:0)
52-,53-,54-
VM_R_A_BA0
VM_R_A_BA1
A3
E3
J3
N1
P9
J2
A2
E2
L1
R3
R7
R8
J1
1
J7
2
0.1uF_16v
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VM_R_ADA(30)
VM_R_ADA(24)
VM_R_ADA(29)
VM_R_ADA(26)
VM_R_ADA(25)
VM_R_ADA(31)
VM_R_ADA(27)
VM_R_ADA(28)
VM_R_ADA(6)
VM_R_ADA(1)
VM_R_ADA(4)
VM_R_ADA(3)
VM_R_ADA(2)
VM_R_ADA(5)
VM_R_ADA(0)
VM_R_ADA(7)
VM_R_ADQSA#(3)
VM_R_ADQSA#(0)
VM_R_ADQM#(3)
VM_R_ADQM#(0)
DDR_CSA0_0#
DDR_RASA0#
DDR_CASA0#
DDR_WEA0#
DDR_CKEA0
VM_R_ODTA0
52-,53-,5452-,53-,54-
DDR_CLKA0
DDR_CLKA0#
VM_R_AA(0)
VM_R_AA(1)
VM_R_AA(2)
VM_R_AA(3)
VM_R_AA(4)
VM_R_AA(5)
VM_R_AA(6)
VM_R_AA(7)
VM_R_AA(8)
VM_R_AA(9)
VM_R_AA(10)
VM_R_AA(11)
VM_R_AA(12)
52-,5352-,5352-,5352-,5352-,5352-,53-
52-,5352-,53-
52525252525252525252525252525252-
525252-
5252-
F9
F1
G8
G2
H1
H9
H7
H3
C2
D3
D9
D1
B1
C8
B9
D7
F7
E8
B7
A8
F3
B3
L8
K7
L7
K3
K2
K9
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
L2
L3
J8
K8
INF_HYB18T256161BF_TFBGA_84P
U507
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
LDQS
LDQS#
UDQS
UDQS#
LDM
UDM
CS#
RAS#
CAS#
WE#
CKE
ODT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
CK
CK#
VREF
VDDL
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
+V1.8S
1
0.1uF_16v
2
13-,51-,52-,53-,54-
C564
1
0.1uF_16v
2
C563
+V1.8S
13-,51-,52-,53-,54-
1
2
1
2
1
C565
2
1uF_6.3v
R564
4.99K_1%
R562
4.99K_1%
+V1.8S
L504
12
BLM11A221S
13-,51-,52-,53-,54-
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VDD
A3
VSS
E3
VSS
J3
VSS
N1
VSS
P9
VSS
J2
A2
NC
E2
NC
L1
NC
R3
NC
R7
NC
R8
NC
J1
J7
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
+V1.8S
13-,51-,52-,53-,54-
C589
1
2
0.1uF_16v
C544
1
2
0.01uF_16v
C151
1
2
10uF_6.3v
C590
1
2
0.1uF_16v
C114
1
2
1uF_6.3v
C113
1
2
0.1uF_16v
C562
1
2
0.1uF_16v
C101
1
2
10uF_6.3v
+V1.8S
13-,51-,52-,53-,54-
C541
1
2
0.1uF_16v
C540
1
2
0.01uF_16v
C103
1
2
10uF_6.3v
C98
1
0.1uF_16v
2
C99
1
2
1uF_6.3v
C100
1
2
0.1uF_16v
C539
1
2
0.01uF_16v
INVENTEC
TITLE
DDD Discrete
SIZE CODE DOC. NUMBER REV
A3
CHANGE by OF
2-Jun-2007Thomas Ho
CS
SHEET
C102
1
2
10uF_6.3v
53 55
A01Model_No

+V1.8S
U508
H9
LDQ0
LDQ1
LDQ2
LDQ3
LDQ4
LDQ5
LDQ6
LDQ7
UDQ0
UDQ1
UDQ2
UDQ3
UDQ4
UDQ5
UDQ6
UDQ7
LDQS
LDQS#
UDQS
UDQS#
LDM
UDM
CS#
RAS#
CAS#
WE#
CKE
ODT
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
BA0
BA1
CK
CK#
VREF
VDDL
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
NC
NC
NC
NC
NC
NC
G2
F9
H1
F1
G8
H3
H7
B9
B1
C8
D3
D9
D1
D7
C2
F7
E8
B7
A8
F3
B3
L8
K7
L7
K3
K2
K9
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
L2
L3
J8
K8
INF_HYB18T256161BF_TFBGA_84P
52-,53-,54-
52525252525252525252525252525252-
52525252-
5252-
52-,5452-,5452-,5452-,5452-,5452-,54-
VM_R_AA(0)
VM_R_AA(1)
VM_R_AA(2)
VM_R_AA(3)
VM_R_AA(4)
VM_R_AA(5)
VM_R_AA(6)
VM_R_AA(7)
VM_R_AA(8)
VM_R_AA(9)
VM_R_AA(10)
VM_R_AA(11)
VM_R_AA(12)
52-,53-,5452-,53-,54-
52-,5452-,54-
VM_R_ADA(37)
VM_R_ADA(34)
VM_R_ADA(39)
VM_R_ADA(32)
VM_R_ADA(33)
VM_R_ADA(38)
VM_R_ADA(35)
VM_R_ADA(36)
VM_R_ADA(55)
VM_R_ADA(50)
VM_R_ADA(54)
VM_R_ADA(48)
VM_R_ADA(51)
VM_R_ADA(53)
VM_R_ADA(49)
VM_R_ADA(52)
VM_R_ADQSA(4)
VM_R_ADQSA#(4)
VM_R_ADQSA(6)
VM_R_ADQSA#(6)
VM_R_ADQM#(4)
VM_R_ADQM#(6)
DDR_CSA1_0#
DDR_RASA1#
DDR_CASA1#
DDR_WEA1#
DDR_CKEA1
VM_R_ODTA1
VM_R_AA(12:0)
VM_R_A_BA0
VM_R_A_BA1 VM_R_A_BA0
DDR_CLKA1
DDR_CLKA1#
13-,51-,52-,53-,54-
A1
E1
J9
M9
R1
C115
1
2
C568
0.1uF_16v
1
2
+V1.8S
C116
1uF_6.3v
13-,51-,52-,53-,54-
1
R567
4.99K_1%
2
1
R566
4.99K_1%
2
L2
12
BLM11A221S
+V1.8S
13-,51-,52-,53-,54-
VM_R_AA(12:0)
A3
E3
J3
N1
P9
J2
A2
E2
L1
R3
R7
R8
J1
1
J7
0.1uF_16v
2
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VM_R_ADA(58)
VM_R_ADA(63)
VM_R_ADA(57)
VM_R_ADA(61)
VM_R_ADA(60)
VM_R_ADA(56)
VM_R_ADA(62)
VM_R_ADA(59)
VM_R_ADA(43)
VM_R_ADA(46)
VM_R_ADA(40)
VM_R_ADA(45)
VM_R_ADA(44)
VM_R_ADA(41)
VM_R_ADA(47)
VM_R_ADA(42)
VM_R_ADQSA(7)
VM_R_ADQSA#(7)
VM_R_ADQSA(5)
VM_R_ADQSA#(5)
VM_R_ADQM#(7)
VM_R_ADQM#(5)
DDR_CSA1_0#
DDR_RASA1#
DDR_CASA1#
DDR_WEA1#
DDR_CKEA1
VM_R_ODTA1
VM_R_A_BA1
DDR_CLKA1
DDR_CLKA1#
52-,53-,54-
52525252525252525252525252525252-
52525252-
5252-
52-,5452-,5452-,5452-,5452-,5452-,54-
VM_R_AA(0)
VM_R_AA(1)
VM_R_AA(2)
VM_R_AA(3)
VM_R_AA(4)
VM_R_AA(5)
VM_R_AA(6)
VM_R_AA(7)
VM_R_AA(8)
VM_R_AA(9)
VM_R_AA(10)
VM_R_AA(11)
VM_R_AA(12)
52-,53-,5452-,53-,54-
52-,5452-,54-
U8
F9
LDQ0
H1
LDQ1
F1
LDQ2
G8
LDQ3
H3
LDQ4
G2
LDQ5
H9
LDQ6
H7
LDQ7
D7
UDQ0
C2
UDQ1
B9
UDQ2
D3
UDQ3
D1
UDQ4
D9
UDQ5
B1
UDQ6
C8
UDQ7
F7
LDQS
E8
LDQS#
B7
UDQS
A8
UDQS#
F3
LDM
B3
UDM
L8
CS#
K7
RAS#
L7
CAS#
K3
WE#
K2
CKE
K9
ODT
M8
A0
M3
A1
M7
A2
N2
A3
N8
A4
N3
A5
N7
A6
P2
A7
P8
A8
P3
A9
M2
A10
P7
A11
R2
A12
L2
BA0
L3
BA1
J8
CK
K8
CK#
INF_HYB18T256161BF_TFBGA_84P
VREF
VDDL
VSSDL
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
A1
VDD
E1
VDD
J9
VDD
M9
VDD
R1
VDD
A3
VSS
E3
VSS
J3
VSS
N1
VSS
P9
VSS
J2
A2
NC
E2
NC
L1
NC
R3
NC
R7
NC
R8
NC
J1
J7
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
+V1.8S
1
C596
0.1uF_16v
2
13-,51-,52-,53-,54-
C566
1
2
0.1uF_16v
1
2
+V1.8S
C595
1uF_6.3v
13-,51-,52-,53-,54-
1
R561
4.99K_1%
2
1
R563
4.99K_1%
2
L507
12
BLM11A221S
+V1.8S
13-,51-,52-,53-,54-
+V1.8S
13-,51-,52-,53-,54-
C160
1
0.1uF_16v
2
C159
1
2
0.01uF_16v
C545
1
2
10uF_6.3v
C600
1
0.1uF_16v
2
1
2
C601
1uF_6.3v
C158
1
0.1uF_16v
2
C602
1
2
0.1uF_16v
C546
1
2
10uF_6.3v
+V1.8S
13-,51-,52-,53-,54-
C106
1
0.1uF_16v
2
C569
1
2
0.01uF_16v
C104
1
2
10uF_6.3v
C547
1
0.1uF_16v
2
C118
1
2
1uF_6.3v
C117
1
0.1uF_16v
2
C567
1
2
0.01uF_16v
C105
1
2
10uF_6.3v
INVENTEC
TITLE
SIZE CODE DOC. NUMBER REV
CHANGE by SHEET OF
Thomas Ho 2-Jun-2007
A3
DDD Discrete
Model_No A01
CS
5554