Inventec Bandit M2 HD+ 6050A2514101 Schematic

THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTEC
CORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE OR
IN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUT
WRITTEN PERMISSION,INVENTEC CORPORATION, ALL RIGHT RESERVED.

8

7 6 5 4 3 2 1

2012

HSF Property:ROHS or Halogen-Free

E

D

FF

E

BANDIT M2 HD+

D

MV BUILD

2013.01.04

C

B

A

2012/09/10 2012-ECO-017507 A

DATE CHANGE NO.

8

REV

7 6 5 4 3

DRAWER

DESIGN

CHECK

RESPONSIBLE

SIZE=
FILE NAME:
P/N

XXX
XXX
XXX
XXX

A3

BANDIT-MB-1310A2514101

6050A2514101

21-OCT-2002
21-OCT-2002
21-OCT-2002

POWER

IRAY CHEN

IRAY CHEN

IRAY CHEN
IRAY CHEN

2

21-OCT-200221-OCT-2002
21-OCT-2002
21-OCT-2002
21-OCT-2002

VER:

C

B

A

DATEDATEEE

A02

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

ULTRABOOK MAIN BOARD

CODE

SIZE

A3

1310xxxxx-0-0

CS

SHEET

DOC.NUMBER REV

of

80

1

1

X01

8 7

6 5

4

3 2 1

D

1. PROJECT NAME

2. TABLE OF CONTENTS

3. BLOCK DIAGRAM

4. SYSTEM POWER FLOW

5. SYSTEM POWER(CHARGER)

6. SYSTEM POWER(BATT SELECTOR)

7. SYSTEM POWER(OCP)

8. SYSTEM POWER(P3V3A&P5V0A)

8. SYSTEM POWER(P5V0A _CHG

10. SYSTEM POWER(P1V5)

11. SYSTEM POWER(P1V05M)

12. SYSTEM POWER(P1V05S)

13. SYSTEM POWER(P1V8S)

B

14. SYSTEM POWER(PVSA)

15. SYSTEM POWER(PVCORE1)

16. SYSTEM POWER(PVCORE2)

17. POWER TEST POINT

18. POWER PAD

19. POWER(SLEEP)

20. POWER(SEQUENCE)

21. XDP CONN

22. FAN & THERMAL

TABLE OF CONTENTS

23. IVY BRIDGE_1 (CLK,MISC,JTAG)

24. IVY BRIDGE_2 (POWER)

25. IVY BRIDGE_3 (DMI,DP,PEG,FDI)

26. IVY BRIDGE_4 (DDR3)

27. IVY BRIDGE_5 (GRAPHICS POWER)

28. IVY BRIDGE_6 (GND,RESERVED)

29. DDR3_SO-DIMM0

30. DDR3_SO-DIMM1

31. PANTER POINT_1 (HDA,JTAG,SPI,SATA)

32. PANTER POINT_2 (PCI-E,SMBUS,CLK)

33. PANTER POINT_3 (DMI,FDI,GPIO)

34. PANTER POINT_4 (LVDS,DDI)

35. PANTER POINT_5 (PCI,USB,NVRAM)

36. PANTER POINT_6 (GPIO,VSS_NCFT,RSVD)

37. PANTER POINT_7 (POWER)

38. PANTER POINT_8 (POWER)

39. PANTER POINT_9 (GND)

40. CRT / DISPLAY PORT CNTR

41. LCM & WEBCAM

42. SATA & MSATA CNTR

43. USB CNTR & USB CHARGER

44. FINGER PRINTER CNTR

47. KEYBOARD

48. TPM

49. LAN INTERFACE

50. LAN RJ45 CNTR

51. WLAN

52. WWAN & SIM CARD

53. DOCKING CNTR

54. STICK POINT & B2B CNTR

55. CODEC

56. EXT MIC AMP

57. JACK & USB3 CNTR

58. CARD READER

59. BUTTON LED

60. SMART VARD & LED DB

61. MIC DB

62. SCREW

63. EMI & RF SOLUTION

64. SYSTEM SEQUENCE

D

CC

B

AA

45. ACCELEMETOR

46. KBC / SPI

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

TABLE OF CONTENTS

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

2

1

DOC.NUMBER

CODE

REV

X01

80

8 7

PRIMARY LI-LON BATTERY

6 5

4

3 2 1

SECOND LI-LON BATTERY

D

CRT

THERMAL SENSOR

SMSC_EMC1412

LED PANEL

R.G.B

LVDS

IVY BRIDGE

ULV BGA1023

31MM X 24MM

ACCELEROMETER

1666MT/S

1666MT/S

DDR3_SODIMM

DDR3_SODIMM

SATA0

HDD(GEN3)

D

ST_HP3DC2TR

DISPLAY PORT

DISPLAY PORT X 2

FDI/DMI

DDP

SATA

HDA

AUDIO CODEC

IDT 92HD91WC

SATA2
MSATA

CC

(DOCKING)

PCH

USB3.0

PANTHER POINT QM77

MEDIA CARD CONTROLLER

B

RJ45

PCIE3

PCIE4
WLAN

PCIE6

GBE PHY

INTEL 82579LM

PCIE

LPC

KBC

SMSC 1126

25MM X 25MM

TPM1.2

SLB9635

USB2.0

USB0 - DOCKING

USB1 - CHARGER

USB2 - RIGHT 1

USB5 - BLUETOOTH

USB7 - SMART CARD

USB8 - FINGER

USB1 - DOCKING

B

USB2 - LEFT

USB3 - RIGHT 1
USB4 - RIGHT 2

AA

TOUCH PAD

SPI 16MB

USB3 - RIGHT2

USB10 - CAMERA

POINT STICKKEYBOARD

USB12- WWAN

DOCKING CONNECTOR

LINE IN/LINE OUT

8

7 6

RJ-45USB3.0 PORT X 4

5 4

DP1.2

VGA

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

BLOCK DIAGRAM

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

80

3

1

REV

X01

8 7

LIMIT_SIGNAL

D

6 5

ADP_EN

OCP

ICS

OCP_OC#

4

ADP_PRES
KBC_PW_ON
SLP_S3#_3R

EN0

5/3.3V

(TPS51123)

3 2 1

P5V0A_CHG

P3V3ALW
P5V0AL

P3V3AL

SLP_S3#_3R

SLP_S3#_3R

SLP_S3#_3R

PM_SLP_A_#

RICHTEK

8086AZQW

TPS51463

AO6402AL

P1V8S

PVSA

P5V0S

D

P1V05M

RICHTEK

8086AZQW

P3V3S

P3V3A

CC

ADAPTER

(65W)

CHARGER

BQ24736

CHARGER_DAT

CHARGER_CLK

SPWON

EN_P3V3A

AO6402AL

FDC638APZ

2ND BATTERY

PVBAT

MAIN BATTERY

DDR3 / 1.5V

SLP_LAN#

WWWAM_OFF

FDC638APZ

FDC638APZ

P3V3M

PVSIM

DDR3L/1.35V

SLP_S4#_3R

B

P1V8S

SLP_S3#_3R

8

7 6

GMT

G966A

P1V5S_LDO

5 4

KBC_GPIO22
SLP_S4#_KBC

EN_VCCP

EN_CPU

TPS51216

VCCP

TPS51219

IMVP VI

ISL95833

CHANGE by

P1V5

VCCP_PG

PVAXG

PVCORE

VGATE

XXX

FDMS7692SPWON

P1V5S

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

BLOCK DIAGRAM POWER

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

4

1

REV

X01

80

8 7

7

Q6010

IN

17

1

1

2

2

3

3

45

45

C6019

R6017

2 1

2 1

220K_5%_2

0.1UF_16V_2

100K_5%_2

1

Q6009

1

R6015

2
3

DS

G

2

48

ADP_DET

PVADPTR P3V3ALP5V0S

OUT

VADPBL

D S

8

8

7

7

6

6

FAIR_FDMC4435BZ_8P

G

D

48

ADP_EN

SSM3K7002FU

B

PVADPTR

C6017

C6018

2 1

100PF_50V_2

2 1

1000PF_50V_2

4.3K_5%_2

R6028

2 1

L6015

NFE31PT222Z1E9L

OUT

21

Q6019

R6021

127K_1%

2 1

3

DS

G

R6023

2 1

2

R6022

1M_5%_2

C6022

2 1

20K_1%_2

R6029

18.2K_1%_2

2 1

R6030

10K_1%_2

2 1

2 1

2 1

1SS355VMTE_17

48

CHG_RST

D6018

IN

SSM3K7002FU

1

R6024

21

ACDET>0.6V:SMBUS OK
ACDET>2.4V&<3.1V:ACOK

100PF_50V_2

7

ICS

48

CHR_ILIM

7

V_3.9K

48

CHARGER_DAT

CHARGER_CLK

7

8

7 6

6 5

21

4

3

C6015

C6016

2 1

2 1

100PF_50V_2

1

S

2
3
4 5

G

NMOS_4D3S

21

D6017

BAT54WS

AON7410

4.3K_5%_2

R6018

2 1

17

PVBAT_IN

TI_BQ24736RGRR_QFN_20P

22K_5%_2

C6049

2 1

100PF_50V_2

OUT

BI
BI

IN
IN

R6049

0_5%_2

IN

D6015

1000PF_50V_2

Q6011

PVADPTR_IN

1

1

3

3

FAIR_FDMC4435BZ_8P

8

D

7
6

IN

U6000

6
7
8
9

10

C6048

2 1

0.01UF_50V_2

21

65

17

CN6000

1

1

2
3

2

2

4
5
6

OUT

SEM_SM24_SOT23_3 P

G

4 5

4 5

3

3

2

2

1

1

DS

Q6012

R6000

0.01_1%_6

C6028

0.1UF_16V_2

2
3
4
5
6

ACES_50224_0060N_001_6P

6
7
8

G
G

LIMIT_SIGNAL

PVPACK

6
7
8

21
43

21

G1
G2

21

ACDET
IOUT
SDA
SCL
ILIM

C6029

1UF_25V_3

5

3

ACPRES

ACDRV

CMSRC

DLIM

SRN

SRP

13

12

11

C6030

2 1

CSC0402_DY

48

9

VADP_DEBUG

214

ACP

ACN

PHASE

LODRV

GND

15

14

HIDRV

BTST

REGN

1UF_25V_3

21

TML

20

VCC

19
18
17
16

C6025

2 1

1UF_10V_2

C6047

2 1

0.01UF_50V_2

5 4

55

7

C6027

2 1

R6026

0_5%_2

D6016

2 1

BAT54WS

R6025

0_5%_2

4

IN

21

0.047UF_16V_2

21

R6027

2 1

R6020

0_5%_2

10_5%_5

C6026

3 2 1

D

PVBAT

12

PAD6015

2 1

POWERPAD_2_0610

IN

678

Q6000

D

AON7410 AON7410

NMOS_4D3S

G

C6000

C6001

2 1

2 1

10UF_25V_5

S

3

214 5

10UF_25V_5

21

678

Q6001

D

NMOS_4D3S

G

S

3

214 5

R7600

2 1

C7600

CSC0402_DY

2 1

RSC_0603_DY

PVBAT_CHG

L6000

ETQP3W4R7WFN

PVPACK

R6001

0.02_1%_6

C6023

21
43

D6049

C6011

21

C6010

2 1

2 1

10UF_25V_5

10UF_25V_5

B0530W_7

2 1

C6021

2 1

0.1UF_25V_2

21

0.1UF_16V_2

C6024

2 1

0.1UF_25V_2

21

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

5

1

REV

X01

80

8 7

6 5

4

3 2 1

D

B

48

48

LATCHED_ALARM

FET_A

OUT

D

P3V3AL

D7504

12

PVPACK

SBR3M30P1_7

Q6050

1

1

2

2

3

3

4 5

4 5

FAIR_FDMC4435BZ_8P FAIR_FDMC4435BZ_8P

21

Q6051

DS

8
7
6

G

D S

8

8

7

7

6

6

1

8

2

7

3

6

45

G

R6064

470K_5%_2

2 1

D6050

3

2 1

D6058

BAV99W_7_F

R6097

0_5%_2

R6099

100_5%_2

21

21

IN

OUT

MFET_A

IN

MFET_B

2

5

2N7002DW

1
2
3
45

Q6053

G1

G2

PVBATA

48

48

SDA_MAIN

SCL_MAIN

R6052

2K_1%_2

2 1

BI
BI

R6079

2 1

220K_5%_2

65

R6080

0_5%_2

2 1

1

S1

6

D1

3

D2

4

S2

R6050

2K_1%_2

2 1

R6051

100_5%_2

R6053

100_5%_2

C7500

2 1

100PF_50V_2

21
21

2 1

R6057

1K_5%_2

P3V3AL

2 1

R6058

C7501

PHP_PESD5V0S1BB_SOD523_2P

21

2 1

C7503

100K_5%_2

OUT

12

2 1

100PF_50V_2

2 1

P3V3AL

21

100PF_50V_2

D7503

MAIN_BAT_DET#

D7505

C7524

PHP_PESD5V0S1BB_SOD523_2P

R6055

3

BAV99W_7_F

12

2 1

100PF_50V_2

2 1

2 1

100_5%_2

OUT

BATTERY OCP PWM#

48

D7506

21

C7502

G2

PHP_PESD5V0S1BB_SOD523_2P

G1

OCP_MAIN#

0.1UF_25V_2

CN6050

G2
G1
8 POWER

8

7 POWER

7

6

6

5

5

4

4

3

3

2 GND

2

1 GND

1

FOX_BP0208C_B25AAD1_9H_8P

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

6

of

1

DOC.NUMBER

CODE

REV

X01

80

8 7

5

17

VADPBL

IN

6 5

R6933

21

255K_1%_2

4

3 2 1

P5V0AL P3V3AL

D

5

ICS

R6931

2 1

200K_1%_2

R6930

2 1

41.2K_1%_3

C6906

R6934

22K_5%_2

2 1

IN

R6913

46.4K_1%_2

21

C6900

2 1

IN

V+

3
2

2 1

CSC0402_DY

2VREF

+IN

+

-

-IN
V-

4 8

7

U6903

OUT

TI_LMV393IDGKR_SOP_8P

8 9

0.22UF_6.3V_2

21

R6935

47K_5%_2

1

OUT

ADP_PRES

48

D

P5V0S

U6902

IN+

VEE

C6904

1UF_10V_2

D6902

BAV70W_7_F

3

21

P5V0S

5

VCC

C6903

43

OUTPUTIN-

2 1

0.1UF_16V_2

CC

R6919

2K_5%_2

2 1

21

R6920

21

665K_1%_2

R6922

21

20

200K_1%_2

1

2

R6924

2 1

200K_1%_2

R6923

2 1

R6918

Q6902

2

21

S

LES_LBSS84LT1G_SOT23_3P

1

BCD_AZV321KTR_E1_SOT23_5P

1M_1%_2

3

D

G

OUT

CURRENT_ADC

2 1

VBIAS

V_3.9K

OUT

IN

IN

OUT

IN

IN

R6925

118K_1%_2

2 1

R6921

118K_1%_2

100_5%_2

OCP_MAIN#

48

OCP_TRAVEL#

LIMIT_SIGNAL_100R

20

55

LIMIT_SIGNAL

20

5

B

PVPACK

IN

2VREF

7 8 9

P3V3AL

20

P3V3AL

R6916

2 1

R6914

2 1

47K_5%_2

P5V0AL

R6928

R6929

8

7 6

R6927

0_5%_2

200K_1%_264.9K_1%_2

R6997

2 1

3

Q6999

DS

SSM3K7002FU

2

2 1

5
6

V+

U6903

+IN

+

OUT

-

-IN
V-

TI_LMV393IDGKR_SOP_8P

4 8

C6905

2 1

0.1UF_16V_2

39.2K_1%_2

1

G

2 1

2 1

R6926

1M_5%_2

7

R6932

2 1

21

100K_5%_2

48

OUT

LATCHED_ALARM

5 4

CHR_ILIM

OUT

CHANGE by

C6902

2 1

3.9K_5%_2

LMBT3904WT1G

R6915

3900PF_16V_2

C E

Q6901

XXX

R6917

100_5%_2

2 1

OUT

2 1

100K_5%_2

1

B

23

D6901

UDZV4.7B

2 1

OCP_A_IN

48

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

DOC.NUMBER

CODE

DATE

21-OCT-2002

23

SIZE

A3

CS

1310xxxxx-0-0

SHEET

7

of

80

1

REV

X01

B

AA

8 7

6 5

4

3 2 1

D

VRP3V3A

P3V3ALW

B

OUT

OCP=7AMP

PAD6100

2

POWERPAD_2_0610

12

6.8K_1%_2

10K_1%_2

VO=((6.8K/10K)+1)*2

1

R6122

R6121

EN_5V

EN_3V

IN
IN
IN

VRP5V0A_VIN

9

D

PVBAT

12

POWERPAD_2_0610

6465

89

IN

VBATP

21

21

C6100

2 1

PAD6110

2 1

R6120

75K_1%_2

2 1

R6119

OUT

75K_1%_2

2 1

2VREF

7209

TON=3.3V:300KHZ/375KHZ

OUT

Q6100

C6110

2 1

L6100

ETQP3W3R3WFN ETQP3W3R3WFN

2 1

CSC0805_DY

21

5 4

S2 D1

10UF_25V_5

6

S2

7

S2

8

G2

9

PH

FAIR_FDMS7620S_8P

C6111

10

D1

Q2

3

D1

2

D1

1

G1

Q1

VRP3V3A_HG
VRP3V3A_PH
VRP3V3A_LG

C6113

0.1UF_16V_2

R6114

21

21

25

TML

7 24

VO2 VO1

8

VREG3

9 22

VBST2

10 21

DRVH2

11 20

LL2

12 19

DRVL2

1

4

3

5

2

TONSEL

TRIP2

VREF

VFB1

VFB2

SKIPSEL

VREG5

GND

EN0

VIN

R7610

14

17

16

15618

R6111

13

2 1

1UF_25V_3

2 1

4.7_5%_3

+

150UF_6.3V

2 1

P3V3AL

C7610

2 1

0.0015UF_50V_2

PAD6103

1 2

POWERPAD1X1M

21

VRP3V3_LDO

4.7UF_6.3V_3

330K_5%_2_DY

C6103

2 1

C6114

2 1

TRIP1

23

PGOOD

VBST1

DRVH1

DRVL1

ENC

TI_TPS51123RGER_QFN_24P

VRP5V0_LDO

LL1

2.2_5%_22.2_5%_2

U6100

2 1

POWERPAD1X1M

C6112

C6105

2 1

10UF_6.3V_3

0.22UF_6.3V_2

R6109

PAD6105

21

12

C6108

0.1UF_16V_2

P5V0AL

21

VRP5V0A_HG

VRP5V0A_LG

18

5V_PG

FAIR_FDMS7620S_8P

10

D1

Q2

3

D1

2

D1

1

G1

Q1

Q6150

S2D1

S2

S2

G2
PH

VRP5V0A_PH

C6161

54

2 1

6

10UF_25V_5

7
8

9

R7615

RSC_0603_DY

2 1

C7615

CSC0402_DY

2 1

6465

CSC0805_DY

VBATP

8 9

OUT

VRP5V0A

IN

C6160

2 1

CC

OCP=7AMP

P5V0A_CHG

POWERPAD_2_0610

21

15.4K_1%_2

R6117

21

10K_1%_2

R6118

PAD6150

1 2

21

B

L6150

21

+

C6150

2 1

150UF_6.3V

VO=((15.4K/10K)+1)*2

SKIP:OOA=3.3V; PWM=2VREF; AUTO=GND

SKIP_5V_3V

20

EN_5V_3V

IN
IN

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

8

of

1

DOC.NUMBER

CODE

REV

X01

80

8 7

6 5

4

3 2 1

PVADPTR

8 7

20

R6197

R6105

2 1

D

C6198

2 1

100PF_50V_2

49.9K_1%_2

576K_1%_3

21

C6109

R6104

2 1

2 1

49.9K_1%_2

0.22UF_6.3V_2

OUT

VOLTAGE_ADC

48

2VREF

IN

R6116

20K_5%_2

21

U6102

1

IN+

2

VEE

BCD_AZV321KTR_E1_SOT23_5P

R6107

100K_1%_2

R6115

200K_1%_2

5

VCC

43

OUTPUTIN-

21

P5V0AL

C6115

10UF_6.3V_3

2 1

OUT

48

ADC_VREF_1126

D

2 1

CC

P3V3AL

R6101

D6100

21

21

1SS355VMTE_17

R6102

48

KBC_PWR_ON

IN

B

21

0_5%_2

C6102

Q6102

S1

2

G1

D1
D2

5

G2

S2

2N7002DW

2 1

0.015UF_10V_2

100K_5%_2

2 1

1
6

3
4

R6199

0_5%_2_DY

R6195

47_5%_2

OUT

EN_P3V3A

21

OUT

EN_3V

P3V3A

21

18

8

65

8

64

VRP5V0A_VIN

VBATP

IN

OUT

21

21

D6102

1SS355VMTE_17

D6101

2 1

PANJIT_MMSZ5252A

PVBATA

R6113

100_5%_3

D6104

21

BAV70W_7_F

3

21

PVADPTRPVBATB

21

21

D6105

1SS355VMTE_17

48

OUT

VADP_DEBUG

B

Q7351

G

CSC0402_DY

21

R7352

C7350

P5V0AP5V0A_CHG

D

8

8

7

7

6

6

5

5 4

AA

2 1

212019

57554845423527

18

SLP_S3#_3R

20

EN_5V_3V

R6126

P5V0AL

SHORT_0402_5

P3V3AL

R6106

R6198

21

0_5%_2

C6199

21

OUT

21

100K_5%_2

R6100

100K_5%_2_DY

2 1

0.1UF_16V_2

SKIP_5V_3V

RSC_0402_DY

21

4

R6103

P3V3AL

21

5

U6104

I0

O

I1

GND VCC

3

TOSHIBA_TC7SZ32FU_SSOP_5P

1
2

R6110

R6108

0_5%_2_DY

21
21

0_5%_2

IN
IN
IN

48

KBC_PWR_ON

CPPWR_EN

KBC_GPIO51

KBC_PWR_ON

4845

48

R7350

100K_5%_2

2 1

R7351

21

Q7350

S1

2

48

IN

G1

5

G2

2N7002DW

D1
D2

S2

0_5%_2

1
6

3
4

S

1

1

2

2

3

3

4

FAIR_FDMC6675BZ_8P

C7351

2 1

100_5%_2

10UF_6.3V_3

IN

IN

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

9

of

1

DOC.NUMBER

CODE

REV

X01

80

8 7

MEM_1V5-> HI DDR-> 1.35V
MEM_1V5-> LOW DDR-> 1.5V

D

18

EN_0V75

1821

3545

SLP_S4#_3R

18

EN_1V5

DDR3L_SEL

B

48

MEM_1V5

IN

R6211

2 1

IN
IN
IN
IN

VOUT=REFIN=1.8*(52.3K/(10K+52.3K))
MODE=100KOHM:TRACKING DISCHARGE

R6210

R6204

RSC_0402_DY

0_5%_2

R6207

2 1

52.3K_1%_2

1

21

Q6202

200K_5%_2

C6212

2 1

R6208

2 1
3

DS

G

2

21

2 1

10K_1%_2

0.01UF_50V_2

71.5K_1%_2

SSM3K7002FU

R6206

OUT

DDR3L_SEL

P5V0A_CHG

6 5

4

3 2 1

D

PVBAT

C6205

1512
14

VRP1V5_HG

13

VRP1V5_PH

11

VRP1V5_LG

10
20
9
2
3
1

4
5
21

P0V75S

2.2_5%_3

P0V75M_VREF

C6207

2 1

10UF_6.3V_3

R6205

C6208

2 1

21

0.1UF_16V_2

0.22UF_6.3V_2

C6204

3
2

1

21

2 1

2.2UF_6.3V_3

U6200

VBSTV5IN

17

S3

16

S5

6

VREF

8

REFIN

7

GND

19

MODE

C6209

2 1

0.1UF_16V_2

R6202

18

TRIP

R6203

TI_TPS51216RUKR_QFN_20P

2 1

2 1

100K_5%_2

30.1K_1%_2

DRVH

SW

DRVL

PGND

PGOOD

VDDQSNS

VLDOIN

VTT

VTTSNS

VTTGND

VTTREF

TML

Q6200

FAIR_FDMS3668S_8P

D1

Q2

D1

D1

PHASE

G1

Q1

TML

54

S2

S2

S2

G2

C6210

6
7

C6211

2 1

2 1

10UF_25V_5

10UF_25V_5

OUT

VRP1V5

8
9

L6200

21

1 2

43

3 4

PAN_ETQP3W1R0WFN_4P

R7620

2 1

RSC_0603_DY

C7620

2 1

CSC0402_DY

C6200

PAD6200

1 2

POWERPAD_2_0610

+

2 1

330UF_2V_9MR_PANA_-35%

21

OCP=12AMP

P1V5

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8010

8 7

6 5

4

3 2 1

D

13

VRP1V8_1V05IN

VRP1V8_1V05IN

IN

B

IN

OUT

VRP1V05_LAN_M

C6410

2 1

R6402

10_5%_2

2 1

10UF_6.3V_3

RICHTEK_RT8068AZQW_WDFN_10P

U6400

11

TML

10 1

9
8
7
6 5

LX

PVIN

LX

PVIN

LX

SVIN

PGOOD

NC

EN

FB

VRP1V05_LAN_M_PH

2
3
4

IN

C6401

2 1

0.1UF_16V_2

VOUT=((7.68K/10K)+1)*0.6

L6400

PAN_ELL5PR2R2N

18

EN_P1V05

PAD6400

21

POWERPAD_2_0610

R6400

2 1

C6400

C6403

2 1

2 1

7.68K_1%_2

CSC0402_DY

22UF_6.3V_5

1 2

21

R6401

10K_1%_2

2 1

OCP=4.5AMP

P1V05M

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

11

of

1

DOC.NUMBER

CODE

REV

X01

80

8 7

6 5

4

3 2 1

D

D

MODE=100KHZ:300KHZ

18

EN_VCCP

20

VCCP_PG

26

VCCIO_SEL

26

VSS_SENSE_VTT

26

C6308

2 1

2.2UF_6.3V_3

VTT_SENSE

R6305

0_5%_2

2 1

B

C6320

R6308

2 1

2 1

11.3K_1%_2

0.01UF_50V_2

VOUT=2*11.3/(10+11.3)=1.06V

IN

OUT

IN
IN
IN

R6306

21

0_5%_2_DY

TI_TPS51219RTER_QFN_16P

1
2
3
4

C6307

0.01UF_50V_2

R6304

2 1

100K_1%_2

21

0.1UF_16V_2

P5V0A

C6305

2 1

C6304

2.2UF_6.3V_3

21

3
2
1

Q6300

FAIR_FDMS3668S_8P

D1

Q2

D1

D1

PHASE

G1

Q1

TML

54

S2

6

S2

7

S2

8

G2

9

R6302

17

16815

14

13

BST

SW

DH

DL

V5

2.2_5%_3

12

VRP1V05S_VCCP_PH

11

VRP1V05S_VCCP_HG

10

VRP1V05S_VCCP_LG

9

U6300

VREF

REFIN

GSNS

VSNS

EN

MODE

PWPD

PGOOD

TRIP

GND

COMP

5

PGND

6

7

21

R6301

2 1

41.2K_1%_2

PVBAT

CC

C6310

C6311

2 1

2 1

10UF_25V_5

CSC0805_DY

L6300

21

1 2

43

3 4

CYN_PCMB063T_R68MS_4P

R7630

2 1

RSC_0603_DY

C7630

CSC0402_DY

2 1

+

C6300

2 1

OUT

VRP1V05S_VCCP

PAD6300

1 2

POWERPAD_2_0610

OCP=15AMP

P1V05S_VCCP

21

B

330UF_2V_9MR_PANA_-35%

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8012

8 7

6 5

4

3 2 1

D

D

P5V0A_CHG

PAD6971

21

1 2

POWERPAD_2_0610

VRP1V8_1V05IN

IN

R6970

C6975

2 1

10UF_6.3V_3

10_5%_2

2 1

C6972

2 1

0.1UF_16V_2

B

13

OUT

VRP1V8_1V05IN

U6970

11

TML

10 1

PVIN

9

PVIN

8

SVIN

7

NC

6 5

FB

RICHTEK_RT8068AZQW_WDFN_10P

PGOOD

LX
LX
LX

EN

VRP1V8S_PH

2
3
4

PAN_ELL5PR2R2N

OUT

P1V8S_PG

IN

EN_1V8

VOUT=((20.5K/10K)+1)*0.6

L6970

21

20

18

R6973

R6972

OUT

VRP1V8S

OCP=4.5AMP

P1V8S

CC

PAD6970

21

1 2

POWERPAD_2_0610

C6970

C6974

2 1

20.5K_1%_2

10K_1%_2

2 1

2 1

2 1

CSC0402_DY

22UF_6.3V_5

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8013

8 7

6 5

4

3 2 1

D

P5V0A_CHG

C6510

2 1

0.1UF_16V_2

C6505

21

0.01UF_50V_2

2 1

C6506

0.1UF_16V_2

VRPVSA_PH

21

IN

EN_PVCCSA

0_5%_2

R6506

2 1

RSC_0402_DY

L6500

1 2

3 4

CYN_PCMB063T_R33MS_4P

CHOKE_4PIN_2PIN

C6550

0.22UF_6.3V_2

TML
VIN
VIN
VIN
PGND
PGND
PGND

2 1

R6500

2 1

1

3

2

GND

VREF

COMP

U6500

V5FILT

V5DRV

PGOOD

1817161514

3300PF_50V_2

5.1K_1%_2

654

SLEW

VOUT

MODE

SW
SW
SW
SW
SW

BST

VID0

VID1

EN

13

R6501

RSC_0402_DY

TI_TPS51463RGER_QFN_24P

7
8
9
10
11
12

C6504

2 1

25
24
23
22
21

C6511

2 1

22UF_6.3V_5

20
19

P5V0A

R6502 SHORT FOR REMOTE SENSE
R6506 SHORT FOR LOCAL SENSE

R6502

21

21
43

IN

VCCSA_SENSE

C6500

2 1

2 1

27

C6501

2 1

C6502

22UF_6.3V_522UF_6.3V_522UF_6.3V_5

OUT

VRPVSA

PAD6500

1 2

POWERPAD_2_0610

OCP=7AMP

PVSA

21

B

C6503

C6509

2 1

1UF_6.3V_2

C6508

2 1

1UF_6.3V_2

CSC0402_DY

21

27

27

20

OUT

IN
IN

VCCSA_VID0

VCCSA_VID1

VCCSA_PG

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8014

8 7

6 5

4

3 2 1

IN

GFX_VSS_SENSE

IN

2 1

C6740

470PF_50V_2

OUT
OUT

GFX_VCC_SENSE

R6742

2.61K_1%_2

VRPVAXG_PH1

VRPVAXG_LG1

OUT

VRPVCORE_LG1

OUT

VRPVCORE_PH1

OUT

VRPVCORE_HG1

OUT

VRPVCORE_BOOT1

OUT

CORE_PG

C6743

CSC0402_DY

R6737

619_1%_2

21

C6742

21

C6741

21

21

CSC0402_DY0.01UF_50V_2

16

VSUMNG

R6743

21

C6733

2 1

IN

0.1UF_16V_2

RSC_0402_DY

D

R6735

10K_5%_NTC

16

VSUMPG

2 1
21

R6734

IN

21

R6732

27.4K_1%_2

21

R6733

470K_5%_NTC

21

R6632

27.4K_1%_2

21

R6633

470K_5%_NTC

2.61K_1%_2

R6736

R6731

3.83K_1%_2

R6631

3.83K_1%_2

2 1

21

21

B

11K_1%_2

VR_SVID_CLK

VR_SVID_ALERT#

VR_SVID_DATA

CPU_PROCHOT#

C6734

2 1

EN_CPU

26

26

P5V0A

C6735

2 1

0.01UF_50V_2

29

30

32

U6600

FBG

1

NTCG

2

IN
OUT
OUT
OUT
OUT

23

VR_ON

3

SCLK

4

ALERT#

5

SDA

6

VR_HOT#

7

NTC

8

ISEN2

PAD

33

RTNG

ISUMPG

ISUMNG

ISUMP

ISEN1

9

10 31

COMPG

ISUMN

FB

RTN

13 28

12

11

16

20

VRPVAXG_BOOT1

AXG_PG

VRPVAXG_HG1

OUT

OUT

OUT

25

27

BOOTG

PHASEG

UGATEG

PGOODG

LGATEG

VCCP

VDD

PWM2

LGATE1

PHASE1

UGATE1

PGOOD

COMP

BOOT1

INTERSIL_ISL95833HRTZ_T_TQFN_32P

142616

15

24
23
22
21
20

19
18
17

21

2 1

R6741

499_1%_2

18

27

2 1

R6740

2K_1%_2

2 1

267K_1%_2

R6739

330PF_50V_2

150PF_50V_2

C6737

47PF_50V_2

C6739

2 1

C6738

21

21

R6738

21

154K_1%_2

D

P5V0A

P1V05S_VCCP

21

R6626

SHORT_0402_5

21

R6625

C6626

2 1

1UF_6.3V_2

SHORT_0402_5

C6625

2 1

1UF_6.3V_2

R6697

130_1%_2

R6696

54.9_1%_2

21

21

OUT

OUT

26

VR_SVID_DATA

26

VR_SVID_CLK

CC

B

C6640

2 1

470PF_50V_2 33PF_50V_2

C6641

C6642

R6642

1.96K_1%_2

21

21

16

16

8

VSUMP

VSUMN

IN

R6634

2 1

2.61K_1%_2

R6636

2 1

R6635

2 1

IN

10K_5%_NTC

C6634

11K_1%_2

2 1

0.1UF_16V_2 0.1UF_16V_2

C6633

2 1

0.1UF_16V_2

7 6

R6643

649_1%_2

C6635

2 1

2200PF_50V_2

R6637

21

649_1%_2

21

C6643

2200PF_50V_2

21

CSC0402_DY

0.01UF_50V_2

5 4

R6641

499_1%_2

21

IN

IN

21

VCCSENSE

VSSSENSE

CHANGE by

26

2 1

R6639

267K_1%_2

2 1

R6640

2K_1%_2

XXX

C6637

21

C6638

150PF_50V_2

C6639

330PF_50V_2

21

21

DATE

R6638

42.2K_1%_2

21-OCT-2002

23

21

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

DOC.NUMBER

CODE

SIZE

A3

CS

1310xxxxx-0-0

SHEET

AA

REV

of

X01

8015

1

VRPVCORE_BOOT1

D

VRPVCORE_HG1

VRPVCORE_PH1

VRPVCORE_LG1

8 7

IN

C6621

0.22UF_25V_3

PAD6610

21

POWERPAD_2_0610

65

16

VBATR_CPU

R6621

2.2_5%_3

IN

IN
IN

21

IN

PVBAT

FDMS7692

FDMS0300S

6 5

12

2 1

678

Q6610

D

NMOS_4D3S

G

G

3

678

3

C6610

2 1

S

214 5

Q6611

D

R7661

RSC_0603_DY

2 1

S

C7661

214 5

CSC0402_DY

2 1

C6611

2 1

0.1UF_25V_3

10UF_25V_5

PVCORE

L6610

21
43

470UF_2V

C6600

1

1

C6601

+

+

470UF_2V

3

2

3

2

VRPVAXG_BOOT1

15

15

VSUMP

VSUMN

OUT

OUT

R6611

3.65K_1%_2

R6612

1_5%_2

ETQP4LR36AFM

21

21

VRPVAXG_HG1

VRPVAXG_PH1

VRPVAXG_LG1

4

65

16

VBATR_CPU

POWERPAD_2_0610

VBATR_GPU

R6721

2.2_5%_3

IN

0.22UF_25V_3

21

IN
IN
IN

3 2 1

IN

12

PAD6710

IN

C6721

2 1

678

FDMS7692

21

FDMS0306AS

Q6710

D

NMOS_4D3S

G

3

214 5

+

C6710

15UF_25V

2 1

S

678

Q6711

D

R7671

4.7_5%_30.00 15UF_50V_2

G

2 1

S

3

2145

C7671

2 1

15

VSUMPG

VSUMNG

OUT

OUT

R6711

3.65K_1%_2

R6712

1_5%_2

ETQP4LR36AFM

21

21

L6710

21
43

470UF_2V

C6700

PVAXG

1

+

2

D

CC

3

B

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8016

8 7

6 5

4

3 2 1

D

PVBAT_IN

65

PVADPTR_IN

IN

B

VADPBL

IN

PVPACK PVBATB

IN

TP6039

1

TP30

TP6040

1

TP30

TP6041

1

TP30

TP6007

1

TP30

1

TP30

1

TP30

PVADPTR

1

TP30

1

TP30

1

TP30TP30

TP6002

TP6003

TP6004

TP6005

TP6006

TP6001

1

TP6008

1

TP30

TP6009

1

TP30

TP6010

1

TP30

1

TP30

1

TP30

1

TP30

PVBAT PVBATA

TP6011

1

TP30

TP6012

1

TP30

TP6013

1

TP30

1

TP30

1

TP30

1

TP30

TP6014

TP6015

TP6016

P5V0A_CHG

TP6017

TP6018

P3V3ALW PVSA

TP6019

P5V0AL

TP6020

1

TP30

TP6021

1

1

TP30

TP30

P3V3AL

TP6022

P5V0A

TP6023

1

TP30

P1V05M

TP6025

1

TP30

1

TP40

TP6026

1

P1V05S_VCCP

1

P1V8S

TP7351

1

TP30

1

P1V5

TP6024

1

TP30

TP6027

1

TP30

1

TP6028

TP30

TP6029

TP30

TP6030

TP30

TP6031

TP30

PVAXG

1

TP30

PVCORE

1

TP30

P0V75S

1

TP30

P0V75M_VREF

1

TP30

TP6032

TP6033

TP6037

TP6038

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8017

8 7

21

D7680

1SS355VMTE_17

35

55

57

35

D

45

48

45485742

10
21

23

SLP_S3#_3R

9

SLP_S4#_3R

KBC_GPIO22

21
19

PM_SLP_A#

20
48

35

IN

IN

IN

SHORT_0402_5

1819

20

21

27

R7680

1K_5%_2

R7683

21

21

A2A1

D7681

21

20K_5%_2

BAT54C

3

C

21

R7681

C7683

2 1

6 5

21

C7680

2 1

0.1UF_16V_2

R7682

21

21

SHORT_0402_5

R7690

20K_1%_2

OUT

EN_P1V05

11

OUTIN

OUT

OUT

EN_0V75

SLP_S4#_KBC

EN_1V5

4

10

3 2 1

P3V3S

R7687

1K_5%_2

R7688

R7689

21

21

CORE_PG

21

1815

15

D

15

18

CORE_PG

4855

10

35

VGATE

33

2348820

PWR_GOOD_3 EN_CPU

IN

IN OUT

SHORT_0402_5

IN OUT

SHORT_0402_5

CC

R6125

IN OUT

5V_PG

SHORT_0402_5

21

RSMRST#

483533

0.1UF_16V_2_DY

R7684

R7685

0_5%_2

21

C7684

2 1

21

454855

SLP_S3#_3R

21

2742 35

20

1819

SHORT_0402_5

9

B

45 42 35485557

SLP_S3#_3R

202127

19 18

IN

9

OUTIN

EN_VCCP

CSC0402_DYCSC0402_DY

OUT

C7685

2 1

CSC0402_DY

EN_1V8

12

P3V3ALW

P3V3AL

C7200

0.1UF_16V_2

2 1

R7200

100K_5%_2

21

EN_P3V3A

13

IN

PAD7200

1 2

POWERPAD1X1M_DY

Q7200

4

S

3 6

G

PMOS_4D1S

TPC6111

P3V3A

21

B

TP7201

1

1

D

2

TP30

5

C7201

10UF_6.3V_3

2 1

57

55 48 45

42

8

SLP_S3#_3R

27351920

21

R7686

IN

SHORT_0402_5

9

18

21

OUT

EN_PVCCSA

14

AA

C7686

2 1

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

POWER SEQUENCE

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

1

REV

X01

8018

8 7

6 5

4

3 2 1

REFERENCE NUMER : 7000~7350

P3V3S P5V0A_CHG P1V5S

S

G

1

P5V0A

G

MAX 3.3A

TP7051

1

4

TP30 TP30 TP30

36

19

CSC0402_DY

R7050

C7050

C7060

47_5%_2

2 1

10UF_6.3V_3

SSM3K7002FU

2 1

0.1UF_16V_2

Q7051

R7004

R7005

2 1

3

DS

G

2

2 1

100K_5%_2

2 1

200K_5%_2

3

DS

SSM3K7002FU

2

D

B

35

SLP_S3#_3R

9

20
21

27

42

45

48

55

57

Q7050

1

D

2
5

NMOS_4D1S

AO6402AL

19

C7102

2 1

Q7002

SLP_S3#_3R

IN

19

18

1

OUT

1

B

Q7000

MMBT3906

Q7100

1

D

2
5

AO6402AL

SLP_S3_5R

23

Q7001

C E

MMBT3906

23

B

CE

NMOS_4D1S

1

Q2971 WHETHER CAN CHANGE TO

6015B0017101 PMV65XP OR NOT

P0V75S

P5V0SP3V3ALW

MAX 2.8A MAX 7.5A

1

4

S

36

G

19

TP6035

P1V5

Q7151

8

D

7
6

NMOS_4D3S

FDMS7692

INININ

SPWONSPWONSPWON

1

1

S

2
3
45

G

TP6036

Q7152

1

R7151

2 1
3

DS

G

SSM3K7002FU_DY

22_5%_2_DY

2

C7103

2 1

R7100

CSC0402_DY

C7100

100_5%_5

2 1

2 1

10UF_6.3V_3

3

Q7101

DS

1

G

SSM3K7002FU

2

23

SPWON

100K_5%_2_DY

19

C7000

2 1

0.1UF_25V_2

2

D7000

BAV99W_7_F

3

1

OUT

R7001

R7002

2 1

2 1

124K_1%_2

2 1

R7003

61.9K_1%_2

C7150

2 1

CSC0402_DY

R7150

C7151

220_5%_5

2 1

2 1

10UF_6.3V_3

3

Q7150

DS

1

G

SSM3K7002FU

2

P1V05M

21

R2973

3

Q2974

DS

1

G

2

21

35 48

20

PM_SLP_A#

18

IN

SSM3K7002FU

100K_5%_2

Q2973

1

R2974

G

P5V0A

2 1
3

DS

2

47_5%_2

SSM3K7002FU

1

21

Q7153

G

SLP_LAN#

35
19

48

C2975

P1V8S

R7152

2 1
3

DS

SSM3K7002FU

2

10UF_6.3V_3

2 1

22_5%_2

SLP_LAN#

IN

SSM3K7002FU

C2976

10UF_6.3V_3

2 1

Q2970

1

P3V3ALW

P3V3ALW

G

4

S

3 6

G

PMOS_4D1S

TPC6111

C2970

2 1

CSC0402_DY

R2971

47K_5%_2

2 1

3

DS

2

Q2971

1

D

2
5

R2970

2 1

330K_5%_2

1

SSM3K7002FU

Q2972

1

G

TP2971

TP30

P3V3M

R2972

2 1
3

DS

2

D

C2971

47_5%_2

2 1

10UF_6.3V_3

CC

B

AA

VRP5V0A_PH

IN

R7000

10_5%_2

C7001

21

0.01UF_50V_2

21

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

POWER(SLEEP)

REFERENCE NUMER : 2950~2999

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

A3

CODE

CS

DOC.NUMBER

1310xxxxx-0-0

SHEET

of

1

REV

X01

8019

8 7

6 5

4

3 2 1

PVADPTR

LIMIT_SIGNAL_100R

REFERENCE NUMER : 7400~7450

P5V0S

R7405

21

SLP_S3#_3R

IN

IN

IN

76.8K_1%_2

R7416

11.5K_1%_2

R7415

3.3K_5%_2

21

R7417

3.3K_5%_2

R7414

3.3K_5%_2

21

R7411

22.6K_1%_2

49.9K_1%_2

R7402

RSC_0402_DY

R7400

3.3K_5%_2

R7425

3.3K_5%_2

R7413

R7410

89

7

2VREF

20

21

21

21

D7414

2VREF

IN

34.8K_1%_2

C7402

2 1

21

1000PF_50V_2

R7407

21

1M_5%_2

P3V3S

P5V0A

5
6

R7406

P5V0A

3
2

V+

U7400

+IN

+

-

-IN
V-

4 8

V+

+IN

+

-

-IN
V-

4 8

7

OUT

TI_LMV393IDGKR_SOP_8P

21

1M_5%_2

C7400

0.1UF_16V_2

U7400

1

OUT

TI_LMV393IDGKR_SOP_8P

R7418

2 1

21

C7403

2 1

RSC_0402_DY

2 1

R7409

0_5%_2

3300PF_50V_2

R7408

0_5%_2

C7401

3300PF_50V_2

21

R7412

2 1

49.9K_1%_2

21

3

BAT54A

21

21

21

21

21

R7401

27.4K_1%_2

R7404

2 1

3.3K_5%_2

PWR_GOOD_3

21

48

VCCSA_PG

14

D

18

9

SLP_S3#_3R

57

45
42

55 27

19

20

21

20

M_PWROK

3335

IN

35

IN

M_PWROK

IN

P1V5S

P3V3S

15

AXG_PG

12

VCCP_PG

13

P1V8S_PG

P0V75S

R6902

2 1

R6903

2 1

130K_1%_2 220K_5%_2

OUT

7

OUT

VBIAS

PWR_GOOD_3

20

7

18

4823

IN

R6910

8.06K_1%_2

2 1

LES_LMBT3906WT1G_SOT323_3P

R6909

2 1

R6904

2 1

45.3K_1%_2 8.66K_1%_2

P3V3AL

1

BASE

Q6900

2 3

EMITTER COLLECTOR

OUT

ADP_A_ID

48

D

CC

B

20

89 7

2VREF

19

18

20

35
48

21

IN

PM_SLP_A#

2VREF

IN

REFERENCE NUMER : 2950~2999

8

R2950

41.2K_1%_3

PM_SLP_A#

21

C2950

2 1

P3V3M

R2951

2 1

1000PF_50V_2

R2959

46.4K_1%_2

71.5K_1%_2

P1V05M

R2958

14.7K_1%_2

R2957

21

3.3K_5%_2

D2951

7 6

B

AMBIENT TEMP SENSE

21

4

R2956

1M_5%_2

C2951

P3V3A

21

21

R2954

3.3K_5%_2

2 1

M_PWROK

R2961

1K_1%_2

2 1

OUT

M_PWROK

332035

R2953

1M_5%_2

P5V0A

52

U2950

21

21

3

BAT54A

R2955

21

0_5%_2

R2960

C2952

2 1

2 1

86.6K_1%_2

3300PF_50V_2

21

1
3

+

+

OUT

-

-

AZV331KTR_E1

0.068UF_10V_2

5 4

P5V0S

0.1UF_16V_2

CHANGE by

R2962

150_1%_2

C4411

21

21

XXX

U2951

5 1

VCC SET

2

GND

34

OTHYST

GMT_G708T1U_SOT23_5P

75 DEG. => 36 KOHM

110 DEG. => 10 KOHM

DATE

36K_1%_3

21-OCT-2002

23

R2963

21

IN

EN_5V_3V

8

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

POWER(SEQUENCE)

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

9

DOC.NUMBER

AA

REV

of

X01

8020

1

8 7

6 5

4

3 2 1

D

D

CC

P3V3A

CN4921

ENTERY_3703K_Q08N_11R_8P_DY

1

SLP_S3#_3R
SLP_S4#_3R
SLP_S5#_3R

PM_SLP_A#

55

61

49

ON_OFF#

48 35

19

SLP_LAN#

B

IN
IN
IN
IN

IN
IN

ME DEBUG

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

G1

G1

G2

G2

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

XDP CONN

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8021

8 7

6 5

4

3 2 1

REFERENCE NUMBER:4400~4349

P3V3S

D

48

PWM_3S_FAN#

22

THERM#

P5V0S

20 MILS

U4300

5

+

1

IN

2

-

3

TC7SET00F

4

R4300

22_5%_2

TACH_FAN_IN_1126

21

48

C4300

2 1

R4301

0_5%_2

2 1

OUTIN

CN4300

1

1

2
3
4

ACES_50271_0040N_001_4P

G

2

G

3
4

G1
G2

0.1UF_16V_2_DY

D

CC

REFERENCE NUMBER:4450~4499

THERM SENSOR

P3V3S

B

H_THERMDA
H_THERMDC

OUT

THERM#

22

1

B

C E

Q4450

MMBT3904

2200PF_50V_2

C4451

23

R4453

2 1

21

2.2K_5%_2

SMSC_EMC1412_1_ACZL_TR_MSOP_8P

C4450

2 1

0.1UF_16V_2

U4450

1

2
3

SMCLK

VDD

SMDATA

DP

ALERT#

DN

GNDTHERM#/ADDR

R4452

0_5%_2

2 1

8
7
6
54

OUT

BI
BI

THERM_CLK
THERM_DATA

THERM_SCI#

47

34

47

34
38

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

FAN & THERMAL

REFERENCE NUMBER:4411~4449

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

A3

CODE

CS

DOC.NUMBER

1310xxxxx-0-0

SHEET

22

of

1

REV

X01

80

8 7

6 5

P1V8S

4

3 2 1

U4500

R4535

1K_5%_2_DY

2 1

P1V05S_VCCP

SNB_IVB#

38

OUT

D

CLOSE U6600

R4531

62_5%_2

CPU_PROCHOT#

1523

IN

P3V3S

200_1%_2

35

PM_DRAM_PWRGD

IN

NXP_74LVC2G07GW_SC88A_6P

B

18

48

20

PWR_GOOD_3

IN

2 1

C4697

2 1

47pF_50V_2

P3V3A

R4529

2 1

U4502

1Y1A

VCCGND

2Y2A

0.1UF_16V_2

61
52
43

C4605

2 1

P1V5S

C4523

2 1

1UF_6.3V_2

R4528

39_5%_2_DY

2 1

3

Q4505

DS

1

G

SSM3K7002FU_DY

50

2

37

BUF_PLT_RST#

48
53
54
60

38

H_PWRGD

R4527

200_1%_2

2 1

IN

NXP_74LVC1G07GW_TSSOP_5P

38

IN

SLP_S3_5R

IN

P3V3S

C4688

2 1

1

5

0.1UF_16V_2

U4607

NC

+

48

KBC_PROCHOT

IN

R4607

100K_5%_2

2

2 1

-

TC7SZ05F

3

4

R4539

R4536

21

1K_5%_2

48

H_PECI

38

PM_THRMTRIP#

R4570

21

0_5%_2

19

U4501

2

1

1848

IN

CPU_PROCHOT#

2.2K_5%_2

2 1

R4540

56_5%_2

P3V3S

5

+

2

4

NC

-

3

34

H_SNB_IVB#

OUT

21

H_PROCHOT#_R

OUT

35

H_PM_SYNC

R4530

130_1%_2

P1V05S_VCCP

R4567

2 1

4

PCH_DDR_RST

KBC_GPIO22

15

23

TP1

TP24

TP4503

TP24

21

75_5%_2

R4555

43_5%_2

F49

PROC_SELECT#

1

C57

PROC_DETECT#

1

C49

CATERR#

A48

PECI

C45

PROCHOT#

D45

THERMTRIP#

TP2438

TP30

C48

PM_SYNC

1

BI

TP2439

TP30

B46

UNCOREPWRGOOD

1

TP2440

TP30

BE45

SM_DRAMPWROK

1

TP2441

TP30

D44

RESET#

1

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

21

R4571

IN

IN

R4561

21

20K_1%_2

1

SSM3K7002FU

20K_5%_2

DDR3_DRAMRST#_CPU

2 1

Q4595

G

3

DS

DDR_RST_EN

2

23

CLOCKS

JTAG & BPM MISCDDR3

PWR MANAGEMENTTHERMALMISC

P3V3AL

R4655

2 1

20K_1%_2_DY

Q4522

1

BSS138

IN

DPLL_REF_CLK

DPLL_REF_CLK#

BCLK_ITP#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

P1V5

R4563

1K_1%_2

2 1

3

DS

G

2

R4562

0_5%_2_DY

BCLK

BCLK#

BCLK_ITP

PRDY#

PREQ#

TCK
TMS

TRST#

TDI

TDO

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

XDP_DBRESET#

H_TDO

H_TMS

H_TDI

H_TRST#

H_TCK

R4564

1K_5%_2

21

J3
H2

AG3
AG1

N59
N58

IN

CLK_DMI_PCH_DP

IN

CLK_DMI_PCH_DN

1K_5%_2

1K_5%_2

21
21

R4500
R4501

XDP_BCLK_ITP_DP
XDP_BCLK_ITP_DN

34
34

TP4520
TP4521

P1V05S_VCCP

1
1

TP24
TP24

FOR IVB 2C FINAL SYMBOL MOVE TO OTHER BLOCK

AT30

BF44
BE43
BG43

TP2430

TP30

N53
N55

L56
L55
J58

M60
L59

K58

G58
E55
E59
G55
G59
H60
J59
J61

21

OUT

DDR3_DRAMRST#_CPU

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

TP2432

TP30

TP2431

TP30

1

1

1

TP2437

TP30

1

H_BPM0_XDP#
H_BPM1_XDP#
H_BPM2_XDP#
H_BPM3_XDP#
H_BPM4_XDP#
H_BPM5_XDP#
H_BPM6_XDP#
H_BPM7_XDP#

35

IN

IN
IN
IN

IN
IN

OUT

DDR3_DRAMRST#

R4551

R4552
R4553
R4554

R4556
R4557

TP2433

TP30

R4558
R4559
R4560

TP2434

TP30

TP2435

TP30

1

1

1

1

TP30

1

TP30

1

TP30

1

TP30

1

TP30

1

TP30

1

TP30

1

TP30

TP2436

TP30

21

1K_5%_2

51_5%_2

21

51_5%_2

21

51_5%_2

21

51_5%_2

21

51_5%_2

21

29
31

30

1

23

21

140_1%_2

21

25.5_1%_2

21

200_1%_2

H_PRDY#
H_PREQ#

H_TCK
H_TMS
H_TRST#

H_TDI
H_TDO

XDP_DBRESET#

TP2450
TP2451
TP2452
TP2453
TP2454
TP2455
TP2456
TP2457

P3V3S

P1V05S_VCCP

D

CC

B

AA

C4690

2 1

470PF_50V_2

8

7 6

5 4

CHANGE by

XXX

R4550

2 1

4.99K_1%_2

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU-1/6

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8023

1

REV

X01X01

8 7

6 5

4

3 2 1

U4500

35

IN

35

IN

35

IN

35

D

B

P1V05S_VCCP

R4502

24.9_1%_2

IN

35

IN

35

IN

35

IN

35

IN

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

OUT

35

IN

35

IN

35

IN

35

IN

35

IN

21

DMI_TX0_DN
DMI_TX1_DN
DMI_TX2_DN
DMI_TX3_DN

DMI_TX0_DP
DMI_TX1_DP
DMI_TX2_DP
DMI_TX3_DP

DMI_RX0_DN
DMI_RX1_DN
DMI_RX2_DN
DMI_RX3_DN

DMI_RX0_DP
DMI_RX1_DP
DMI_RX2_DP
DMI_RX3_DP

FDI_TX0_DN
FDI_TX1_DN
FDI_TX2_DN
FDI_TX3_DN
FDI_TX4_DN
FDI_TX5_DN
FDI_TX6_DN
FDI_TX7_DN

FDI_TX0_DP
FDI_TX1_DP
FDI_TX2_DP
FDI_TX3_DP
FDI_TX4_DP
FDI_TX5_DP
FDI_TX6_DP
FDI_TX7_DP

FDI_FSYNC0
FDI_FSYNC1

FDI_INT

FDI_LSYNC0
FDI_LSYNC1

CPU_EDP_COMPIO

M2

DMI_RX#[0]

P6

DMI_RX#[1]

P1

DMI_RX#[2]

P10

DMI_RX#[3]

N3

DMI_RX[0]

P7

DMI_RX[1]

P3

DMI_RX[2]

P11

DMI_RX[3]

K1

DMI_TX#[0]

M8

DMI_TX#[1]

N4

DMI_TX#[2]

R2

DMI_TX#[3]

K3

DMI_TX[0]

M7

DMI_TX[1]

P4

DMI_TX[2]

T3

DMI_TX[3]

U7

FDI0_TX#[0]

W11

FDI0_TX#[1]

W1

FDI0_TX#[2]

AA6

FDI0_TX#[3]

W6

FDI1_TX#[0]

V4

FDI1_TX#[1]

Y2

FDI1_TX#[2]

AC9

FDI1_TX#[3]

U6

FDI0_TX[0]

W10

FDI0_TX[1]

W3

FDI0_TX[2]

AA7

FDI0_TX[3]

W7

FDI1_TX[0]

T4

FDI1_TX[1]

AA3

FDI1_TX[2]

AC8

FDI1_TX[3]

AA11

FDI0_FSYNC

AC12

FDI1_FSYNC

U11

FDI_INT

AA10

FDI0_LSYNC

AG8

FDI1_LSYNC

AF3

eDP_COMPIO

AD2

eDP_ICOMPO

AG11

eDP_HPD

AG4

eDP_AUX#

AF4

eDP_AUX

AC3

eDP_TX#[0]

AC4

eDP_TX#[1]

AE11

eDP_TX#[2]

AE7

eDP_TX#[3]

AC1

eDP_TX[0]

AA4

eDP_TX[1]

AE10

eDP_TX[2]

AE6

eDP_TX[3]

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

Intel(R) FDIDMI

DP

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PCI EXPRESS -- GRAPHICS

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

G3
G1
G4

H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7

K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6

G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4

F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4

CPU_PEG_ICOMPI

IN
IN
IN
IN
IN
IN
IN
IN

IN
IN
IN
IN
IN
IN
IN
IN

PEG_TX0_DN
PEG_TX1_DN
PEG_TX2_DN
PEG_TX3_DN
PEG_TX4_DN
PEG_TX5_DN
PEG_TX6_DN
PEG_TX7_DN

PEG_TX0_DP
PEG_TX1_DP
PEG_TX2_DP
PEG_TX3_DP
PEG_TX4_DP
PEG_TX5_DP
PEG_TX6_DP
PEG_TX7_DP

24.9_1%_2

72

PEG_RX0_C_DN

72

PEG_RX1_C_DN

72

PEG_RX2_C_DN

72

PEG_RX3_C_DN

72

PEG_RX4_C_DN

72

PEG_RX5_C_DN

72

PEG_RX6_C_DN

72

PEG_RX7_C_DN

72

PEG_RX0_C_DP

72

PEG_RX1_C_DP

72

PEG_RX2_C_DP

72

PEG_RX3_C_DP

72

PEG_RX4_C_DP

72

PEG_RX5_C_DP

72

PEG_RX6_C_DP

72

PEG_RX7_C_DP

C4837
C4838
C4839
C4840
C4841
C4842
C4843
C4844

C4853
C4854
C4855
C4856
C4857
C4858
C4859
C4860

R4503

21

21
21
21
21
21
21
21
21

21
21
21
21
21
21
21
21

P1V05S_VCCP

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

72

PEG_TX0_C_DN

72

PEG_TX1_C_DN

72

PEG_TX2_C_DN

72

PEG_TX3_C_DN

72

PEG_TX4_C_DN

72

PEG_TX5_C_DN

72

PEG_TX6_C_DN

72

PEG_TX7_C_DN

72

PEG_TX0_C_DP

72

PEG_TX1_C_DP

72

PEG_TX2_C_DP

72

PEG_TX3_C_DP

72

PEG_TX4_C_DP

72

PEG_TX5_C_DP

72

PEG_TX6_C_DP

72

PEG_TX7_C_DP

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU-2/6

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

24

1

DOC.NUMBER

CODE

REV

X01X01

80

8 7

6 5

4

3 2 1

U4500

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

OUT
OUT
OUT

OUT
OUT
OUT

M_B_DQ<0>
M_B_DQ<1>
M_B_DQ<2>
M_B_DQ<3>
M_B_DQ<4>
M_B_DQ<5>
M_B_DQ<6>
M_B_DQ<7>
M_B_DQ<8>
M_B_DQ<9>
M_B_DQ<10>
M_B_DQ<11>
M_B_DQ<12>
M_B_DQ<13>
M_B_DQ<14>
M_B_DQ<15>
M_B_DQ<16>
M_B_DQ<17>
M_B_DQ<18>
M_B_DQ<19>
M_B_DQ<20>
M_B_DQ<21>
M_B_DQ<22>
M_B_DQ<23>
M_B_DQ<24>
M_B_DQ<25>
M_B_DQ<26>
M_B_DQ<27>
M_B_DQ<28>
M_B_DQ<29>
M_B_DQ<30>
M_B_DQ<31>
M_B_DQ<32>
M_B_DQ<33>
M_B_DQ<34>
M_B_DQ<35>
M_B_DQ<36>
M_B_DQ<37>
M_B_DQ<38>
M_B_DQ<39>
M_B_DQ<40>
M_B_DQ<41>
M_B_DQ<42>
M_B_DQ<43>
M_B_DQ<44>
M_B_DQ<45>
M_B_DQ<46>
M_B_DQ<47>
M_B_DQ<48>
M_B_DQ<49>
M_B_DQ<50>
M_B_DQ<51>
M_B_DQ<52>
M_B_DQ<53>
M_B_DQ<54>
M_B_DQ<55>
M_B_DQ<56>
M_B_DQ<57>
M_B_DQ<58>
M_B_DQ<59>
M_B_DQ<60>
M_B_DQ<61>
M_B_DQ<62>
M_B_DQ<63>

M_B_BS0
M_B_BS1
M_B_BS2

M_B_CAS#
M_B_RAS#
M_B_WE#

30
30
30

U4500

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

OUT
OUT
OUT

OUT
OUT
OUT

M_A_DQ<0>
M_A_DQ<1>
M_A_DQ<2>
M_A_DQ<3>
M_A_DQ<4>
M_A_DQ<5>
M_A_DQ<6>
M_A_DQ<7>
M_A_DQ<8>
M_A_DQ<9>
M_A_DQ<10>
M_A_DQ<11>
M_A_DQ<12>
M_A_DQ<13>
M_A_DQ<14>
M_A_DQ<15>
M_A_DQ<16>
M_A_DQ<17>
M_A_DQ<18>
M_A_DQ<19>
M_A_DQ<20>
M_A_DQ<21>
M_A_DQ<22>
M_A_DQ<23>
M_A_DQ<24>
M_A_DQ<25>
M_A_DQ<26>
M_A_DQ<27>
M_A_DQ<28>
M_A_DQ<29>
M_A_DQ<30>
M_A_DQ<31>
M_A_DQ<32>
M_A_DQ<33>
M_A_DQ<34>
M_A_DQ<35>
M_A_DQ<36>
M_A_DQ<37>
M_A_DQ<38>
M_A_DQ<39>
M_A_DQ<40>
M_A_DQ<41>
M_A_DQ<42>
M_A_DQ<43>
M_A_DQ<44>
M_A_DQ<45>
M_A_DQ<46>
M_A_DQ<47>
M_A_DQ<48>
M_A_DQ<49>
M_A_DQ<50>
M_A_DQ<51>
M_A_DQ<52>
M_A_DQ<53>
M_A_DQ<54>
M_A_DQ<55>
M_A_DQ<56>
M_A_DQ<57>
M_A_DQ<58>
M_A_DQ<59>
M_A_DQ<60>
M_A_DQ<61>
M_A_DQ<62>
M_A_DQ<63>

M_A_BS0
M_A_BS1
M_A_BS2

M_A_CAS#
M_A_RAS#
M_A_WE#

29
29

D

29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29

B

29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29

29
29
29

29
29
29

AG6

AP11

AJ10

AR11

AP6
AU6
AV9
AR6
AP8

AT13

AU13

BC7

BB7
BA13
BB11

BA7

BA9

BB9

AY13
AV14
AR14

AY17
AR19
BA14
AU14
BB14
BB17
BA45
AR43

AW48

BC48
BC45
AR45

AT48

AY48
BA49
AV49
BB51

AY53
BB49
AU49
BA53
BB55
BA55
AV56
AP50
AP53
AV54

AT54
AP56
AP52
AN57
AN53
AG56
AG53
AN55
AN52
AG55
AK56

BD37

BF36
BA28

BE39
BD39
AT41

SA_DQ[0]

AJ6

SA_DQ[1]
SA_DQ[2]

AL6

SA_DQ[3]
SA_DQ[4]

AJ8

SA_DQ[5]

AL8

SA_DQ[6]

AL7

SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

SA_CLK[0]

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AU36

M_CLK_DDR0_DP

AV36

M_CLK_DDR0_DN

M_CKE0

AY26

AT40

M_CLK_DDR1_DP

AU40

M_CLK_DDR1_DN

M_CKE1

BB26

M_CS#0

BB40

M_CS#1

BC41

M_ODT0

AY40

M_ODT1

BA41

AL11

M_A_DQS0_DN

AR8

M_A_DQS1_DN

AV11

M_A_DQS2_DN

AT17

M_A_DQS3_DN

AV45

M_A_DQS4_DN

AY51

M_A_DQS5_DN

AT55

M_A_DQS6_DN

AK55

M_A_DQS7_DN

AJ11

M_A_DQS0_DP

AR10

M_A_DQS1_DP

AY11

M_A_DQS2_DP

AU17

M_A_DQS3_DP

AW45

M_A_DQS4_DP

AV51

M_A_DQS5_DP

AT56

M_A_DQS6_DP

AK54

M_A_DQS7_DP

M_A_A<0>

BG35

M_A_A<1>

BB34

M_A_A<2>

BE35

M_A_A<3>

BD35

M_A_A<4>

AT34

M_A_A<5>

AU34

M_A_A<6>

BB32

M_A_A<7>

AT32

M_A_A<8>

AY32

M_A_A<9>

AV32

M_A_A<10>

BE37

M_A_A<11>

BA30

M_A_A<12>

BC30

M_A_A<13>

AW41

M_A_A<14>

AY28

M_A_A<15>

AU26

OUT
OUT
OUT

OUT
OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

30
30
30
30
30

29

30

29

30

29

30
30
30
30
30
30

29

30

29

30

29

30
30
30
30
30
30

29

30

29

30
30
30
30
30
30

29

30

29

31
31
31
31
31
31

29

31

29

31

29

31

29

31

29

31

29

31

29

31

29

31
31
31
31
31
31
31

29

31

29

31

29

31

29

31

29

31

29

31

29

31

29

31
31
31
31
31

29

31

32

30

29

31

32

30

29

31

32

30

29
29
29
29

31

32

30

29

31

32

30

29

31

32

30

29
29
29
29
29
29
29

AL4

SB_DQ[0]

AL1

SB_DQ[1]

AN3

SB_DQ[2]

AR4

SB_DQ[3]

AK4

SB_DQ[4]

AK3

SB_DQ[5]

AN4

SB_DQ[6]

AR1

SB_DQ[7]

AU4

SB_DQ[8]

AT2

SB_DQ[9]

AV4

SB_DQ[10]

BA4

SB_DQ[11]

AU3

SB_DQ[12]

AR3

SB_DQ[13]

AY2

SB_DQ[14]

BA3

SB_DQ[15]

BE9

SB_DQ[16]

BD9

SB_DQ[17]

BD13

SB_DQ[18]

BF12

SB_DQ[19]

BF8

SB_DQ[20]

BD10

SB_DQ[21]

BD14

SB_DQ[22]

BE13

SB_DQ[23]

BF16

SB_DQ[24]

BE17

SB_DQ[25]

BE18

SB_DQ[26]

BE21

SB_DQ[27]

BE14

SB_DQ[28]

BG14

SB_DQ[29]

BG18

SB_DQ[30]

BF19

SB_DQ[31]

BD50

SB_DQ[32]

BF48

SB_DQ[33]

BD53

SB_DQ[34]

BF52

SB_DQ[35]

BD49

SB_DQ[36]

BE49

SB_DQ[37]

BD54

SB_DQ[38]

BE53

SB_DQ[39]

BF56

SB_DQ[40]

BE57

SB_DQ[41]

BC59

SB_DQ[42]

AY60

SB_DQ[43]

BE54

SB_DQ[44]

BG54

SB_DQ[45]

BA58
AW59
AW58

SB_DQ[46]
SB_DQ[47]
SB_DQ[48]

AU58

SB_DQ[49]

AN61

SB_DQ[50]

AN59

SB_DQ[51]

AU59

SB_DQ[52]

AU61

SB_DQ[53]

AN58

SB_DQ[54]

AR58

SB_DQ[55]

AK58

SB_DQ[56]

AL58

SB_DQ[57]

AG58

SB_DQ[58]

AG59

SB_DQ[59]

AM60

SB_DQ[60]

AL59

SB_DQ[61]

AF61

SB_DQ[62]

AH60

SB_DQ[63]

BG39

SB_BS[0]

BD42

SB_BS[1]

AT22

SB_BS[2]

AV43

SB_CAS#

BF40

SB_RAS#

BD45

SB_WE#

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

BA34

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

DDR SYSTEM MEMORY B

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

M_CLK_DDR2_DP

AY34

M_CLK_DDR2_DN

M_CKE2

AR22

1

BA36

1

BB36

1

BF27

M_CS#2

BE41

1

BE47

M_ODT2

AT43

M_ODT3

BG47

1

AL3
AV3

M_B_DQS1_DN

BG11
BD17
BG51
BA59
AT60
AK59

AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61

M_B_A<0>

BF32

M_B_A<1>

BE33

M_B_A<2>

BD33

M_B_A<3>

AU30

M_B_A<4>

BD30

M_B_A<5>

AV30

M_B_A<6>

BG30

M_B_A<7>

BD29

M_B_A<8>

BE30

M_B_A<9>

BE28

M_B_A<10>

BD43

M_B_A<11>

AT28

M_B_A<12>

AV28

M_B_A<13>

BD46

M_B_A<14>

AT26

M_B_A<15>

AU22

TP24
TP24
TP24

TP24

TP4508

TP24

TP4509

M_B_DQS0_DN

M_B_DQS2_DN
M_B_DQS3_DN
M_B_DQS4_DN
M_B_DQS5_DN
M_B_DQS6_DN
M_B_DQS7_DN

M_B_DQS0_DP
M_B_DQS1_DP
M_B_DQS2_DP
M_B_DQS3_DP
M_B_DQS4_DP
M_B_DQS5_DP
M_B_DQS6_DP
M_B_DQS7_DP

TP4505
TP4506
TP4507

OUT
OUT
OUT

OUT

OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

31

32

30
31

32

30
31

32

30

D

30

31

32

30

31

32

30
30
30
30
31
31
31
31

30
30
30
30
31
31
31
31

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

31

32

30

BI

CC

B

AA

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU-3/6

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01X01

8025

8

7 6 5 4 3 2 1

FF

U4500

PVCORE

A26

VCC[1]

A29

VCC[2]

A31

VCC[3]

A34

12

12

C4509

C4504

2 1

E

22UF_6.3V

121212

C4514

C4519

2 1

2 1

22UF_6.3V

22UF_6.3V

12

12

12

12

12

12

C4524

C4529

C4534

C4539

C4544

2 1

2 1

2 1

22UF_6.3V

2 1

22UF_6.3V

22UF_6.3V

22UF_6.3V

C4549

2 1

2 1

22UF_6.3V

22UF_6.3V

12

C4555

C4546

2 1

2 1

2 1

22UF_6.3V

22UF_6.3V

22UF_6.3V

D

C4522

C4517

C4512

C4507

C4502

2 1

2 1

2.2UF_6.3V_2

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C

C4527

C4532

C4537

C4542

C4547

C4552

C4558

C4564

2 1

2 1

2 1

2 1

2 1

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

2.2UF_6.3V_2

2.2UF_6.3V_2

2.2UF_6.3V_2

2.2UF_6.3V_2

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C4570

2 1

2.2UF_6.3V_2

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C4503

C4508

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

VCC[4]

A35

VCC[5]

A38

VCC[6]

A39

VCC[7]

A42

VCC[8]

C26

VCC[9]

C27

VCC[10]

C32

VCC[11]

C34

VCC[12]

C37

VCC[13]

C39

VCC[14]

C42

VCC[15]

D27

VCC[16]

D32

VCC[17]

D34

VCC[18]

D37

VCC[19]

D39

VCC[20]

D42

VCC[21]

E26

VCC[22]

E28

VCC[23]

E32

VCC[24]

E34

VCC[25]

E37

VCC[26]

E38

VCC[27]

F25

VCC[28]

F26

VCC[29]

F28

VCC[30]

F32

VCC[31]

F34

VCC[32]

F37

VCC[33]

F38

VCC[34]

F42

VCC[35]

G42

VCC[36]

H25

VCC[37]

H26

VCC[38]

H28

VCC[39]

H29

VCC[40]

H32

VCC[41]

H34

VCC[42]

H35

VCC[43]

H37

VCC[44]

H38

VCC[45]

H40

VCC[46]

J25

VCC[47]

J26

VCC[48]

J28

VCC[49]

J29

VCC[50]

J32

VCC[51]

J34

VCC[52]

J35

VCC[53]

J37

VCC[54]

J38

VCC[55]

J40

VCC[56]

J42

VCC[57]

K26

VCC[58]

K27

VCC[59]

K29

VCC[60]

K32

VCC[61]

K34

VCC[62]

K35

VCC[63]

K37

VCC[64]

K39

VCC[66]

K42

VCC[67]

L25

VCC[68]

L28

VCC[69]

L33

VCC[70]

L36

VCC[71]

L40

VCC[72]

N26

VCC[73]

N30

VCC[74]

N34

VCC[75]

N38

VCC[76]

CORE SUPPLY

POWER

VCCIO[1]
VCCIO[3]
VCCIO[4]
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCIO[9]
VCCIO[10]
VCCIO[11]
VCCIO[12]
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]

VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]

VCCIO50
VCCIO51

VCCIO_SEL

VCCPQE[1]
VCCPQE[2]

QUIET RAILSSVIDSENSE LINES PEG AND DDR

VIDALERT#

VIDSCLK
VIDSOUT

B

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48

AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15

W16
W17

BC22

0.4A

AM25
AN22

A44

H_CPU_SVIDALRT#

B43
C44

F43
G43

AN16
AN17

P1V05S_VCCP

C4579

2 1

1UF_6.3V_2

C4580

2 1

P1V05S_VCCP

C4601

2 1

C4501

2 1

P1V05S_VCCP

C4583

2 1

3.2A

10UF_6.3V_3

10UF_6.3V_3

1UF_6.3V_2

3.9A

C4584

C4585

C4604

C4582

1UF_6.3V_2

2 1

1UF_6.3V_2

2 1

2 1

2 1

PVCORE

R4504

2 1

R4505

2 1

C4588

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

C4562

C4556

C4550

C4545

C4540

C4535

C4530

C4600

C4596

C4592

E

C4589

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

C4610

C4607

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

C4591

C4587

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

C4516

C4613

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

C4599

C4595

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

C4521

C4526

C4528

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

D

1UF_6.3V_2 1UF_6.3V_2

C4518

C4513

C4598

C4563

C4568

C

VCCIO_SEL

21

R4506

130_1%_2

R4509

21

43_5%_2

OUT

12

P1V05S_VCCP

R4512

CLOCE U6600

75_1%_2

2 1

VR_SVID_ALERT#
VR_SVID_CLK
VR_SVID_DATA

OUT
OUT
OUT

15
15
15

B

VCCSENSE
VSSSENSE

P1V05S_VCCP

100_1%_2 100 _1%_2

OUT
OUT

15
15

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

A

8

7 6 5 4 3

R4507

10_1%_210_1%_2

2 1

VTT_SENSE
VSS_SENSE_VTT

R4508

2 1

OUT
OUT

12
12

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU-4/6

DOC.NUMBER

CHANGE by

CODE

SIZE

1310xxxxx-0-0

C

XXX

DATE

21-OCT-2002

2 1

CS

SHEET

of

26 80

REV

X01

8

7 6 5 4 3 2 1

21

3

Q4501

DDR_RST_EN

AY43

P1V5S

AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33

AM28
AN26

BC43
BA43

U10

D48
D49

R4630

P0V75S_DIMM1_VREF_DQ

4.75A

C4677

C4678

P1V5S

0.6A

C4676

2 1

1UF_6.3V_2

TP4500
TP4501

R4513

21

100_5%_2_DY

VCCSA_SENSE

21

R4631

1K_5%_2

IN

2 1

2 1

1
1

PVSA

VCCSA_VID0
VCCSA_VID1

21

27

P0V75M_VREF_H

TP4530

1

TP30

C4685

2 1

0.1uF_16V_2

C4683

C4686

C4681

C4679

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

C4680

C4682

C4684

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

TP24
TP24

14

OUT

OUT
OUT

C4500

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

C4687

C4689

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

14
14

C4510

C4505

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

C4691

C4525

2 1

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

SLP_S3#_3R

57 35

9

55

45 42

20

C4520

C4515

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

+

C4511

2 1

10UF_6.3V_3

100UF_6.3V

28

IN

DDR_WR_VREF01

G

1

21

3

D S

Q4500

DDR_RST_EN

P0V75S_DIMM0_VREF_DQ

28

27

IN

PVAXG

U4500

DDR_WR_VREF02

IN

R4515

0_5%_2_DY

2

R4514

AM2302N

2 1

1K_5%_2_DY

R4519

0_5%_2_DY

2

D S

R4518

G

1

AM2302N

2 1

1K_5%_2_DY

25A

AA46

VAXG[1]

AB47

VAXG[2]

AB50

VAXG[3]

AB51

VAXG[4]

AB52

VAXG[5]

AB53

C4638

C4644

C4651

C4658

C4665

2 1

2 1

E

C4623

C4627

C4631

2 1

10UF_6.3V_3

D

1

+

C4616

470uF_2V

3

2

C

C4635

2 1

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

12

C4632

C4640

C4636

2 1

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

15

OUT

15

OUT

1UF_6.3V_2

1UF_6.3V_2

12

C4646

C4653

2 1

22UF_6.3V

22UF_6.3V

GFX_VCC_SENSE
GFX_VSS_SENSE

2 1

1UF_6.3V_2

C4659

12

12

C4660

2 1

2 1

22UF_6.3V

P1V8S

C4672

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

C4666

C4673

2 1

2 1

2 1

1UF_6.3V_2

12

C4667

22UF_6.3V

1UF_6.3V_2

1UF_6.3V_2

12

C4674

2 1

2 1

22UF_6.3V

22UF_6.3V

C4675

C4668

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

PVAXG

21

R4516

10_5%_2

21

R4517

10_5%_2

0.93A

12

C4648

C4655

2 1

1uF_6.3V_2

PVSA

B

4.5A

C4642

C4649

C4656

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

C4669

2 1

2 1

2 1

1uF_6.3V_2

10UF_6.3V_3

22UF_6.3V

C4663

C4573

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

VAXG[6]

AB55

VAXG[7]

AB56

VAXG[8]

AB58

VAXG[9]

AB59

VAXG[10]

AC61

VAXG[11]

AD47

VAXG[12]

AD48

VAXG[13]

AD50

VAXG[14]

AD51

VAXG[15]

AD52

VAXG[16]

AD53

VAXG[17]

AD55

VAXG[18]

AD56

VAXG[19]

AD58

VAXG[20]

AD59

VAXG[21]

AE46

VAXG[22]

N45

VAXG[23]

P47

VAXG[24]

P48

VAXG[25]

P50

VAXG[26]

P51

VAXG[27]

P52

VAXG[28]

P53

VAXG[29]

P55

VAXG[30]

P56

VAXG[31]

P61

VAXG[32]

T48

VAXG[33]

T58

VAXG[34]

T59

VAXG[35]

T61

VAXG[36]

U46

VAXG[37]

V47

VAXG[38]

V48

VAXG[39]

V50

VAXG[40]

V51

VAXG[41]

V52

VAXG[42]

V53

VAXG[43]

V55

VAXG[44]

V56

VAXG[45]

V58

VAXG[46]

V59

VAXG[47]

W50

VAXG[48]

W51

VAXG[49]

W52

VAXG[50]

W53

VAXG[51]

W55

VAXG[52]

W56

VAXG[53]

W61

VAXG[54]

Y48

VAXG[55]

Y61

VAXG[56]

F45

VAXG_SENSE

G45

VSSAXG_SENSE

BB3

VCCPLL[1]

BC1

VCCPLL[2]

BC4

VCCPLL[3]

L17

VCCSA[1]

L21

VCCSA[2]

N16

VCCSA[3]

N20

VCCSA[4]

N22

VCCSA[5]

P17

VCCSA[6]

P20

VCCSA[7]

R16

VCCSA[8]

R18

VCCSA[9]

R21

VCCSA[10]

U15

VCCSA[11]

V16

VCCSA[12]

V17

VCCSA[13]

V18

VCCSA[14]

V21

VCCSA[15]

W20

VCCSA[16]

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

POWER

GRAPHICS

LINESSENSE

1.8V RAIL

SA RAIL

SM_VREF

VDDQ[1]
VDDQ[2]
VDDQ[3]
VDDQ[4]
VDDQ[5]
VDDQ[6]
VDDQ[7]
VDDQ[8]

VDDQ[9]
VDDQ[10]
VDDQ[11]
VDDQ[12]
VDDQ[13]

DDR3 - 1.5V RAILS

VDDQ[14]
VDDQ[15]
VDDQ[16]
VDDQ[17]
VDDQ[18]
VDDQ[19]
VDDQ[20]
VDDQ[21]
VDDQ[22]
VDDQ[23]
VDDQ[24]
VDDQ[25]
VDDQ[26]

VCCDQ[1]
VCCDQ[2]

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

SENSE LINES

VCCSA_SENSE

VCCSA_VID[0]
VCCSA_VID[1]

1K_5%_2

P0V75M_VREF

3

Q4502

R4596

3.3K_5%_2

21

IN

48
19
2118

DS

C4499

P0V75M_VREF_H

2

G

1

AM2302N

C4497

R4594

2 1

C4498

100K_5%_2

2 1

2 1

2.2UF_6.3V_3_DY

2 1

470PF_50V_2

FF

0.1UF_16V_2_DY

E

D

C

B

C4643

C4506

C4650

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

A

8

7 6 5 4 3

C4567

C4664

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU-5/6

DOC.NUMBER

CHANGE by

CODE

SIZE

1310xxxxx-0-0

C

XXX

DATE

21-OCT-2002

2 1

CS

SHEET

REV

X01

of

80

27

8

7 6 5 4 3 2 1

FF

U4500

DC_TEST_A4
DC_TEST_C4
DC_TEST_D3

DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61

DC_TEST_C61

DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58

DC_TEST_BG4

DC_TEST_BG3

DC_TEST_BE3

DC_TEST_BG1

DC_TEST_BE1

DC_TEST_BD1

BE7

RSVD28
RSVD29

RSVD30
RSVD31
RSVD32
RSVD33

RSVD34
RSVD35
RSVD36
RSVD37
RSVD38

RSVD39
RSVD40

RSVD41
RSVD42
RSVD43
RSVD44

RSVD45

OUT
OUT

DDR_WR_VREF01
DDR_WR_VREF02

BG7

N42
L42
L45
L47

M13
M14
U14
W14
P13

AT49
K24

AH2
AG13
AM14
AM15

27
27

N50

A4
C4
D3
D1
A58
A59
C59
A61
C61
D61
BD61
BE61
BE59
BG61
BG59
BG58
BG4
BG3
BE3
BG1
BE1
BD1

B50

OUT

CFG<0>

TP4450

TP4451

TP4452
TP4453
TP4454
TP4455
TP4456
TP4457
TP4458
TP4459
TP4460

TP4461

TP4462
TP4463

E

TP4464
TP4465
TP4466

D

CFG[0]

1

C51

CFG[1]

1

B54

CFG[2]

1

D53

CFG[3]

1

A51

CFG[4]

1

C53

CFG[5]

1

C55

CFG[6]

1

H49

CFG[7]

1

A55

CFG[8]

1

H51

CFG[9]

1

K49

CFG[10]

1

K53

CFG[11]

1

F53

CFG[12]

1

G53

CFG[13]

1

L51

CFG[14]

1

F51

CFG[15]

1

D52

CFG[16]

1

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD6

K48

RSVD7

BA19

RSVD8

AV19

RSVD9

AT21

RSVD10

BB21

RSVD11

BB19

RSVD12

AY21

RSVD13

BA22

RSVD14

AY22

RSVD15

AU19

RSVD16

AU21

RSVD17

BD21

RSVD18

BD22

RSVD19

BD25

RSVD20

BD26

RSVD21

BG22

RSVD22

BE22

RSVD23

BG26

RSVD24

BE26

RSVD25

BF23

RSVD26

BE24

RSVD27

RESERVED

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

C

U4500

BG17

VSS[181]

BG21

VSS[182]

BG24

VSS[183]

BG28

VSS[184]

BG37

VSS[185]

BG41

VSS[186]

BG45

VSS[187]

BG49

VSS[188]

BG53

VSS[189]

BG9

VSS[190]

C29

VSS[191]

C35

VSS[192]

C40

VSS[193]

D10

VSS[194]

D14

VSS[195]

D18

VSS[196]

D22

VSS[197]

D26

VSS[198]

D29

VSS[199]

D35

VSS[200]

D4

VSS[201]

D40

VSS[202]

D43

VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]

VSS

NCTF

D46
D50
D54
D58

D6
E25
E29

E3
E35
E40
F13
F15
F19
F29
F35
F40
F55
G48
G51

G6
G61
H10
H14
H17
H21

H4
H53
H58

J1
J49
J55
K11
K21
K51

K8
L16
L20
L22
L26
L30
L34
L38
L43
L48
L61

M11

M15

VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14

M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59

A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

CFG[2] : PCI Express* Static x16 Lane Numbering Reversal.

1 = NORMAL MODE

B

0 = LANE REVERSED

CFG[4] : eDP enable

1 = Disabled
0 = Enabled

CFG[6:5] : PCI Express Bifurcation:

00 = 1 x8, 2 x4 PCI Expres
01 = reserved
10 = 2 x8 PCI Express
11 = 1 x16 PCI Express

CFG[7] :PEG DEFER TRAINING

1: (Default) PEG Train immediately following RESETB deassertion
0: PEG Wait for BIOS for training

U4500

A13

VSS[1]

A17

VSS[2]

A21

VSS[3]

A25

VSS[4]

A28

VSS[5]

A33

VSS[6]

A37

VSS[7]

A40

VSS[8]

A45

VSS[9]

A49

VSS[10]

A53

VSS[11]

A9

VSS[12]

AA1

VSS[13]

AA13

VSS[14]

AA50

VSS[15]

AA51

VSS[16]

AA52

VSS[17]

AA53

VSS[18]

AA55

VSS[19]

AA56

VSS[20]

AA8

VSS[21]

AB16

VSS[22]

AB18

VSS[23]

AB21

VSS[24]

AB48

VSS[25]

AB61

VSS[26]

AC10

VSS[27]

AC14

VSS[28]

AC46

VSS[29]

AC6

VSS[30]

AD17

VSS[31]

AD20

VSS[32]

AD4

VSS[33]

AD61

VSS[34]

AE13

VSS[35]

AE8

VSS[36]

AF1

VSS[37]

AF17

VSS[38]

AF21

VSS[39]

AF47

VSS[40]

AF48

VSS[41]

AF50

VSS[42]

AF51

VSS[43]

AF52

VSS[44]

AF53

VSS[45]

AF55

VSS[46]

AF56

VSS[47]

AF58

VSS[48]

AF59

VSS[49]

AG10

VSS[50]

AG14

VSS[51]

AG18

VSS[52]

AG47

VSS[53]

AG52

VSS[54]

AG61

VSS[55]

AG7

VSS[56]

AH4

VSS[57]

AH58

VSS[58]

AJ13

VSS[59]

AJ16

VSS[60]

AJ20

VSS[61]

AJ22

VSS[62]

AJ26

VSS[63]

AJ30

VSS[64]

AJ34

VSS[65]

AJ38

VSS[66]

AJ42

VSS[67]

AJ45

VSS[68]

AJ48

VSS[69]

AJ7

VSS[70]

AK1

VSS[71]

AK52

VSS[72]

AL10

VSS[73]

AL13

VSS[74]

AL17

VSS[75]

AL21

VSS[76]

AL25

VSS[77]

AL28

VSS[78]

AL33

VSS[79]

AL36

VSS[80]

AL40

VSS[81]

AL43

VSS[82]

AL47

VSS[83]

AL61

VSS[84]

AM13

VSS[85]

AM20

VSS[86]

AM22

VSS[87]

AM26

VSS[88]

AM30

VSS[89]

AM34

VSS[90]

ITL_IVY_BRIDGE_BGA1023_2C_GT1_1023P

VSS

VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]

AM38

VSS[91]

AM4

VSS[92]

AM42

VSS[93]

AM45

VSS[94]

AM48

VSS[95]

AM58

VSS[96]

AN1

VSS[97]

AN21

VSS[98]

AN25

VSS[99]

AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13

E

D

C

B

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CPU-6/6

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

C

CHANGE by

8

7 6 5 4 3

XXX

DATE

21-OCT-2002

2 1

CS

SHEET

of

28 80

A

REV

X01

8

7 6 5 4 3 2 1

FF

25

M_A_A<15..0>

25
25
25
25

M_CLK_DDR0_DP

25

M_CLK_DDR0_DN

25

M_CLK_DDR1_DP

324756 34
32

5647 34

25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25

25

M_CLK_DDR1_DN

25

25

M_A_CAS#

25

M_A_RAS#

25

29

SA0_DIM0

29

SA1_DIM0
PCH_3S_SMCLK
PCH_3S_SMDATA

25

25

M_A_DQS0_DP
M_A_DQS1_DP
M_A_DQS2_DP
M_A_DQS3_DP
M_A_DQS4_DP
M_A_DQS5_DP
M_A_DQS6_DP
M_A_DQS7_DP
M_A_DQS0_DN
M_A_DQS1_DN
M_A_DQS2_DN
M_A_DQS3_DN
M_A_DQS4_DN
M_A_DQS5_DN
M_A_DQS6_DN
M_A_DQS7_DN

E

D

M_A_BS0
M_A_BS1
M_A_BS2

M_CS#0

25

M_CS#1

25

M_CKE0

25

M_CKE1

M_A_WE#

M_ODT0
M_ODT1

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
OUT
OUT

IN

IN

IN

IN

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

CN4100

98

0

97

1

96

2

95

3

92

4

91

5

90

6

86

7

89

8

85

9

107

10

84

11

83

12

119

13

80

14

78

15

109
108

79
114
121
101
103
102
104

73

74
115
110
113
197
201
202
200

116
120

11

28

46

63
136
153
170
187

12

29

47

64
137
154
171
188

10

27

45

62
135
152
169
186

5

DQ0

A0

7

DQ1

A1

15

DQ2

A2

17

DQ3

A3

4

DQ4

A4

6

DQ5

A5

16

DQ6

A6

18

DQ7

A7

21

DQ8

A8

23

DQ9

A9

33

DQ10

A10_AP

35

DQ11

A11

22

DQ12

A12

24

DQ13

A13

34

DQ14

A14

36

DQ15

A15

39

DQ16

41

DQ17

BA0

51

DQ18

BA1

53

DQ19

BA2

40

S0#

DQ20

42

S1#

DQ21

50

DQ22

CK0

52

DQ23

CK0#

57

DQ24

CK1

59

DQ25

CK1#

67

DQ26

CKE0

69

DQ27

CKE1

56

DQ28

CAS#

58

RAS#

DQ29

68

WE#

DQ30

70

SA0

DQ31

129

SA1

DQ32

131

SCL

DQ33

141

SDA

DQ34

143

DQ35

130

ODT0

DQ36

132

ODT1

DQ37

140

DQ38

142

DQ39

DM0

147

DQ40

DM1

149

DQ41

DM2

157

DQ42

DM3

159

DQ43

DM4

146

DQ44

DM5

148

DQ45

DM6

158

DQ46

DM7

160

DQ47

163

DQS0

DQ48

165

DQS1

DQ49

175

DQS2

DQ50

177

DQS3

DQ51

164

DQS4

DQ52

166

DQS5

DQ53

174

DQS6

DQ54

176

DQS7

DQ55

181

DQS#0

DQ56

183

DQS#1

DQ57

191

DQS#2

DQ58

193

DQS#3

DQ59

180

DQS#4

DQ60

182

DQS#5

DQ61

192

DQS#6

DQ62

194

DQS#7

DQ63

FOX_AS0A626_U4RG_7H_204P

4
5
2
7
0
1
3
6

13

9
11
15

8
12
10
14
21
20
22
18
16
17
19
23
24
29
26
31
30
28
27
25
36
35
37
38
32
33
39
34
41
42
45
43
40
44
46
47
52
54
50
55
48
49
51
53
63
60
59
61
57
56
62
58

BIBI

M_A_DQ<63..0>

NOTE:

25

IF SA0_DIM0=0 , SA1_DIM0=0
SO-DIMMA SPD ADDRESS IS 0XA0
SO-DIMMA TS ADDRESS IS 0X30

IF SA0_DIM0=1 , SA1_DIM0=0
SO-DIMMA SPD ADDRESS IS 0XA2
SO-DIMMA TS ADDRESS IS 0X32

P3V3S

R4103

R4101

P1V5

CN4100

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

C4146

2 1

2 1

3PF_50V_2

C4106

C4113

C4117

C4118

C4115

2 1

12PF_50V_2

2.2UF_6.3V_3

2 1

2 1

330UF_2.5V

2 1

10UF_6.3V_3

10UF_6.3V_3

C4108

C4114

C4116

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

C4109

2 1

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

10UF_6.3V_3

C4112

C4107

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

10UF_6.3V_3

+

C4148

C4147

P3V3S

PM_EXTTS#1_R

31

P0V75M_VREF

C4149

C4105

2 1

C4104

2 1

2 1

12PF_50V_2

0.1UF_16V_2

2.2UF_6.3V_3

C4120

2 1

2330

DDR3_DRAMRST#

C4119

2 1

0.1UF_16V_2

2.2UF_6.3V_3

OUT
OUT

P0V75M_VREF

C4111

C4110

2 1

2 1

0.1UF_16V_2

2.2UF_6.3V_3

2 1

10K_5%_2_DY

IN

SA0_DIM0

IN

SA1_DIM0

R4100

0_5%_2

0_5%_2

2 1

2 1

29

29

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

FOX_AS0A626_U4RG_7H_204P

44

VSS16

48

VSS17

49

VSS18

54

VSS19

55

VSS20

60

VSS21

61

VSS22

65

VSS23

66

VSS24

71

VSS25

72

VSS26

127

VSS27

128

VSS28

133

VSS29

134

VSS30

138

VSS31

139

VSS32

144

VSS33

145

VSS34

150

VSS35

151

VSS36

155

VSS37

156

VSS38

161

VSS39

162

VSS40

167

VSS41

168

VSS42

172

VSS43

173

VSS44

178

VSS45

179

VSS46

184

VSS47

185

VSS48

189

VSS49

190

VSS50

195

VSS51

196

VSS52

E

P0V75S

203

VTT1

204

VTT2

G1

G1

G2

G2

D

P0V75S

C4101

C4102

C4103

C4100

2 1

2 1

1UF_6.3V_2

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

C

B

C

B

REFERENCE NUMBER:4100~4299

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

DDR3_SO-DIMM0

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

CHANGE by

8

7 6 5 4 3

XXX

DATE

21-OCT-2002

2 1

C

SHEET

of

29

A

REV

X01

80

8

7 6 5 4 3 2 1

DDR3_B_0

U4104

323130 25
31

30 29 23

32 30 25

31

32

31

32

31

30 25

32

31

30 25

32

312525

30

31

32

R4116

31

30 25

32

21

E

P1V5

C2

C1

C4121

C4122

C4124

1UF_6.3V_2

D

C4123

1UF_6.3V_2

2 1

C4135

2 1

C4139

C4137

C4136

2 1

10UF_6.3V_3

C4138

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

C4140

2 1

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

2 1

C4141

C4142

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

1UF_6.3V_21UF_6.3V_21UF_6.3V_2

1UF_6.3V_2

2 1

2 1

1UF_6.3V_2

2 1

10UF_6.3V_3

240_1%_1

C4

C3

1UF_6.3V_2

2 1

2 1

M_CS#2

IN

DDR3_DRAMRST#

IN

M_B_RAS#

IN

M_B_CAS#

2530

IN

M_B_WE#

IN

M_CLK_DDR2_DP

IN

M_CLK_DDR2_DN

IN

M_CKE2

2530

IN

M_B_DQS1_DN

25

IN

M_B_DQS1_DP

IN

M_B_DQS0_DP

25

IN

M_B_DQS0_DN

25

IN

M_ODT2

IN

L2

C\S\

T2

R\E\S\E\T\

J3

R\A\S\

K3

C\A\S\

L3

W\E\

J7

CK

K7

C\K\

K9

CKE

D3

UDM

E7

LDM

B7

U\D\Q\S\

C7

UDQS

F3

LDQS

G3

L\D\Q\S\

K1

ODT

L8

ZQ

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4/ZQ1

MICRON_MT41K512M16_FBGA_96P

A12/B\C\

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VREFDQ
VREFCA

E3

DQL0

M_B_DQ<0>

F7

DQL1

M_B_DQ<1>

F2

M_B_DQ<2>

DQL2

F8

M_B_DQ<3>

DQL3

H3

M_B_DQ<4>

DQL4

H8

M_B_DQ<5>

DQL5

G2

M_B_DQ<6>

DQL6

H7

M_B_DQ<7>

DQL7

D7

M_B_DQ<8>

DQ8

C3

M_B_DQ<9>

DQ9

C8

DQ10

M_B_DQ<10>

C2

DQ11

M_B_DQ<11>

A7

M_B_DQ<12>

DQ12

A2

M_B_DQ<13>

DQ13

B8

DQ14

M_B_DQ<14>

A3

DQ15

M_B_DQ<15>

N3

M_B_A<0>

A0

P7

M_B_A<1>

A1

P3

M_B_A<2>

A2

N2

M_B_A<3>

A3

P8

M_B_A<4>

A4

P2

M_B_A<5>

A5

R8

M_B_A<6>

A6

R2

M_B_A<7>

A7

T8

M_B_A<8>

A8

R3

M_B_A<9>

A9

L7

M_B_A<10>

A10/AP

R7

M_B_A<11>

A11

N7

M_B_A<12>

T3

M_B_A<13>

A13

T7

M_B_A<14>

A14

M7

M_B_A<15>

A15

M2

M_B_BS0

BA0

N8

M_B_BS1

BA1

M3

M_B_BS2

BA2

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1
A8
C1
C9
D2
E9
F1
H2
H9

H1
M8

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

BI

25

BI

25

BI
BI
BI

25

BI
BI

25

BI
BI
BI
BI
BI
BI
BI
BI
BI

IN
IN
IN

P0V75M_VREF

25
25
25
25
25
25
25
25

25
25
25
25
25
25
25
25

32

31

3025

32

31

30

32

31

30

3225

31

30
3025

32

31
31

30

32

31

3025

32

31

32

30

3225

31

30

3225

30

31

3025

32

31

3025

31

32

3025

31

32

31

3025

32

31

3025

32

3025

31

32

32313025
32313025
32313025

P1V5

FF

E

D

DDR3_B_1

C4143

1UF_6.3V_2

C

B

C4144

C4145

2 1

2 1

2 1

C4125

C4126

0.1UF_16V_2 0.1UF_16V_2

2 1

0.1UF_16V_2 0.1UF_16V_2

1UF_6.3V_21UF_6.3V_21UF_6.3V_2

2 1

C4128

2 1

C4150

2 1

P0V75M_VREF

C4127

2 1

1UF_6.3V_2

C4151

C4152

1UF_6.3V_2 1UF_6.3V_21UF_6.3V_2

2 1

C4153

C4154

323130 25

29 23

30

31
323130 25

R2

240_1%_1

323130 25

2 1

30 25

31

32

30 25

32

31

30 25

31

32

31

32

30 25

32

31

21

2 1

2 1

M_CS#2

IN

DDR3_DRAMRST#

IN

M_B_RAS#

IN

M_B_CAS#

IN

M_B_WE#

IN

M_CLK_DDR2_DP

IN

M_CLK_DDR2_DN

IN

M_CKE2

2530

IN

M_B_DQS3_DN

25

IN

M_B_DQS3_DP

25

IN

M_B_DQS2_DP

25

IN

M_B_DQS2_DN

25

IN

M_ODT2

IN

A

8

7 6 5 4 3

U4105

L2

C\S\

T2

R\E\S\E\T\

J3

R\A\S\

K3

C\A\S\

L3

W\E\

J7

CK

K7

C\K\

K9

CKE

D3

UDM

E7

LDM

B7

U\D\Q\S\

C7

UDQS

F3

LDQS

G3

L\D\Q\S\

K1

ODT

L8

ZQ

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4/ZQ1

MICRON_MT41K512M16_FBGA_96P

A12/B\C\

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VREFDQ
VREFCA

E3

M_B_DQ<16>

DQL0

F7

M_B_DQ<17>

DQL1

F2

M_B_DQ<18>

DQL2

F8

M_B_DQ<19>

DQL3

H3

M_B_DQ<20>

DQL4

H8

M_B_DQ<21>

DQL5

G2

M_B_DQ<22>

DQL6

H7

M_B_DQ<23>

DQL7

D7

M_B_DQ<24>

DQ8

C3

M_B_DQ<25>

DQ9

C8

M_B_DQ<26>

DQ10

C2

M_B_DQ<27>

DQ11

A7

M_B_DQ<28>

DQ12

A2

M_B_DQ<29>

DQ13

B8

M_B_DQ<30>

DQ14

A3

M_B_DQ<31>

DQ15

N3

M_B_A<0>

A0

P7

M_B_A<1>

A1

P3

M_B_A<2>

A2

N2

M_B_A<3>

A3

P8

M_B_A<4>

A4

P2

M_B_A<5>

A5

R8

M_B_A<6>

A6

R2

M_B_A<7>

A7

T8

M_B_A<8>

A8

R3

M_B_A<9>

A9

L7

M_B_A<10>

A10/AP

R7

M_B_A<11>

A11

N7

M_B_A<12>

T3

M_B_A<13>

A13

T7

M_B_A<14>

A14

M7

M_B_A<15>

A15

M2

M_B_BS0

BA0

N8

M_B_BS1

BA1

M3

M_B_BS2

BA2

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1
A8
C1
C9
D2
E9
F1
H2
H9

H1
M8

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

IN

25

IN

25

IN

P0V75M_VREF

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

32313025
32313025
32313025
32313025
32313025
32313025
32313025
32313025
32313025
32313025
32313025
3230

31

323130
3230

31

323130

30

31

32

31

30

32
32

31

30

31

30

32

P1V5

C

B

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

35_DDR3L-2

DOC.NUMBER

CHANGE by

CODE

SIZE

1310xxxxx-0-0

C

DATE

XXX

21-OCT-2002

2 1

CS

SHEET

REV

X01

of

80

30

8

E

D

7 6 5 4 3 2 1

DDR3L_B_2

R6

240_1%_1

32

21

32 30 25

31

31

32 30 25

31

32

31

30

31

U4106

M_CS#2

IN

DDR3_DRAMRST#

232930

IN

M_B_RAS#

25303132

IN

M_B_CAS#

25303132

IN

M_B_WE#

25303132

IN

M_CLK_DDR2_DP

25303132

IN

M_CLK_DDR2_DN

IN

M_CKE2

2530

IN

M_B_DQS5_DN

25

IN

M_B_DQS5_DP

25

IN

M_B_DQS4_DP

25

IN

M_B_DQS4_DN

25

IN

M_ODT2

25

IN

L2

C\S\

T2

R\E\S\E\T\

J3

R\A\S\

K3

C\A\S\

L3

W\E\

J7

CK

K7

C\K\

K9

CKE

D3

UDM

E7

LDM

B7

U\D\Q\S\

C7

UDQS

F3

LDQS

G3

L\D\Q\S\

K1

ODT

L8

ZQ

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4/ZQ1

MICRON_MT41K512M16_FBGA_96P

A12/B\C\

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VREFDQ
VREFCA

E3

M_B_DQ<32>

DQL0

F7

M_B_DQ<33>

DQL1

F2

M_B_DQ<34>

DQL2

F8

M_B_DQ<35>

DQL3

H3

M_B_DQ<36>

DQL4

H8

M_B_DQ<37>

DQL5

G2

M_B_DQ<38>

DQL6

H7

M_B_DQ<39>

DQL7

D7

M_B_DQ<40>

DQ8

C3

M_B_DQ<41>

DQ9

C8

M_B_DQ<42>

DQ10

C2

M_B_DQ<43>

DQ11

A7

M_B_DQ<44>

DQ12

A2

M_B_DQ<45>

DQ13

B8

M_B_DQ<46>

DQ14

A3

M_B_DQ<47>

DQ15

N3

M_B_A<0>

A0

P7

M_B_A<1>

A1

P3

M_B_A<2>

A2

N2

M_B_A<3>

A3

P8

M_B_A<4>

A4

P2

M_B_A<5>

A5

R8

M_B_A<6>

A6

R2

M_B_A<7>

A7

T8

M_B_A<8>

A8

R3

M_B_A<9>

A9

L7

M_B_A<10>

A10/AP

R7

M_B_A<11>

A11

N7

M_B_A<12>

T3

M_B_A<13>

A13

T7

M_B_A<14>

A14

M7

M_B_A<15>

A15

M2

M_B_BS0

BA0

N8

M_B_BS1

BA1

M3

M_B_BS2

BA2

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1
A8
C1
C9
D2
E9
F1
H2
H9

H1
M8

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 30

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

IN

25 303132

IN

25 303132

IN

P0V75M_VREF

25
25
25
25
25
25
25
25

25
25
25
25
25
25
25
25

32

31

P1V5

FF

E

D

DDR3L_B_3

U4107

L2

C\S\

T2

R\E\S\E\T\

J3

R\A\S\

K3

C\A\S\

L3

W\E\

J7

CK

K7

C\K\

K9

CKE

D3

UDM

E7

LDM

B7

U\D\Q\S\

C7

UDQS

F3

LDQS

G3

L\D\Q\S\

K1

ODT

L8

ZQ

A9

VSS_1

B3

VSS_2

E1

VSS_3

G8

VSS_4

J2

VSS_5

J8

VSS_6

M1

VSS_7

M9

VSS_8

P1

VSS_9

P9

VSS_10

T1

VSS_11

T9

VSS_12

B1

VSSQ_1

B9

VSSQ_2

D1

VSSQ_3

D8

VSSQ_4

E2

VSSQ_5

E8

VSSQ_6

F9

VSSQ_7

G1

VSSQ_8

G9

VSSQ_9

J1

NC_1

J9

NC_2

L1

NC_3

L9

NC_4/ZQ1

MICRON_MT41K512M16_FBGA_96P

IN

IN

IN

IN
IN
IN

IN
IN
IN

25
25

25
25

IN
IN

IN
IN

M_ODT2

M_CS#2

DDR3_DRAMRST#
M_B_RAS#

M_B_CAS#
M_B_WE#

M_CLK_DDR2_DP
M_CLK_DDR2_DN
M_CKE2

M_B_DQS7_DN
M_B_DQS7_DP

M_B_DQS6_DP
M_B_DQS6_DN

31

30

25

32

29

30

23

31

31

25

30

32

31

2530

32

25

31

32

30

C

25

32

30

31

25

31

3032

25

31

32

30

P0V75M_VREF

R5

C4132

C4131

C4130

B

C4129

2 1

0.1UF_16V_2

0.1UF_16V_2

2 1

2 1

0.1UF_16V_2

0.1UF_16V_2

2 1

240_1%_1

25

31

32

30

21

A

8

7 6 5 4 3

A12/B\C\

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VREFDQ
VREFCA

E3

M_B_DQ<48>

DQL0

F7

M_B_DQ<49>

DQL1

F2

M_B_DQ<50>

DQL2

F8

M_B_DQ<51>

DQL3

H3

M_B_DQ<52>

DQL4

H8

M_B_DQ<53>

DQL5

G2

M_B_DQ<54>

DQL6

H7

M_B_DQ<55>

DQL7

D7

M_B_DQ<56>

DQ8

C3

M_B_DQ<57>

DQ9

C8

M_B_DQ<58>

DQ10

C2

M_B_DQ<59>

DQ11

A7

M_B_DQ<60>

DQ12

A2

M_B_DQ<61>

DQ13

B8

M_B_DQ<62>

DQ14

A3

M_B_DQ<63>

DQ15

N3

M_B_A<0>

A0

P7

M_B_A<1>

A1

P3

M_B_A<2>

A2

N2

M_B_A<3>

A3

P8

M_B_A<4>

A4

P2

M_B_A<5>

A5

R8

M_B_A<6>

A6

R2

M_B_A<7>

A7

T8

M_B_A<8>

A8

R3

M_B_A<9>

A9

L7

M_B_A<10>

A10/AP

R7

M_B_A<11>

A11

N7

M_B_A<12>

T3

M_B_A<13>

A13

T7

M_B_A<14>

A14

M7

M_B_A<15>

A15

M2

M_B_BS0

BA0

N8

M_B_BS1

BA1

M3

M_B_BS2

BA2

B2

VDD_1

D9

VDD_2

G7

VDD_3

K2

VDD_4

K8

VDD_5

N1

VDD_6

N9

VDD_7

R1

VDD_8

R9

VDD_9

A1
A8
C1
C9
D2
E9
F1
H2
H9

H1
M8

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

BI

25 303132

IN

25 303132

IN

25 303132

IN

P0V75M_VREF

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

25

BI

C

B

P1V5

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

36_DDR3L-3

DOC.NUMBER

CHANGE by

CODE

SIZE

1310xxxxx-0-0

C

XXX

DATE

21-OCT-2002

2 1

CS

SHEET

REV

X01

of

31

80

8

7 6 5 4 3 2 1

P0V75S

R4227

36_1%_2

M_CKE2

21

R4228

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

36_1%_2

21

M_ODT2

M_CS#2

M_B_WE#

M_B_CAS#

M_B_RAS#

M_B_BS0

M_B_BS1

M_B_BS2

M_B_A<0>

M_B_A<1>

M_B_A<2>

M_B_A<3>

M_B_A<4>

M_B_A<5>

M_B_A<6>

M_B_A<7>

M_B_A<8>

M_B_A<9>

M_B_A<10>

M_B_A<11>

M_B_A<12>

M_B_A<13>

M_B_A<14>

M_B_A<15>

R4229

R4230

R4231

R4232

R4233

R4234

R4235

R4236

R4237

R4238

E

D

R4239

R4240

R4241

R4242

R4243

R4244

R4245

R4246

R4247

R4248

R4249

R4225

R4226

31

3025

IN

31

3025

IN

25 30

31

IN

31

3025

IN

30

25

31

IN

30

31

25

IN

3025

IN

31

303125

IN

31

3025

IN

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

BI

M_B_A<15..0>

R4251

M_CLK_DDR2_DP

25

31

30

IN

C4203

1.6PF_25V_1

IN

M_CLK_DDR2_DN

31

30 25

21

30_1%_2

2 1

R4252

21

30_1%_2

C4202

2 1

0.1UF_16V_2

FF

E

D

P0V75S

C4206

C4207

2 1

P0V75S

2 1

1UF_6.3V_2

C4215

C4208

1UF_6.3V_21UF_6.3V_2

2 1

2 1

2 1

C4214

1UF_6.3V_2_DY1UF_6.3V_2_DY 1UF_6.3V_2_DY

2 1

C4211

1UF_6.3V_2_DY

2 1

C

C4210

2 1

B

C4209

1UF_6.3V_2

C

B

P3V3S

21

R426221R4263

10K_5%_2 10K_5%_2_DY

10K_5%_2

U4201

1

A0

2

A1

3

A2

21

ATM_AT24C02B_10TU_1_8_TSSOP_8P

R426521R4264

10K_5%_2_DY

C4213

C4212

2 1

2 1

0.1UF_16V_2

2.2UF_6.3V_2

8

VCC

7

WP

6

SMB_CLK_MD_A

SCL

54

SMB_DATA_MS_A

SDAVSS

R4259

0_5%_2

21

56

56

A

8

7 6 5 4 3

SPD ADDRESS=30 HEX FOR MEMORY DOWN A

PCH_3S_SMCLK

293447

BI

PCH_3S_SMDATA SMB_DATA_MS_A

293447

BI

R4260

0_5%_2

R4261

0_5%_2

SMB_CLK_MD_A

21

21

CHANGE by

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

37_DDR TERMAINAL

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

DATE

XXX

21-OCT-2002

2 1

C

SHEET

REV

X01

of

8032

8 7

6 5

4

3 2 1

REFERENCE NUMER : 4700~4949

P3V3AL_RTC_BAT

D

WWAN_DET#

B

CN4750

1
2

ACES_50224_0020N_001_2P

P3V3S

R4880

10K_5%_2_DY

56

48

BAT_GRNLED#

51

TP4701

1

TP30

TP4702

1

TP30

TP4703

1

TP30

TP4704

1

TP30

TP4707

1

TP30

TP4708

1

TP30

TP4709

1

TP30

TP4710

1

TP30

TP4711

1

TP30

TP4712

1

TP30

TP4713

1

TP30

G

1

G

2

P3V3AL_RTC_BAT

21

A_3S_ICHSPKR

P3V3_RTC

R4831

IN

SSM3K7002FU

37

PLT_RST#

IN
IN
IN
IN

IN
IN
IN
IN
IN
IN
IN

8

3
4

D4750

BAT54C

R4832

2 1

1K_5%_2

C4836

2 1

22PF_50V_2

Q4831

1M_5%_2

1

G

2 1

R4863

IN

0_5%_2

LES_LBSS84LT1G_SOT23_3P

IN

LES_LBSS84LT1G_SOT23_3P

33

PCH_TDI

33

PCH_TDO

33

PCH_TCK

33

PCH_TMS

RSMRST#

PWR_BTN_OUT#

SRTCRST#

PM_PWROK

3520

M_PWROK

18 35

VGATE

INTVRMEN_R

P3V3_RTC

P3V3AL

21

TP4800

TP30

1

3

C

20K_5%_2

R4833

2 1

57

AZ_R3S_BITCLK

AZ_R3S_RST#

P3V3A

R4861

2 1

2

Q4755

S

G

D

3
2

Q4754

S

G

D

3

SPI_SI_FLH

SPI_SO_FLH

49

57

C4766

1UF_6.3V_2

R4845

20K_5%_2

R4834

C4764

1M_5%_21K_5%_2

R4842

33

57

56

HDD_HALTLED

33

PLACE R4867 NEAR PCH

OUT

OUT

IN

AZ_R3S_SYNC

A2A1

33 57

33

54

OUT

3

INTRUDER#

DS

2

44

1

21

72

1

48

SPI_CLK_FLH

48

SPI_CS0#_FLH

48

48

4835

18

R4911,R4894,R4895,R4882 CLOSE TO PCH

48

35

3548

7 6

21

21

21

C4768

2 1

1UF_6.3V_2

330K_5%_2

21

OUT

57

33

A_3S_ICHSPKR

OUT

AZ_R3S_SDIN0

33

R4867

51_5%_2

HDA_SDO_R

OUT

IN

2 1

1UF_6.3V_2

3354

HDA_SYNC

33

55

33_5%_2

33

52

21

R4894

18PF_50V_2

32.768KHZ

INTRUDER#

INTVRMEN_R

AZ_R3S_BITCLK

AZ_R3S_RST#

HDA_SDO_R

OUT

33

ISO_PREP#

33

33

33

33

33

R4911

33_5%_2

21

R4895

33_5%_2

57

AZ_R3S_SDOUT

C4767

X4750

C4788

18PF_50V_2

OUT
OUT

HDD_HALTLED

PCH_TCK

PCH_TMS

PCH_TDI

PCH_TDO

21

21

R4903

33_5%_2

21

4

32

21

1

SRTCRST#

INTRUDER#

OUT

A_3S_ICHSPKR

R4901

AZ_R3S_SDIN0

IN

IN

ISO_PREP#

OUT

IN
IN
IN

OUT

R_SPI_CLK_FLH

R_SPI_CS0#_FLH

R_SPI_SI_FLH

ISO_PREP#

21

2

R4862

10M_5%_2

2 1

R4910

33_5%_2

33_5%_2

21

1K_5%_2

PCH_TCK

PCH_TMS

PCH_TDI

PCH_TDO

TP716

R4905

0_5%_2

Q4750

1

R4866

G

R4868

33_5%_2

21

P5V0S

U4701

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

21

1

D S

BSS138

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

21

HDA_DOCK_EN#/GPIO33

N32

HDA_DOCK_RST#/GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

ITL_PANTHERPOINT_FCBGA_989P

P3V3A

21

R4904

3

1K_5%_2

2 1

OUTOUT

P5V0S

HDA_SYNC

5 4

LAYOUT NOTE:JTAG_TMS TERMINATIONS NEED TO BE PLACED NEAR PCH
LAYOUT NOTE:JTAG_TDI TERMINATIONS NEED TO BE PLACED NEAR PCH
LAYOUT NOTE:JTAG_TDO TERMINATIONS NEED TO BE PLACED NEAR XDP

Q4762

2

G

3

D S

BSS138

INOUT

HDA_SDO_R

33

1

8/22

33

OUT

33

OUT

33

OUT

PCH_TDI
PCH_TMS
PCH_TDO

P3V3A

PLACEMENT NOTE

R4807

2 1

R4886

R4891

2 1

2 1

210_1%_2_DY

210_1%_2_DY

210_1%_2_DY

D

R4806

2 1

100_1%_2_DY

C38

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

RTC

IHDA

JTAG

SPI

33

FWH4/LFRAME#

LPC

LDRQ0#

LDRQ1#/GPIO23

SERIRQ

SATA0RXN

SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN

SATA1RXP
SATA1TXN
SATA1TXP

SATA 6G

SATA2RXN

SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN

SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN

SATA4RXP

SATA

SATA4TXN
SATA4TXP

SATA5RXN

SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#

SATA0GP/GPIO21

SATA1GP/GPIO19

LPC_3S_AD(0)

A38

LPC_3S_AD(1)

B37

LPC_3S_AD(2)

C37

LPC_3S_AD(3)

D36

LPC_3S_FRAME#

E36
K36

R4906

10K_5%_2_DY

V5

PCI_3S_SERIRQ

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11

L2 MAX. = 100 MILS

Y10

AB12

L2 MAX. = 100 MILS

AB13

R4821

AH1

750_1%_2

PLACE CLOSE TO PCH

R4816

2 1

P3

LED_3S_SATA#

V14
P1

R4907

0_5%_2

21

21

0_5%_2

CHANGE by

21

OUT

IN

IN
OUT
OUT

IN

IN
OUT
OUT

37.4_1%_2

49.9_1%_2

P3V3S

OUT

P3V3S

OUT

BI
BI
BI
BI

OUT

R4851

R4852

XXX

48

50

48

50

48

50

48

50

50

48

PCI_3S_SERIRQ

SATA_RX0_C_DN
SATA_RX0_C_DP
SATA_TX0_C_DN
SATA_TX0_C_DP

SATA_RX1_C_DN
SATA_RX1_C_DP
SATA_TX1_C_DN
SATA_TX1_C_DP

L1 MAX. = 500 MILS

21

L1 MAX. = 500 MILS

21

56

LED_3S_SATA#

GPIO19

P3V3S

R4912

0_5%_2

2 1

50

33

48

44
44

SATA HDD

44

44

44
44

44

MSATA

44

P1V05S_VCCP

P1V05S_VCCP

NOTE:

IMPEDANCE TARGET : 50 +/- 15% OHM

AVOID ROUTING COMP SIGNALS NEXT TO CLOCK PINS.

33

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_1/9

DOC.NUMBER

CODE

DATE

21-OCT-2002

23

SIZE

1310xxxxx-0-0

CS

A3

SHEET

R4889

R4885

2 1

2 1

100_1%_2_DY

100_1%_2_DY

CC

B

AA

REV

of

X01

8033

1

8 7

REFERENCE NUMER : 4700~4949

P3V3S

R4908

21

GPIO20

0_5%_2

R4702

0_5%_2

21

CMNID1

P3V3A

D

R4810

21

CLKREQ_PCIE_CARD#

0_5%_2

R4855

21

CLKREQ_WLAN#

0_5%_2

R4797

21

PCH_3M_SMCLK

2.2K_5%_2

R4884

21

PCH_3M_SMDATA

2.2K_5%_2

R4864

21

0_5%_2

R4888

0_5%_2

R4822

0_5%_2

R4829

0_5%_2

P3V3A

Q4753

S1

2

G1

D1
D2

5

G2

S2

2N7002DW

P3V3S

B

P3V3S

Q4752

2

G1

5

G2

2N7002DW

Q4756

2

G1

5

G2

2N7002DW

S1

D1
D2

S2

1

S1

6

D1

3

D2

4

S2

GPIO46

21

GPIO44

21

GPIO56

21

GPIO73

1

PCH_SML1CLK

6

PCH_KBC_SMCLK

3

PCH_KBC_SMDATA

4

PCH_SML1DATA

1

PCH_3S_SMCLK

6

PCH_3A_SMCLK

3

PCH_3A_SMDATA

4

PCH_3S_SMDATA

R4837

2 1

2.2K_5%_2

R4843

2 1

2.2K_5%_2

R4838

2 1

2.2K_5%_2

R4844

2 1

2.2K_5%_2

8

BANDIT PLATFROM ID

GPIO34
GPIO18 1

MEDIA CARD

WLAN

NIC

R4896

10K_5%_2_DY

R4856

2 1

2.2K_5%_2

IN
IN

2.2K_5%_2

R4827

2.2K_5%_2

R4913

2 1

R4835

0_5%_2_DY

IN

R4830

2 1
2 1

R4792

IN

R4836

0_5%_2_DY

2 1

2.2K_5%_2

R4828

P3V3S

I213

IN

IN
IN

IN

P3V3AL

P3V3AL

P3V3S

21

73

34

PCH_KBC_SMCLK

73

484834

PCH_KBC_SMDATA

21

21

PCH_3S_SMCLK

2.2K_5%_2

2.2K_5%_2

PCH_3S_SMDATA

21

THERM_CLK

PCH_KBC_SMCLK
PCH_KBC_SMDATA

THERM_DATA

0

PCIE_RX3_C_DN

60

PCIE_RX3_C_DP

60

PCIE_TX3_C_DN

60

PCIE_TX3_C_DP

60

53

PCIE_RX4_C_DN
PCIE_RX4_C_DP

53

PCIE_TX4_C_DN

53

PCIE_TX4_C_DP

53

51

PCIE_RX6_C_DN

51

PCIE_RX6_C_DP

51

PCIE_TX6_C_DN

51

PCIE_TX6_C_DP

P3V3A

P3V3A

P3V3S

I2C_CLK

P3V3A

P3V3S

29

32

47 22

22 47

55

34

47

32473429 56

IN

IN

I2C_DATA

7 6

IN

IN
OUT
OUT

IN

IN
OUT
OUT

IN

IN
OUT
OUT

CLK_PCIE_CARD_DN

60

CLK_PCIE_CARD_DP

60

34

CLKREQ_PCIE_CARD#

60

56

53

CLK_PCIE_WLAN_DN
CLK_PCIE_WLAN_DP

55

51

CLK_PCIE_LAN_DN

51

34

73

48 34

CLK_PCIE_LAN_DP

51

38 34

73

48

6 5

21

C4816

21

C4811

21

C4819

21

C4818

21

0.1UF_16V_2

C4820

21

0.1UF_16V_2

C4817

5334

53

CLKREQ_WLAN#

CLKREQ_LAN#

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

GPIO20

PCIE_TX3_DN
PCIE_TX3_DP

PCIE_TX4_DN
PCIE_TX4_DP

PCIE_TX6_DN
PCIE_TX6_DP

CMNID1

OUT

IN

OUT
OUT

CLKREQ_PCIE_CARD#

IN

OUT
OUT

CLKREQ_WLAN#

IN

CLK_PEG_DN
CLK_PEG_DP

OUT
OUT

CLKREQ_LAN#

IN

GPIO46

TP830

TP831

1
1

TP30
TP30

U4701

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

AB49
AB47

AB42
AB40

AK14
AK13

M1

A8

Y43
Y45

L12

V45
V46

L14

E6

V40
V42

T13
V38

V37
K12

J2

AA48
AA47

V10

Y37
Y36

PCIECLKRQ0#/GPIO73

PCIECLKRQ1#/GPIO18

PCIECLKRQ2#/GPIO20

PCIECLKRQ3#/GPIO25

PCIECLKRQ4#/GPIO26

PCIECLKRQ5#/GPIO44

PEG_B_CLKRQ#/GPIO56

PCIECLKRQ6#/GPIO45

PCIECLKRQ7#/GPIO46

CLKOUT_PCIE1N
CLKOUT_PCIE1P

CLKOUT_PCIE2N
CLKOUT_PCIE2P

CLKOUT_PCIE3N
CLKOUT_PCIE3P

CLKOUT_PCIE4N
CLKOUT_PCIE4P

CLKOUT_PCIE5N
CLKOUT_PCIE5P

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

ITL_PANTHERPOINT_FCBGA_989P

GPIO73

GPIO44

GPIO56

5 4

4

SMBUS

PCI-E*

Link

Controller

CLOCKS

FLEX CLOCKS

3 2 1

R4738

0_5%_2

21

21

0_5%_2

0_5%_2

0_5%_2

0_5%_2

0_5%_2

0_5%_2

0_5%_2

0_5%_2

0_5%_2

DATE

0_5%_2

20K_5%_2

R4840

21-OCT-2002

21

IN
BI
BI

P3V3A

OUT

BI
BI

P3V3A

21

BI
BI

BI

BI

OUT

P3V3A

OUT
OUT

34

IN

CLK_R3S_PCH_FB

21

R4898

1M_5%_2

23

FPR_OFF

PCH_3A_SMCLK

PCH_3A_SMDATA

PCH_DDR_RST

PCH_3M_SMCLK

PCH_3M_SMDATA

PCH_SML1CLK

PCH_SML1DATA

CL_CLK1

34

CL_DATA1

CL_RST#1

CLK_DMI_PCH_DN
CLK_DMI_PCH_DP

37

3

2

4

1

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/PCHHOT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

CHANGE by

XXX

E12

FPR_OFF_PCH

H14

PCH_3A_SMCLK

C9

PCH_3A_SMDATA

A12

PCH_DDR_RST

C8

PCH_3M_SMCLK

G12

PCH_3M_SMDATA

C13
E14

PCH_SML1CLK

M16

PCH_SML1DATA

M7

CL_CLK1

T11

CL_DATA1

P10

CL_RST#1

M10

10K_5%_2_DY

AB37
AB38

AV22
AU22

AM12
AM13

R4823

BF18
BE18

R4820
R4878

BJ30
BG30

R4876
R4859

G24
E24

R4860
R4853

AK7
AK5

R4817
R4893

K45

H45

CLK_R3S_PCH_FB

V47

XTAL25_IN

V49

XTAL25_OUT

R4897

Y47

90.9_1%_2

K43
F47
H47
K49

R4701

2 1

R4890

0_5%_2

R4899

21
21

21
21

21
21

21
21

21

P1V05S_VCCP

21

4648

34

34

34

23

51

34

34

51

34

34

5334

53

34

53

23

23

C4828

21

15PF_50V_2

X4751

25MHZ

C4826

21

15PF_50V_2

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_2/9

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8034

1

REV

X01

D

CC

B

AA

8 7

REFERENCE NUMER : 4700~4949

NOTE:

1.SLP_SUS AND SUSACK# ARE NC IF DSW IS NOT SUPPORTED

2.DPWROK SHOULD CONNECT TO RSMRST# IF DSW NOT SUPPORTED

3.PCH_DPWROK PULL UP TO P3V3S ENABLES DSW WUPPORT. NO INSTALL R4752 TO DISABLE DSW

D

33

35

48

PM_PWROK

B

4835

50

IN

ADP_PRES_OUT

4835

PM_PWROK

R4752

0_5%_2

2 1

PCI_3S_CLKRUN#

IN

23
35

P3V3A

P3V3A

2335

PM_DRAM_PWRGD

3548

3548

SUS_PWR_ACK

49

33 4835

PWR_BTN_OUT#

R4743

0_5%_2

R4744

2 1

ISOLATION

PCI_3S_CLKRUN#

BI

24

DMI_RX0_DN

24

DMI_RX1_DN

24

DMI_RX2_DN

24

DMI_RX3_DN

24

DMI_RX0_DP

24

DMI_RX1_DP

24

DMI_RX2_DP

24

DMI_RX3_DP

24

DMI_TX0_DN

24

DMI_TX1_DN

24

DMI_TX2_DN

24

DMI_TX3_DN

24

DMI_TX0_DP

24

DMI_TX1_DP

24

DMI_TX2_DP

24

DMI_TX3_DP

XDP_DBRESET#

18

3320

M_PWROK

18

RSMRST#

33

21

35

10K_5%_2_DY

35

35

33

BT_OFF

PM_RI#

6 5

IN
IN
IN
IN

IN
IN
IN
IN

OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT

P1V05S_VCCP

R4760
R4750

IN

VGATE

21

49.9_1%_2

21

750_1%_2

TP4700

TP30

XDP_DBRESET#

VGATE

IN

1

IN

PM_DRAM_PWRGD

OUT

RSMRST#

IN

SUS_PWR_ACK

BI

PWR_BTN_OUT#

IN

ADP_PRES_OUT

53

IN

IN

R4727

8.2K_5%_2

BT_OFF

PM_RI#

P3V3S

21

U4701

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPW RDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT/GPIO31

E10

BATLOW#/GPIO72

A10

RI#

ITL_PANTHERPOINT_FCBGA_989P

35

19

3548

21

PM_RI#

SLP_LAN#

DMI

System Power Management

PM_RI#

OUT

SLP_LAN#

OUT

PCIE_WAKE#_3A

FDI

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_LAN#/GPIO29

4

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0

FDI_RXP1

FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

R4745

10K_5%_2_DY

R4717

R4716

0_5%_2

0_5%_2

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16
AV12
BC10
AV14
BB10

A18

E22

B9K3

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

PCIE_WAKE#_3A

PCI_3S_CLKRUN#

SUSCLK32_KBC

1

H_PM_SYNC

SLP_LAN#

P3V3A

21

21

21

R4742

2 1

330K_5%_2

R4741

330K_5%_2_DY

TP4705

3 2 1

24
24
24
24
24

24

24

24

24

24
24
24
24
24
24
24

24

35

24

35

24 35

24 35

24

35

18

35

33

PCIE_WAKE#

48

21

9
42 574845

18 19

23

35

48

19

48

545348

3548

45

211810

27

215520

1918

21

20

48

21

R4781

0_5%_2

OUT
OUT
OUT
OUT
OUT

21

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN
IN
IN
IN
IN
IN
IN
IN

IN
IN
IN
IN
IN
IN
IN
IN

IN

21

BI

FDI_TX0_DN
FDI_TX1_DN
FDI_TX2_DN
FDI_TX3_DN
FDI_TX4_DN
FDI_TX5_DN
FDI_TX6_DN
FDI_TX7_DN

FDI_TX0_DP
FDI_TX1_DP
FDI_TX2_DP
FDI_TX3_DP
FDI_TX4_DP
FDI_TX5_DP
FDI_TX6_DP
FDI_TX7_DP

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

P3V3_RTC

RSMRST#

IN

50

PCI_3S_CLKRUN#

35

SUSCLK32_KBC

SLP_S5#_3R

SLP_S4#_3R

SLP_S3#_3R

PM_SLP_A#

H_PM_SYNC

35

SLP_LAN#

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_3/9

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8035

8 7

REFERENCE NUMER : 4700~4949

6 5

4

3 2 1

OUT
OUT

BI
BI

43
43

43
43
43

43
43
43

P3V3S

OUT
OUT

OUT
OUT
OUT

OUT
OUT
OUT

OUT
OUT

OUT
OUT
OUT

OUT
OUT
OUT

R4824
R4825

R4826

OUT
OUT
OUT

BI
BI

OUT
OUT

L_BKLT_EN
LVDS_VDD_EN

OUT

INV_PWM_3

LVDS_DDC_CLK
LVDS_DDC_DATA

2.2K_5%_2

21
21

2.2K_5%_2

21

2.37K_1%_2

LVDSA_CLK_DN
LVDSA_CLK_DP

LVDSA_DATA0_DN
LVDSA_DATA1_DN
LVDSA_DATA2_DN

LVDSA_DATA0_DP
LVDSA_DATA1_DP
LVDSA_DATA2_DP

LVDSB_CLK_DN
LVDSB_CLK_DP

LVDSB_DATA0_DN
LVDSB_DATA1_DN
LVDSB_DATA2_DN

LVDSB_DATA0_DP
LVDSB_DATA1_DP
LVDSB_DATA2_DP

CRT_DDCCLK
CRT_DDCDATA

CRT_HSYNC
CRT_VSYNC

R4627

21

CRT_B
CRT_G
CRT_R

1K_1%_2

43
43

36

43

INV_PWM_3

P3V3S

43
43

D

43
43

36
36

36 42

CRT_HSYNC
CRT_VSYNC

43
43
43

43
43
43

36

CRT_B
CRT_G
CRT_R

P3V3S

P3V3S

P3V3S

R4787

R4786

2 1

2 1

2.2K_5%_2

2.2K_5%_2

1

S1

G1

2

1

S1

G1

2

1

S1

DP_EN

1

S1

DP_EN

3

6

D2

D1

3

6

D2

D1

6

D1

G1

2

6

G1

2

MB_DP_AUXN_CONN

4

S2

G2

5

MB_DP_AUXP_CONN

4

S2

G2

5

4

3

S2

D2

G2

5

4

3

S2

D2

D1

G2

5

55 36

55 36

DPC_DDC2CLK

DPC_DDC2DATA

DPB_DDC2DATA

42 36

C4756

0.1UF_16V_2

C4757

0.1UF_16V_2

DPD_DDC2DATA

Q4701

36

DDC_EN

2N7002DW

42

DDC_EN

IN

DPD_DDC2CLK

Q4702

2N7002DW

DDC_EN

P3V3S

R4789

21

21

R4791

2 1

100K_5%_2_DY100K_5%_2_DY

DPD_AUX#_C

DP_EN

DPD_AUX_C

2 1

DP_EN

IN

42 36

Q4703

2N7002DW

IN

2N7002DW

IN

Q4704

DDC_EN

42 36

7 6

36

DPD_DDC2DATA

DPD_DDC2CLK

36

BI

BI

B

36

DDCAUX_D0_DN

DDCAUX_D0_DP

36

BI

BI

8

R4788

2 1

100K_5%_2

MB_DP_AUXN_CONN

MB_DP_AUXP_CONN

R4790

2 1

100K_5%_2

DPB_DDC2CLK

OUT

OUT

OUT

OUT

42

BI

36

BI

42

42
42

36

42

CRT_DDCCLK

CRT_DDCDATA

4236

36

42

R4930

2.2K_5%_2

R4931

2.2K_5%_2

R4782

2.2K_5%_2

R4784

2.2K_5%_2

42

21

21

21

21

36

5 4

M45

AF37
AF36

AE48
AE47

AK39
AK40

AN48
AM47
AK47

AJ48

AN47
AM49
AK49

AJ47

AF40
AF39

AH45
AH47

AF49
AF45

AH43
AH49

AF47
AF43

N48

M40

M47
M49

U4701

J47

L_BKLTEN
L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

LVD_IBG
LVD_VBG

LVD_VREFH
LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

ITL_PANTHERPOINT_FCBGA_989P

3655

DPB_HPD

55

36

DPC_HPD

42 36

DPD_HPD

OUT
OUT
OUT

CHANGE by

LVDS

CRT

DPB_HPD

DPD_HPD

XXX

Digital Display Interface

100K_5%_2

100K_5%_2

100K_5%_2

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_CTRLCLK
SDVO_CTRLDATA

DDPC_CTRLCLK
DDPC_CTRLDATA

DDPD_CTRLCLK
DDPD_CTRLDATA

R4759

R4932

R4761

SDVO_STALLN
SDVO_STALLP

SDVO_INTN

SDVO_INTP

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

21

21

21

DATE

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

21-OCT-2002

23

BI

DPB_DDC2CLK

BI

DPB_DDC2DATA

BI

DDCAUX_B0_DN

BI

DDCAUX_B0_DP

IN

DPB_HPD

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

BI
BI

BI
BI

BI
BI
IN

OUT
OUT
OUT
OUT

DPB0_DN
DPB0_DP
DPB1_DN
DPB1_DP
DPB2_DN
DPB2_DP
DPB3_DN
DPB3_DP

BI
BI

IN

55
55
55
55

55
55

DPC_DDC2CLK
DPC_DDC2DATA

DDCAUX_C0_DN
DDCAUX_C0_DP
DPC_HPD

DPC0_DN
DPC0_DP
DPC1_DN
DPC1_DP

DPD_DDC2CLK
DPD_DDC2DATA

DDCAUX_D0_DN
DDCAUX_D0_DP
DPD_HPD

DPD0_DN
DPD0_DP
DPD1_DN
DPD1_DP
DPD2_DN
DPD2_DP
DPD3_DN
DPD3_DP

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_4/9

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8036

1

D

36

55

3655

55
55

55

36

55

55

36

CC

55

55
55
55
55

36

36

36

36

42

36

42
42
42
42
42
42
42
42

B

AA

REV

X01

8 7

REFERENCE NUMER : 4700~4949

P3V3S

RS4765

8

1

7

2

6

3

5 4

R4772
R4768
R4709
R4758

R4719

2 1

2 1

8.2K_5%

0_5%_2

8
7
6
5 4

R4770

R4771

8.2K_5%_2

21

8.2K_5%_2

21

8.2K_5%_2

21

8.2K_5%_2_DY

21

21

RS4784

8.2K_5%

10K_5%_2_DY

10K_5%_2_DY

1
2
3

P3V3S

D

P3V3S

P3V3S

P3V3A

R4736
R4734

R4815

R4739

R4737
R4793
R4778

54
60
48 37 50

53

R4740

23

B

0_5%_2

2 1

0_5%_2

2 1

0_5%_2

2 1

0_5%_2

2 1

0_5%_2

2 1

0_5%_2

2 1

0_5%_2

2 1

51

BUF_PLT_RST#

0_5%_2

2 1

8

NMI_SMI_DBG#
PCI_3S_INTC#
PCI_3S_INTA#

OUT

GPIO54

ACCEL_INT#

GPIO03

GPIO50

PCI_3S_INTB#
PCI_3S_INTD#

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

724437 33

PLT_RST#

BUF_PLT_RST#

OUT

SC_PWRSV#

37

GPIO52

OUT

CAMERA_ON

IN

GPIO55

GPIO14

LANLINK_STATUS

GPIO59

GPIO41

GPIO42

GPIO9

GPIO43

37

GPIO40

OUT

R4713

2 1

100K_5%_2

48

37
37

34

50

37

48

37

7 6

56

37 43

37

37

52 5537

37

37

37

37

37

PLT_RST#

P3V3A

1

5

U4700

NC

+

4

-

PHP_74LVC1G17_SOT753_5P

3

CLK_R3S_KBPCI
CLK_R3S_PCH_FB
CLK_R3S_TPM

CLK_R3S_DEBUG

8.2PF_50V_2_DY

0_5%_2_DY

2

6 5

PORT1:DOCKING
PORT2:LEFT USB2.0(CHARGE PORT)+USB3.0
PORT3:RIGHT1 USB2.0+USB3.0
PORT4:RIGHT2 USB2.0+USB3.0

55

USB30_RX1_DN

59

USB30_RX2_DN

45

USB30_RX3_DN

45

USB30_RX4_DN

55

USB30_RX1_DP

59

USB30_RX2_DP

45

USB30_RX3_DP

45

USB30_RX4_DP

55

USB30_TX1_DN

59

USB30_TX2_DN

45

USB30_TX3_DN

45

USB30_TX4_DN

55

USB30_TX1_DP

59

USB30_TX2_DP

45

USB30_TX3_DP

45

USB30_TX4_DP

R4707

21

43

37

CAMERA_ON

37

GPIO55

56

37

SC_PWRSV#

GPIO03

47 37

C7674

48

NMI_SMI_DBG#
ACCEL_INT#

R4774
R4775
R4777

R4773

C4761

8.2PF_50V_2_DY

2 1

37

CLK_R3S_KBPCI

OUT

CLK_R3S_PCH_FB

OUT

CLK_R3S_TPM

OUT

CLK_R3S_DEBUG CLK_DEBUG

OUT

C7675

2 1

2 1

8.2PF_50V_2_DY

P3V3A

21

22_5%_2

21

22_5%_2

21

22_5%_2

22_5%_2

21

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

TP2048

OUT
OUT

IN
IN
IN
IN

FOR RF

5 4

PCI_3S_INTA#
PCI_3S_INTB#
PCI_3S_INTC#
PCI_3S_INTD#

GPIO50
GPIO52
GPIO54

1

CAMERA_ON

NMI_SMI_DBG#
ACCEL_INT#

R4794

21

10K_5%_2_DY

PLT_RST#

CLK_KBPCI
CLK_PCH_FB
CLK_TPM

BG26

BJ26

BH25

BJ16
BG16
AH38
AH37
AK43
AK45

AH12

AM4
AM5

AB46
AB45

AY16
BG46

BE28
BC30
BE32

BJ32
BC28
BE30

BF32
BG32
AV26
BB26
AU28

AY30
AU26

AY26
AV28

AW30

4

U4701

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9

C18

TP10

N30

TP11

H3

TP12
TP13
TP14
TP15

Y13

TP16

K24

TP17

L24

TP18
TP19
TP20

B21

TP21

M20

TP22
TP23
TP24

USB3RN1
USB3RN2
USB3RN3
USB3RN4
USB3RP1
USB3RP2
USB3RP3
USB3RP4
USB3TN1
USB3TN2
USB3TN3
USB3TN4
USB3TP1
USB3TP2
USB3TP3
USB3TP4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1#/GPIO50

C44

REQ2#/GPIO52

E40

REQ3#/GPIO54

D47

GNT1#/GPIO51

E42

GNT2#/GPIO53

F46

GNT3#/GPIO55

G42

PIRQE#/GPIO2

G40

PIRQF#/GPIO3

C42

PIRQG#/GPIO4

D44

PIRQH#/GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4 OC7#/GPIO14

ITL_PANTHERPOINT_FCBGA_989P

RSVD

PCI

3 2 1

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20

RSVD22

RSVD23

RSVD24

RSVD25

RSVD26
RSVD27

XXX

AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5

AV10
AT8
AY5

BA2
AT12

BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

B33

A14
K20
B17
C16
L16
A16
D14
C14

1
1

R4756

22.6_1%_2

LANLINK_STATUS

NC

NC

DATE

TP7000
TP7001

21

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI

BI
BI
BI
BI

BI
BI

BI
BI

IN
IN
IN
IN
IN
IN
IN
IN

21-OCT-2002

23

USB_P0_DN
USB_P0_DP
USB_P1_DN
USB_P1_DP
USB_P2_DN
USB_P2_DP
USB_P3_DN
USB_P3_DP

USB_P5_DN
USB_P5_DP

USB_P7_DN
USB_P7_DP
USB_P8_DN
USB_P8_DP

USB_P10_DN
USB_P10_DP

USB_P12_DN
USB_P12_DP

GPIO59
GPIO40
GPIO41
GPIO42
GPIO43
GPIO9

55

LANLINK_STATUS
GPIO14

SIZE

A3

NVRAM

USB

CHANGE by

RSVD11

RSVD21

RSVD28
RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43

OC5#/GPIO9

OC6#/GPIO10

55

DOCK_PORT

55
45
45

37
37
37

37
37
37

37

45

45

45

45

53
53

56

56
46
46

43
43

54
54

CONN (CHARGER)
CONN1 RIGHT
CONN2 RIGHT

BLUETOOTH
SMART CARD

FINGER PRINT

CAMERA

WWAN

3752

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_5/6

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

SHEET

of

8037

1

REV

X01

D

CC

B

AA

8 7

REFERENCE NUMER : 4700~4949

10K_5%_2_DY

R4722

21

0_5%_2

R4747

21

0_5%_2

R4725

21

10K_5%_2_DY

R4723

21

0_5%_2

R4730

D

21

P3V3S

R4746

R4785
R4780
R4767
R4728
R4726
R4729
R4803
R4735
R4712
R4706
R4710
R4769
R4755

0_5%_2

21

0_5%_2

21

0_5%_2

21

0_5%_2

21

0_5%_2

21

0_5%_2

21

0_5%_2

21

10K_5%_2_DY

21

10K_5%_2_DY

21

0_5%_2

21

10K_5%_2_DY

21
21

10K_5%_2_DY

0_5%_2

21

0_5%_2

21

P3V3A

B

R4705
R4724
R4720

R4721
R4714
R4841

GPIO17

R4767 R4803
R4722

0_5%_2

21

1K_5%_2

21

10K_5%_2_DY

21

0_5%_2

21

0_5%_2

21

0_5%_2

21

GPIO35

R4841
R4723

10
0
0

1

1 1
1

11

8

GPIO17

IN

GPIO27

CMNID2

GPIO35

GPIO49

GPIO19

RUNSCI0#_3

OCP_OC#

GPIO17

DOCK_ID1

DOCK_ID2

GPIO16

GPIO49

MSATA_CD#

GPIO0

FPR_LOCK#

GPIO37

LPC_RESET#

GPIO68

CLKREQ_LAN#

TLS_ENCRYTION_R

GPIO24

LAN_DIS#

GPI_INV_LIDWAKE

GPIO35

GPIO50GPIO49

0
0

R4758
R4719 L

0

1

R4730

0
00
0

0

0

7 6

6 5

38

4

3 2 1

D

U4701

OUT
OUT

H

SI 1
SI 1B
SI 2

PV 1
MV

OUT

54

56

51

34

38

53

38

48

38

RUNSCI0#_3

38

22

THERM_SCI#

GPI_INV_LIDWAKE

38

51

52

38

38

LAN_DIS#

TLS_ENCRYTION_R

49

WWAN_TRANSMIT_OFF#

38

CMNID2

GPIO35

44

MSATA_CD#

GPIO37

3855

DOCK_ID1

38

DOCK_ID2

38

46

FPR_LOCK#

GPIO49

WLAN_TRANSMIT_OFF#

GPIO16

GPIO17

GPIO24

GPIO27

IN

BI

IN

OUT

IN

OUT
OUT
OUT
OUT

OUT
OUT

RUNSCI0#_3

IN

BI

BI
IN
IN

IN
IN
IN

GPIO0

OCP_OC#

LAN_DIS#

DOCK_ID1

DOCK_ID2

FPR_LOCK#

T7

A42

H36

E38

C10

C4
G2

U2

D40

T5
E8

E16

P8
K1
K4
V8

M5

N2

M3

V13

V3
D6

A4

A45
A46

A5
A6
B3

B47

BD1

BD49

BE1

BE49

BF1

BF49

BMBUSY#/GPIO0

TACH1/GPIO1

TACH2/GPIO6

TACH3/GPIO7

GPIO8

LAN_PHY_PWR_CTRL/GPIO12

GPIO15

SATA4GP/GPIO16

TACH0/GPIO17

SCLOCK/GPIO22

GPIO24

GPIO27

GPIO28

STP_PCI#/GPIO34

GPIO35

SATA2GP/GPIO36

SATA3GP/GPIO37

SLOAD/GPIO38

SDATAOUT0/GPIO39

SDATAOUT1/GPIO48

SATA5GP/GPIO49/TEMP_ALERT#

GPIO57

VSS_NCTF_1

VSS_NCTF_2

VSS_NCTF_3

VSS_NCTF_4

VSS_NCTF_5

VSS_NCTF_6

VSS_NCTF_7

VSS_NCTF_8

VSS_NCTF_9

VSS_NCTF_10

VSS_NCTF_11

VSS_NCTF_12

VSS_NCTF_13

VSS_NCTF_14

ITL_PANTHERPOINT_FCBGA_989P

5 4

TACH4/GPIO68

TACH5/GPIO69

TACH6/GPIO70

TACH7/GPIO71

A20GATE

GPIO

PROCPWRGD

THRMTRIP#

INIT3_3V#

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_15

VSS_NCTF_16

VSS_NCTF_17

VSS_NCTF_18

VSS_NCTF_19

VSS_NCTF_20

VSS_NCTF_21

VSS_NCTF_22

NCTF

VSS_NCTF_23

VSS_NCTF_24

VSS_NCTF_25

VSS_NCTF_26

VSS_NCTF_27

VSS_NCTF_28

VSS_NCTF_29

VSS_NCTF_30

VSS_NCTF_31

VSS_NCTF_32

RCIN#

DF_TVS

NC_1

C40
B41

D3E_WAKE#

C41

LPC_RESET#

A40

GPS_XMIT_OFF#THERM_SCI#

P4
AU16

PECI

P5

PM_3S_KBCCPURST#

AY11

H_PWRGD

R4731

AY10

390_5%_2

T14

AY1
AH8
AK11
AH10
AK10
P37

BG2
BG48
BH3
BH47
BJ4
BJ44A44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

CHANGE by

XXX

OUT

IN

D3E_WAKE#

IN

LPC_RESET#

IN

R4704

21

0_5%_2_DY

R4749

21

0_5%_2_DY

OUT

H_PWRGD

21

PM_THRMTRIP#

IN

SNB_IVB#

48

OCP_PWM_OUT

GPIO68

38

38

GPS_XMIT_OFF#

R4839

0_5%_2

H_PECI

38

23

23

IN

DATE

21-OCT-2002

60

48

38

54

21

BI

IN

PM_3S_KBCCPURST#

38

IN

PM_THRMTRIP#

SSM3K7002FU

23

P3V3S

R4754

21

0_5%_2

R4753

21

0_5%_2

IN

EC_3S_A20GATE

38 48

23

H_PECI

R4708

21

0_5%_2

Q4805

1

G

23

3

DS

4838

R4732

2 1

56_5%_2_DY

OUT

2

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_6/9

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

P3V3S

of

1

48

P1V05S_VCCP

OCP_OC#

8038

REV

X01

CC

B

AA

8 7

REFERENCE NUMER : 4700~4949

6 5

4

3 2 1

P1V05S_VCCP

2.04A

C4751

C4718

2 1

2 1

D

P1V05S_VCCP

10UF_6.3V_3

2.7A

C4727

C4724

C4758

2 1

10UF_6.3V_3

B

P1V05S_VCCP

30MA

R4733

0_5%_2_DY

2 1

1UF_6.3V_2

C4745

2 1

21

2 1

1UF_6.3V_2

0.1UF_16V_2

P1V05S_R_FDIPLL

1UF_6.3V_2

C4742

C4721

2 1

2 1

1UF_6.3V_2

15MA

C4743

1UF_6.3V_2

P3V3S

P1V5S

P1V05S_VCCP

P1V05S_VCCP

C4740

2 1

1MA

2 1

1UF_6.3V_2

P1V05S_VCCP

TP843

TP30

1UF_6.3V_2

1

U4701

AA23

VCCCORE[1]

AC23

VCCCORE[2]

AD21

VCCCORE[3]

AD23

VCCCORE[4]

AF21

VCCCORE[5]

AF23

VCCCORE[6]

AG21

VCCCORE[7]

AG23

VCCCORE[8]

AG24

VCCCORE[9]

AG26

VCCCORE[10]

AG27

VCCCORE[11]

AG29

VCCCORE[12]

AJ23

VCCCORE[13]

AJ26

VCCCORE[14]

AJ27

VCCCORE[15]

AJ29

VCCCORE[16]

AJ31

VCCCORE[17]

AN19

VCCIO[28]

BJ22

VCCAPLLEXP

AN16

VCCIO[15]

AN17

VCCIO[16]

AN21

VCCIO[17]

AN26

VCCIO[18]

AN27

VCCIO[19]

AP21

VCCIO[20]

AP23

VCCIO[21]

AP24

VCCIO[22]

AP26

VCCIO[23]

AT24

VCCIO[24]

AN33

VCCIO[25]

AN34

VCCIO[26]

BH29

VCC3_3[3] VCCDFTERM[2]

AP16

VCCVRM[2]

BG6

VccAFDIPLL

AP17

VCCIO[27]

AU20

VCCDMI[2]

ITL_PANTHERPOINT_FCBGA_989P

POWER

VCC CORE

VCCIO

FDI

VCCADAC

VSSADAC

CRT

VCCALVDS

VSSALVDS

VCCTX_LVDS[1]

VCCTX_LVDS[2]

LVDS

VCCTX_LVDS[3]

VCCTX_LVDS[4]

U48

U47

AK36
AK37

AM37
AM38
AP36
AP37

P3V3S

C4747

2 1

0.01UF_50V_2

P3V3S

P1V5S

30MA

C4735

2 1

0.1UF_16V_2

P1V05S_VCCP

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

V33

V34

AT16

AT20

DMI HVCMOS

VCCCLKDMI

AB36

P1V8S

VCCSPI

AG16

AG17

AJ16

AJ17

V1

P3V3A

C4704

2 1

VCCDFTERM[1]

VCCDFTERM[3]

VCCDFTERM[4]

NAND / SPI

C4725

2 1

20MA

1UF_6.3V_2

C4737

2 1

0.1UF_16V_2

TP4807

TP30

1

FBM_11_160808_181A15T

12

C4749

2 1

22UF_6.3V

2 1

0.1UF_16V_2

C4750

TP4806

TP30

1

12

C4781

C4780

2 1

2 1

2 1

0.01UF_50V_2

0.01UF_50V_2

C4782

P3V3S

L4701

21

L4704

21

FBM_11_160808_181A15T

22UF_6.3V

70MA

D

P1V8S

70MA

CC

P1V05S_VCCP

60MA

20MA

1

TP4805

TP30

1UF_6.3V_2_DY

C4726

2 1

1UF_6.3V_2

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_7/9

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SHEET

of

39

1

REV

X01

80

8 7

REFERENCE NUMER : 4700~4949

P3V3S

D

L4703

P1V05S_VCCP

MLZ1608M100WT

21

B

P1V05S_VCCP

MLZ1608M100WT

8

P1V05S_VCCP

20MA

R4779

0_5%_2_DY

20MA

P1V05S_VCCP

C4732

C4748

2 1

2 1

1UF_6.3V_2

10UF_6.3V_3

P1V05M

1.81A

C4708

2 1

TP4809

TP30

1

+

C4755

C4753

2 1

2 1

1UF_6.3V_2

220UF_2.5V

2 1

C4720

2 1

1UF_6.3V_2

C4719

2 1

C4744

P1V05S_VCCP

C4754

L4702

1

2 1

TP4810

TP30

+

21

C4752

2 1

220UF_2.5V

2MA

C4705

C4706

2 1

2 1

4.7UF_6.3V_3

7 6

21

C4714

2 1

0.1UF_16V_2

30MA

C4729

2 1

10UF_6.3V_3

10UF_6.3V_3

P1V05M

C4785

2 1

P1V05S_L_ADPLLA

P1V05S_L_ADPLLB

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

P1V05M

200MA

C4707

2 1

0.1UF_16V_2

0.1UF_16V_2

6 5

2 1

1UF_6.3V_2

C4769

2 1

21

2 1

TP842

TP30

C4763

2 1

1UF_6.3V_2

0.1UF_16V_2

C4711

2 1

0.1UF_16V_2

AD49

BH23

AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31

BD47

AG34

AG33

0.1UF_16V_2

1
AL29

AL24

W21
W23
W24
W26
W29
W31
W33

N16

BF47

AF17
AF33
AF34

T16

V12

T38

Y49

V16

T17
V19

BJ8

A22

P1V05S_R_VCCACLK

P3V3A

2MA

C4762

0.1UF_16V_2_DY

C4723

2 1

1UF_6.3V_2_DY

C4739

C4738

C4716

2 1

C4786

10UF_6.3V_3

2 1

1UF_6.3V_2

2 1

10UF_6.3V_3

C4700

2 1

P1V5S

P1V05S_VCCP

P1V05S_VCCP

P1V05S_VCCP

R4748

C4712

P3V3_RTC

C4710

2 1

2 1

1UF_6.3V_2

0.1UF_16V_2

50MA

150MA

0_5%_2_DY

21

1UF_6.3V_2_DY

1MA

C4709

1UF_6.3V_2

U4701

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2

VCCIO[14]

DCPSUS[3]

VCCASW[1]

VCCASW[2]

VCCASW[3]

VCCASW[4]

VCCASW[5]

VCCASW[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

VCCASW[13]

VCCASW[14]

VCCASW[15]

VCCASW[16]

VCCASW[17]

VCCASW[18]

VCCASW[19]

VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA

VCCADPLLB

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1]
DCPSUS[2]

V_PROC_IO

POWER

USB

Clock and Miscellaneous

PCI/GPIO/LPCMISC

SATA

CPU

VCCRTC

ITL_PANTHERPOINT_FCBGA_989P

5 4

HDA

RTC

4

VCCIO[29]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCSUS3_3[7]

VCCSUS3_3[8]

VCCSUS3_3[9]

VCCSUS3_3[10]

VCCSUS3_3[6]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

V5REF

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

VCC3_3[1]

VCC3_3[8]

VCC3_3[4]

VCC3_3[2]

VCCIO[5]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCAPLLSATA

VCCVRM[1]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCCSUSHDA

N26
P26
P28
T27
T29

T23
T24
V23
V24
P24

P1V05S_VCCP

T26
M26

AN23
AN24

P34

N20
N22
P20
P22

AA16
W16
T34

AJ2
AF13

AH13
AH14

AF14
AK1

AF11

AC16
AC17
AD17

P1V05M

T21

V21

T19

P32

P1V05S_VCCP

420MA

C4734

2 1

P3V3A

11MA

C4731

2 1

0.1UF_16V_2 1UF_6.3V_2

C4728

10UF_6.3V_3_DY

P3V3A

60MA

C4715

2 1

1UF_6.3V_2

P3V3S

P3V3S

80MA

P3V3S

2MA

P1V05S_VCCP

450MA30MA

TP2049

1

TP30

30MA

120MA

60MA

P3V3A

15MA

3 2 1

P3V3A

2MA

C4713

0.1UF_16V_2

P5V0A_R_V5REF

21

P5V0S_R_V5REF

70MA

C4717

2 1

0.1UF_16V_2

C4736

0.1UF_16V_2

C4703

0.1UF_16V_2

C4722

1UF_6.3V_2

P1V5S

P1V05S_VCCP

C4741

1UF_6.3V_2

C4733

0.1UF_25V_2

CHANGE by

21

P3V3A

2 1

0.1UF_16V_2

21

21

21

21

21

XXX

C4730

TP4811

TP30

2

1

D4700

NC

BAT54_30V_0.2A

R4751

10_5%_2

C4746

2 1

1UF_6.3V_2

P3V3A

P5V0A

21

DATE

13

TP4812

TP30

1

R4762

10_5%_2

21-OCT-2002

23

2

D4701

NC

BAT54_30V_0.2A

P5V0S

2MA

21

SIZE

A3

P3V3S

13

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_8/9

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

SHEET

of

8040

1

REV

X01

D

CC

B

AA

8 7

6 5

4

3 2 1

REFERENCE NUMER : 4700~4949

U4701

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

D

B

8

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

ITL_PANTHERPOINT_FCBGA_989P

7 6

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

U4701

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

ITL_PANTHERPOINT_FCBGA_989P

5 4

CHANGE by

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

XXX

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

PANTHER POINT_9/9

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8041

1

REV

X01

D

CC

B

AA

8 7

6 5

4

3 2 1

CRT_R

36

CRT_R

36

CRT_G

36

CRT_B

D

IN
IN
IN

21

21

21

R3069

R3068

R3067

75_1%_2

75_1%_2

75_1%_2

P3V3S

R3063

R3058

2 1

2 1

4.7K_5%_2

4.7K_5%_2

BI

CRT_DDCDATA

BI

CRT_DDCCLK

57 55 48

4236

42

36

SLP_S3#_3R

42 20

45

REFERENCE NUMBER:3050~3099

1927213518

120NH,5%

L3052

21

120NH,5%

L3053

21

L3055

21

120NH,5%

P3V3S

C3068

2 1

2 1

2 1

12PF_50V_2

12PF_50V_2

12PF_50V_2

C3057

2 1

C3060

2 1

12PF_50V_2

C3071

0.1UF_16V_2

C3061

2 1

12PF_50V_2

12PF_50V_2

C3072

0.1UF_16V_2

2 1

C3056

C3058

P5V0S_CRTVDD

P5V0S

U3051

1

OUT

GND

2

OUT

IN

3

OUT

IN

IN

9

ROHM_BD82024FVJ_TSSOP_8P

OC#EN

C3309

2 1

1UF_6.3V_2

TP3000

1

8
7

TP30

6
54

C3052

0.1UF_16V_2

2 1

VGA_R_L2

VGA_G_L2

VGA_B_L2

P5V0S

U3071

1

VCC-SYNC

2

VCC-VIDEO

3

VIDEO_1

4

VIDEO_2

5

VIDEO_3

6

GND

7

VCC-DCC

8

BYP

NXP_IP4772CZ16_SSOP_16P

2 1

42

CRT_Q_DDCDATA

42

CRT_Q_HSYNC

42

CRT_Q_VSYNC

42

CRT_Q_DDCCLK

SYNC_OUT2

SYNC_IN2

SYNC_OUT1

SYNC_IN1

DDC_OUT2

DDC_IN2

DDC_IN1

DDC_OUT1

16
15
14
13
12
11
10

9

CRT_R_VSYNC

CRT_R_HSYNC

BI
BI
BI
BI

22_5%_2

22_5%_2

R3071

R3072

21

OUT

IN

21

OUT

IN
BI
BI
BI
BI

R3052

2 1

R3051

2 1

CRT_Q_VSYNC
CRT_VSYNC
CRT_Q_HSYNC
CRT_HSYNC
CRT_Q_DDCDATA
CRT_DDCDATA
CRT_DDCCLK
CRT_Q_DDCCLK

P5V0S_CRTVDD

4.7K_5%_2

4.7K_5%_2

CRT_G

CRT_B

P5V0S_CRTVDD

21

R306621R3065

R3064

150_1%_2_DY

2 1

150_1%_2_DY

10
11
12
13
14
15

T-CONN_T21_0024_1A30_0_15P

150_1%_2_DY

D

CLOSE TO PCH

CN3050

1

P1

2

P2

3

P3

4

P4

5

P5

6

P6

7

P7

8

P8

9

P9
P10
P11
P12
P13
P14
P15

G1

G1

G2

G2

CC

P5V0A

0.1UF_16V_2

C3307
C3306

C3310

C3300

21

C3301

21

0.1UF_16V_2

0.1UF_16V_2

C3302

21

0.1UF_16V_2

C3303

21

0.1UF_16V_2

8
7
6
54

C3308

2 1

10UF_6.3V_3

1

TP30

2 1

1UF_6.3V_2

0.1UF_16V_2

TP3300

DPD0_C_DP

DPD0_C_DN
DPD1_C_DP

DPD1_C_DN
DPD2_C_DP

DPD3_C_DN

R3304

1M_5%_2

2 1

DISPLAY PORT CNTR

36

P5V0A

R3303

2 1

IN

0_5%_2

MB_DPD_CONN#

DP_EN

35212057 55 48 42451827

R3305

0_5%_2

2 1

IN

Q3300

1

S1

6

D1

3

D2

4

S2

2N7002DW

42

9

19

SLP_S3#_3R

B

P5V0S

SSM3K7002FU

36

3

Q3301

DS

1

G

2

DDC_EN

IN

IN

DPD_HPD

2

G1

5

G2

36

DPD0_DP

36

DPD0_DN

36

DPD1_DP

3636

DPD1_DN

36

DPD2_DP

DPD2_DN DPD2_C_DN

36

DPD3_DP DPD3_C_DP

36

36

DPD3_DN

MB_DP_AUXP_CONN

36

MB_DP_AUXN_CONN

36

MB_DPD_CONN#

42

IN
IN

IN
IN

IN
IN

IN
IN

21
21

C3305

21

0.1UF_16V_2

C3304

21

0.1UF_16V_2

IN
IN

IN

P3V3S

U3300

1

OUT

GND

2

OUT

IN

3

OUT

IN

IN

OC#EN

ROHM_BD82024FVJ_TSSOP_8P

C3311

2 1

1UF_6.3V_2

CN3300

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

TYCO_2023333_3_20P

R3302

2 1

5.1M_5%_2

G1

G1

G2

G2

G3

G3

G4

G4

REFERENCE NUMBER:3300~3399

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

CRT

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CRT & DP

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8042

1

REV

X01

B

AA

8 7

6 5

4

3 2 1

P3V3S_LCDVDD

D

PVBAT

C3019

2 1

C3020

C3021

2 1

56PF_50V_2

2 1

680PF_50V_2

4.7UF_25V_5

P3V3S

C3006

2 1

P3V3S

R3004

LVDS_DDC_CLK

3643

LVDS_DDC_DATA

43 36

IN

IN

2 1

4.7K_5%_2

R3005

2 1

4.7K_5%_2

B

R3001

100_5%_2

TP3301

U3000

OUTIN
GND

4 3

DIS EN

NUVO_NCT3521U_SOT23_5P

1UF_6.3V_2

TP30

21

C3003

1

4.7UF_6.3V_3

2 1

15
2

36

IN

LVDS_VDD_EN

R3003

100K_5%_2

2 1

BAT54_30V_0.2A

61

48

36

LID_SW#_3

L_BKLT_EN

IN

IN

R3008

D3000

2 1

2

NC

R3009

2K_5%_2

100K_5%_2

P5V0S

13

21

18PF_50V_2

43 36
43 36

36

C3505

2 1

LVDS_DDC_CLK
LVDS_DDC_DATA

LVDSB_CLK_DP

36

LVDSB_CLK_DN

36

LVDSB_DATA0_DP

36

LVDSB_DATA0_DN

36

LVDSB_DATA1_DP

36

LVDSB_DATA1_DN

36

LVDSB_DATA2_DP

36

LVDSB_DATA2_DN

36

36

LVDSA_DATA0_DN

36

LVDSA_DATA0_DP

36

LVDSA_DATA1_DN

36

LVDSA_DATA1_DP

36

LVDSA_DATA2_DN

36

LVDSA_DATA2_DP

36

LVDSA_CLK_DN
LVDSA_CLK_DP

36

INV_PWM_3

P3V3S

USB_P10_DP

37

USB_P10_DN

37

P3V3S_LCDVDD

C3010

680PF_50V_2

IN

57

DMIC_CLK

57

DMIC_DAT

37

CAMERA_ON

IN
IN

WCM_2012_900T

1.5A

D

2 1

P3V3S

68PF_50V_2

CN3000

1

1

2

2

3

3

4

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

C3008

L3000

IN
IN

IN

PVBAT

1.5A

21

USB_P10_L_DP

21

USB_P10_L_DN

34

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

ACES_50473_0500S_002_50P

G1

G1

G2

G2

G3

G3

G4

G4

CC

B

REFERENCE NUMBER:3000~3049

8

7 6

C3012

C3011

2 1

C3013

2 1

2 1

1UF_6.3V_2

4.7UF_6.3V_3

47PF_50V_2

5 4

C3014

2 1

C3016

C3015

2 1

2 1

68PF_50V_2

0.1UF_16V_2

0.01UF_50V_2

C7676

2 1

33PF_50V_2

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

LCM & WEBCAM

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

43

1

REV

X01

80

8 7

D

REFERENCE NUMBER:1700~1749

6 5

33

SATA_TX0_C_DP

33

SATA_TX0_C_DN

33

SATA_RX0_C_DN

33

SATA_RX0_C_DP

903MA

P3V3S

OUT
OUT

IN
IN

0.01UF_50V_2

0.01UF_50V_2

0.01UF_50V_2

0.01UF_50V_2

P5V0S

1.3A

C1700

2 1

C1705

21

C1704

21
21

21

C1703

4

C1702

SATA_TX0_DP
SATA_TX0_DN

SATA_RX0_DN
SATA_RX0_DP

C1701

2 1

68PF_50V_2

4.7UF_6.3V_3

ALLTOP_SK_C11841_22P

SATA HDD

3 2 1

CN1700

S1

GND

S2

A+

S3

A-

S4

GND

S5

B-

S6

B+

S7

GND

P1

V3.3

P2

V3.3

P3

V3.3

P4

GND

P5

GND

P6

GND

P7

V5

P8

V5

P9

V5

P10

GND

P11

RESERVED

P12

GND

P13

V12

P14
P15

G1

V12

G

G2

V12

G

HDD ( CN1700 ) : P/N 6012B0449501
HDD TRANSFOR CNTR ( CN1701 ) : P/N 6012B0451301

D

CC

B

NOTE : SWAP SATA_RXP2 AND SATA_RXN2 ON CN1950 PIN 23 AND 25 FOR INTEL SSD 310 SERIES PRODUCT PINDEFINTION

REFERENCE NUMBER:1950~1999

8

7 6

33

SATA_RX1_C_DP

33

SATA_RX1_C_DN

33

SATA_TX1_C_DN

33

SATA_TX1_C_DP

72

51

38

3337

C1957

C1956

2 1

2 1

10UF_6.3V_3

68PF_50V_2

0.01UF_50V_2

C1950

OUT

C1951

OUT

IN
IN

MSATA_CD#

PLT_RST#

C1952
C1953

OUT

IN

0.01UF_50V_2

0.01UF_50V_2

0.01UF_50V_2

3

5 4

Q1950

DS

21
21

21
21

G

1

SATA_RX1_DP
SATA_RX1_DN

SATA_TX1_DN
SATA_TX1_DP

2

SSM3K7002FU_DY

CN1950

1

WAKE#

3

RESERVED

5

RESERVED

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

17

RESERVED

21

GND

23

PERN0

25

PERP0

27
29

GND

31

PETN0

33

PETP0

35

GND

37

RESERVED

39

RESERVED

41

RESERVED

43

RESERVED

45

RESERVED

47
49

RESERVED

51

FOX_AS0B226_S40QW_7H_52P

MSATA

RESERVED
RESERVED
RESERVED
RESERVED
RESERVEDRESERVED

RESERVED

SMB_DATA

LED_WWAN#

LED_WLAN#

LED_WPAN#

CHANGE by

PERST#

+3.3VAUX

SMB_CLK

USB_D-

USB_D+

2

3.3V

4

GND

6

1.5V

8
10
12
14
1615
18

GNDRESERVED

2019
22
24
26

GND

28

1.5VGND

30
32
34

GND

36
38
40

GND

42
44
46
48

1.5VRESERVED

50

GND

52

3.3VRESERVED

G2G1

G2G1

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SATA HDD & M-SATA CNTR

XXX

DATE

21-OCT-2002

23

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

DOC.NUMBER

CODE

1

REV

X01

8044

8 7

P5V0A_CHG

6 5

P5V0A_CHG

R2512

2 1

R2511

20K_5%_2

17.8K_1%_2

21

4

3 2 1

21

D

37

USB_P1_DN

37

USB_P1_DP

R2515

BI

21

R2514

0_5%_2

P5V0A_CHG

C2513

2 1

47UF_6.3V_5

1716151413

U2511

PWPD

1

IN

2

DM_OUT

3

DP_OUT

4

ILIM_SET

0_5%_2_DY

C2514

2 1

0.1UF_16V_2

REFERENCE NUMBER:2511~2599

GND

ILIM_HI

FAULT#

ILIM_LO

STATUS#

CTL3

CTL2

CTL1

EN

876

5

P5V0A_USB_CHARAGE

2.5A

100UF_6.3V

TP2512

1

12

OUT

11

DM_IN

10

DP_IN

9

TEXAS_TPS2543RTER_QFN_16P

IN
IN
IN

C2512

21

+

TP30

BI

BIBI

CPPWR_EN
SLP_S4#_3R

SLP_S3#_3R

USB_P1_U_DN

USB_P1_U_DP

48

9

10

9

19

59

351845

21

182021

R2511

TPS2543

57

TPS2540/A
PI5USB2543

59

27

48 55

35

42

20K

NI

R2515 R2514

10K

NI

NI

0

D

P5V0A_USB0

1.8A

CC

P5V0A

8
7
6
54

P5V0A_USB0

C2401

TP2400

1

TP30

37

USB_P2_DN

37

USB_P2_DP

37

USB30_RX3_DN

37

2 1

22UF_6.3V_5

USB30_RX3_DP

37

USB30_TX3_DN

37

USB30_TX3_DP

BI
BI

OUT
OUT

IN
IN

WCM_2012_900T

0.1UF_16V_2

C2404
C2405

0.1UF_16V_2

P5V0A

U2400

1

OUT

GND

2

OUT

IN

3

OUT

IN

OC#EN

ROHM_BD82024FVJ_TSSOP_8P

183521 10

IN

C2412

C2415

2 1

2 1

1UF_6.3V_2

22UF_6.3V_5

SLP_S4#_3R

45

B

L2400

C2402

2 1

34

USB_P2_L_DN

21

USB_P2_L_DP

21

USB30_TX3_C_DN

21

USB30_TX3_C_DP

C2403

2 1

0.1UF_16V_2

1000PF_50V_2_DY

SINGA_2UB1585_000121F_9P

CN2400

1

VBUS

2

D-

3

D+

4

PGND

5

SSRX-

6

SSRX+

7

GND

8

SSTX-

G19

GSSTX+

G2

G

G3

G

G4

G

B

USB RIGHT1

P5V0A_USB1

1.8A

P5V0A

P5V0A

P5V0A_USB1

U2401

1

OUT

GND

2

OUT

IN

3

OUT

IN

SLP_S4#_3R

18

35

45

10

21

IN

C2414

C2413

2 1

2 1

22UF_6.3V_5

ROHM_BD82024FVJ_TSSOP_8P

1UF_6.3V_2

OC#EN

REFERENCE NUMBER:2400~2499

8

7 6

TP2401

8
7
6
54

1

TP30

C2411

2 1

22UF_6.3V_5

37
37

37

USB30_RX4_DN

37

USB30_RX4_DP

37

USB30_TX4_DN

37

USB30_TX4_DP

USB_P3_DN
USB_P3_DP

BI
BI

OUT
OUT

IN
IN

L2404

WCM_2012_900T

0.1UF_16V_2

C2406
C2407

0.1UF_16V_2

5 4

C2408

2 1

0.1UF_16V_2

34

USB_P3_L_DN

21

USB_P3_L_DP

USB30_TX4_C_DN

21

USB30_TX4_C_DP

21

C2409

2 1

1000PF_50V_2_DY

1
2
3
4
5
6
7
8

SINGA_2UB1585_000121F_9P

USB RIGHT2

CHANGE by

CN2401

VBUS
D­D+
PGND
SSRX­SSRX+
GND
SSTX-

XXX

AA

G19

GSSTX+

G2

G

G3

G

G4

G

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

USB & USB CHARGER

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8045

1

REV

X01

8 7

6 5

4

3 2 1

D

0_5%_2

4.7UF_6.3V_3

R2211

P3V3ALW

21

0_5%_2_DY

C2200

2 1

0.1UF_16V_2

48

46 34

FPR_OFF

TP30

IN

TP2201

P3V3A

21

R2210

1

C2201

R2201

0_5%_2

2 1

2 1

D

CC

19MA

CN2200

ACES_51571_0064N_001_6P

48

34

46

37
37

USB_P8_DP
USB_P8_DN

BI
BI

D2201

3

PHP_PESD5V2S2UT_SOT23_3P_DY

38

2

1

FPR_OFF

FPR_LOCK#

IN

IN

R2200

B

1

1

2

2

3

3

4

4

5
6

6

0_5%_2

2 1

G1

G15

G2

G2

B

FINGER PRINT CONN

REFERENCE:2200~2249

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

FINGER PRINTER CNTR

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8046

1

REV

X01

AA

8 7

6 5

4

3 2 1

D

D

P3V3S

CC

C1001

14

16

15

U1000

13

RES

12

GND

ACCEL_INT#

4737

IN

ACCEL_INT#

11

INT1

10

RES

9

INT2

P3V3S

R1001

B

0_5%_2_DY

VDD_IO

RES

RES

VDD

NC1
NC1

SCL_SPC

GND

CS

SDO_SA0

SDA_SDI_SDO

ST_HP3DC2TR_LGA_16P

8

7

6

21

R1000

2 1

0_5%_2_DY

1
2
3
4
5

C1000

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

0_5%_2_DY

R1004

R1002

R1003

R1005

21
21

0_5%_2

0_5%_2

21
21

0_5%_2_DY

IN

PCH_3S_SMCLK

IN

THERM_CLK

BI

THERM_DATA

BI

PCH_3S_SMDATA

34 22

34 22

29563432

5629

34

32

B

ACCELEMETOR

REFERENCE NUMER : 1000~1099

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

ACCELEMETOR

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8047

1

REV

X01

AA

8 7

REFERENCE NUMER : 300~399

P3V3AL

D

SCAN_3S_OUT(11..0)

48

49

SCAN_3S_IN(7..0)

48

48

9

ADC_VREF_1126

IN

AGND_KBC

20 48

ADP_A_ID

50

50

48

LPC_3S_AD(0..3)

33

ADP_A_ID

IN

33

48

BI

B

C306

2200PF_50V_2

7

CURRENT_ADC

OCP_A_IN

48

7

2 1

2 1

2200PF_50V_2

C307

C301

2 1

2200PF_50V_2

AGND_KBC

48 33

SPI_CS0#_FLH

SPI_SO_FLH

33

48

R365,R366,R367 CLOSE TO SPI

IN

SPI_SO_FLH

16M ROM SOCKET(CN365):6026B0150101
16M_8P_MICRO N25Q128A13ESEC0F(U365):6019B0988601

8

ADC_VREF_1126

100PF_50V_2

PCI_3S_SERIRQ

R310

SHORT_0603_25

R311

SHORT_0603_25

IN

OCP_A_IN

IN

P3V3A

SPI_WP#

TP332

TP30

1

R301

10_5%_2

C300

2 1

300_5%_2

R300

BI

LPC_3S_AD(0..3)

21

21

R367

33_5%_2

IN

SCAN_3S_OUT(11..0)

OUT

IN

21

21

2 1

33_5%_2

R333

50

48

38

48

6
48

33

R316

21

300_5%_2

21

300_5%_2

R315

R369

21

SPI_SO_FLH_R

7 6

P3V3AL

R303

SCAN_3S_IN(7..0)

48
56

55

18

SLP_S4#_KBC

48
48

RUNSCI0#_3

38

4850

35

PCI_3S_CLKRUN#

37

48

CLK_R3S_KBPCI

33

LPC_3S_FRAME#

LPC_RESET#

48

6

7

LATCHED_ALARM

MAIN_BAT_DET#
SPI_CLK_FLH

53

48

WLAN_OFF

5

ADP_DET

56

48

IM_5S_DATA

54

48

WWAN_OFF

19

SLP_LAN#

35 48

21

48

56

48

5
48

43

61

LID_SW#_3

TRAVEL_BAT_DET#

2

1

3.3K_5%_2

CN365
1
2
3
4

ACES_91960_0084L_8P

R370

0_5%_2_DY

2 1

10K_5%_2_DY

21

IM_5S_CLK

SP_DATA

ADP_EN

CE#
SO
WP#
VSS

0.1UF_16V_2

P3V3AL

3
2

1

0

VDD

HOLD#

SCK

SI

6 5

P3V3AL

10MA

C316

68PF_50V_2_DY

SCAN_3S_OUT(0)

0

SCAN_3S_OUT(1)

1

SCAN_3S_OUT(2)

2

SCAN_3S_OUT(3)

3

SCAN_3S_OUT(4)

4

SCAN_3S_OUT(5)

5

SCAN_3S_OUT(6)

6

SCAN_3S_OUT(7)

7

SCAN_3S_OUT(8)

8

SCAN_3S_OUT(9)

9

SCAN_3S_OUT(10)

10

SCAN_3S_OUT(11)

11

SCAN_3S_IN(0)

0

SCAN_3S_IN(1)

1

SCAN_3S_IN(2)

2

SCAN_3S_IN(3)

3

SCAN_3S_IN(4)

4

SCAN_3S_IN(5)

5

SCAN_3S_IN(6)

6

SCAN_3S_IN(7)

7

OUT

SLP_S4#_KBC

OUT

RUNSCI0#_3

OUT

PCI_3S_CLKRUN#

IN

CLK_R3S_KBPCI

IN

LPC_3S_FRAME#

IN

LPC_RESET#

IN
IN

IN
IN

OUT

IN
OUT
OUT

IN

BI
OUT

IN
IN

8
7
6
5

C366

2 1

FOR RF

LPC_3S_AD(3)
LPC_3S_AD(2)
LPC_3S_AD(1)
LPC_3S_AD(0)

MAIN_BAT_DET#

WLAN_OFF

IM_5S_DATA
WWAN_OFF
SLP_LAN#

SP_DATA
ADP_EN

LID_SW#_3

21

R368

3.3K_5%_2

SPI_HOLD#_DB
SPI_CLK_FLH
SPI_SI_FLH

1

2

68PF_50V_2_DY

FOR RF

2 1

IM_5S_CLK

C319

C303

2 1

C131

C314

C315

0.1UF_16V_2

0.1UF_16V_2

2 1

21
20
19
18
17
16
13
12
10

9
8
7
6

5
29
28
27
26
25
24
23
22
41
42
35
36
40
38
76
55
57
54
51
50
48
46
52
53
45

1

2

3
30
31
32
33
34
43
44
62
63
64
65
66
67
94

0.1UF_16V_2

2 1

2 1

C308

2 1

0.1UF_16V_2

C310

2 1

0.1UF_16V_2

C317

2 1

68PF_50V_2

U300

KOS00
KOS01
KOS02
KOS03
KOS04
KOS05
KOS06
KOS07
KOS08
KOS09
KOS10
KOS11
KOS12
KOS13
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
ADC_VREF
ADC2_GPIO40
IMCLK
VSS7
AVCC
ADC4-GPIO50
NEC_SCI
CLKRUN#
SER_IRQ
PCI_CLK
LAD3
LAD2
LAD1
LAD0
LFRAME#
LRESET#
AVSS
ALARM_CKT#2_GPIO36
HSTCLK_GPIO41
FLCLK
GPIO39
AC-CKT#2-GPIO42
IMDAT
GPIO38
GPIO37
ADC1_GPIO46
ADC_TO_PWM_IN
KDAT
GPIO35
GPIO34
Q_GPIO33
EMCLK
EMDAT
HSTDATAIN_GPIO43

TP1120

P3V3AL

0.1UF_16V_2

14

VCC10

Keyboard / Mouse Interface

Mgmt

Power

GPIO52-PWM3

72

INOUT

SPI_HOLD#_DB

IN

SPI_CLK_FLH

IN

SPI_SI_FLH

39

SIRQ

1

SPI BIOS

5 4

9

ADC3-GPIO23

VOLTAGE_ADC

IN

58

VCC12

VSS0

11

106

84

VCC13

VCC14

Access BusLPC Bus

Intreface

Miscellaneous

VCC11

VSS2

37

P3V3_RTC

C312

2 1

0.1UF_16V_2

119

15

49

68

CAP

GPIO53-AB3_DATA

VCC2

VCC0

VCC15

CFETA_OUT7_NSMI

OUT9-TACH2PWM_OUT

PWM_CHRGCTL

VREF_PECI

GPIO3-PECI_DATA

OUT1-RSMRST#

GPIO16-TACH2PWM_IN

Genrel Purpose I/O Interface

ADP_PRES-CKT#2-GPIO27

GPIO32-AB3_CLK

AB1A_DATA

PWMOK_PWMDEA D#-CKT#2-GPIO

VSS4

VSS3

825647

AB1B_DATA

32KHZ_INPUT

ADC_TO_PWM_OUT-GPIO19

32KHZ_OUT-GPIO22

NRESET_OUT

VCC1_RST#

NPWR_LED

CFETB_GPIO10

HSTCS0#_GPIO44

HSTDATAOUT_GPIO45

FLDATAOUT

VSS6

VSS5

SMSC_KBC1126_VTQFP_128P

117

104

48

48

33

48

33

FET_A

FET_B

2 1

OUT0

OUT8

OUT10

GPIO01

GPIO04
GPIO05

GPIO08
GPIO09

GPIO11
GPIO012
GPIO013
GPIO014
GPIO015

GPIO017

KCLK
GPIO020
GPIO021
GPIO024
GPIO025
GPIO026

GPIO028
GPIO029
GPIO030
GPIO031

AB1A_CLK

AB1B_CLK

TEST_PIN

NBAT_LED

NFDD_LED

PWEGD

FLDATAIN

FLCS0#

C302

2 1

1UF_6.3V_2

C311

NMI_SMI_DBG#

124
125
123
122
121
120
118
107
79
80
81
83
85
86
87
88
89
90
91
92
101
102
61
103
105
4
73
108
74
93
98
99
100
126
112
111
110
109
70
71
59
75
60
69
77
113
115
114
116
78
95
96

97
127
128

KBC_WAKE#

4

P3V3S

C320

C309

2 1

2 1

0.1UF_16V_2

4.7UF_6.3V_3

2 1

0_5%_2

CHARGER_DAT
FET_A

PWM_3S_FAN#
BAT_GRNLED#

SLP_S3#_3R

FPR_OFF_K

KBC_WAKE#

PCH_KBC_SMDATA
PCH_KBC_SMCLK

KBC_PROCHOT
A_SD#

TACH_FAN_IN_1126
EC_3S_A20GATE
SP_CLK

PWR_BTN_OUT#
PWRBTN_1126#
SCAN_3S_OUT(17)
ADP_PRES
PM_SLP_A#
SUS_PWR_ACK

ADP_PRES_OUT

CHARGER_CLK
SCL_MAIN
SDA_MAIN
SCL_MBAY
SDA_MBAY

SUSCLK32_KBC
OCP_PWM_OUT

PM_PWROK

BAT_AMBERLED#

FET_B
PWR_GOOD_3
SPI_SO_FLH

SPI_CS0#_FLH

SPI_SI_FLH

R305

21

100K_5%_2

R304

21

100K_5%_2

68PF_50V_2

R306

IN

0_5%_2_DY

0_5%_2_DY

OUT

NMI_SMI_DBG#

37

OUT

OUT

IN

OUT
OUT
OUT

R328

SLP_S3#_3R

21

R309

21

R302

BI
BI
BI
BI

OUT

IN
OUT
OUT
OUT

1

OUT

0_5%_2

P3V3AL

48

CHARGER_DAT

6

48

FET_A

PWM_3S_FAN#
BAT_GRNLED#
PWM#_LED

42 35 45 48

IN

FPR_OFF

OUT

PCIE_WAKE#

IN

PCH_KBC_SMDATA

IN

PCH_KBC_SMCLK

OUT

KBC_PROCHOT

OUT

A_SD#

OUT

MEM_1V5

IN

BI

SP_CLK

OUT

IN

OUT

IN
IN
IN

OUT

ADP_PRES_OUT

SCL_MAIN
SDA_MAIN
SCL_MBAY

48

SDA_MBAY

KBC_GPIO51

SUSCLK32_KBC
OCP_PWM_OUT

KBC_GPIO22

48

PM_PWROK

IN

VCC1_POR#_3

OUT

BAT_AMBERLED#

OUT

LED_PWRSTBY#

OUT

CAPS_LED#

IN

FET_B

48

OUT

33

R319

TP1121

48

OUT

33

48

33

R308

R323

21

56

48

IM_5S_CLK

56

48

IM_5S_DATA

56

48

SP_CLK

56

48

SP_DATA

CHANGE by

3 2 1

BI
BI

45
9

P3V3AL

61

33

P5V0S

OUT

IN
IN

IN
IN

OUT

IN
BI
BI
BI

IN

100_5%_2

100_5%_2

100_5%_2

100_5%_2

RSMRST#

9

48

48

VADP_DEBUG

CLK_R3S_DEBUG

LPC_3S_FRAME#
PCI_3S_SERIRQ
BUF_PLT_RST#
NMI_SMI_DBG#
LPC_3S_AD(0)
LPC_3S_AD(1)
LPC_3S_AD(2)
LPC_3S_AD(3)

LED_PWRSTBY#
CAPS_LED#

NUM_LOCK_LED#

VCC1_POR#_3

21
21
21
21

48

R356

2 1

4838

P3V3AL

P3V3AL

IN

IN

5

IN

43
48

55

61

56

IN

48

49

IN

48

IN

4.7K_5%_2

4.7K_5%_2

4.7K_5%_2

4.7K_5%_2

SPI_CLK_FLH_R6_R
SPI_CS0#_FLH_R6_R
SPI_SI_FLH_R6_R
SPI_SO_FLH_R6_R

38

0_5%_2

OUT

NUM_LOCK_LED#

OUT

RSMRST#

48

KBC_GPIO22

ADP_EN

LID_SW#_3

LED_PWRSTBY#

CAPS_LED#

VCC1_POR#_3

23

4820

18

IN

DEBUG PORT

100K_5%_2

0_5%_2

R331

100K_5%_2_DY

48 33

50

33 48

50

2360 5354

483337

50

50

48 33

SPI_CLK_FLH

48 33

SPI_CS0#_FLH

48 33

SPI_SI_FLH

48

33

SPI_SO_FLH

48

SPI_HOLD#_DB

2

48

5

D300

NC

22 48

48

33

56

P1V05S_VCCP

49

CPPWR_EN

21

43_5%_2

18 19

TACH_FAN_IN_1126

48

PWR_BTN_OUT#
PWRBTN_1126#
SCAN_3S_OUT(17)

7

ADP_PRES

19

PM_SLP_A#
SUS_PWR_ACK

48

33

27 55

21

56

48

6

48

6

48

9

35
48

48 38

18

48

35

1K_5%_2

56

48

10K_5%_2_DY

21

0_5%_2

57

9

3446

5748

10

48

35

23

2 1

48

49

48

21

OUT

20

P3V3AL

BI
BI
BI
BI

59

48

3748

CLK_R3S_DEBUG

LPC_3S_FRAME#
PCI_3S_SERIRQ

BUF_PLT_RST#

4837

NMI_SMI_DBG#

50

LPC_3S_AD(0)

48

LPC_3S_AD(1)

334833

LPC_3S_AD(2)

4850

LPC_3S_AD(3)

3350 48

56

49

IN
IN
IN
IN
IN

BAT54_30V_0.2A

13

OUT

OUT

38

OUT

H_PECI

R320

21

R330

5354

35

R329

73

48

34

34

73

48

48 23

IN

33 35
48

49

61

48

20

35

48

R326

2 1

OUT

KBC_PWR_ON

OUT

CHARGER_CLK

R307

2 1

0_5%_2

VCC1_POR#_3

IN

10K_5%_2_DY

R342

21

R327

55

48564861

CHG_RST

5

VADP_DEBUG

61

48

55

48 49

48

R375
R376
R377
R378

R375,R376,R377,R378 CLOSE TO KBC

PM_3S_KBCCPURST#

CPPWR_EN

23

100K_5%_2

NUM_LOCK_LED#

21

0_5%_2

21

0_5%_2

48

22

EC_3S_A20GATE

49

48

4835

2118

100K_5%_2

18485

48

IN

PWR_GOOD_3

SPI_CS0#_FLH

48

P3V3S

R385

21

R386

21

R387

21

R388

21

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

KBC & SPI

DOC.NUMBER

CODE

XXX

DATE

21-OCT-2002

23

SIZE

1310xxxxx-0-0

CS

A3

SHEET

48

CN375

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

35

33

18

R340

10K_5%_2_DY

0_5%_2

0_5%_2

0_5%_2

21

of

80

1

48
49

P3V3AL

21

R317

21

R314

21

R322

21

R324

21

R325

21

P3V3A

D

ACES_50238_02471_001_24P

G1

25

G2

26

CC

B

AA

REV

X01

8 7

6 5

4

3 2 1

REFERENCE NUMER : 300~389

48

48

D

Q320

1

57

REC_MUTE_LED_CNTR

B

IN

R383

0_5%_2

KSCAN_3S_IN(4)

KSCAN_3S_IN(12)

G

21

SCAN_3S_IN(5)

REC_MUTE_LED

3

DS

SSM3K7002FU

2

1

2

BAW56S

NUM_LOCK_LED#

D303

CAPS_LED#

49
49
49
4948
49
49

49
49

61

49
49

49

61
49
49
49
49

6

SCAN_3S_IN(4)

5

KSCAN_3S_IN(5)

43

KSCAN_3S_IN(13)

IN
IN

KSCAN_3S_IN(9)
KSCAN_3S_IN(11)
KSCAN_3S_IN(13)
SCAN_3S_IN(7)
KSCAN_3S_IN(6)
KSCAN_3S_IN(5)

KSCAN_3S_IN(3)
KSCAN_3S_IN(1)
KSCAN_3S_IN(2)
KSCAN_3S_IN(4)
KSCAN_3S_IN(0)
KSCAN_3S_IN(10)
KSCAN_3S_IN(12)
KSCAN_3S_IN(8)
KSCAN_3S_IN(14)

R381

270_5%_2

P3V3S

21

SCAN_3S_OUT(9)

KSCAN_3S_IN(9)

OUT

KSCAN_3S_IN(11)

OUT

KSCAN_3S_IN(13)

OUT

SCAN_3S_IN(7)

OUT

KSCAN_3S_IN(6)

OUT

KSCAN_3S_IN(5)

OUT

SCAN_3S_OUT(1)
SCAN_3S_OUT(10)
SCAN_3S_OUT(6)
SCAN_3S_OUT(7)
SCAN_3S_OUT(4)
SCAN_3S_OUT(8)
SCAN_3S_OUT(3)

KSCAN_3S_IN(3)

OUT

KSCAN_3S_IN(1)

OUT

KSCAN_3S_IN(2)

OUT

KSCAN_3S_IN(4)

OUT

KSCAN_3S_IN(0)

OUT

KSCAN_3S_IN(10)

OUT

KSCAN_3S_IN(12)

OUT

KSCAN_3S_IN(8)

OUT

KSCAN_3S_IN(14)

OUT

SCAN_3S_OUT(5)
SCAN_3S_OUT(2)
SCAN_3S_OUT(0)
SCAN_3S_OUT(11)

JOINT_F0803WR_S_32PNLNT1T00L_32P

P3V3AL

10

11

12
13
14
15
16
17
18
19
20

21

22
23
24
25
26
27
28
29
30

31

32

1
2
3
4
5
6
7
8
9

CN260

1
2
3
4
5
6
7
8
9

10

11

12

13

14

15

16

17

18

19
20
21
22
23
24
25
26
27
28
29
30
3132G

R348

R347

0_5%_2

2 1

R350

R349

0_5%_2

2 1

R351

0_5%_2

0_5%_2

0_5%_2

2 1

2 1

2 1

KSCAN_3S_IN(14)

G1
G2

G

KSCAN_3S_IN(6)

R352

2 1

R353

0_5%_2

2 1

2 1

R354

0_5%_2

0_5%_2

2 1

SCAN_3S_IN(0)

SCAN_3S_IN(1)

SCAN_3S_IN(2)

SCAN_3S_IN(3)

SCAN_3S_IN(4)

SCAN_3S_IN(5)

SCAN_3S_IN(6)

SCAN_3S_IN(7)

SCAN_3S_IN<7..0>

D301

3

SCAN_3S_IN(6)

DAP202KGT146

0
1
2
3
4
5
6
7

OUT

SCAN_3S_IN<7..0>

4849

D

P3V3S

C305

2 1

0.1UF_16V_2

CC

P3V3AL

R101

2 1

61

4955

21

ON_OFF#

IN

ON_OFF#

R100

47_5%_2

100K_5%_2

21

OUT

PWRBTN_1126#

2

D100

NC

C100

2 1

DIODE-BAT54-TAP-PHP_DY

1UF_6.3V_2

P3V3A

48

R103

1K_5%_2

2 1

13

OUT

PWR_BTN_OUT#

33 35 48

B

D304

6

KSCAN_3S_IN(2)

KSCAN_3S_IN(10)

1

2

SCAN_3S_IN(3)

BAW56S

KSCAN_3S_IN(0)

KSCAN_3S_IN(8)

1

2

SCAN_3S_IN(1) KSCAN_3S_IN(9)

BAW56S

D302

SCAN_3S_IN(2)

5

KSCAN_3S_IN(3)

43

KSCAN_3S_IN(11)

6

SCAN_3S_IN(0)

5

KSCAN_3S_IN(1)

43

PWM#_LED

4.7K_5%_2

3

Q9401

DS

1

IN

SSM3K7002FU

G

2

38

GPIO16

NOTE:
GPIO16_SM FOR KEYBOARD LIGHT DETECT

KEYBOARD BACK LIGHT CNTR

8

7 6

5 4

R9420

Q9400

1

SSM3J327R

P5V0S

21

2

SD

G

TP9400

TP30

1

3

1

2
3
4
5
6

IN

7
8

HIROSE_FH34SRJ_8S_0_5SH_50_8P

CHANGE by

CN9415

1
2
3
4
5
6
7
8

AA

G1

G

G2

G

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

KEYBOARD

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

1

REV

X01

8049

8 7

6 5

4

3 2 1

P3V3S P3V3AL P3V3A

D

0_5%_2_DY

INSTALL FOR SLB9656

NO INSTALL FOR SLB9635

U3500

21

26

LAD0

23

LAD1

20

LAD2

17

LAD3

21

LCLK

22

LFRAME#

16

LRESET#

28

LPCPD#

27

SERIRQ

15

CLKRUN#

9

TESTBI_BADDR

8

TESTI

INFINEON_SLB9635TT1_2FW3_19_TSSOP_28P

21

R3512

0_5%_2

TPM1.2

INSTALL FOR SLB9635
NO INSTALL FOR SLB9656

XTALI

XTALO

GPIO

GPIO2

VSB

VDD
VDD

GND
GND
GND
GND

37

50

CLK_R3S_TPM

IN

10PF_50V_2_DY

C3501

2 1

48

50

33
33

48

50
50

48

33

48

50

33

P3V3S

53 50

37 23

503348

PCI_3S_SERIRQ

PCI_3S_CLKRUN#

4835

R3509

4.7K_5%_2

INSTALL FOR SLB9635
NO INSTALL FOR SLB9656

LPC_3S_AD(0)
LPC_3S_AD(1)
LPC_3S_AD(2)
LPC_3S_AD(3)

33

50 48

LPC_3S_FRAME#

48

BUF_PLT_RST#

60

54

INSTALL FOR SLB9635

NO INSTALL FOR SLB9656

21

R3515

0_5%_2_DY

R3508

IN
IN

21

IN
IN
IN
IN

IN
IN

NO INSTALL FOR SLB9656

21

0_5%_2

R3513

0_5%_2

BUF_PLT_RST#_R

0_5%_2_DY

INSTALL FOR SLB9656
NO INSTALL FOR SLB9635

LPC_3S_AD(0)
LPC_3S_AD(1)
LPC_3S_AD(2)
LPC_3S_AD(3)

CLK_R3S_TPM

LPC_3S_FRAME#

BUF_PLT_RST#

INSTALL FOR SLB9635

PCI_3S_SERIRQ

PCI_3S_L_CLKRUN#

21

R3507

21

R3511

0_5%_2_DY

INSTALL FOR SLB9656
NO INSTALL FOR SLB9635

5

R3514

10

2 1

NC

19
24

0_5%_2_DY

4
11
18
25

7

PP

1

NC

3

NC

12

NC

13
14
6
2

C3502

2 1

0.1UF_16V_2

21

R3516

P3V3S

C3506

C3504

2 1

2 1

0.1UF_16V_2

21

R3510

0_5%_2

INSTALL FOR SLB9635
NO INSTALL FOR SLB9656

C3503

2 1

0.1UF_16V_2

0.1UF_16V_2

P3V3S

R3501

0_5%_2_DY

2 1

C3507

4

1

32

X3500

32.768KHZ

18PF_50V_2

C3508

18PF_50V_2

21

21

INSTALL FOR SLB9635
NO INSTALL FOR SLB9656

R3502

0_5%_2_DY

2 1

D

CC

B

B

SLB9635TT1.2SLB9656TT1.2

R3507 INSTALL
R3508

OPEN INSTALL
R3509 OPEN
R3510
R3511
R3512

OPEN

INSTALL

OPEN

X3500 OPEN INSTALL

OPEN

INSTALL
INSTALL

OPEN

INSTALL
INSTALLR3513 OPEN

OPENINSTALLR3514

INSTALLOPENC3507
INSTALLC3508 OPEN

AA

INVENTEC

TITLE

REFERENCE NUMER : 3500~3549

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

MODEL,PROJECT,FUNCTION

CODE

SIZE

CS

A3

TPM

DOC.NUMBER

1310xxxxx-0-0

SHEET

REV

of

X01

8050

1

8 7

REFERENCE NUMER : 400~469

6 5

4

3 2 1

D

34

38

37 443372

34

34

34

PCIE_RX6_C_DP

34

PCIE_RX6_C_DN

51

34

34

51

51

52

LED_3S_LANLINK#_R

525155

51

LED_3S_LANACT#

LED_3S_LANLINK#

P3V3M

B

51

CLKREQ_LAN#

51

PLT_RST#

CLK_PCIE_LAN_DP
CLK_PCIE_LAN_DN

34
34

PCH_3M_SMCLK

PCH_3M_SMDATA

52

OUT
OUT

PCIE_TX6_C_DP
PCIE_TX6_C_DN

51

52 38

LAN_DIS#

OUT
OUT

10K_5%_2_DY

R408

10K_5%_2_DY

R409

LED_3S_LANLINK#_R
LED_3S_LANACT#

18PF_50V_2

0.1UF_16V_2

0.1UF_16V_2

21
21

C404

C400

22PF_50V_2

OUT

IN
IN

IN

CLKREQ_LAN#
PLT_RST#

C408

21

PCIE_RX6_DP

21

PCIE_RX6_DN

C407

IN
IN

10K_5%_2_DY

LED_3S_LANLINK#

R402

R403

PCH_3M_SMCLK
PCH_3M_SMDATA

2 1

LAN_DIS#

470_5%_2

470_5%_2

BI
BI

IN

OUT

TP4001TP4011TP4021TP403

1

21

3

2

X400

21

R400

25MHZ

2 1

4

1

R405

21
21

0_5%_2_DY

TP30TP30TP30TP30

TP404

TP30

1

R404

1K_5%_2

2 1

U400

48

CLK_REQ_N

36

PE_RST_N

44

PE_CLKP

45

PE_CLKN

38

PETp

39

PETn

41

PERp

42

PERn

28

SMB_CLK

31

SMB_DATA

3

LAN_DISABLE_N

26

LED0

27

LED1

25

LED2

32

JTAG_TDI

34

JTAG_TDO

33

JTAG_TMS

35

JTAG_TCK

9

XTAL_OUT

10

XTAL_IN

30

TEST_EN

12

RBIAS

R401

2 1

3.01K_1%_2

PCIE

SMBUS

LED

JTAG

ITL_82579_PQFN_48P

MDI

MDI_PLUS0

MDI_MINUS0

MDI_PLUS1

MDI_MINUS1

MDI_PLUS2

MDI_MINUS2

MDI_PLUS3

MDI_MINUS3

RSVD_NC

RSVD_VCC3P3_1

RSVD_VCC3P3_2

VDD3P3_OUT

VDD3P3_15
VDD3P3_19
VDD3P3_29

VDD1P0_47
VDD1P1_46
VDD1P2_37

VDD1P0_43

VDD1P0_11

VDD1P0_40
VDD1P0_22
VDD1P0_16

VDD1P0_8

CTRL_1P0

VSS_EPAD

VDD3P3

13
14

17
18

20
21

23
24

6

1

P3V3M_R_1_RSVD

2

P3V3M_R_2_RSVD

5

V3M_LAN_OUT_IN

4

15
19
29

47
46
37

43
11

40
22
16
8

7
49

P1V05_LAN

P1V05_LAN

TP410

1

SWF2520CF_4R7K_M

L410

BI
BI

BI
BI

BI
BI

BI
BI

4.7K_5%_2

4.7K_5%_2

P1V05_LAN

C412

2 1

0.1UF_16V_2

21

TRD0_MB_DP
TRD0_MB_DN

TRD1_MB_DP
TRD1_MB_DN

TRD2_MB_DP
TRD2_MB_DN

TRD3_MB_DP
TRD3_MB_DN

2 1
2 1

P1V05_LAN

332MA

C411

2 1

0.1UF_16V_2

TP30TP30

TP411

1

C409

2 1

R407

R406

C403

2 1

0.1UF_25V_2

52

0.1UF_16V_2

P3V3M

C401

2 1

0.1UF_16V_2

P1V05_LAN

C410

2 1

52

52
52

52
52

52

52

P3V3M

90MA

C406

C405

2 1

C402

2 1

2 1

0.1UF_16V_2

C415

2 1

2 1

0.1UF_16V_2

0.1UF_16V_2

C414

C413

2 1

C416

2 1

1UF_6.3V_2

0.1UF_16V_2

22UF_6.3V_5

0.1UF_25V_2

22UF_6.3V_5

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

LAN

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8051

8 7

6 5

4

3 2 1

REFERENCE NUMER : 470~499

Q487

55 37

D

LANLINK_STATUS

OUT

51

3852

LAN_DIS#

IN

3

LAN_DIS#

P3V3M

DS

G

SSM3K7002FU

1

2

IN

LED_3S_LANLINK#

51

D

LAYOUT NOTE:
TO PLACE ONE 0.1UF AT EACH PIN 1 , 4 , 7 , 10
AND PLACE THE 1UF IN THE SPOT THAT
IS AS CLOSE AS POSSIBLE TO ALL 4 PINS

3355

ISO_PREP#

U470

1

TCT1

3

51

TRD0_MB_DN
TRD0_MB_DP

51

51

TRD1_MB_DN

51

B

C478

C477

C476

C475

2 1

2 1

0.1UF_16V_2

2 1

2 1

0.1UF_16V_2

0.1UF_16V_2

TRD1_MB_DP

51

TRD2_MB_DN

51

TRD2_MB_DP

C479

51

TRD3_MB_DN

2 1

TRD3_MB_DP

1UF_6.3V_2

51

0.1UF_16V_2

BI
BI

BI
BI

BI
BI

BI

LANK_LG_2405S_1A_SMD_24P

TD1-

2

TD1+

4

TCT2

6

TD2-

5

TD2+

7

TCT3

9

TD3-

8

TD3+

10

TCT4

12

TD4-

11

TD4+

MCT1

MX1+
MCT2

MX2+
MCT3

MX3+
MCT4

MX4+

24
22

MX1-

23
21
19

MX2-

20
18
16

MX3-

17
15
13

MX4-

14

C471

C472

C473

2 1

2 1

0.01UF_100V_3

0.01UF_100V_3

21

21

R473

R472

75_1%_2

75_1%_2

1000PF_2000V_6

TD-

BI

TD+

BI

RD-

BI

RD+

BI

C-

BI

C+

BI

D-

BI

D+

BIBI

C470

2 1

2 1

0.01UF_100V_3

0.01UF_100V_3

21

21

R471

R470

75_1%_2

75_1%_2

21

C474

TD­TD+

RD­RD+

C­C+

D­D+

IN

55

52

55

52

55
55

52

SSM3K7002FU

52
52

52

55

52

55

52

55

55

R485

2 1

3

Q486

DS

1

G

2

2

Q485

100K_5%_2

1

LES_LBSS84LT1G_SOT23_3P

S

G

D

1

3

TP485

TP30

55
55
55
55
55 52
55
55
55

JACK485

Green

B1

1

52
52
52
52

52
52
52

TD+
TD­RD+
C+
C­RD­D+
D-

BI
BI
BI
BI
BI
BI
BI
BI

TX+

2

TX-

3

RX+

4

C+

5

C-

6

RX-

7

D+

8

D­A1

Yellow

SANTA_130456_231_12P

Green

Yellow

B2B1

B2

G1

G

G2

G

A2A1

A2

LED_3S_LANLINK#_R

LED_3S_LANACT#

IN

C486

680PF_50V_2_DY

2 1

IN

C485

680PF_50V_2_DY

2 1

LED_3S_LANLINK#_R

52

51
55

LED_3S_LANACT#

51

52

CC

B

RJ45+RJ11 CNTR

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

LAN RJ45 CONN

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SHEET

of

1

REV

X01

8052

8 7

6 5

4

3 2 1

D

B

48

WLAN_OFF

D

SD

C1301

0.01UF_50V_2

P3V3A_Q_WLAN

TP1300

1

576MA

TP30

3

G

1

34

34
34

2 1

0.1UF_16V_2

34
34 6054

34
34

P3V3A

10K_5%_2_DY

35

SSM3K7002FU

CLKREQ_WLAN#

OUT

35

48

PCIE_WAKE#

54

CLK_PCIE_WLAN_DN
CLK_PCIE_WLAN_DP

PCIE_RX4_C_DN
PCIE_RX4_C_DP

PCIE_TX4_C_DN
PCIE_TX4_C_DP

34
34
34

R1306

21

BT_OFF

IN

SSM3K7002FU

Q1301

3

R1310

CLKREQ_WLAN#_R

IN
IN

OUT
OUT

IN
IN

CL_CLK1
CL_DATA1
CL_RST#1

Q1302

1

1

G

DS

0_5%_2_DY

OUT

G

R1304

TP1302

IN
IN
IN

3

DS

2

21

TP1301

2

2 1

0_5%_2_DY

BT_OFF#

0_5%_2

CLKREQ_WLAN#_R

R1303

1

21

3

1

5
7

9
11
13

17

1

21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

CN1300

WAKE#
RESERVED
RESERVED
CLKREQ#
GND
REFCLK­REFCLK+

RESERVED
GND
PERN0
PERP0

GND
PETN0
PETP0
GND
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

RESERVED

FOX_AS0B226_S40QW_7H_52P

RESERVED
RESERVED
RESERVED
RESERVED
RESERVEDRESERVED

RESERVED

SMB_DATA

LED_WWAN#

LED_WLAN#
LED_WPAN#

PERST#

+3.3VAUX

SMB_CLK

USB_D-

USB_D+

2

3.3V

4

GND

6

1.5V

8
10
12
14
1615
18

GNDRESERVED

2019
22
24
26

GND

28

1.5VGND

30
32
34

GND

36
38
40

GND

42
44
46
48

1.5VRESERVED

50

GND

52

3.3VRESERVED

G2G1

G2G1

BI
BI

OUT

IN

23

USB_P5_DN
USB_P5_DP

WL_LED_ALL#

BUF_PLT_RST#

48

5037

37

37

56

61

P3V3A

21

R1300

10K_5%_2_DY

2

D1300

NC

1 3

BAT54_30V_0.2A

C1303

C1304

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

IN

WLAN_TRANSMIT_OFF#

CC

38

B

P3V3ALW

2

Q1300

PMV65XP

2 1

0.1UF_16V_2_DY

C1307

C1305

2 1

2 1

4.7UF_6.3V_3

R1301

C1308

21

R1302

0_5%_2

2 1

IN

220K_5%_2

REFERENCE NUMBER:1300~1349

8

7 6

WLAN

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

WLAN

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8053

1

REV

X01

AA

8 7

6 5

4

3 2 1

PVSIM

D1451

BAV99

3

2 1

TP1452

R1451

TP30

1

21

D

54

UIM_VPP

54

UIM_DATA

54

UIM_PWR

BI
BI

BI

47K_5%_2_DY

P5
P6
P7 P3
P8 P4
CD

G2 G1

TAI_PMPAT3_08GLBS7N14N0_9P

SIM CARD

TP1400

TP30

PVSIM

2.75A

1

C1413

C1412

C1411

C1410

2 1

68PF_50V_2

68PF_50V_2

R1406

68PF_50V_2

21

0_5%_2_DY

2 1

2 1

2 1

IN

C1414

0.01UF_50V_2

2 1

0.1UF_16V_2

CN1400

1

WAKE#

3

RESERVED

5

RESERVED

7

CLKREQ#

9

GND

11

REFCLK-

13

REFCLK+

17

RESERVED

21

GND

23

PERN0

25

PERP0

27
29

GND

31

PETN0

33

PETP0

35

GND

37

RESERVED

39

RESERVED

41

RESERVED

43

RESERVED

45

RESERVED

47
49

RESERVED

51

FOX_AS0B226_S40QW_7H_52P

48

WWAN_OFF

P3V3ALW

0_5%_2

2 1

220K_5%_2

53 4854

R1403

C1402

21

2 1

0.1UF_16V_2_DY

35

PCIE_WAKE#

LTE_GPIO0
LTE_GPIO1

R1404

IN

Q1400

4

S

D

3 6

G

PMOS_4D1S

TPC6111

OUT
OUT
OUT

1
2
5

PCIE_WAKE#

B

GPS_XMIT_OFF#

38

CN1451

GND
VPP

DATA CLK

Reserved Reserved

CD

G G

C1415

C1416

2 1

2 1

4.7UF_6.3V_3

VCC
RST

C1417

68PF_50V_2

LED_WWAN#

LED_WLAN#
LED_WPAN#

P1
P2

2 1

RESERVED
RESERVED
RESERVED
RESERVED
RESERVEDRESERVED

RESERVED

PERST#

+3.3VAUX

SMB_CLK

SMB_DATA

USB_D-

USB_D+

C1452

C1451

2 1

0.1UF_16V_2

CAP CLOSE TO SIM CARD

68PF_50V_2

2

3.3V

4

GND

6

1.5V

8
10
12
14
1615
18

GNDRESERVED

2019
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
G2G1

WWAN_DET#

USB_P12_L_DN
USB_P12_L_DP

OUT

GND

1.5VGND

GND

GND

1.5VRESERVED
GND

3.3VRESERVED
G2G1

TP1451

TP30

1

C1405

C1453

2 1

2 1

2 1

4.7UF_6.3V_3
18PF_50V_2_DY

BI
BI
BI
BI
BI

R1405

0_5%_2_DY

L1400

WCM_2012_900T

LED_WWAN_LINK#

BI

UIM_PWR

BI

UIM_RST

BI

UIM_CLK

18PF_50V_2_DY

UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP

23 5350 6037 48

IN

BUF_PLT_RST#

21

34
21

54

54
54
54
54

IN

BI
BI

56

54
54
54

D1410

1 3

INTRUDER#

USB_P12_DN
USB_P12_DP

R1402

2 1

2

NC

BAT54_30V_0.2A

33

P3V3S

37
37

0_5%_2

IN

WWAN_TRANSMIT_OFF#

38 56

D

CC

B

REFERENCE NUMBER:1400~1499

8

7 6

WWAN

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

WWAN& SIM CARD

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8054

1

REV

X01

AA

8 7

6 5

4

3 2 1

D

CN3601

52

RD+

52

RD-

52

TD+

52

TD-

52

LANLINK_STATUS
LED_3S_LANACT#

57

LINE_IN_SENSE

57

LINE_OUT_SENSE

57

A_LINEINL_DOCK

57

A_LINEINR_DOCK

57

PR_AOUT_L_DOCK

57

PR_AOUT_R_DOCK

48

LED_PWRSTBY#

36

DPC_HPD

36

DDCAUX_C0_DN
DDCAUX_C0_DP

36

34

34

B

PVADPTR

R3600

C3602

2 1

2 1

1K_5%_2_DY

C3600

0.1UF_16V_2_DY

2 1

0.1UF_25V_3

DPB_HPD

36

DPB_DDC2DATA

36

DPB_DDC2CLK

36

DOCK_ID1

38

DDCAUX_B0_DN

36

DDCAUX_B0_DP

36

SLP_S3#_3R

9

SLP_S4#_KBC

ON_OFF#

37

USB_P0_DP

37

USB_P0_DN

LIMIT_SIGNAL

C3601

2 1

0.1UF_25V_3

I2C_CLK
I2C_DATA

DETECT1#

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN

IN
IN
IN
IN
IN
IN
IN
IN
IN
IN

IN
IN
IN
IN

AGND_AUDIO

1

DETECT1#

2

RJ45_B+

3

RJ45_B-

4

GND

5

RJ45_A+

6

RJ45_A-

7

GND

8

Reserved

9

Reserved

10

GND

11

12
13
14
15
16
17
18
19
20

21

22
23
24
25
26
27
28
29
30

31

32
33
34
35
36
37
38
39
40

41

42
43
44
45

46
P1
G3 G2

Reserved PCIe TX1+

RJ45_LINKLED#
RJ45_ACTLED#
Reserved

Reserved PCIe RX1+

LINE_IN_SENSE
LINE_OUT_SENSE
AUDIOAGND

Reserved DPB_ML1+

LINE_IN_L
LINE_IN_R
AUDIOAGND

Reserved DPB_ML1+

LINE_OUT_L
LINE_OUT_R
AUDIOAGND
PWRLED

Reserved DPB_ML2+
Reserved DPB_HPD
GND

Reserved DPB_ML3+

Reserved DPB_CTRLDATA
Reserved DPB_CTRLCLK
GND
Reserved DPB_AUX­Reserved DPB_AUX+
GND
Reserved PCIe CLK1+
Reserved PCIe CLK1­DPA_HPD
DPA_CTRLDATA
DPA_CTRLCLK
DOCK_ID1
DPA_AUX­DPA_AUX+
SLP_S3#
RESERVED_SLP_S4#
VA_ON#
NBSWON#
RESERVED (I2C_CLK/USB1+)
RESERVED (I2C_Data/USB1-)
DOCK_ADP_SIGNAL

GND GND

FOX_QL1046L_D262AR_7H_92P

PREP#

RJ45_D+

RJ45_D-

RJ45_C+

RJ45_C-

Reserved
Reserved

Reserved PCIe TX1-

Reserved PCIe RX1-

Reserved DPB_ML0-

Reserved DPB_ML1-

Reserved DPB_ML2-

Reserved DPB_ML3-

DP_ML0+
DP_ML0-

DP_ML1+
DP_ML1-

DP_ML2+
DP_ML2-

DP_ML3+
DP_ML3-

USB3_RX+

USB3_RX-

USB3_TX+

USB3_TX-

DETECT2#

47
48
49
50

GND

51
52
53

GND

54
55
56

GND

57
58
59

GND

60
61
62

GND

63
64
65

GND

66
67
68

GND

69
70
71

GND

72
73
74

GND

75
76
77

GND

78
79
80

GND

81
82
83

GND

84
85
86

GND

87
88
89

GND

90
91
92

DETECT1#

G1

GNDVA(120W)

G5G4

GNDGND

IN
IN
IN

IN
IN

ISO_PREP#
D+
D-

C+

C-

33
52
52

52

52

IN

DPC0_DP

IN

DPC0_DN

IN

DPC1_DP

IN

DPC1_DN

IN

DPB0_DP

IN

DPB0_DN

IN

DPB1_DP

IN

DPB1_DN

IN

DPB2_DP

IN

DPB2_DN

IN

DPB3_DP

IN

DPB3_DN

IN

USB30_RX1_DP

IN

USB30_RX1_DN

IN

USB30_TX1_DP

IN

USB30_TX1_DN

36
36

36
36

36
36

36
36

36
36

36
36

37
37

37
37

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

DOCKING CNTR

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8055

8 7

6 5

4

3 2 1

4.7K_5%_2

1

SP_DATA
SP_CLK

56

ST_LEFT

56

ST_RIGHT

G

R118

P3V3S

2 1

3

DS

2

Q112

SSM3K7002FU

P5V0S

BI
BI
BI

BI

2 1

R113

4.7K_5%_2

IN

WL_LED_ALL#

IN

LED_WWAN_LINK#

CN202

8

8

7
6
5
4
3
2

1

G2

7

G

G1

6

G
5
4
3
2
1

HIROSE_FH34SRJ_8S_0_5SH_88_8P

P5V0S

P3V3S

SC_PWRSV#

USB_P7_DN
USB_P7_DP

ST_LEFT

P3V3AL

BI

BI
BI

BI

OUT
OUT
OUT
OUT

OUT

OUT

IN

BI
BI
BI
BI

61

5356

486155

LED_PWRSTBY#

33

48

BAT_GRNLED#

48

BAT_AMBERLED#

33

LED_3S_SATA#

33

HDD_HALTLED

56

61

53

WL_LED_ALL#

37
37

294734

4734

2932

37
48
48

32

PCH_3S_SMDATA

PCH_3S_SMCLK

56

56

ST_RIGHT

IM_5S_DATA
IM_5S_CLK

54

CN200

1

2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

G

1
2
3
4
5
6
7
8
9

10

11

12

13

14

15

16

17

18

19
20
21
22
23
24
25
26

G

ACES_51536_02641_001_26P

G1

G2

SMART CARD

D

CC

B

D

WWAN_TRANSMIT_OFF#

IN

WLAN_WWAN_BLUETOOTH_ LED

B

48
48

POINT STICK

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

STICK POINT & B2B CNTR

REFERENCE NUMBER:100~199

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

A3

CODE

CS

DOC.NUMBER

1310xxxxx-0-0

SHEET

of

1

REV

X01

8056

8 7

D

LINE_IN_SENSE

55

55

LINE_OUT_SENSE

57

SENSE_B

IN

57 59

SENSE_A

IN

IN

1

21

R529

100K_5%_2

AGND_AUDIO

OUT

1

R530

2 1

100K_5%_2

R528

20K_1%_2

3

2 1

Q528

DS

G

SSM3K7002FU

2

AGND_AUDIO

3

2 1

39.2K_1%_2

Q530

DS

G

SSM3K7002FU

2

R531

1UF_6.3V_2

AGND_AUDIO

P3V3S

33

AZ_R3S_BITCLK

33

AZ_R3S_RST#

IN

R513

2 1

4.7K_5%_2

IN

B

R515

C522

2 1

2 1

0.01UF_50V_2

C523

2 1

49

REC_MUTE_LED_CNTR

PLAY_MUTE_LED_CNTR

61

U500

IN

GND

EN

TP30

OUT

NR

SLP_S3#_3R

42 27

35

21
48

45 55

P5V0S

1
2

9

3

TI_HPA01085DVBR_SOT23_5P

IN

1819

20

REFERENCE NUMBER:500~549

8

7 6

33

0_5%_2_DY

10PF_50V_2_DY

TP500

5

4

C504

AZ_R3S_SDIN0

43

43

OUT
OUT

1

C500

33

48

33

A_SD#

2 1

IN

C503

0.1UF_16V_2

2 1

0.1UF_16V_2

AZ_R3S_SDOUT

AZ_R3S_SYNC

OUT

SPKR_EN_AB

DMIC_CLK

DMIC_DAT

P5V0S_AUDIO_AVDD

2 1

0.015UF_10V_2

OUT

IN

C501

2 1

10UF_6.3V_3

AGND_AUDIO

6 5

P3V3S

R517

D500

1SS355VMTE_17

0_5%_2

2 1

21

21

C527

2 1

0.1UF_16V_2

P3V3SP3V3S

85MA

C502

C505

2 1

4.7UF_6.3V_3

X5R

IN
IN

R514

33_5%_2

R516

100_5%_2

C521

10UF_6.3V_3

2 1

U501

1

DVDD_CORE

3

DVDD_IO

9

DVDD

6

HDA_BITCLK

5

HDA_SDO

10

HDA_SYNC

8

21

HDA_SDI

11

HDA_RST#

47

EAPD

2

21

DMIC_CLK/GPIO1

4

DMIC0/GPIO2

48

SPDIFOUT0/GPIO3

46

DMIC1/GPIO0/SPDIFOUT1

36

CAP+

35

21

CAP- V-

7

DVSS

42

PVSS

49

PAD

IDT_92HD91B2X5NLGXWCX_QFN_48P

X5R

PR_AOUT_L_AB

57

PR_AOUT_R_AB

57

IN

IN

SPKR_EN_AB

AVDD1

AVDD2

PVDD1

PVDD2

SENSE_A
SENSE_B

HP0_PORTA_L

HP0_PORTA_R

VREFOUT_A

HP1_PORTB_L

HP1_PORTB_R

PORTC_L
PORTC_R

VREFOUT_C/GPIO4

PORTE_L
PORTE_R

PORTF_L

PORTF_R

SPK_PORTD_+L

SPK_PORTD_-L

SPK_PORTD_+R

SPK_PORTD_-R

MONO_OUT

PCBEEP

VREFFILT

VREG(+2.5V)

AVSS1
AVSS2
AVSS3

PAD500

1 2

POWERPAD_2_0610

TP510

1

21

TP30

AGND_AUDIO

5 4

C511

150UF_6.3V

C512

150UF_6.3V

X5R

CAP2

4

21

+

PR_AOUT_C_L_DOCK

21

+

PR_AOUT_C_R_DOCK

R502

20K_1%_2

2 1

AGND_AUDIO

P5V0S_AUDIO_AVDD

C506

27
38

45

AGND_AUDIO

39
13

OUT

14

OUT

28

OUT

29

OUT

23
31

OUT

32

OUT

C530

19
20
24

OUT

15
16

17
18

40

OUT

41

OUT

44

OUT

43

OUT

25
12

21
22
34
37

26

C515

30
33

2 1

4.7UF_6.3V_3

AGND_AUDIO

R503

20K_1%_2

2 1

C507

2 1

1UF_6.3V_2

SENSE_A
SENSE_B

PR_AOUT_L_AB
PR_AOUT_R_AB

HP_OUT_L1
HP_OUT_R1

1UF_6.3V_3

21

IN

EXT_MIC_JACK
MIC_BIAS

IN

A_LINEINL

IN

A_LINEINR

SPK_OUT_L_DP
SPK_OUT_L_DN

SPK_OUT_R_DP
SPK_OUT_R_DN

C516

2 1

4.7UF_6.3V_3

R522

30_1%_3

R523

30_1%_3

2 1

0.1UF_16V_2

C518

0.1UF_16V_2

C529

2 1

1UF_6.3V_2

21

21

C508

59
57

57

57

C517

2 1

OUT

OUT

57

2 1

1UF_6.3V_2

57

SENSE_A
SENSE_B

57
57

59
59

X7R

IN

A_MIC

59

57
57

PCBEEP_IC_C

21

C519

2 1

10UF_6.3V_3

AGND_AUDIO

PR_AOUT_L_DOCK

PR_AOUT_R_DOCK

A_LINEINR

57

A_LINEINL

P5V0S

750MA

C509

C510

2 1

2 1

0.1UF_16V_2

10UF_6.3V_3

IN
IN

58

59

58

AGND_AUDIO

57
57

57
57

2 1

100K_5%_2

R510

2 1

0.01UF_50V_2

CHANGE by

3 2 1

55

55

X5R

OUT

2.2UF_6.3V_3

OUT

2.2UF_6.3V_3

P5V0S_AUDIO_AVDD

R512

R511

2 1

2 1

2.49K_1%_2

C525

C524

2 1

2 1

1000PF_50V_2

C514

X5R

57
57

2.49K_1%_2

57
57

1000PF_50V_2

C526
21

21

AGND_AUDIO

SPK_OUT_R_DP
SPK_OUT_R_DN

SPK_OUT_L_DN
SPK_OUT_L_DP

2K_5%_2

21

R50721R506

R504

21

IN

6.2K_1%_2

R505

6.2K_1%_2

2K_5%_2

21

A_LINEINR_DOCK

IN

A_LINEINL_DOCK

INT-SPEAKER CONN.

TP6411TP642

TP30

IN
IN

IN
IN

1

ACES_50224_0020N_001_2P

TP6431TP644

1

C640

2 1

21

R534

C642

C641

2 1

2 1

2200PF_50V_2

2200PF_50V_2

21

R535

3.3_5%_2

3.3_5%_2

TP30

ACES_50224_0020N_001_2P

2200PF_50V_2

3.3_5%_2

P5V0S_AUDIO_AVDD

R509

PCBEEP_IC_CR

C520

0.1UF_16V_2

0_5%_2

21

PCBEEP_CRC

R508

2 1
3

Q500

DS

SSM3K7002FU

2

0_5%_2

1

G

IN

A_3S_ICHSPKR

33

AGND_AUDIO

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

AUDIO CODEC

DOC.NUMBER

CODE

XXX

DATE

21-OCT-2002

23

SIZE

1310xxxxx-0-0

CS

A4

SHEET

57

55

55

CN640

TP30

1

1

2

2

D

3

G

4

G

CC

CN641

TP30

1

2

3

G

1

4

G

2

C643

2 1

2200PF_50V_2

21

R53721R536

3.3_5%_2

B

AA

REV

of

X01

80

1

8 7

6 5

4

3 2 1

D

P5V0S_AUDIO_AVDD

8
7
6

2 1

5

100K_5%_2

C614

R619

2 1

100K_5%_2

X7R

R618

2 1

0.1UF_16V_2

5759

EXT_MIC_JACK

IN

C620

0.47UF_10V_3

X5R

L627

BLM18PG600SN1D

21

21

2 1

AGND_AUDIO

100PF_50V_2

R617

2 1

0_5%_2

C617

68PF_50V_2

C616

VREF_EQ

OUT

58

C612

2 1

15PF_50V_2

R612

2 1

100K_5%_2

U610

1
2
3
4

TI_TLV2462CDGKR_MSOP_8P

1OUT

1IN-

1IN+

GND

VDD+

2OUT

2IN+

2IN-

IN

A_MIC

57

2 1

B

REFERENCE NUMBER:600~649

AGND_AUDIO

0.1UF_16V_2

C613

2 1

2.2UF_6.3V_2

X5R

X7R

C615

IN

21

AGND_AUDIO

VREF_EQ

58

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

EXT. MIC AMPLIFIER

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8058

8 7

6 5

4

P5V0A_USB_CHARAGE

3 2 1

D

C2503

C2502

2 1

2 1

D

0.1UF_16V_2

45
45

37
37

37
37

USB_P1_U_DN
USB_P1_U_DP

USB30_RX2_DN
USB30_RX2_DP

USB30_TX2_DN
USB30_TX2_DP

OUT
OUT

IN
IN

BI
BI

3 4
2 1

WCM_2012_900T

0.1UF_16V_2

C2500
C2501

0.1UF_16V_2

L2500

21
21

USB_P1_U_L_DN
USB_P1_U_L_DP

USB30_TX2_C_DN

USB30_TX2_C_DP

CN2500

1

VBUS

1000PF_50V_2_DY

2

D-

3

D+

4

PGND

5

SSRX-

6

SSRX+

7

GND

8

SSTX-

SINGA_2UB1585_000121F_9P

G19

GSSTX+

G2

G

G3

G

G4

G

CC

REFERENCE NUMBER:2500~2510

USB CHARGER

P5V0S_AUDIO_AVDD

OUT

B

R603

100K_5%_2

59

JACK_DET

IN

SSM3K7002FU

1

1

2

1

Q600

R604

20K_1%_2

2

3

DS

G

2

AGND_AUDIO

57

SENSE_A

SINGA_2SJ3112_000111F_7P

JACK600

G1

G1

G2

G2

G3

G3

G4

G4

7

7

1

1

2

2

6

6

3

3

4

4

5

5

1

TP601

1

1

TP30

TP30

TP30

TP6031TP604

TP602

1

TP30

TP30

TP30

TP6061TP605

C602

C601

2 1

0.033UF_16V_2

C603

2 1

0.033UF_16V_2

L600

FBM_11_160808_121T

L601

FBM_11_160808_121T

2 1

220PF_50V_2

21

21

R600

R601

16_1%_2

21

16_1%_2

21

BLM18PG600SN1D

IN

HP_OUT_L1

IN

HP_OUT_R1

OUT

JACK_DET

L602

21

57

57

59

R602

2.2K_5%_2

1UF_6.3V_2

21

C600

OUT

EXT_MIC_JACK

IN

MIC_BIAS

TP600

1

TP30

58 57

57

2 1

AGND_AUDIO

B

REFERENCE NUMBER:600~610

8

7 6

AGND_AUDIO

AGND_AUDIO

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

AUDI JACK & USB3.0(LEFT) DB

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8059

1

REV

X01

AA

8 7

6 5

C801

21

2.2UF_6.3V_2

IN

4

SD_MMC_CLK

3 2 1

60

P3V3S

C815

AS CLOSE AS POSSIBLE TO JMB700

2 1

22PF_50V_2_DY

P1V8S_CARD

TP800

1

TP30

D

P3V3S

108MA

60

60

60

D

C802

2 1

60

60

0.1UF_16V_2

SD_MMC_DATA1

SD_MMC_DATA2

SD_MMC_DATA3

SD_MMC_DATA0

INININ

SD_MMC_CMD

IN

IN

C800

2 1

IN

0.1UF_16V_2

SD_MMC_WP

60 38

P3V3S_VCC_READER

IN
IN
IN
IN
IN
IN
IN
IN

SD_MMC_CLK
SD_MMC_CMD
SD_MMC_DATA0
SD_MMC_DATA1
SD_MMC_DATA2
SD_MMC_DATA3
SD_MMC_WP
D3E_WAKE#

60
60
60
60
60
60
60

CN820

4

SD_VDD

5

SD_CLK

2

SD_CMD

7

SD_DATA0

8

SD_DATA1

9

SD_DATA2

1

SD_DATA3_CD

10

SD_WP

11

SD_CD_SW

12

SD_COM

3

SD_VSS1

GND1

6

GND2

SD_VSS2

PLAST_CS1R_201_H_N_12P

G1
G2

CC

C820

2 1

60

0.1UF_10V_2_DY

B

PLACE R821,C819,C820 CLOSE TO U820

5354 50 48 37 23

P1V8S_CARD

C818

C817

C816

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

CLOSE TO PIN5

B

34

34

PCIE_RX3_C_DN
PCIE_RX3_C_DP

2 1

34

0.1UF_16V_2

CLOSE TO PIN10

CLKREQ_PCIE_CARD#

BUF_PLT_RST#

34
34

OUT
OUT

IN

IN

CLK_PCIE_CARD_DN
CLK_PCIE_CARD_DP

34

PCIE_TX3_C_DP

34

PCIE_TX3_C_DN

C811

0.1UF_16V_2

21
21

0.1UF_16V_2

C813

R820

3

P3V3S

0_5%_2_DY

DS

G

SSM3K7002FU

1

21

2

Q800

IN
IN

12K_1%_2

R804

IN
IN

PCIE_RX3_DN
PCIE_RX3_DP

P3V3S

10K_5%_2_DY

R818

1

2
3
4
5
6
7

21

8
9

10

11

12

21

XRSTN
XTEST
APCLKN
APCLKP
APVDD
APGND
APREXT
APRXP
APRXN
APV18
APTXN
APTXP

46

47

48

MDIO2

MDIO1

MDIO0

CR1_CD1N

CPPE*

NC

14

39

43

4024424145

44

MDIO3

DV33

CR1_PCTLN

CR1_CD0N

IN

3860

SDDV33_18

U800

DV18

38

37

TXIN

MDIO7

MDIO5

MDIO4

GND

DV18

36

NC

35

NC

34

NC

33

NC

32

GND

31

GND

30

NC

29

MDIO8

28

MDIO9

27

MDIO10

26

MDIO11

CR1_LEDN

DV33

DV33

NC

19181721151613

NC

232220

MDIO6

25

NC

JM_JMB709_LQFP_48P

P3V3S

P3V3S_VCC_READER

R821

1K_5%_2

21

REFERENCE NUMBER:800~899

8

7 6

IN

SD_MMC_WP

60

P3V3S_VCC_READER

TP819

1

TP30

C819

2 1

C809

D3E_WAKE#

2 1

0.1UF_16V_2

P1V8S_CARD

10UF_6.3V_3

C814

PLACE C814 CLOSE TO U800-18

2 1

10UF_6.3V_3

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

CARD READER

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8060

1

REV

X01

AA

8 7

6 5

4

3 2 1

MUTE BOTTON

P3V3S

49

KSCAN_3S_IN(0)

D

IN

SW154

G1

12

34

GND

MISAKI_NTC011_BA1J_A160T_4P

4 3

2 1

WIRELESS BOTTON

KSCAN_3S_IN(1)

49

4843

B

IN

LID_SW#_3

SW9021

21

G1

GND

1 2

MISAKI_NTC011_BA1J_A160T_4P

SW152

12

34

GND

G1

MISAKI_NTC011_BA1J_A160T_4P

4 3

2 1

P3V3AL

C9413

2 1

0.1UF_16V_2

OUT

MAG_MH248BESO_SOT23_3P

43

3 4

OUT

ON_OFF#

OUT

SCAN_3S_OUT(17)

SCAN_3S_OUT(17)

OUT

U9413

1

VDD

3

GND

2

OUT

55

21

P3V3AL

21

R9031

130_1%_2

61

48

5356

WL_LED_ALL#

61

48

IN

Q110

1

G

SSM3K7002FU

PureWhite

1 4

-

2

-

Yellow

3

DS

D110

EVL_23_22B_Y2ST3D_C30_2T_4P

2

WIRELESS/BLUETOOTH LED

EVL_23_22B_Y2ST3D_C30_2T_4P

Q125

S1

2

PLAY_MUTE_LED_CNTR

57

OUT

G1

5

G2

2N7002DW

D1
D2

S2

270_5%_2

+

3

+

270_5%_2

1

2

6

1 4

3
4

R115

R114

Yellow

-

-

PureWhite

21
21

D

CC

P3V3S

+

+

R126

270_5%_2

3

R127

270_5%_2

2 1

R130

0_5%_2

21
21

B

D126

21

POWER SWITCH

8

7 6

554956

48

LED_PWRSTBY#

OUT

D9006

19_217_W1D_AP1Q2QY_ 3T

5 4

MUTE LED

CHANGE by

XXX

DATE

21-OCT-2002

23

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

BUTTON LED

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

61 80

1

REV

X01

AA

8 7

6 5

24MA

C9406

D

DGND_SM

SCARDDATA

62

P3V3S_SM_AB P3V3S_SM_AB

C9405

0.1UF_16V_2

DGND_SM

PVSM_VCC_SM

TP9415

1

TP30

C9415

2 1

B

0.1UF_16V_2

DGND_SM

P3V3S_SM

C9416

DGND_SM

62

62

62

PCH_3S_SMCLK_SM

62

PCH_3S_SMDATA_SM

62

2 1

1000PF_50V_2

PVSM_VCC_SM

0.1UF_16V_2

2 1

4.7K_5%_2

R9401

IN

470_5%_2

PVSM_VCC_SM

2 1

C9404

1UF_6.3V_2

DGND_SM

62

SCARDRST

62

SCARDCLK

62

SCARDFCB

62

SCARDC6

SCARDDATA

62

SCARDC8

62

62

ICCINSERTN

ST_RIGHT_SM
ST_LEFT_SM

62

IM_5S_CLK_SM

IM_5S_DATA_SM

TOUCHPAD

62

SCARDC8

2 1

62
62

P5V0S_SM

TP9403

TP30

C9403

62

SCARDC6

62

SCARDFCB

62

SCARDRST
SCARDCLK

62

USB_P7_SM_DN
USB_P7_SM_DP

DGND_SM

1

0.1UF_16V_2

2 1

R9400

21

2 1

1UF_6.3V_2 1UF_6.3V_2

C9402

IN
IN
IN

IN
IN

IN
IN

10
11
12
13
14 15

ALCOR_AU9542B56_GBS_GR_SSOP_28P

C9401

2 1

2 1

DGND_SM

CN9410

1

VCC

2

OUT
OUT
OUT
OUT
OUT
OUT

OUT

RST

3

CLK

4

C4

6

VPP

7

IO

8

C8

9

SW-CD

10

SW-CD-GND

5

GND

HAMB_083AA24F08B_10P

DGND_SM

CN9413

1

BI
BI
BI
BI

BI
BI

1

2

2

3

3

4

4

5

5

6
7
8

G1

6

G

G2

7

G

8

HIROSE_FH34SRJ_8S_0_5SH_88_8P

DGND_SM

DGND_SM

U9400

1

SCARD0C8

2

SCARD0C6

3

SCARD0FCB

4

SMIO_5VPWR

5

SCARD0RST

6

SCARD0CLK

7

SCARD0DATA

8

DM

9

DP
AV33
SCPWR0
5VGND
5VINPUT
V33OUT V18OUT

P3V3S_SM_AB

C9400

0.1UF_16V_2

2 1

DGND_SM

P3V3AL_SM

62
62

62
62
62
62

62

62

62

62

62
62

62
62

PWRSV_SEL

1UF_6.3V_2

IN
OUT
OUT
IN
IN
IN

62

BI
BI

BI
BI

BI
BI

LEDCRD

LEDPWR

EEPDATA

EEPCLK

ICCINSERTN

IN
IN
IN

XO

RESET

P1-6

VDDH
VDDP

VDD

C9409

PCH_3S_SMDATA_SM
PCH_3S_SMCLK_SM

ST_LEFT_SM
ST_RIGHT_SM

REFERENCE NUMBER:9400~9499

SMART CARD DOUGHTER BOARD

8

7 6

XTAL_12M_OUT

XTAL_12M_IN

C9418

28
27

XI

26
25
24
23
22
21
20

19
18
17
16

0_5%_2_DY

ICCINSERTN

P1V8S_SM

1

C9407

2 1

2

0.1UF_16V_2

DGND_SM

P3V3S_SM

LED_SM_PWRSTBY#
BAT_SM_GRNLED#

BAT_SM_AMBERLED#

LED_3S_SM_SATA#
HDD_SM_HALTLED

WL_LED_SM_ALL#

SC_PWRSV#_SM
USB_P7_SM_DN
USB_P7_SM_DP

IM_5S_DATA_SM
IM_5S_CLK_SM

X9400

21

12MHZ

C9419

2 1

18PF_50V_2

DGND_SM

DGND_SM

R9412

IN

OUT

0.1UF_16V_2

2 1

21

SC_PWRSV#_SM

62

C9410

2 1

18PF_50V_2

P3V3S_SM_AB

R9402

62

DGND_SM

2 1

2 1

DGND_SM

P5V0S_SM

DGND_SM

CN9412

26
25
24
23
22

21

20
19
18
17
16
15
14
13
12

11

10

9
8
7
6
5
4
3
2
1

ACES_51536_02641_001_26P

G
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

G

DGND_SM

FIX9400

1

FIX_MASK

FIX_MASK FIX_MASKFIX_MASK

G2

G1

FIX9401

5 4

100K_5%_2

C9411

1UF_6.3V_2

1

4

HDD_SM_HALTLED

FIX9402

1

62

62
62

62

LED_SM_PWRSTBY#

BAT_SM_GRNLED#

BAT_SM_AMBERLED#

WL_LED_SM_ALL#

62

HDD_STP#

IN

R9007

100K_5%_2_DY

DGND_SM

FIX9403

1

CHANGE by

3 2 1

IN

POWER LED

OUT
OUT

YELLOW

NC

D9001

NC

1

1 2

EVL_12_21_T3D_CP1Q2B12Y_2C_2P

WHITE

2
3

EVL_12_22_Y2ST3D_C30_2C_3P

Pure White

-

-

2

D9002

+

Yellow

270_5%_2

1

R9002

R9003

270_5%_2

P3V3AL_SMP5V0S_SM

21

P3V3AL_SM

21

BATTERY LED

P3V3S_SM

R9000

21

270_5%_2

D9030

1

+

62

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SMART CARD DB

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

1

2 1

P3V3S_SM

R9008

Q9002

G

FIX9404

1

D9032

Pure White

2

-

3

-

1

+

Yellow

EVL_12_22_Y2ST3D_C30_2C_3P

WIRELESS LED

IN

SSM3K7002FU

WHITE

YELLOW

3

Q9000

DS

1

G

2

TP9000

1

TP30

DGND_SM

WHITE

Pure White

2

1K_5%_2

Q9001

2 1

1

3

DS

SSM3K7002FU

G

3

DS

SSM3K7002FU

IN

2

HDD_STP#

LED_3S_SM_SATA#

-

Yellow

3

-

IN

YELLOW

EVL_12_22_Y2ST3D_C30_2C_3P

2

SATA LED & HDD-HALTED LED

REFERENCE NUMBER:9000~9099

S9400

DGND_SM

DATE

1

21-OCT-2002

23

XXX

FIX_MASKFIX_MASK

FIX9405

1

SCREW420_700_0_1P

P3V3S_SM

I425

R9005

21

DOC.NUMBER

of

62

270_5%_2

80

1

REV

X01

D

CC

B

AA

8 7

6 5

4

3 2 1

CN630

D

G1 9

G2

GG10

ACES_50376_01001_001_10P

DGND_SYS1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8
9

10

OUT
OUT

DGND_SYS1

DMIC_CLK_DB

DMIC_DATA_DB

L630

BLM15AG121SS1D

21

P3V3S_CAM

TP630

1

TP30

C630

1UF_16V_3

2 1

DGND_SYS1

D

CC

P3V3S_CAM P3V3S_CAM

C631

2 1

B

MIC630

1

GND

2 5

L_R DATA

KNOWLES_SPM0423HD4H_WB_6P

6

43

CLKGND

DGND_SYS1

IN

DMIC_DATA_DB

IN IN

LEFT

P3V3S_CAM

MIC631

1
2 5

KNOWLES_SPM0423HD4H_WB_6P

GNDVDD

L_R DATA

6

VDD

43

CLKGND

RIGHT

C632

0.1UF_16V_20.1UF_16V_2

2 1

X7RX7R

DGND_SYS1

IN

DMIC_DATA_DB

DMIC_CLK_DBDMIC_CLK_DB

B

DGND_SYS1

REFERENCE NUMBER:630~639

MIC DOUGHTER BOARD

8

7 6

DGND_SYS1

5 4

FIX630

FIX_MASK_0.8 FIX_MASK_0.8FIX_MASK_0.8

1

CHANGE by

XXX

FIX631

AA

FIX632

DATE

1

21-OCT-2002

23

1

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

MIC DB

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

A3

SHEET

of

8063

1

REV

X01

8 7

SCREW250_500_1P

S1

1

D

S2

SCREW450_800_1P

1

S27

SCREW250_550S_1P

1

6 5

SCREW330_600_0_1P

S4

SCREW450_800_600_1P

1

S3

SCREW450_700_0_1P

1

SCREW330_600_0_1P

4

S9

SCREW250_0_0_1P

1

S5

1

S6

1

S7

SCREW330_600_0_1P

1

S8

SCREW330_600_0_1P

1

S10

1

3 2 1

ST16

1

ST19

1

STDPAD_3.15_5.5_TOP

1.75MM

STDPAD_3.15_5.5_TOP

1.75MM

1

1

SCREW300_700_1P

SCREW450_800_600_1P

ST21

1

ST22

1

ST18

STAPAD_1.15_6_1P

STDPAD_3.15_5.5_TOP

1.75MM

SCREW450_800_600_1P

STDPAD_3.15_5.5_TOP

1.75MM

ST17

STAPAD_1.15_6_1P

1.75MM

1.75MM

S20

SCREW300_600_1P

S15

1

S25

SCREW250_550_500_1P

1

D

S23

1

1

CC

FIX1

1

B

PVBAT PVBAT

65

9 8

VBATP

IN

C7648

C7649

C7645

C7646

C7642

C7643

C7639

C7640

2 1

0.1UF_25V_2

C7641

2 1

2 1

68PF_50V_2

2 1

2200PF_50V_2

0.1UF_25V_2

C7644

2 1

2 1

68PF_50V_2

2 1

2200PF_50V_2

0.1UF_25V_2

C7647

2 1

2 1

68PF_50V_2

2 1

2200PF_50V_2

0.1UF_25V_2

C7650

2 1

2 1

68PF_50V_2

2200PF_50V_2

FIX4

1

FIX_MASK

FIX2

1

FIX_MASKFIX_MASK

FIX5

FIX_MASK

FIX3

1

FIX_MASK

FIX6

1

1

FIX_MASK

S26

SCREW250_500_1P

1

S28

1

SCREW250_500_1P

S24

SCREW300_700_600_1P

B

1

CLOSE TO Q6300CLOSE TO Q6200CLOSE TO Q6100 CLOSE TO Q6150

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SCREW

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

64

1

DOC.NUMBER

CODE

REV

X01

80

8 7

6 5

4

3 2 1

PVADPTRPVADPTR

PVBAT

C7550

C7551

2 1

2 1

D

C7554

12PF_50V_2 68PF_50V_2 12PF_50V_2 68PF_50V_2

C7555

2 1

2 1

C7552

12PF_50V_2 68PF_50V_268PF_50V_212PF_50V_2

P5V0A_CHGPVADPTR

C7556

C7553

C7666

C7670

0.1UF_25V_2 0.1UF_25V_2

0.1UF_25V_20.1UF_25V_2

0.1UF_25V_2

C7665

2 1

C7669

2 1

0.1UF_25V_2

C7664

2 1

PVBAT

C7668

2 1

2 1

2 1

2 1

C7557

2 1

P5V0S P5V0A

C7663

21

0.1UF_16V_2

C7656

C7677

P1V05S_VCCP

21

P1V05S_VCCP

21

P3V3S

0.1UF_16V_2

P3V3S

0.1UF_16V_2

C7667

0.1UF_25V_20.1UF_25V_2

2 1

2 1

D

0.1UF_25V_2

2 1

C7635

C7634

2 1

0.1UF_25V_2

2 1

C7636

2 1

P5V0A_CHGP5V0A_CHG

C7558

12PF_50V_2 68PF_50V_2 12PF_50V_2 68PF_50V_2

C7559

2 1

2 1

C7560

PVBAT

C7508

C7509

2 1

2 1

68PF_50V_2

P1V5

B

C7512

2 1

68PF_50V_2

C7513

2 1

6

C7514

68PF_50V_268PF_50V_2

2 1

OUT

MFET_A

68PF_50V_2 68PF_50V_2

P1V8S

C7517

68PF_50V_2 68PF_50V_2

P1V05S_VCCP

C7521

68PF_50V_2 68PF_50V_2

C7518

2 1

2 1

C7522

2 1

2 1

68PF_50V_2 68PF_50V_2

RF SOLUTION

8

7 6

C7561

C7672

C7698

C7690

0.1UF_16V_2

C7691

0.1UF_16V_2

C7692

0.1UF_16V_2

C7693

0.1UF_16V_2

PVPACK

2 1

PVBAT

2 1

P1V5S

21

P1V5S

21

P1V5S

21

P1V5S

21

C7673

0.1UF_25V_20.1UF_25V_2

2 1

0.1UF_25V_2

C7699

2 1

2 1

PVADPTR

C7510

C7515

P1V8S

C7519

C7511

68PF_50V_268PF_50V_268PF_50V_2

2 1

2 1

0.1UF_25V_2

C7516

2 1

2 1

P1V5

C7520

2 1

2 1

P1V5

P1V5

P1V5

5 4

P5V0A_CHG

C7632

2 1

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

AGND_AUDIO

2 1

0.1UF_25V_20.1UF_25V_2

C7637

0.1UF_25V_2

2 1

C7678

C7679

C7681

OUT

C7633

21

21

21

P3V3ALW

2 1

VBATR_CPU

AGND_AUDIO

65

16

C7694

0.1UF_16V_2

C7695

0.1UF_16V_2

C7696

0.1UF_16V_2

C7697

0.1UF_16V_2

21

21

21

21

CHANGE by

EMI SOLUTION

64
8

VBATP

9

5

17

PVADPTR_IN

XXX

OUT

OUT

C7629

0.1UF_25V_2

C7628

0.1UF_25V_2

C7626

0.1UF_25V_2

DATE

21-OCT-2002

CC

B

21

21

120OHM_25%_DY

21

VBATR_CPU

16

65

L7600

OUT

PVBAT

21

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

EMI & RF SOLUTION

SIZE

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8065

8 7

6 5

4

3 2 1

D

D

CC

B

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

SYSTEM SEQUENCE

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

1310xxxxx-0-0

CS

A3

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8066

8 7

6 5

4

3 2 1

D

B

DGPU_VID1

DGPU_VID2

DGPU_VID3

DGPU_VID4

DGPU_VID5

IN

SHORT_0402_5

IN

SHORT_0402_5

IN

SHORT_0402_5

IN

SHORT_0402_5

IN

SHORT_0402_5

8

R6766

R6767

R6768

R6769

R6770

21

21

21

21

21

U6751

ANPEC_APL6502A8I_TRG_8P

5

VID0

2

VID1

1

VID2

8

VID3

7 6

VID4 GND

3

VDA

4

VDD

7 6

P3V3S

C6773

2 1

D

PVCORE_DGPU

MAX=50A
OCP=42A

VRPVCORE_DGPU

PVBAT

PAD6750

21

IN

1 2

POWERPAD_2_0610

CC

Q6750

TG

BG

Q6751

TG

BG

+

C6799

2 1

VIN

Control
FET

VSW
Sync

FET

PGND

12

PAD6760

15UF_25V_DY

2 1

POWERPAD_2_0610

2

5

VRPVBAT_DGPU

C6761

C6760

2 1

2 1

10UF_25V_5

C6763

C6762

2 1

2 1

10UF_25V_5

10UF_25V_5

0.1UF_25V_2

B

3

21

2

VIN

Control
FET

5

VSW
Sync

FET

PGND

3

IN
IN

XXX

2 1

2 1

GPU_VCC_SENSE

GPU_VSS_SENSE

L6750

PCMC104T_R36MN

R7675

RSC_0603_DY

C7700

CSC0402_DY

DATE

21
43

1

+

C6750

2

21-OCT-2002

23

OUT

470UF_2V

3

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

DOC.NUMBER

CODE

SIZE

A3

CS

1310xxxxx-0-0

SHEET

VRPVCORE_DGPU

of

8067

1

REV

X01

AA

71

EN_DGPU

OUT

R6752

0_5%_2

21

R6750

0_5%_2_DY

2 1

51219VREF

71

DGPU_PG

C6770

2 1

0.033UF_16V_2

1UF_6.3V_3

C6768

C6769

R6751

0_5%_2_DY

2 1

2 1

2 1

100PF_50V_2

0.1UF_16V_2

0.01UF_50V_2

RSC_0402_DY

C6774

1000PF_50V_2

2 1

U6750

1

VREF

2

REFIN

3

GSNS

4

VSNS

C6767

2 1

R6771

IN

R6755

1K_5%_2

2 1

OUT

17

16815

MODE

PWPD

PGOOD

TI_TPS51219RTER_QFN_16P

TRIP

GND

COMP

6

7

5

R6756

2 1

42.2K_1%_2

21

VSNS

GSNS

R6755=100K , FSW=300KHZ
R6755=200K , FSW=400KHZ
R6755=1K , FSW=500KHZ

R6765

2.2_5%_3

14

13

EN

BST

SW

DH

DL

V5

PGND

21

12

VRPVCORE_DGPU_PH

11

VRPVCORE_DGPU_HG

10

VRPVCORE_DGPU_LG

9

IN

C6766

2 1

2.2UF_6.3V_3

R6764

21

0_5%_2

C6765

0.1UF_16V_2

VR_VDD5

IN

VRPVCORE_DGPU

21

10_1%_2

SHORT_0402_15

TI_CSD87588N_LGA_5P

1

21

4

R6762

SHORT_0603_25

C6775

CSC0402_DY

21

TI_CSD87588N_LGA_5P

R6763

1

SHORT_0603_25

4

R6759

21
21

R6760

CHANGE by

5 4

8 7

6 5

4

3 2 1

D

D

P1V0S_VCCP

12

PAD6940

2 1

678

POWERPAD_2_0610

FDMC7672

C6945

2 1

4.7UF_6.3V_3

6
5
4

R6940

2 1

C6942

P5V0A

0.1UF_16V_2

2 1

GMT_G9330TB1U_SOT23_6P

U6940

1

DRV

VCC

2

ADJ

GND

3

PGD

EN

2 1

VDDCI_PG

OUT

EN_VDDCI

IN

B

Q6940

D

NMOS_4D3S

G

S

3

2145

21

C6943

2 1

R6941

CSC0402_DY

SSM3K17FU

R6942

90.9_1%_2

S

Q6941

21

100_1%_2

47_5%_2

C6941

0.033UF_16V_2

21

R6943

806_1%_2

D

D S

G

R6944

G

1K_5%_2

21

VDDCI_SW

PVDDCI

OCP=8AMP

HIGH : 0.908V = 0.5 [ 1 + ( ( R6941//R6943) / R6942 ) ]

C6947

C6940

2 1

2 1

22UF_6.3V_5

22UF_6.3V_5

73

IN

LOW : 0.954V=0.5 ( 1+ R6941/R6942 )

CC

B

C6944

2 1

1000pF_50V_2

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8068

8 7

6 5

4

3 2 1

D

W/O BACO

BACO

P3V3A

C651

2 1

MOUNTR132

SI 1129

Q56

D

NMOS_4D1S

AO6402AL

100K_5%_2

P1V8S_DGPU

4

S

36

G

C589

2 1

0.1uF_25V_2_DY

(1.3A)

R518

21

Q59

1

G

SSM3K7002FU

P1V8S

1
2
5

68PF_50V_2

71

DGPU_PWR_EN

IN

SI 1130

SSM3K7002FU

3

DS

2

P15V0A

R135 OPEN

21

R494

560K_1%_2

R500

21

3

Q58

DS

1

G

2

(7A)

C119

0_5%_20_5%_2

SI 1011

2 1

0.1uF_25V_2

R135

OPEN
MOUNT

1

S

2

21

C120

0.01UF_50V_2

2 1

3
4 5

G

NMOS_4D3S

TPCA8057_H

P1V5P1V5S_DGPU

Q21

8

D

7
6

P1V5

C591

C593

2 1

2 1

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

2.2UF_6.3V_2

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

2.2UF_6.3V_2

C604

C652

C599

C597

B

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8069

8 7

6 5

4

3 2 1

D

OCP=6AMP

0.943V=0.5(1+R6951/R6952)

D

P1V0S_VCCP PVPCIE

678

FDMC7696

D

NMOS_4D3S

C6955

2 1

P5V0A

GMT_G9330TB1U_SOT23_6P

U6950

1
2
3

C6952

2 1

0.1UF_16V_2

71

EN_VPCIE

IN

6

DRV

VCC

5

ADJ

GND

4

PGD

EN

G

4.7UF_6.3V_3

R6950

2 1

2 1

S

3

2145

47_5%_2

R6951

2 1

C6951

R6952

0.033UF_16V_2

2 1

B

12

Q6950

PAD6950

2 1

POWERPAD1X1M

C6953

2 1

90.9_1%_2

22UF_6.3V_5

CC

100_1%_2

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8070

8 7

D

6 5

69

4

IN

DGPU_PWR_EN

3 2 1

2

DB 0711

R6003

0_5%_2

D6000

21

NC

R6002

8.2K_5%_2

DIODE-BAT54-TAP-PHP

13

21

C6002

2 1

0.1uF_16V_2

EN_DGPU

OUT

D

67

DB 0817

CC

DB 0726

P3V3S

B

DGPU_PWROK

OUT IN

R6010

10K_5%_2

2 1

R6011

0_5%_2

C6008

2 1

0.1uF_16V_2

DB 0807

DGPU_PG

21

67

SI 1026

R6004

10K_5%_2

R6005

10K_5%_2

C6003

2 1

0.1uF_16V_2

EN_VPCIE

EN_P1V5S_DGPU

OUT

OUT

70

21

21

B

C6004

2 1

0.1uF_16V_2

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

Block Diagram

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8071

8 7

U34

PART 1 0F 9

21

DGPU_HOLD_RST#

R5006

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

CLOCK

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AH16

AA30

PERSTB

AMD_216_0834002_00_FCBGA_962P

21

100K_5%_2

PCI EXPRESS INTERFACE

P3V3S_DGPU

5

+

1

2

-

3

U5001

TC7SZ08FU

PLT_RST#

7 6

24

BI

24

BI

24

BI

24

BI

24

D

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

24

BI

PEG_TX0_C_DP
PEG_TX0_C_DN

PEG_TX1_C_DP
PEG_TX1_C_DN

PEG_TX2_C_DP
PEG_TX2_C_DN

PEG_TX3_C_DP
PEG_TX3_C_DN

PEG_TX4_C_DP
PEG_TX4_C_DN

PEG_TX5_C_DP
PEG_TX5_C_DN

PEG_TX6_C_DP
PEG_TX6_C_DN

PEG_TX7_C_DP
PEG_TX7_C_DN

B

BI
BI

FOR PARK AND CAPILANO
THE PWRGOOD BALL MUST
BE CONNNECCTED TO GND

BI

CLK_PEG_DP
CLK_PEG_DN

R5005

1K_5%_2

PEG_PLT_RST#

BI

51

447237 33

BI

8

6 5

Y33

21

PEG_RX0_DP

Y32

PEG_RX0_DN

W33

PEG_RX1_DP

W32

PEG_RX1_DN

U33

PEG_RX2_DP

U32

PEG_RX2_DN

U30

PEG_RX3_DP

U29

PEG_RX3_DN

T33

PEG_RX4_DP

T32

PEG_RX4_DN

T30

PEG_RX5_DP

T29

PEG_RX5_DN

P33

PEG_RX6_DP

P32

PEG_RX6_DN

P30

PEG_RX7_DP

P29

PEG_RX7_DN

N33
N32

N30
N29

L33
L32

L30
L29

K33
K32

J33
J32

K30
K29

H33
H32

HEATHROW/CHELSEA
THAMES/WHISTLER/SEYMOUR

Y30
Y29

CALIBRATION

PCIE_CALR_TX

PCIE_CALR_RXTEST_PG

C5018

0.1UF_16V_2

4

PEG_PLT_RST#

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

R5002

1.69K_1%_2

R5004

72

BI

21

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

72

BI

PVPCIE

21

R215
OPEN
MOUNT

1K_5%_2

HEATHROW/CHELSEA
THAMES/WHISTLER/SEYMOUR

PVPCIE

5 4

4

CLOSE TO GPU

IN
IN
IN
IN
IN
IN
IN
IN

IN
IN
IN
IN
IN
IN
IN
IN

PEG_RX0_DN

PEG_RX1_DN

PEG_RX2_DN

PEG_RX3_DN

PEG_RX4_DN

PEG_RX5_DN

PEG_RX6_DN

PEG_RX7_DN

PEG_RX0_DP

PEG_RX1_DP

PEG_RX2_DP

PEG_RX3_DP

PEG_RX4_DP

PEG_RX5_DP

PEG_RX6_DP

PEG_RX7_DP

72

72

72

72

72

72

72

72

72

72

72

72

72

72

72

72

C5000
C5001
C5002
C5004
C5003
C5006
C5005
C5007

C5010
C5009
C5008
C5011
C5012
C5015
C5014
C5013

3 2 1

WHISTLER M2 PRO

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

0.1uF_16V_2

21

PEG_RX0_C_DN

PEG_RX1_C_DN

PEG_RX2_C_DN

PEG_RX3_C_DN

PEG_RX4_C_DN

PEG_RX5_C_DN

PEG_RX6_C_DN

PEG_RX7_C_DN

PEG_RX0_C_DP

PEG_RX1_C_DP

PEG_RX2_C_DP

PEG_RX3_C_DP

PEG_RX4_C_DP

PEG_RX5_C_DP

PEG_RX6_C_DP

PEG_RX7_C_DP

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT

24

24

24

24

24

24

24

24

24

24

24

24

24

24

24

24

D

CC

C IS 0402

B

R236
MOUNT
OPEN

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

GPU-1

CHANGE by

XXX

DATE

21-OCT-2002

23

SIZE

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

A3

SHEET

of

1

REV

X01

8072

8

MEM_ID2

MEM_ID3

(R514)

0
0
0
0

0

GPU_THM_CLK

73

BI

GPU_THM_DAT

73

E

D

BI

IN

DGPU_PWR_EN#

IF GPIO_22_EN = 0 , THEN GPIO[13:11] DEFINES THE PRIMARY MEMORY APERTURE SIZE.

0

1

73
73
73

C

73
73
73
73
73
73

73
73
73

73

73
73

OUT
OUT

IN
IN
IN
OUT
IN
IN

IN
IN
IN

IN
IN
IN
IN

0
1

GPU_GPIO0
GPU_GPIO1
GPU_GPIO9

GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
GPU_GPIO23
AUD_0
AUD_1

GPU_GPIO2
GPU_LCM_BLEN
CTF
POW_SW0
POW_SW1
POW_SW2

SI2 1227

B

A

8

7 6 5 4 3 2 1

P3V3S_DGPU

21

SI2 1227

10K_5%_2_DY

R90951

GENLK_VSYNC

OUT

21

21

21

R90510

R90497

R90507

10K_5%_2

10K_5%_2_DY

10K_5%_2_DY

MEM_ID0
MEM_ID1
MEM_ID2
MEM_ID3

GPU_THM_CLK

73

OUT

GPU_THM_DAT

73

OUT

SYSTEM BORAD PULL UP

GPU_LCM_CLK

OUT

GPU_LCM_DAT

OUT

GPU_GPIO0

73

OUT

GPU_GPIO1

73

OUT

GPU_GPIO2

73

OUT

VDDCI_SW

68

OUT

GPU_LCM_BLEN

73

OUT

GPU_GPIO9

73

OUT

GPU_GPIO11

73

OUT

21

1UF_6.3V_2

C90198

73
73

73
73

73
73

73

1

TP24

1

TP24

1

TP24

1

TP24

2 1

OUT
OUT

OUT
OUT

OUT
OUT

OUT

VR_TT#

IN
IN

OUT

GPIO27_TMS

0.1UF_16V_2

GPU_GPIO12
GPU_GPIO13

POW_SW0
POW_SW2

CTF
POW_SW1

GPU_GPIO23

5.1K_1%_2

2 1

I572

GPIO24_TRSTB

TP9013

TP9015

SI 1115
SI2 1227

SI 1115

TP9034

1

TP24

TP24

1

TP9033

SI 1115

SI 1115

PX_EN

I574

TP9060

R90162

1

1

TP24

TP24

(R507)

0
0
0
0

1

SI 1201

MEM_ID1 MEM_ID0

(R510)

0
0

1
1

0

P3V3S

C90816

1uF_10V_3

2 1

R90679

21

1K_5%_2

GPIO_11GPIO_12GPIO_13

1
0

R90182
R90171
R90185

SI 1014

R90177
R90165
R90159
R90145
R90552
R90547

R90160
R90170
R90154
R90515
R90107
R90950

VENDOR

(R497)

SAMSUNG(2GB)

0

(K4G20325FC-HC04)

SAMSUNG(2GB)

1

(K4G20325FD-FC04)

HYNIX (2GB)(DEFAULT)

0

(H5GQ2H24MFR-T2C)

1

HYNIX (2GB)

(H5GQ2H24AFR-T2C)

ELPIDA (2GB)

0

R90695

10K_5%_2 0_5%_2

21

R90699

10K_5%_2

21

2
2

P3V3S_DGPU

2

3

SD

21

Q9084

G

R90684

MEMORY APERTURE SIZE
2GB / 1GB
RESERVED

10K_5%_2

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2_DY

21

10K_5%_2

21

10K_5%_2

21

10K_5%_2

21

3K_5%_2

21

3K_5%_2

21

3K_5%_2

AM2321P

1

SSM3K7002FU

(DEFAULT)

Q9082

1

G

1

Q9088

G

DS

D S

Q9089

G

1

21

3

DS

2

MV NEW

MV NEW

NONE

R90710

SSM3K7002FU

3

PCH_KBC_SMCLK

3

PCH_KBC_SMDATA

SSM3K7002FU

R90675

200_5%_2

P1V8S_DGPUP3V3S_DGPU

MV 0313

Die Ver

IEC P/N

P1V8S_DGPU

C 6019B0842201

P3V3S_DGPU

R90172

10K_5%_2

GPU_THROT#

P3V3S_DGPU

R90184

10K_5%_2

CLOSE TO GPU

10K_5%_2_DY

TSVDD

C90197

C90190

2 1

10UF_6.3V_3

21

R90514

10K_5%_2_DY

21

TP9081

TP9082

TP9080
TP9079

2 1

6019B0971801

D

6019B0843001

VEGA

A

6019B0971701

NONE

NONE

P3V3S_DGPU

21

4834

BI

4834

BI

OUT

GPUTHERM_INT#

OUT

VR_TT#: REGULTOR HOT INPUT OPTION - NOT CURRENTLY QUALIFIED

GPIO_29, GPIO30 ARE NC ON THAMES/WHISTLER/SEYMOUR

499_1%_2

R90164

GPU_VREFG

2 1
21

R90178

249_1%_2

1K_5%_2

P3V3S_DGPU

R90851

21

10K_5%_2

ENABLE MLPS

P1V8S_DGPU

NC_TSVSSQ SHOULD BE TIED TO GND ON THAMES/WHISTLER/SEYMOUR

PS_0 SHOULD BE TIED TO GND ON THAMES/WHISTLER/SEYMOUR

C90186

0.1UF_16V_2

2 1

R90190

21

21

R90191

I=8MA

L9012

21

BLM18EG601SN1D

THAMES/WHISTLER/SEYMOUR ONLY
DO NOT INSTALL FOR HEATHROW/CHELSEA

7 6 5 4 3

U34

PART 2 0F 9

MUTI GFX

AD29

GENLK_CLK

AC29

GENLK_VSYNC

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

AJ23

SMBCLK

AH23

AK26

AJ26

AH20
AH18
AN16

AH17

AJ17

AK17

AJ13

AH15

AJ16

AK16

AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17

AL13

AJ14
AK13
AN13

AG32
AG33

AJ19
AK19

AJ20
AK20

AJ24
AH26
AH24

AC30
AK24

AH13

AL21 AD33

AD28

AM23
AN23

TP24

AK23

1

AL24
AM24

AF29
AG29

AK32
AL31

AJ32

AJ33

SMBus

SMBDATA

SCL

I2C

SDA

GENERAL PURPOSE I/O

GPIO_0
GPIO_1
GPIO_2

GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21
GPIO_22_ROMCSB
CLKREQB

GPIO_29
GPIO_30

GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
GENERICF_HPD5
GENERICG_HPD6

CEC_1

HPD1

VREFG

BACO

PX_EN

DEBUG

TESTEN

JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO

THERMAL

DPLUS
DMINUS

GPIO_28_FDO

TS_A

TSVDD
TSVSS

AMD_216_0834002_00_FCBGA_962P

DPA

DPB

DPC

DPD

DAC1

MLPS

DDC/AUX

TXCAP_DPA3P
TXCAM_DPA3N

TX0P_DPA2P
TX0M_DPA2N

TX1P_DPA1P
TX1M_DPA1N

TX2P_DPA0P
TX2M_DPA0N

TXCBP_DPB3P
TXCBM_DPB3N

TX3P_DPB2P
TX3M_DPB2N

TX4P_DPB1P
TX4M_DPB1N

TX5P_DPB0P
TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

NC_TSVSSQ

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDCCLK_AUX6P

DDCDATA_AUX6N

DDCVGACLK

DDCVGADATA

AU24
AV23

AT25
AR24

AU26
AV25

AT27
AR26

AR30
AT29

AV31
AU30

AR32
AT31

AT33
AU32

AU14
AV13

AT15
AR14

AU16
AV15

AT17
AR16

AU20
AT19

AT21
AR20

AU22
AV21

AT23
AR22

TP24

1

AD39

GPU_R

AVSSN#1

AVSSN#2

AVSSN#3

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

R

AD37
AE36

G

AD35
AF37

B

AE38
AC36

HSYNC

AC38

VSYNC

AB34

RSET

AD34

AVDD

AE34

AVSSQ

AC33

VDD1DI

AC34

VSS1DI

V13

NC#1

U13

NC#2

AC31

NC#3

AD30

NC#4

AC32

NC#5

AD32

NC#6

AF32

NC#7

AA29

NC#8

AG21

NC#9

AF33

AM34

PS_0

AD31

PS_1

AG31

PS_2

PS_3

AM26
AN26

AM27

AUX1P

AL27

AUX1N

AM19
AL19

AN20

AUX2P

AM20

AUX2N

AL30
AM30

AL29
AM29

AN21
AM21

AK30
AK29

AJ30
AJ31

GPU_DATA

TP9090

TP24

1

GPU_G

TP9091

TP24

1

GPU_B

TP9092

TP24

1

TP24

AUD_1

1

AUD_0

R90209

21

499_1%_2

1

R90238

NC_TSVSSQ SHOULD BE TIED TO GND ON THAMES/WHISTLER/SEYMOUR

TP9025

1

TP24

TP9039

1

TP24

TP24

TP24

TP24

GPU_CLK

1

TP9095

1

TP9096

TP24

TP9093

OUT

TP9094

OUT

P1V8S_DGPU

R90237

21

0_5%_2_DY

HEATHROW/CHELSEA
THAMES/WHISTLER/SEYMOUR

2

0_5%_2_DY

R90290
R90291
R90292
R90293

SI 1111

1

TP9014

1

TP9016

CHANGE by

73
73

I=125MA

21

0_5%_1_DY

21

0_5%_1_DY

21

0_5%_1_DY

21

0_5%_1_DY

XXX

OPEN
MOUNT

PS_0

73

IN

PS_1

73

IN

PS_2

73

IN

PS_3

73

IN

VDDC_CT

73

IN

R90800

PS_0

2 1

73

OUT

C90501

R90801

2 1

2 1

VDDC_CT

73

IN

R90802

PS_1

2 1

0_5%_2_DY

73 73

OUT

C90503

R90803

2 1

2 1

4.75K_1%_2 8.45K_1%_22K_1%_2

DATE

21-OCT-2002

2 1

PS0_0 Bits[5:1]: 11|001
PS0_1 Bits[5:1]: 11|000
PS0_2 Bits[5:1]: 00|000
PS0_3 Bits[5:1]: 11|000

PS_2

73

OUT

CSC0402_DY

82n

PS_3

OUT

SI 1207

CSC0402_DY

NC

MULTI LEVEL PIN STRAP (MLPS)
FOR R_PU_X AND R_PD_X AND C_X, SELECTION
REFER TO AN_MGEN_X1
PARTS FOR MLPS SHOULD BE PLACED CLOSE TO ASIC

THE TOTAL RESISTANCE OF TRACE SHOULD BE LESS THAN 3 OHM

R90804

0_5%_2_DY

2 1

C90505

R90805

2 1

2 1

4.75K_1%_2

0.68uF_10V_2

680n

R90806

2 1

0_5%_2_DY

C90512

R90807

2 1

2 1

4.75K_1%_2
CSC0402_DY

NC

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

GPU-2

CODE

SIZE

C

CS

DOC.NUMBER

1310xxxxx-0-0

SHEET

of

73 80

FF

E

D

C

B

A

REV

X01

8 7

6 5

4

3 2 1

U34

AG12

M12
M27

AH12

C37
C35
A35
E34
G32
D33

F32
E32
D31

F30
C30
A30

F28
C28
A28
E28
D27

F26
C26
A26

F24
C24
A24
E24
C22
A22

F22
D21
A20

F20
D19
E18
C18
A18

F18
D17
A16

F16
D15
E14

F14
D13

F12
A12
D11

F10
A10
C10
G13
H13

J13
H11
G10

G8
K9

K10

G9
A8
C8
E8
A6
C6
E6
A5

L18

L20

L27
N12

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

MVREFDA
MVREFSA

NC_MEM_CALRN0
NC_MEM_CALRN1
NC_MEM_CALRN2

NC_MEM_CALRP1
MEM_CALRP0
MEM_CALRP2

21
21
21

21
21
21

DQA0(0)
DQA0(1)
DQA0(2)
DQA0(3)
DQA0(4)
DQA0(5)
DQA0(6)
DQA0(7)
DQA0(8)
DQA0(9)
DQA0(10)
DQA0(11)
DQA0(12)
DQA0(13)
DQA0(14)
DQA0(15)
DQA0(16)
DQA0(17)
DQA0(18)
DQA0(19)
DQA0(20)
DQA0(21)
DQA0(22)
DQA0(23)
DQA0(24)
DQA0(25)
DQA0(26)
DQA0(27)
DQA0(28)
DQA0(29)
DQA0(30)
DQA0(31)
DQA1(0)
DQA1(1)
DQA1(2)
DQA1(3)
DQA1(4)
DQA1(5)
DQA1(6)
DQA1(7)
DQA1(8)
DQA1(9)
DQA1(10)
DQA1(11)
DQA1(12)
DQA1(13)
DQA1(14)
DQA1(15)
DQA1(16)
DQA1(17)
DQA1(18)
DQA1(19)
DQA1(20)
DQA1(21)
DQA1(22)
DQA1(23)
DQA1(24)
DQA1(25)
DQA1(26)
DQA1(27)
DQA1(28)
DQA1(29)
DQA1(30)
DQA1(31)

RSC_0402_DY
RSC_0402_DY
RSC_0402_DY

RSC_0402_DY
120_1%_2
120_1%_2

79

BI

79

BI

79

BI

79

BI

79

BI

79

R5077
R5076
R5079

R5078
R5081
R5080

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

79

BI

D

CHANNEL A

DDR3/GDDR3MEMORY STUFF OPTION

GDDR5

MVDDQ
RA
RB

R5082

40.2_1%_2

R5083

100_1%_2

R5084

40.2_1%_2

P1V5S_DGPU

21

21

C5043

2 1

P1V5S_DGPU

21

B

RA

RB

RA

GDDR3

1.8V/1.5V

1.5V

40.2R

40.2R
100R 100R

MVREFDA_GPU

1UF_6.3V_2

MVREFSA_GPU

DDR3

1.5V

40.2R
100R

P1V5S_DGPU

21

RB

R5085

100_1%_2

C5044

2 1

1UF_6.3V_2

FOR M97,BROADWAY,MADISO AND PARK ONLY

IF R258,R249,R146,R244 SHOULD BE MOUNT,

P/N 6013A0087806 (243OHM,1%)

AMD_216_0834002_00_FCBGA_962P

PART 3 0F 9

GDDR5/DDR3

MEMORY INTERFACE A

MAA0_0/MAA_0

MAA0_1/MAA_1

MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9

MAA1_2/MAA_10

MAA1_3/MAA_11

MAA1_4/MAA_12
MAA1_5/MAA_BA2
MAA1_6/MAA_BA0

MAA1_7/MAA_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

WCKA1B_1/DQMA_7

EDCA0_0/QSA_0

EDCA0_1/QSA_1

EDCA0_2/QSA_2

EDCA0_3/QSA_3

EDCA1_0/QSA_4

EDCA1_1/QSA_5

EDCA1_2/QSA_6

EDCA1_3/QSA_7

DDBIA0_0/QSA_0B
DDBIA0_1/QSA_1B
DDBIA0_2/QSA_2B
DDBIA0_3/QSA_3B
DDBIA1_0/QSA_4B
DDBIA1_1/QSA_5B
DDBIA1_2/QSA_6B
DDBIA1_3/QSA_7B

ADBIA0/ODTA0

ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B
RASA1B

CASA0B
CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0

CKEA1

WEA0B
WEA1B

MAA0_8/MAA_13

MAA1_8/MAA_14

MAA0_9/MAA_15

MAA1_9/RSVD

G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

A32
C32
D23
E22
C14
A14
E10
D9

C34
D29
D25
E20
E16
E12
J10
D7

A34
E30
E26
C20
C16
C12
J11
F8

J21
G19

H27
G27

J14
H14

K23
K19

K20
K17

K24
K27

M13
K16

K21
J20

K26
L15

H23
J19
M21
M20

MAA0(0)
MAA0(1)
MAA0(2)
MAA0(3)
MAA0(4)
MAA0(5)
MAA0(6)
MAA0(7)
MAA1(0)
MAA1(1)
MAA1(2)
MAA1(3)
MAA1(4)
MAA1(5)
MAA1(6)
MAA1(7)

WCKA0_0
WCKA0_0#
WCKA0_1
WCKA0_1#
WCKA1_0
WCKA1_0#
WCKA1_1
WCKA1_1#

EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3

DBIA0_0
DBIA0_1
DBIA0_2
DBIA0_3
DBIA1_0
DBIA1_1
DBIA1_2
DBIA1_3

ADBIA0#
ADBIA1#

CLKA0
CLKA0#

CLKA1
CLKA1#

RASA0#
RASA1#

CASA0#
CASA1#

CSA0#

CSA1#

CKEA0
CKEA1

WEA0#
WEA1#

MAA0(8)
MAA1(8)

TP24

1

TP5018

TP24

1

TP5019

M96/92 ONLY

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

OUT

OUT

OUT
OUT

OUT
OUT

79
79
79
79
79
79
79
79
79
79
79
79
79
79
79
79

79
79
79
79
79
79
79
79

79
79
79
79
79
79
79
79

79
79
79
79
79
79
79
79

79
79

79
79

79
79

79
79

79
79

79

79

79
79

79
79

79

BI

79

BI

D

CC

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

GPU-3

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8074

8 7

6 5

4

3 2 1

U34

AA12

AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1

AG4
AH5
AH6

AK3

AG8
AG7
AK9

AM8
AM7
AK1

AM6
AM1
AN4
AP3
AP1
AP5

C5

DQB0_0

C3

DQB0_1

E3

DQB0_2

E1

DQB0_3

F1

DQB0_4

F3

DQB0_5

F5

DQB0_6

G4

DQB0_7

H5

DQB0_8

H6

DQB0_9

J4

DQB0_10

K6

DQB0_11

K5

DQB0_12

L4

DQB0_13

M6

DQB0_14

M1

DQB0_15

M3

DQB0_16

M5

DQB0_17

N4

DQB0_18

P6

DQB0_19

P5

DQB0_20

R4

DQB0_21

T6

DQB0_22

T1

DQB0_23

U4

DQB0_24

V6

DQB0_25

V1

DQB0_26

V3

DQB0_27

Y6

DQB0_28

Y1

DQB0_29

Y3

DQB0_30

Y5

DQB0_31
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8

AF3

DQB1_9

AF6

DQB1_10
DQB1_11
DQB1_12
DQB1_13

AJ4

DQB1_14
DQB1_15

AF8

DQB1_16

AF9

DQB1_17
DQB1_18
DQB1_19
DQB1_20

AL7

DQB1_21
DQB1_22
DQB1_23
DQB1_24

AL4

DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31

Y12

MVREFDB
MVREFSB

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

D

CHANNEL B

DDR3/GDDR3MEMORY STUFF OPTION

1.5V

GDDR3

1.8V/1.5VRB1.5V

40.2R
100R

GDDR5

MVDDQ
RA 40.2R

B

DDR3

40.2R
100R100R

R90221

40.2_1%_2

R90210

100_1%_2

P1V5S_DGPU

21

21

C90273

2 1

1UF_6.3V_2

MVREFDB_GPU
MVREFSB_GPU

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

80

BI

DQB0(0)
DQB0(1)
DQB0(2)
DQB0(3)
DQB0(4)
DQB0(5)
DQB0(6)
DQB0(7)
DQB0(8)
DQB0(9)
DQB0(10)
DQB0(11)
DQB0(12)
DQB0(13)
DQB0(14)
DQB0(15)
DQB0(16)
DQB0(17)
DQB0(18)
DQB0(19)
DQB0(20)
DQB0(21)
DQB0(22)
DQB0(23)
DQB0(24)
DQB0(25)
DQB0(26)
DQB0(27)
DQB0(28)
DQB0(29)
DQB0(30)
DQB0(31)
DQB1(0)
DQB1(1)
DQB1(2)
DQB1(3)
DQB1(4)
DQB1(5)
DQB1(6)
DQB1(7)
DQB1(8)
DQB1(9)
DQB1(10)
DQB1(11)
DQB1(12)
DQB1(13)
DQB1(14)
DQB1(15)
DQB1(16)
DQB1(17)
DQB1(18)
DQB1(19)
DQB1(20)
DQB1(21)
DQB1(22)
DQB1(23)
DQB1(24)
DQB1(25)
DQB1(26)
DQB1(27)
DQB1(28)
DQB1(29)
DQB1(30)
DQB1(31)

P1V5S_DGPU

21

R90194

40.2_1%_2

21

R90198

100_1%_2

8

7 6

C90233

2 1

1UF_6.3V_2

5 4

AMD_216_0834002_00_FCBGA_962P

PART 4 0F 9

GDDR5/DDR3

MEMORY INTERFACE B

MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8

MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12

MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

EDCB0_0/QSB_0
EDCB0_1/QSB_1
EDCB0_2/QSB_2
EDCB0_3/QSB_3
EDCB1_0/QSB_4
EDCB1_1/QSB_5
EDCB1_2/QSB_6
EDCB1_3/QSB_7

DDBIB0_0/QSB_0B
DDBIB0_1/QSB_1B
DDBIB0_2/QSB_2B
DDBIB0_3/QSB_3B
DDBIB1_0/QSB_4B
DDBIB1_1/QSB_5B
DDBIB1_2/QSB_6B
DDBIB1_3/QSB_7B

ADBIB0/ODTB0
ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B
RASB1B

CASB0B
CASB1B

CSB0B_0
CSB0B_1

CSB1B_0
CSB1B_1

CKEB0

CKEB1

WEB0B
WEB1B

MAB0_8/MAB_13
MAB1_8/MAB_14
MAB0_9/MAB_15

MAB1_9/RSVD

DRAM_RST

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

H3
H1
T3
T5
AE4
AF5
AK6
AK5

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

T7
W7

L9
L8

AD8
AD7

T10
Y10

W10
AA10

P10
L10

AD10
AC10

U10
AA11

N10
AB11

T8
W8
U12
V12

AH11

MAB0(0)
MAB0(1)
MAB0(2)
MAB0(3)
MAB0(4)
MAB0(5)
MAB0(6)
MAB0(7)
MAB1(0)
MAB1(1)
MAB1(2)
MAB1(3)
MAB1(4)
MAB1(5)
MAB1(6)
MAB1(7)

WCKB0_0
WCKB0_0#
WCKB0_1
WCKB0_1#
WCKB1_0
WCKB1_0#
WCKB1_1
WCKB1_1#

EDCB0_0
EDCB0_1
EDCB0_2
EDCB0_3
EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3

DBIB0_0
DBIB0_1
DBIB0_2
DBIB0_3
DBIB1_0
DBIB1_1
DBIB1_2
DBIB1_3

ADBIB0#
ADBIB1#

CLKB0
CLKB0#

CLKB1
CLKB1#

RASB0#
RASB1#

CASB0#
CASB1#

CSB0#

CSB1#

CKEB0
CKEB1

WEB0#
WEB1#

MAB0(8)
MAB1(8)

21

R90513

CHANGE by

10_5%_2

4.99K_1%_2

TP24

1

TP24

1

M96/92 ONLY

R90509

21

XXX

C90639

TP9042
TP9041

51_1%_2

2 1

120PF_50V_2

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

OUT

OUT

OUT
OUT

OUT
OUT

R90496

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI

BI
BI

BI
BI

80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80

80
80
80
80
80
80
80
80

80
80
80
80
80
80
80
80

80
80
80
80
80
80
80
80

80
80

80
80

80
80

80
80

80
80

80

80

80
80

80
80

80
80

21

VM_RST#

DATE

IN

21-OCT-2002

23

8079

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

GPU-4

DOC.NUMBER

CODE

SIZE

A3

CS

1310xxxxx-0-0

SHEET

D

CC

B

AA

REV

of

X01

8075

1

8

7 6 5 4 3 2 1

HEATHROW/CHELSEA1VTHAMES/WHISTLER/SEYMOUR

PCIE_VDDC 0.935V

0.95V

1VVDDCI

FF

C90264

C90281

1UF_6.3V_2

L9014

BLM18PG121SN1

SI 1011

PVPCIE

C90307

2 1

2.2uF_6.3V_2

P1V8S_DGPU

21

I=2.5A

2 1

10UF_6.3V_3

E

D

C

B

1.8V 440MA PCIE_VDDR

C90232

C90258

U34

P1V5S_DGPU

+

C90598

220UF_2V

E

2 1

D

P1V8S_DGPU

C

P1V5S_DGPU

P1V8S_DGPU

L907

FBM_11_160808_121T

P3V3S_DGPU

C90337

2 1

22UF_6.3V_52.2UF_6.3V_21UF_6.3V_2

C90286

2 1

C90324

2 1

C90379

2 1

0.1UF_16V_2

I=250MA

21

I=60MA

BLM18PG600SN1D

I=3.4A

C90217

C90311

C90340

C90381

C90130

2 1

C90184

2 1

L9023

2 1

2 1

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

FOR DDR3,MVDDQ=1.5V

C90347

2 1

10UF_6.3V_3

10UF_6.3V_3

C90214

C90391

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C90272

C90366

2 1

2 1

1UF_6.3V_2

C90201

C90721

2 1

2 1

0.1UF_16V_2 1UF_6.3V_2

0.1UF_16V_2

C90189

C90200

2 1

2 1

1UF_6.3V_2

0.1UF_16V_2

C90210

2 1

1UF_6.3V_2

I=300MA

21

C90615

2 1

1UF_6.3V_2

2.2UF_6.3V_2

1UF_6.3V_20.1UF_16V_2

VDDC_CT

M96 FOR +V1.8S_VGA

VDDR4

C90616

2 1

0.1UF_16V_2

AC7

AD11

AF7

AG10

AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10

J7

J9
K11
K13

K8
L12
L16
L21
L23
L26

L7

M11

N11

P7
R11
U11

U7
Y11

Y7

AF26
AF27
AG26
AG27

AF23
AF24
AG23
AG24

AD12
AF11
AF12
AF13

AF15

AG11

AG13
AG15

B

SI 1115

SI 1115

AF28

AG28

AH29

PART 5 0F 9

MEM I/O

VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34

LEVEL

TRANSLATION

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4

I/O

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

DVP

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#4

VDDR4#5
VDDR4#6
VDDR4#7
VDDR4#8

VOLTAGE
SENESE

FB_VDDC

FB_VDDCI

FB_GND

AMD_216_0834002_00_FCBGA_962P

NC_PCIE_VDDR#1
NC_PCIE_VDDR#2
NC_PCIE_VDDR#3
NC_PCIE_VDDR#4
NC_PCIE_VDDR#5
NC_PCIE_VDDR#6

NC_BIF_VDDC#1
NC_BIF_VDDC#2

PCIE_PVDD

PCIE

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

BIF_VDDC#1

BACO

BIF_VDDC#2

VDDC#1

CORE

VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8

VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26

VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9

VDDCI#10
VDDCI#11

ISOLATED

CORE I/O

VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15
VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22

TP30

TP90000

1

AA32

TP30

TP90001

1

AA33

TP30

TP90002

1

AA34

TP30

TP90003

1

W30

TP30

TP90004

1

Y31

TP30

V28
W29
AB37

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

N27
T27

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18

AH22
AH27
AH28
M26
N24
R18
R21
R23
R26
T17
T20
T22
T24
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

TP90005

SI 1011

HEATHROW/CHELSEA
THAMES/WHISTLER/SEYMOUR OPEN

R208 R231
OPEN

PVPCIE

I=1.2A

R90861

21

SI 1014

0_5%_2

C90247

C90261

C90207

C90213

C90242

C90209

2 1

2 1

2 1

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

C90227

C90226

2 1

2 1

1UF_6.3V_22.2UF_6.3V_2

1UF_6.3V_2

2.2UF_6.3V_2

10UF_6.3V_3

1UF_6.3V_2

C90243

C90222

2 1

2 1

2.2UF_6.3V_2

C90188

C90315

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

VDDCI AND VDDC SHOULD HAVE REGULATORS WITH A MERGE OPTION ON PVB

PEAK=4A VDDCI

C90293

C90274

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C90297

C90294

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1

AA31

C90229

2 1

2 1

0.1UF_16V_2

21

R90231

R90208

0_5%_2_DY

0_5%_2_DY

L14
OPEN
MOUNT

C90282

C90223

C90278

C90221

C90277

C90180

C90296

C90206

C90240

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

C90208

C90244

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

C90245

C90225

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C90216

C90257

2 1

2 1

10UF_6.3V_3

10UF_6.3V_3

C90295

C90298

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C90211

C90239

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

C90259

2 1

2 1

0.1UF_16V_2

1UF_6.3V_2

2 1

10UF_6.3V_3

1UF_6.3V_2

PVPCIE

21

C90370

C90299

2 1

2 1

2.2uF_6.3V_2

(27.2A)

C90246

2 1

2 1

1UF_6.3V_2

C90279

2 1

2 1

1UF_6.3V_2

C90241

2 1

2 1

2.2UF_6.3V_2

C90285

2 1

2 1

22UF_6.3V_5

C90291

2 1

2 1

2.2UF_6.3V_2

C90284

2 1

2 1

22UF_6.3V_5

1UF_6.3V_2

PVCORE_DGPU

1UF_6.3V_2

1UF_6.3V_2

2.2UF_6.3V_2

22UF_6.3V_5

PVDDCI

2.2UF_6.3V_2

22UF_6.3V_5

2 1

C90289

1UF_6.3V_2

I=3.6A~6A

2 1

I=33A

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

GPU-5

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

CHANGE by

8

7 6 5 4 3

XXX

DATE

21-OCT-2002

2 1

C

SHEET

of

76 80

A

REV

X01

8 7

6 5

4

3 2 1

D

D

CC

AW39

AW1

A3

GND#83

GND#82

GND#80

GND#79

GND#78

GND#77

GND#76

GND#75

GND#81

GND#89

GND#88

GND#87

GND#86

GND#85

GND#84

GND#95

GND#94

GND#93

GND#92

GND#90

GND#91

AD15

AC6

AC28

GND#99

GND#98

GND#97

GND#96

GND#100

GND#101

AD9

AD27

AD24

AD22

AD20

AD17

GND#107

GND#106

GND#105

GND#104

GND#103

GND#102

AF21

AF18

AF16

AF10

AE6F7AE2

GND#113

GND#112

GND#110

GND#109

GND#108

GND#111

AG9F9AG6

AG22

AG20

AG2

AG17

GND#119

GND#118

GND#117

GND#116

GND#115

GND#114

AJ6

AJ28

AJ2

AJ11

AJ10

AH21

GND#125

GND#124

GND#123

GND#122

GND#120

GND#121

AL17

AL14

AL11G2AK7

AK31

AK11

GND#132

GND#130

GND#129

GND#128

GND#127

GND#126

GND#131

AL6

AL32

AL26

AL23

AL20

AL2

GND#137

GND#136

GND#135

GND#134

GND#133

AN2

AN11

AM9

AM31

AM11G6AL8

GND#143

GND#142

GND#140

GND#139

GND#138

GND#141

AP9H9AP7

AP11

AN8

AN6

AN30

GND#149

GND#148

GND#147

GND#146

GND#145

GND#144

B19

B17

B15

B13

B11

AR5

GND#156

GND#155

GND#154

GND#153

GND#152

GND#150

GND#151

B31

B29

B27J2B25

B23

B21

GND#160

GND#159

GND#158

GND#157

GND#165

GND#164

GND#163

GND#162

GND#161

F13

F11

E5

E35

C39C1B9B7B33

GND#170

GND#169

GND#168

GND#167

GND#166

GND#171

AC26

AC23

AC21

AC2

AC18

AC16

AC13

AC11

AB27

AB24

AB22

AB20

AB17

AB15

AB12

AA6

AA28

AA26

AA23

AA21

AA2

AA18

AA16

A37

A39

VSS_MECH#3

VSS_MECH#2

VSS_MECH#1

GND

PART 6 0F 9

GND#74

GND#73

GND#72

GND#71

GND#70

GND#69

GND#68

GND#67

GND#66

GND#65

GND#64

GND#63

GND#62

GND#61

GND#60

GND#59

GND#58

GND#57

GND#56

GND#55

GND#54

GND#53

GND#52

GND#51

GND#50

GND#49

GND#48

GND#47

GND#46

GND#45

GND#44

GND#43

GND#42

GND#41

GND#40

GND#39

GND#38

GND#37

GND#36

GND#35

GND#34

GND#33

GND#32

GND#31

GND#30

GND#29

GND#28

GND#27

GND#26

GND#25

GND#24

GND#23

GND#22

GND#21

GND#20

GND#19

GND#18

GND#17

GND#16

GND#15

GND#14

GND#13

GND#12

GND#11

GND#10

GND#9

GND#8

GND#7

GND#6

GND#5

GND#4

GND#3

GND#2

PCIE_VSS#9

PCIE_VSS#8

PCIE_VSS#7

PCIE_VSS#6

PCIE_VSS#5

PCIE_VSS#4

PCIE_VSS#3

PCIE_VSS#2

B

PCIE_VSS#1

U34

F34

F39

E39

AB39

PCIE_VSS#10

J34

J31

H39

H34

G34

G33

H31

PCIE_VSS#17

PCIE_VSS#16

PCIE_VSS#15

PCIE_VSS#14

PCIE_VSS#13

PCIE_VSS#12

PCIE_VSS#11

L34

L31

K39

K34

K31

M34

PCIE_VSS#23

PCIE_VSS#22

PCIE_VSS#21

PCIE_VSS#20

PCIE_VSS#19

PCIE_VSS#18

P39

P34

N34

P31

N31

M39

PCIE_VSS#29

PCIE_VSS#28

PCIE_VSS#27

PCIE_VSS#26

PCIE_VSS#25

PCIE_VSS#24

T39

T34

T31

U34

R34

U31

PCIE_VSS#35

PCIE_VSS#34

PCIE_VSS#33

PCIE_VSS#32

PCIE_VSS#31

PCIE_VSS#30

V39

V34

Y39

Y34

W34

W31

GND#1

J8

J6

F29

F15

F19

F17

F21

F33

F25

F23

F27

F31

J27

K14

L6

K7

L24

L22L2L17

L11

N2

R17

R15N6N26

N23

N18

N16

N21

M24

M22

M17

R6

R2

T11

R27

R24

R22

R20

T26

T23

T18

T16

T13

T21

U15

U6

U27

U24

U22

U20U2U17

V11

W6

W2

Y22

Y20

Y17

Y15

V26

V23

V18

V16

V21

AMD_216_0834002_00_FCBGA_962P

Y27

Y24

B

AA

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

GPU-6

SIZE

8

7 6

5 4

CHANGE by

XXX

DATE

21-OCT-2002

23

A3

CS

1310xxxxx-0-0

SHEET

of

1

DOC.NUMBER

CODE

REV

X01

8077

8

7 6 5 4 3 2 1

FF

U34

E

D

AMD_216_0834002_00_FCBGA_962P

C

B

PART 7 0F 9

LVDS CONTROL

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

TXOUT_U3P
TXOUT_U3N

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

TXOUT_L3P
TXOUT_L3N

P1V8S_DGPU

PVPCIE

VARY_BL

DIGON

R90176
R90168

AK27

GPU_LCM_PWM

AJ27

GPU_LCM_VCC_EN

AK35
AL36

AJ38
AK37

AH35
AJ36

AG38
AH37

AF35
AG36

AP34

GPU_LCM_L1_TXCL_DP

AR34

GPU_LCM_L1_TXCL_DN

AW37

GPU_LCM_L1_TXDL0_DP

AU35

GPU_LCM_L1_TXDL0_DN

AR37

GPU_LCM_L1_TXDL1_DP

AU39

GPU_LCM_L1_TXDL1_DN

AP35

GPU_LCM_L1_TXDL2_DP

AR35

GPU_LCM_L1_TXDL2_DN

AN36
AP37

L9011

BLM18PG600SN1D

L9010

BLM18PG600SN1D

I=500MA

21

10K_5%_2

21

10K_5%_2

SI 1115

21

21

TP9019

1

BACK LIGHT BRIGHTNESS MODULATE
NO CONNECTOR

TP24

OUT
OUT

BACK LIGHT POWER CONTORL

P1V8S_DPE_VDD18

C90199

C90195

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

P1V0S_DGPU_DPEF_VDD

C90183

C90187

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

CHECK POWER NET

OUT
OUT

OUT
OUT

OUT
OUT

OUT
OUT

I=237MA

I=222MA

I=237MA

P1V8S_DPE_VDD18

R90516

150_1%_2

R90511

150_1%_2

R90545

150_1%_2

U34

PART 8 0F 9

DP_VDDR DP_VDDC

AN24

DP_VDDR#1

AP24

DP_VDDR#2

AP25

DP_VDDR#3

AP26

DP_VDDR#4

AU28

DP_VDDR#5

AV29

DP_VDDR#6

AP20

DP_VDDR#7

AP21

DP_VDDR#8

AP22

DP_VDDR#9

AP23

DP_VDDR#10

AU18

DP_VDDR#11

AV19

DP_VDDR#12

AH34

DP_VDDR#13

AJ34

DP_VDDR#14

AF34

DP_VDDR#15

AG34

DP_VDDR#16

AM37

DP_VDDR#17

AL38

DP_VDDR#18

DP GND

CALIBRATION

AW28

21

21

21

DPAB_CALR

AW18

DPCD_CALR

AM39

DPEF_CALR

AMD_216_0834002_00_FCBGA_962P

CHECK POWER NET

AP31

DP_VDDC#1

AP32

DP_VDDC#2

AN33

DP_VDDC#3

AP33

DP_VDDC#4

AP13

DP_VDDC#5

AT13

DP_VDDC#6

AP14

DP_VDDC#7

AP15

DP_VDDC#8

AL33

DP_VDDC#9

AM33

DP_VDDC#10

AK33

DP_VDDC#11

AK34

DP_VDDC#12

AN27

DP_VSSR#1

AP27

DP_VSSR#2

AP28

DP_VSSR#3

AW24

DP_VSSR#4

AW26

DP_VSSR#5

AN29

DP_VSSR#6

AP29

DP_VSSR#7

AP30

DP_VSSR#8

AW30

DP_VSSR#9

AW32

DP_VSSR#10

AN17

DP_VSSR#11

AP16

DP_VSSR#12

AP17

DP_VSSR#13

AW14

DP_VSSR#14

AW16

DP_VSSR#15

AN19

DP_VSSR#16

AP18

DP_VSSR#17

AP19

DP_VSSR#18

AW20

DP_VSSR#19

AW22

DP_VSSR#20

AN34

DP_VSSR#21

AP39

DP_VSSR#22

AR39

DP_VSSR#23

AU37

DP_VSSR#24

AF39

DP_VSSR#25

AH39

DP_VSSR#26

AK39

DP_VSSR#27

AL34

DP_VSSR#28

AV27

DP_VSSR#29

AR28

DP_VSSR#30

AV17

DP_VSSR#31

AR18

DP_VSSR#32

AN38

DP_VSSR#33

AM35

DP_VSSR#34

P1V0S_DGPU_DPEF_VDD

PVPCIE

P1V8S_DGPU

PVPCIE

P1V8S_DGPU

I=222MA

FBM_11_160808_121T

FBM_11_160808_121T

1.8V 150MA MPV18

L906

FBM_11_160808_121T

1.8V 75MA SPV18

L905

FBM_11_160808_121T

150MA SPV10

L9025

FBM_11_160808_121T

P3V3S_DGPU

FBM_11_160808_121T

L9027

DP_VDDC
DPLL_VDDC
SPLL_VDDC

I=75MA

DPLL_PVDD

21

L9021

C90612

2 1

I=140MA

21

L901

C90638

2 1

21

MPV18

C90143

C90129

2 1

10UF_6.3V_3

21

SPV18

2 1

2 1

10UF_6.3V_3

1UF_6.3V_2

0.1UF_16V_20.1UF_16V_2

DPLL_VDDC

C90648

C90645

2 1

2 1

1UF_6.3V_2

10UF_6.3V_3

2 1

0.1UF_16V_20.1UF_16V_2

C903

C90631

21

C90128

C90144

2 1

2 1

10UF_6.3V_310UF_6.3V_3

21

SPV10

C90647

C90644

0.1UF_16V_2

2 1

2 1

R90235

HEATHROW/CHELSEA
THAMES/WHISTLER/SEYMOUR

P3V3S_DGPU

21

21

R90760

R90157

21

C90179

C90154

2 1

2 1

2.2UF_6.3V_2

5.1K_5%_25.1K_5%_2

21

21

C90176

2 1

R90761

R90153

0.01UF_50V_2

0.01UF_50V_2

U34

AM32

DPLL_PVDD

AN31

DPLL_VDDC

AN32

DPLL_PVSS

H7

MPLL_PVDD#1

H8

MPLL_PVDD#2

AM10

SPLL_PVDD

AN9

SPLL_VDDC

AN10

SPLL_PVSS

AF30

NC_XTAL_PVDD CLKTESTB

AF31

NC_XTAL_PVSS

AMD_216_0834002_00_FCBGA_962P

0_5%_2_DY

OPEN
MOUNT

SI 1107

C90650

6018B0052601

X904

2 1

1

10pF_50V_2

432

27MHZ

R90521

1M_5%_2

U9010

5.1K_5%_2_DY

4

VDD_100M

8

VDD_27M

7

S0

3

S1

6

GND_PLL

2

GND_27M

IDT_6V40088_DFN_10P

0_5%_2

PART 9 0F 9

C90658

2 1

21

101

X2X1_ICLK

5

100M

9

27M

11

TML

10pF_50V_2

R90519

R90525

PLLS/XTAL

33_5%_2

21

33_5%_2

21

1V0.935V

XTALIN

XTALOUT

XO_IN

XO_IN2

CLKTESTA

GPU_XOIN2_100M

GPU_XOIN_27M

AV33

AU34

AW34

AW35

AK10
AL10

1

TP9012

TP24

1

TP909

TP24

GPU_XOIN_27M

GPU_XOIN2_100M

OUT

OUT

E

78

IN

78

IN

D

C

78

78

B

THAMES/WHISTLER/SEYMOUR

HEATHROW/CHELSEA

A

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

GPU-7

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

CHANGE by

8

7 6 5 4 3

XXX

DATE

21-OCT-2002

2 1

C

SHEET

of

78

A

REV

X01

80

E

D

C

B

7479

IN

7479

IN

P1V5S_DGPU

C5510
R5524
R5525
C5511

8

CLKA0

CLKA0#

R5517
R5518

21

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

P1V5S_DGPU

C5506
R5520
R5521
C5507

P1V5S_DGPU

C5508
R5522
R5523
C5509

P1V5S_DGPU

60.4_1%_2

21
21

60.4_1%_2

R5519
R5500

P1V5S_DGPU

21

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

21

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

7 6 5 4 3 2 1

21

1K_5%_2

M13
M11

N13

N11

T13
T11
V13

V11

F13
F11
E13

E11

B13

B11

A13

A11

K10

K11

H10

H11

R13
C13

P13
D13

J11
J12

G12
L12

J13
J10

A10
V10

J14

U5501

M2

DQ31|DQ7

M4

DQ30|DQ6

N2

DQ29|DQ5

N4

DQ28|DQ4

T2

DQ27|DQ3

T4

DQ26|DQ2

V2

DQ25|DQ1

V4

DQ24|DQ0
DQ23|DQ15
DQ22|DQ14
DQ21|DQ13
DQ20|DQ12
DQ19|DQ11
DQ18|DQ10
DQ17|DQ9
DQ16|DQ8
DQ15|DQ23
DQ14|DQ22
DQ13|DQ21
DQ12|DQ20
DQ11|DQ19
DQ10|DQ18
DQ9|DQ17
DQ8|DQ16

F2

DQ7|DQ31

F4

DQ6|DQ30

E2

DQ5|DQ29

E4

DQ4|DQ28

B2

DQ3|DQ27

B4

DQ2|DQ26

A2

DQ1|DQ25

A4

DQ0|DQ24

J5

RFU/A12/NC

K4

A7/A8|A0/A10

K5

A6/A11|A1/A9
A5/BA1|A3/BA3
A4/BA2|A2/BA0
A3/BA3|A5/BA1
A2/BA0|A4/BA2

H5

A1/A9|A6/A11

H4

A0/A10|A7/A8

D4

WCK01|WCK23

D5

WCK01#|WCK23#

P4

WCK23|WCK01

P5

WCK23#|WCK01#

R2

EDC3|EDC0
EDC2|EDC1
EDC1|EDC2

C2

EDC0|EDC3

P2

DBI3#|DBI0#
DBI2#|DBI1#
DBI1#|DBI2#

D2

DBI0#|DBI3#

G3

RAS#|CAS#

L3

CAS#|RAS#

J3

CKE#
CK#
CK

CS#|WE#
WE#|CS#

ZQ
SEN

J2

RESET#

J1

MF

A5

Vpp,NC

V5

Vpp,NC1

VREFD1
VREFD2

VREFC

J4

ABI#

SAM_K4G10325FE_HC04_FBGA_170P

VDDQ-B1

VDDQ-B3
VDDQ-B12
VDDQ-B14

VDDQ-D1

VDDQ-D3
VDDQ-D12
VDDQ-D14

VDDQ-E5
VDDQ-E10

VDDQ-F1

VDDQ-F3
VDDQ-F12
VDDQ-F14

VDDQ-G2
VDDQ-G13

VDDQ-H3
VDDQ-H12

VDDQ-K3
VDDQ-K12

VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3

VDDQ-M12
VDDQ-M14

VDDQ-N5

VDDQ-N10

VDDQ-P1
VDDQ-P3

VDDQ-P12
VDDQ-P14

VDDQ-T1

VDDQ-T3
VDDQ-T12
VDDQ-T14

VDD-C10
VDD-D11

VDD-G11

VDD-G14

VDD-L11

VDD-L14

VDD-P11

VDD-R10

VSSQ-A1

VSSQ-A3
VSSQ-A12
VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4

VSSQ-C11
VSSQ-C12
VSSQ-C14

VSSQ-E1

VSSQ-E3
VSSQ-E12
VSSQ-E14

VSSQ-F5
VSSQ-F10

VSSQ-H2
VSSQ-H13

VSSQ-K2
VSSQ-K13
VSSQ-M5

VSSQ-M10

VSSQ-N1

VSSQ-N3
VSSQ-N12
VSSQ-N14
VSSQ-R1

VSSQ-R3

VSSQ-R4

VSSQ-R11

VSSQ-R12
VSSQ-R14
VSSQ-V1

VSSQ-V3
VSSQ-V12
VSSQ-V14

VSS-B10

VSS-D10

VSS-G10

VSS-H14

VSS-K14

VSS-L10

VSS-P10

VSS-T10

VDD-C5

VDD-G1
VDD-G4

VDD-L1
VDD-L4

VDD-R5

VSS-B5

VSS-G5

VSS-H1

VSS-K1

VSS-L5

VSS-T5

U5500

M2

DQA0(7)

74

BI

DQA0(0)

74

BI

DQA0(6)

74

BI

DQA0(2)

74

BI

DQA0(4)

74

BI

DQA0(1)

74

BI

DQA0(5)

74

BI

DQA0(3)

74

BI

DQA0(9)

74

BI

DQA0(10)

74

BI

DQA0(8)

74

BI

DQA0(11)

74

BI

DQA0(12)

74

BI

DQA0(14)

74

BI

DQA0(15)

74

BI

DQA0(13)

74

BI

DQA0(24)

74

BI

DQA0(25)

74

BI

DQA0(29)

74

BI

DQA0(27)

74

BI

DQA0(26)

74

BI

DQA0(28)

74

BI

DQA0(31)

74

BI

DQA0(30)

74

BI

DQA0(22)

74

BI

DQA0(21)

74

BI

DQA0(23)

74

BI

DQA0(20)

74

BI

DQA0(17)

74

BI

DQA0(19)

74

BI

DQA0(18)

74

BI

DQA0(16)

74

BI

74
74

74
74

74
74
74
74

74
74

74
74
74

74
74

75

BI
BI
BI
BI
BI
BI
BI
BI
BI

IN
IN

IN
IN

OUT
OUT
OUT
OUT

BI
BI
BI
BI

IN
IN

IN

BI
BI

IN
IN

120_1%_2

1K_5%_2

IN

21

ADBIA0#

VM_RST#

1K_5%_2

MAA0(8)
MAA0(0)
MAA0(1)
MAA0(3)
MAA0(2)
MAA0(5)
MAA0(4)
MAA0(6)
MAA0(7)

WCKA0_1
WCKA0_1#

WCKA0_0
WCKA0_0#

EDCA0_0
EDCA0_1
EDCA0_3
EDCA0_2

DBIA0_0
DBIA0_1
DBIA0_3
DBIA0_2

CASA0#
RASA0#

CKEA0
CLKA0#
CLKA0

WEA0#
CSA0#

74
74
74
74
74
74
74
74
74

74
74
74
74

79
79

21
21

80 79

R5501

74

IN

DQ31|DQ7

M4

DQ30|DQ6

N2

DQ29|DQ5

N4

DQ28|DQ4

T2

DQ27|DQ3

T4

DQ26|DQ2

V2

DQ25|DQ1

V4

DQ24|DQ0

M13

DQ23|DQ15

M11

DQ22|DQ14

N13

DQ21|DQ13

N11

DQ20|DQ12

T13

DQ19|DQ11

T11

DQ18|DQ10

V13

DQ17|DQ9

V11

DQ16|DQ8

F13

DQ15|DQ23

F11

DQ14|DQ22

E13

DQ13|DQ21

E11

DQ12|DQ20

B13

DQ11|DQ19

B11

DQ10|DQ18

A13

DQ9|DQ17

A11

DQ8|DQ16

F2

DQ7|DQ31

F4

DQ6|DQ30

E2

DQ5|DQ29

E4

DQ4|DQ28

B2

DQ3|DQ27

B4

DQ2|DQ26

A2

DQ1|DQ25

A4

DQ0|DQ24

J5

RFU/A12/NC

K4

A7/A8|A0/A10

K5

A6/A11|A1/A9

K10

A5/BA1|A3/BA3

K11

A4/BA2|A2/BA0

H10

A3/BA3|A5/BA1

H11

A2/BA0|A4/BA2

H5

A1/A9|A6/A11

H4

A0/A10|A7/A8

D4

WCK01|WCK23

D5

WCK01#|WCK23#

P4

WCK23|WCK01

P5

WCK23#|WCK01#

R2

EDC3|EDC0

R13

EDC2|EDC1

C13

EDC1|EDC2

C2

EDC0|EDC3

P2

DBI3#|DBI0#

P13

DBI2#|DBI1#

D13

DBI1#|DBI2#

D2

DBI0#|DBI3#

G3

RAS#|CAS#

L3

CAS#|RAS#

J3

CKE#

J11

CK#

J12

CK

G12

CS#|WE#

L12

WE#|CS#

J13

ZQ

J10

SEN

J2

RESET#

J1

MF

A5

Vpp,NC

V5

Vpp,NC1

A10

VREFD1

V10

VREFD2

J14

VREFC

J4

ABI#

SAM_K4G10325FE_HC04_FBGA_170P

VDDQ-B1

VDDQ-B3
VDDQ-B12
VDDQ-B14

VDDQ-D1

VDDQ-D3

VDDQ-D12
VDDQ-D14

VDDQ-E5
VDDQ-E10

VDDQ-F1

VDDQ-F3
VDDQ-F12
VDDQ-F14

VDDQ-G2

VDDQ-G13

VDDQ-H3
VDDQ-H12

VDDQ-K3
VDDQ-K12

VDDQ-L2
VDDQ-L13

VDDQ-M1

VDDQ-M3

VDDQ-M12
VDDQ-M14

VDDQ-N5
VDDQ-N10

VDDQ-P1

VDDQ-P3
VDDQ-P12
VDDQ-P14

VDDQ-T1

VDDQ-T3
VDDQ-T12
VDDQ-T14

VDD-C10

VDD-D11

VDD-G11

VDD-G14

VDD-L11

VDD-L14

VDD-P11

VDD-R10

VSSQ-A1

VSSQ-A3
VSSQ-A12
VSSQ-A14

VSSQ-C1

VSSQ-C3

VSSQ-C4
VSSQ-C11
VSSQ-C12
VSSQ-C14

VSSQ-E1

VSSQ-E3
VSSQ-E12
VSSQ-E14

VSSQ-F5
VSSQ-F10

VSSQ-H2
VSSQ-H13

VSSQ-K2
VSSQ-K13

VSSQ-M5
VSSQ-M10

VSSQ-N1

VSSQ-N3
VSSQ-N12
VSSQ-N14

VSSQ-R1

VSSQ-R3

VSSQ-R4
VSSQ-R11
VSSQ-R12
VSSQ-R14

VSSQ-V1

VSSQ-V3
VSSQ-V12
VSSQ-V14

VSS-B10

VSS-D10

VSS-G10

VSS-H14

VSS-K14

VSS-P10

VDD-C5

VDD-G1
VDD-G4

VDD-L1
VDD-L4

VDD-R5

VSS-B5

VSS-G5

VSS-H1

VSS-K1

VSS-L5
VSS-L10

VSS-T5
VSS-T10

P1V5S_DGPU

B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14

C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10

A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
V1
V3
V12
V14

B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10

CHANNEL A MEMORY

VENDER

SAMSUNG

HYNIX

SAMSUNG

HYNIX

64MX32
64MX32
64MX32
64MX32

VENDER PNDENSITY

H5GQ2H24AFR-T2C
K4G20325FC-HC04
H5GQ2H24MFR-T2C

797974

IEC PN
6019B0971801K4G20325FD-FC04
6019B0971701
6019B0842201
6019B0843001

CLKA1
CLKA1#

R5509
R5508

P1V5S_DGPU

P1V5S_DGPU

74

IN
IN

C5500
R5512
R5511
C5501

C5502
R5513
R5514
C5503

MV 0313

P1V5S_DGPU

21
21

60.4_1%_2

60.4_1%_2

21

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

21

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

R5510
R5502

74

BI

74

BI

74

BI

74

BI

80

DQA1(25)

74

BI

DQA1(29)

74

BI

DQA1(27)

74

BI

DQA1(28)

74

BI

DQA1(26)

74

BI

DQA1(31)

74

BI

DQA1(24)

74

BI

DQA1(30)

74

BI

DQA1(21)

74

BI

DQA1(20)

74

BI

DQA1(22)

74

BI

DQA1(23)

74

BI

DQA1(19)

74

BI

DQA1(16)

74

BI

DQA1(18)

74

BI

DQA1(17)

74

BI

DQA1(5)

74

BI

DQA1(7)

74

BI

DQA1(6)

74

BI

DQA1(2)

74

BI

DQA1(3)

74

BI

DQA1(1)

74

BI

DQA1(4)

74

BI

DQA1(0)

74

BI

DQA1(8)

74

BI

DQA1(9)

74

BI

DQA1(10)

74

BI

DQA1(11)

74

BI

DQA1(15)

74

BI

DQA1(13)

74

BI

DQA1(12)

74

BI

DQA1(14)

74

BI

MAA1(8)

74

BI

MAA1(7)

74

BI

MAA1(6)

74

BI

MAA1(5)

74

BI

MAA1(4)

74

BI

MAA1(3)

74

BI

MAA1(2)

74

BI

MAA1(1)

74

BI

MAA1(0)

74

BI

WCKA1_0

74

IN

WCKA1_0#

74

IN

WCKA1_1

74

IN

WCKA1_1#

74

IN

EDCA1_3

74

OUT

EDCA1_2

74

OUT

EDCA1_0

74

OUT

EDCA1_1

74

OUT

DBIA1_3
DBIA1_2
DBIA1_0
DBIA1_1

RASA1#

74

IN

CASA1#

74

IN

CKEA1

74

IN

CLKA1#

7479

BI

CLKA1

7479

BI

CSA1#

74

IN

WEA1#

74

IN

21

120_1%_2

21

1K_5%_2

VM_RST#

7579

IN

R5503

P1V5S_DGPU

21

C5504
R5516
R5515
C5505

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

ADBIA1#

74

IN

P1V5S_DGPU

B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14

C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10

A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
V1
V3
V12
V14

B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10

FF

E

D

C

B

P1V5S_DGPU

C5535

C5534

C5533

C5532

C5531

2 1

2 1

2 1

2 1

10UF_6.3V_3

A

0.1UF_16V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

8

C5530

C5528

C5527

2 1

2 1

0.1UF_16V_2

2.2UF_6.3V_2

7 6 5 4 3

C5526

C5525

C5529

2 1

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C5524

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

P1V5S_DGPU

C5523

2 1

C5522

C5521

C5520

C5519

C5518

C5517

C5516

2 1

2 1

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

0.1UF_16V_2

2 1

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

2 1

2.2UF_6.3V_2

CHANGE by

C5515

2 1

2.2UF_6.3V_2

XXX

C5513

C5514

2 1

2.2UF_6.3V_2

C5512

2 1

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

DATE

21-OCT-2002

2 1

INVENTEC

TITLE

MODEL,PROJECT,FUNCTION

VRAM1 & VRAM2

DOC.NUMBER

CODE

SIZE

1310xxxxx-0-0

CS

C

SHEET

of

79 80

A

REV

X01

8

CLKB0

75

IN

CLKB0#

808075

IN

E

D

P1V5S_DGPU

P1V5S_DGPU

21

C5543

C

R5539
R5540
C5544

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

P1V5S_DGPU

P1V5S_DGPU

B

7 6 5 4 3 2 1

21

1K_5%_2

U5503

M2

DQ31|DQ7

M4

DQ30|DQ6

N2

DQ29|DQ5

N4

DQ28|DQ4

T2

DQ27|DQ3

T4

DQ26|DQ2

V2

DQ25|DQ1

V4

DQ24|DQ0

M13

DQ23|DQ15

M11

DQ22|DQ14

N13

DQ21|DQ13

N11

DQ20|DQ12

T13

DQ19|DQ11

T11

DQ18|DQ10

V13

DQ17|DQ9

V11

DQ16|DQ8

F13

DQ15|DQ23

F11

DQ14|DQ22

E13

DQ13|DQ21

E11

DQ12|DQ20

B13

DQ11|DQ19

B11

DQ10|DQ18

A13

DQ9|DQ17

A11

DQ8|DQ16

F2

DQ7|DQ31

F4

DQ6|DQ30

E2

DQ5|DQ29

E4

DQ4|DQ28

B2

DQ3|DQ27

B4

DQ2|DQ26

A2

DQ1|DQ25

A4

DQ0|DQ24

J5

RFU/A12/NC

K4

A7/A8|A0/A10

K5

A6/A11|A1/A9

K10

A5/BA1|A3/BA3

K11

A4/BA2|A2/BA0

H10

A3/BA3|A5/BA1

H11

A2/BA0|A4/BA2

H5

A1/A9|A6/A11

H4

A0/A10|A7/A8

D4

WCK01|WCK23

D5

WCK01#|WCK23#

P4

WCK23|WCK01

P5

WCK23#|WCK01#

R2

EDC3|EDC0

R13

EDC2|EDC1

C13

EDC1|EDC2

C2

EDC0|EDC3

P2

DBI3#|DBI0#

P13

DBI2#|DBI1#

D13

DBI1#|DBI2#

D2

DBI0#|DBI3#

G3

RAS#|CAS#

L3

CAS#|RAS#

J3

CKE#

J11

CK#

J12

CK

G12

CS#|WE#

L12

WE#|CS#

J13

ZQ

J10

SEN

J2

RESET#

J1

MF

A5

Vpp,NC

V5

Vpp,NC1

A10

VREFD1

V10

VREFD2

J14

VREFC

J4

ABI#

SAM_K4G10325FE_HC04_FBGA_170P

MF = 1 FOR MIRROR

VDDQ-B1

VDDQ-B3
VDDQ-B12
VDDQ-B14

VDDQ-D1

VDDQ-D3
VDDQ-D12
VDDQ-D14

VDDQ-E5
VDDQ-E10

VDDQ-F1

VDDQ-F3
VDDQ-F12
VDDQ-F14

VDDQ-G2
VDDQ-G13

VDDQ-H3
VDDQ-H12

VDDQ-K3
VDDQ-K12

VDDQ-L2
VDDQ-L13
VDDQ-M1
VDDQ-M3

VDDQ-M12
VDDQ-M14

VDDQ-N5

VDDQ-N10

VDDQ-P1
VDDQ-P3

VDDQ-P12
VDDQ-P14

VDDQ-T1

VDDQ-T3
VDDQ-T12
VDDQ-T14

VDD-C10
VDD-D11

VDD-G11

VDD-G14

VDD-L11

VDD-L14

VDD-P11

VDD-R10

VSSQ-A1

VSSQ-A3
VSSQ-A12
VSSQ-A14
VSSQ-C1
VSSQ-C3
VSSQ-C4

VSSQ-C11
VSSQ-C12
VSSQ-C14

VSSQ-E1

VSSQ-E3
VSSQ-E12
VSSQ-E14

VSSQ-F5
VSSQ-F10

VSSQ-H2
VSSQ-H13

VSSQ-K2
VSSQ-K13
VSSQ-M5

VSSQ-M10

VSSQ-N1

VSSQ-N3
VSSQ-N12
VSSQ-N14
VSSQ-R1

VSSQ-R3

VSSQ-R4

VSSQ-R11

VSSQ-R12
VSSQ-R14
VSSQ-V1

VSSQ-V3
VSSQ-V12
VSSQ-V14

VSS-B10

VSS-D10

VSS-G10

VSS-H14

VSS-K14

VSS-L10

VSS-P10

VSS-T10

P1V5S_DGPU

B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14

C5

VDD-C5

C10
D11
G1

VDD-G1

G4

VDD-G4

G11
G14
L1

VDD-L1

L4

VDD-L4

L11
L14
P11
R5

VDD-R5

R10

A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
V1
V3
V12
V14

B5

VSS-B5

B10
D10
G5

VSS-G5

G10
H1

VSS-H1

H14
K1

VSS-K1

K14
L5

VSS-L5

L10
P10
T5

VSS-T5

T10

R5535
R5536

C5542
R5538
R5541
C5545

C5546
R5542
R5543
C5547

P1V5S_DGPU

60.4_1%_2

21
21

60.4_1%_2

21

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

21

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

75

R5537
R5504

80 7579

R5505

IN

808075

75
75
75
75

75

75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75

75
75
75
75
75
75
75
75
75

75
75

75
75

75
75
75
75

75
75

75

75
75

BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI

BI
BI
BI
BI
BI
BI
BI
BI
BI

IN
IN

IN
IN

OUT
OUT
OUT
OUT

BI
BI
BI
BI

IN
IN

IN
BI
BI

IN
IN

IN

21

1K_5%_2

ADBIB0#

U5502

M2

DQB0(14)
DQB0(9)
DQB0(15)
DQB0(8)
DQB0(11)
DQB0(10)
DQB0(13)
DQB0(12)
DQB0(1)
DQB0(6)
DQB0(0)
DQB0(7)
DQB0(2)
DQB0(5)
DQB0(3)
DQB0(4)
DQB0(16)
DQB0(18)
DQB0(17)
DQB0(23)
DQB0(19)
DQB0(21)
DQB0(20)
DQB0(22)
DQB0(26)
DQB0(27)
DQB0(31)
DQB0(24)
DQB0(29)
DQB0(28)
DQB0(30)
DQB0(25)

MAB0(8)
MAB0(0)
MAB0(1)
MAB0(3)
MAB0(2)
MAB0(5)
MAB0(4)
MAB0(6)
MAB0(7)

WCKB0_1
WCKB0_1#

WCKB0_0
WCKB0_0#

EDCB0_1
EDCB0_0
EDCB0_2
EDCB0_3

DBIB0_1
DBIB0_0
DBIB0_2
DBIB0_3

CASB0#
RASB0#

CKEB0
CLKB0#
CLKB0

WEB0#
CSB0#

21

120_1%_2

21

1K_5%_2

VM_RST#

DQ31|DQ7

M4

DQ30|DQ6

N2

DQ29|DQ5

N4

DQ28|DQ4

T2

DQ27|DQ3

T4

DQ26|DQ2

V2

DQ25|DQ1

V4

DQ24|DQ0

M13

DQ23|DQ15

M11

DQ22|DQ14

N13

DQ21|DQ13

N11

DQ20|DQ12

T13

DQ19|DQ11

T11

DQ18|DQ10

V13

DQ17|DQ9

V11

DQ16|DQ8

F13

DQ15|DQ23

F11

DQ14|DQ22

E13

DQ13|DQ21

E11

DQ12|DQ20

B13

DQ11|DQ19

B11

DQ10|DQ18

A13

DQ9|DQ17

A11

DQ8|DQ16

F2

DQ7|DQ31

F4

DQ6|DQ30

E2

DQ5|DQ29

E4

DQ4|DQ28

B2

DQ3|DQ27

B4

DQ2|DQ26

A2

DQ1|DQ25

A4

DQ0|DQ24

J5

RFU/A12/NC

K4

A7/A8|A0/A10

K5

A6/A11|A1/A9

K10

A5/BA1|A3/BA3

K11

A4/BA2|A2/BA0

H10

A3/BA3|A5/BA1

H11

A2/BA0|A4/BA2

H5

A1/A9|A6/A11

H4

A0/A10|A7/A8

D4

WCK01|WCK23

D5

WCK01#|WCK23#

P4

WCK23|WCK01

P5

WCK23#|WCK01#

R2

EDC3|EDC0

R13

EDC2|EDC1

C13

EDC1|EDC2

C2

EDC0|EDC3

P2

DBI3#|DBI0#

P13

DBI2#|DBI1#

D13

DBI1#|DBI2#

D2

DBI0#|DBI3#

G3

RAS#|CAS#

L3

CAS#|RAS#

J3

CKE#

J11

CK#

J12

CK

G12

CS#|WE#

L12

WE#|CS#

J13

ZQ

J10

SEN

J2

RESET#

J1

MF

A5

Vpp,NC

V5

Vpp,NC1

A10

VREFD1

V10

VREFD2

J14

VREFC

J4

ABI#

SAM_K4G10325FE_HC04_FBGA_170P

VDDQ-B1

VDDQ-B3
VDDQ-B12
VDDQ-B14

VDDQ-D1

VDDQ-D3
VDDQ-D12
VDDQ-D14

VDDQ-E5
VDDQ-E10

VDDQ-F1

VDDQ-F3
VDDQ-F12
VDDQ-F14

VDDQ-G2
VDDQ-G13

VDDQ-H3
VDDQ-H12

VDDQ-K3
VDDQ-K12

VDDQ-L2
VDDQ-L13

VDDQ-M1

VDDQ-M3

VDDQ-M12
VDDQ-M14

VDDQ-N5
VDDQ-N10

VDDQ-P1

VDDQ-P3
VDDQ-P12
VDDQ-P14

VDDQ-T1

VDDQ-T3
VDDQ-T12
VDDQ-T14

VDD-C10

VDD-D11

VDD-G11

VDD-G14

VDD-P11

VDD-R10

VSSQ-A1

VSSQ-A3
VSSQ-A12
VSSQ-A14

VSSQ-C1

VSSQ-C3

VSSQ-C4
VSSQ-C11
VSSQ-C12
VSSQ-C14

VSSQ-E1

VSSQ-E3
VSSQ-E12
VSSQ-E14

VSSQ-F5
VSSQ-F10

VSSQ-H2
VSSQ-H13

VSSQ-K2
VSSQ-K13

VSSQ-M5
VSSQ-M10

VSSQ-N1

VSSQ-N3
VSSQ-N12
VSSQ-N14

VSSQ-R1

VSSQ-R3

VSSQ-R4
VSSQ-R11
VSSQ-R12
VSSQ-R14

VSSQ-V1

VSSQ-V3
VSSQ-V12
VSSQ-V14

VDD-G1

VDD-L11
VDD-L14

VSS-B10
VSS-D10

VSS-G10

VSS-H14

VSS-K14

VSS-L10
VSS-P10

VSS-T10

VDD-C5

VDD-G4

VDD-L1
VDD-L4

VDD-R5

VSS-B5

VSS-G5

VSS-H1

VSS-K1

VSS-L5

VSS-T5

P1V5S_DGPU

DQB1(27)

75

B1
B3
B12
B14
D1
D3
D12
D14
E5
E10
F1
F3
F12
F14
G2
G13
H3
H12
K3
K12
L2
L13
M1
M3
M12
M14
N5
N10
P1
P3
P12
P14
T1
T3
T12
T14

C5
C10
D11
G1
G4
G11
G14
L1
L4
L11
L14
P11
R5
R10

A1
A3
A12
A14
C1
C3
C4
C11
C12
C14
E1
E3
E12
E14
F5
F10
H2
H13
K2
K13
M5
M10
N1
N3
N12
N14
R1
R3
R4
R11
R12
R14
V1
V3
V12
V14

B5
B10
D10
G5
G10
H1
H14
K1
K14
L5
L10
P10
T5
T10

CHANNEL B MEMORY

P1V5S_DGPU

60.4_1%_2

808075

CLKB1

75

IN

CLKB1#

IN

P1V5S_DGPU

P1V5S_DGPU

R5527
R5526

C5536
R5530
R5529
C5537

C5538
R5531
R5532
C5539

21
21

60.4_1%_2

21
21
21
21

21
21
21
21

1UF_6.3V_2_DY

1UF_6.3V_2_DY

R5528
R5506

2.37K_1%_2

5.49K_1%_2

1UF_6.3V_2

2.37K_1%_2

5.49K_1%_2

1UF_6.3V_2

BI

DQB1(30)

75

BI

DQB1(25)

75

BI

DQB1(29)

75

BI

DQB1(26)

75

BI

DQB1(31)

75

BI

DQB1(24)

75

BI

DQB1(28)

75

BI

DQB1(22)

75

BI

DQB1(23)

75

BI

DQB1(20)

75

BI

DQB1(21)

75

BI

DQB1(18)

75

BI

DQB1(17)

75

BI

DQB1(19)

75

BI

DQB1(16)

75

BI

DQB1(4)

75

BI

DQB1(0)

75

BI

DQB1(7)

75

BI

DQB1(2)

75

BI

DQB1(6)

75

BI

DQB1(3)

75

BI

DQB1(5)

75

BI

DQB1(1)

75

BI

DQB1(10)

75

BI

DQB1(15)

75

BI

DQB1(9)

75

BI

DQB1(14)

75

BI

DQB1(8)

75

BI

DQB1(12)

75

BI

DQB1(11)

75

BI

DQB1(13)

75

BI

MAB1(8)

75

BI

MAB1(7)

75

BI

MAB1(6)

75

BI

MAB1(5)

75

BI

MAB1(4)

75

BI

MAB1(3)

75

BI

MAB1(2)

75

BI

MAB1(1)

75

BI

MAB1(0)

75

BI

WCKB1_0

75

IN

WCKB1_0#

75

IN

WCKB1_1

75

IN

WCKB1_1#

75

IN

EDCB1_3

75

OUT

EDCB1_2

75

OUT

EDCB1_0

75

OUT

EDCB1_1

75

OUT

DBIB1_3

75

BI

DBIB1_2

75

BI

DBIB1_0

75

BI

DBIB1_1

75

BI

RASB1#

75

IN

CASB1#

75

IN

CKEB1

75

IN

CLKB1#

7580

BI

CLKB1

7580

BI

CSB1#

75

IN

WEB1#

75

IN

21

120_1%_2

21

1K_5%_2

80

VM_RST#

7579

IN

R5507

P1V5S_DGPU

21

C5540
R5534
R5533
C5541

1UF_6.3V_2_DY

21

2.37K_1%_2

21

5.49K_1%_2

21

1UF_6.3V_2

ADBIB1#

75

IN

FF

E

D

C

B

P1V5S_DGPU

C5561

C5570

C5571

2 1

2 1

0.1UF_16V_2

A

8

10UF_6.3V_3

7 6 5 4 3

2 1

2 1

0.1UF_16V_2

C5566

2 1

0.1UF_16V_2

0.1UF_16V_2

C5564

C5565

2 1

2 1

2 1

0.1UF_16V_2

2.2UF_6.3V_2

C5567

C5568

C5569

C5562

C5563

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

C5560

2 1

1UF_6.3V_2

1UF_6.3V_2

2 1

1UF_6.3V_2

P1V5S_DGPU

C5559

2 1

C5558

2 1

2 1

2 1

10UF_6.3V_3

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

C5553

C5552

2 1

2 1

2 1

0.1UF_16V_2

2 1

0.1UF_16V_2

2.2UF_6.3V_2

CHANGE by

C5554

C5555

C5556

C5557

C5550

C5551

2 1

2 1

2.2UF_6.3V_2

2.2UF_6.3V_2

XXX

C5548

C5549

2 1

2 1

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

TITLE

DATE

21-OCT-2002

2 1

SIZE

INVENTEC

MODEL,PROJECT,FUNCTION

VRAM3 & VRAM4

DOC.NUMBER

CODE

1310xxxxx-0-0

CS

C

SHEET

80 80

A

REV

X01

of