Inventec 07A99 6050A2169401 Schematic

INVENTEC
PRELIMINARY TEST
07A99
Pre-MP BUILD
2007 12 20
INVENTEC
TITLE
07A99 Preliminary Test
SIZE CODE
CHANGE by SHEET OF
23-Jan-2008KOBE
A3
DOC. NUMBER REV
CS
163
TABLE OF CONTENTS
PAGE
1.COVER PAGE
2.INDEX
3.BLOCK DIAGRAM
4.POWER SEQUENCE BLOCK 5-12.SYSTEM POWER
13.CLOCK GENERATOR
14.CPU Merom1
15.CPU Merom2
16.CPU Merom3
17.CPU Merom4
18.FAN & THERMAL CONTROLLER
19.N/B Crestline 1
20.N/B Crestline 2
21.N/B Crestline 3
22.N/B Crestline 4
23.N/B Crescline 5
24.N/B Crestline 6
25.N/B Crestline 7
26.DDR2 DIMM0
27.DDR2 DIMM1
28.DDR DAMPING
29.CIR
30.CRT CONN
31.S-VIDEO CONN
32.LCM CONN
PAGE
33. HDMI TRANSMITTER
34.HDMI CONN & CEC
35.S/B ICH8 1
36.S/B ICH8 2
37.S/B ICH8 3
38.S/B ICH8 4
39.S/B ICH8 5
40.SATA CONN
41.USB CONN
42.Felica & Camera CONN
43.Bluetooth CONN
44.EC
45.K/B & TP/B CONN
46.AZALIA CODEC
47.AUDIO AMP
48.Audio JACKs
49.LAN Controller
50.RJ45 & Transformer
51.ODD CONN
52.1394/Cardreader Controller
53.5 in 1 & 1394 CONN
54.Express Card CONN
55.ROBSON & WLAN
56.Broadcom Accelerator
57.MDC 1.5 CONN
PAGE
58.LED(M/B) & HOTKEY/B CONN
59.Pick Button & Fingerprint Board
60.KILL SWITCH& HALL SENSOR
61.SCREW & EMI CAP
62.FM TUNER BOARD
63.FINGER PRINT BOARD
INVENTEC
TITLE
07A99 Preliminary Test
CODE
CHANGE by
SIZE
30-Nov-2007KOBE
A3
DOC. NUMBER REV
CS
SHEET
OF
263
HDMI CONN
ATI
GPU
HDMI Transmitter
SIL1392
Merom
(uFCPGA)
ICS9LPRS365
Clock generator
CONN
USB0
CONN
USB1
USB2
BATTERY
CONN
CONN
USB3
S-video
LCM CRT
HDD HDD
ODD
USB4
Express Card
WLAN
USB5
MDC / Modem
Module 56K
JUMP
USB6
Bluetooth
SATA_0
SATA_1
Primary_IDE
USB7
CAMERA
PCIE X16 / SDVO
USB9
USB8
FINGER PRINT
3.3V, AZALIA
Realtek
ALC 268
FELICA
FSB, 667/800 MHz
Crestline
1299 PCBGA
DMI x4
ICH8-M
676 BGA
3.3V, LPC_Interface,33MHz
1.8V, DDR2 Interface, 533/667 MHz
1.8V, DDR2 Interface, 533/667 MHz
PCI_EXPRESS
Realtek
10/100 8102E
8111C
RJ45
MINI CARD
Wireless LAN
ANT
DDR2_SODIMM0
3.3V, PCI_Interface,33MHz
NEWCARD
ANT
DDR2_SODIMM1
MINI CARD
ROBSON
Card Reader & 1394
RICOH R5C833
System Charger &
DC/DC System power
(IMVP-6 VR)
RJ11
MIC
JACK
HP+SPDIF
JACK
SPEAKER
WINBOND WPCE775x
BIOS
SPI EEROM
CIR
CHANGE by
Card reader
CONN
1394
CONN
INVENTEC
TITLE
07A99 Preliminary Test
SIZE
CODE
A3
DOC. NUMBER
CS
SHEET OF
REV
633KOBE 24-Aug-2007
Adapter
(90W)
AM4825P
0.01
AM4825P
ADP_PRES
KBC_PW_ON
5/3.3V
(TPS51125)
+V3LA
+V5A
+V3S
PC6014
+V5S
PC6014
BATT_CLK
BATT_DATA
CHARGER
SCL
SDA
ACOK
0.01
ACIN#
+VPACK
SLP_S4#_3R
SLP_S3#_5R
VCCDRE_EN
H_VID [ 0 : 6 ]
IMVP_CKEN#
PM_DPRSLPVR
SLP_S3#_3R
EN_PSV
TPS51117
EN_PSV
TPS51117
VO
VO
EN_PSV
TPS51117
VR_ON
VID [ 0 : 6 ]
CLK_EN#
DPRSLPVR
+V1.8A
VO
TPS51620RHAR
VOUT
G2997
APL5913
+VCCP
CHANGE by
+V1.5S
+VCC_CORE
+V0.9S
+V1.5S
30-Nov-2007KOBE
INVENTEC
TITLE
07A99 Preliminary Test
SIZE
A3
CODE
CS
SHEET
DOC. NUMBER REV
OF
463
CN40
1
1
2
2
3
3
4
4
ACES_91202_0047L_TSB_4P
FUSE5
1
8A_125V
+VADPTR
2
C820
1
10pF_50v
2
5-
1 2
C847
0.1uF_50v
+VADPTR
5-
NFM60R30T222
ROHM_RLZ24 2
1
L70
D93
R921
1K_5%
R907
10K_5%
+VBAT
C842
12
1
R910
18K_5%
2
C826
1 2
100pF_50v
0.1uF_25v
C828
1
1uF_10v
2
6-,7-,8-,9-,11-,61-
G
4
5
G
41S23
1 2
765
8
12
3
876
C836
56pF_50v
D
Q63
FDS8884
S
Q62
FDS8884
D
D94
SSM34_3A40V_OPEN
21
1
R909
10K_5%
2
C835
1
1500pF_50v
2
C821
0.01uF_50v
PLC0755P_10uH_3.9A
L69
12
1
R902
OPEN
2 1
C823
2
OPEN
1 2
C838
1 2
10uF_25v_K_X5R
1 2
Q65
1
S
2 3 4
G
AM4825P_AP
R920
12
0.01_1%_1W
C841
12
0.1uF_25v
NEAR IC
C831
0.1uF_25v
Q64
R901
12
10_5%
2
2
D91
AM4825P_AP
1
S
2 3
G
2
3
1
1
R915
47K_5%
2
C840
1uF_10v
1
R916
100K_5%
2
8
D
7 6 54
1
2
+V5LA
5-,6-,7-,12-,18-,29-,34-
C845
0.1uF_25v
+V5LA
1
1 2
5-,6-,7-,12-,18-,29-,34-
1
R919
8.06K_1%
2 1
R917
39.2K_1%
2
44-
BATT_IN
1
R918
22.6K_1%
2
R906
2
100K_5%
R913
12
0.01_1%_1W
C844
12
0.1uF_25v
NEAR IC
R905
200K_5%
ACDRV#
BATDRV#
PVCC
HIDRV
BTST
REGN
LODRV
PGND SYNP SYNN
ISYNSET
SYS
PH
SRP SRN BAT
EAO
EAI
FBO
TML
C843
1 2
0.1uF_25v
2
23
24
32
30
EMI
29
R3027
12
31
4.7_5%
28
27 26 22 21 20 19 18
7
8 9
16 33
C839
1 2
10uF_25v_K_X5R
C822
1
4.7uF_25v
2
NEAR IC
R3026
12
OPEN
EMI
D95
12
3
BAT54AW
1
1
R912
100K_5%
2
2
R911
200K_5%
C848
1 2
C846
1
0.1uF_25v
2
10uF_25v_K_X5R
U63
12
VCC
3
ACN
4
ACP
6
BYPASS#
5
ACDET
11
VREF5
10
AGND
15
TS
6-
THRM1
1
CHGEN#
14
SCL
13
SDA
25
ALARM#
TP53
17
IOUT
TI_BQ24721C_QFN_32P
1
C9578
OPEN
2
1
2
D92
1 2
PDS1040S
3
R914
432K_1%
C825
47uF_35v
1
2
0.01uF_50v12
1
2
1
4.7K_5%
1
4.7K_5%
C824
R904
R903
2
34
1
BAT54S_30V_0.2A
1
2
1
MMBT3904
Q61
1
B
1
3
C
R908
E
33K_1%
2
2
C827
1 2
OPEN
2
44-
ACPRES
44-
CHG_EN
TP55
TP54
D
8 7 6 5
C832
1 2
0.22uF_25v
+VPACK
6-
C837
1 2
10uF_25v_K_X5R
EC_CLK
EC_DATA
18-,44-
18-,44-
CHANGE by
INVENTEC
TITLE
07A99 Preliminary Test
DC&BATTERY CHANGER
SIZE
CODE
A3
CS
SHEET
OF
635KOBE 24-Aug-2007
REVDOC. NUMBER
BAT_ID
+VBAT
5-,7-,8-,9-,11-,61-
1 R927
1M_5%
2
1 R928
56.2K_1%
2
1 R922
180K_1%
2
44-
BATT_DATA
BATT_CLK
+V3LA
44­44-
C849
1
OPEN
2
7-,12-,18-,34-,35-,41-,44-,58-,60-,61-
1
R924
47K_5%
CHENMKO_BAT54_3P_OPEN
2
R2974
13
33_5%
12
D96
EZJZ0V120JA_OPEN
U64
3
LTH
2
GND
1
HTH
GMT_G680LT1_SOT23_5P
12
R297533_5%
RESET#
VCC
THRM1
4 5
D5035
5-
1
1
D5034
EZJZ0V120JA_OPEN
2
2
7-,44-
+V5AUXON
+VPACK
12
1K_5%R926
+V5LA
5-
LITTLEFUSE_R451015_15A_65V
12
C850
1 2
1000pF_50v
5-,7-,12-,18-,29-,34-
C851
1 2
0.1uF_10v
FUSE6
CN41
1
BATT+
2
BATT+
3
ID
4
B-I
5
TS
6 7 8 9
ALLTOP_C144P3_109A_L_9P
G1
SMD
G
G2
SMC
G
G3
GND
G
G4
GND
G
CHANGE by
INVENTEC
TITLE
07A99 Preliminary Test
BATTERY CONN
SIZE CODE
A3
DOC. NUMBER REV
CS
SHEET OF
636KOBE 24-Aug-2007
THRM_SHUTDWN#
EC_PW_ON
ATF_INT#
18-,44-
CHENMKO_BAT54_3P
R942
44-
12
10K_5%
D101 13
SSM3K7002FU
Q71
1
G
SSM3K7002FU
D
S
3
2
+V5LA
Q72
1
G
5-,6-,7-,12-,18-,29-,34-
1
R940
10K_5%
2
3
D
S
2
SSM3K7002FU
CHENMKO_BAT54_3P
Q89
3
D
1
G
1
S
2
2
6-,7-,12-,18-,34-,35-,41-,44-,58-,60-,61-
D100
13
R939
12
100K_5%
R937
150K_1%
+V3LA
C859
1
0.1uF_10v
2
4
3
S
G
TPC6104
Q74
+V3A
36-,37-,38-,42-,44-,49-,54-,55-,58-,60-
1
D
2 5 6
1
R941
200_5%
2
+V3LA
6-,7-,12-,18-,34-,35-,41-,44-,58-,60-,61-
PAD18
2
1
POWERPAD_2_0610
C858
OPEN
1 2
R929
6.8K_1%
1
2
1
R935
10K_1%
2
C862
1uF_6.3v
MPLC0730_3R3_5.7A
L71
1
C860
1 2
2
330uF_6.3v
12
Q69
FDS8884
Q70
FDS6690AS
+V5AUXON
8
76
D
S
123
8765
D
5
G
4
G
41S23
6-,44-
4.7uF_25v
C854
10uF_25v_K_X5R
C864
1
1
2
2
+V3LDO
1 2
D106 13
CHENMKO_BAT54_3P
R932
12
0_5%
R933
12
OPEN
C867
12
0.1uF_25v
TI_TPS51125_QFN_24P
C853
1uF_6.3v
R936
12
0_5%
C925
1 2
4.7uF_6.3v
1
R938
150K_1%
2
7 8
10 11
U65
R934
820K_5%
VREG3 VBST2
DRVL2
+VBAT
5-,6-,8-,9-,11-,61-
PAD20
POWERPAD_2_0610
C928
1
1uF_6.3v
2
25
4
2
5
1
3
6
TML
VFB1
VFB2
VREF
TONSEL
ENTRIP1
ENTRIP2
SKIPSEL
EN0
13
1
2
GND
14
15
1 2
PGOOD
VBST1
DRVH1DRVH2
DRVL1
VCLK
VIN
VREG5
18
16
17
C856
2.2uF_25v
VO1VO2
LL1LL2
24 23 229 21 20 1912
+V5LA
1 2
0.1uF_25v
C866
12
5-,6-,7-,12-,18-,29-,34-
C855
10uF_6.3v
8765
D
Q73
G
FDS8884
41S23
8
76
5
D
Q75
G
FDS6690AS
S
123
4
10uF_25v_K_X5R
C865
1 2
330uF_6.3v
10uF_25v_K_X5R
C914
1 2
MPLC0730_3R3_5.7A
L72
12
1
C852
2
1 2
C861
1uF_6.3v
1
R931
15.4K_1%
2
1
R930
10K_1%
2
C857
1 2
OPEN
SKIPSEL
TONSEL
+V5A
PAD19
POWERPAD_2_0610
>>VRE3 OR VRE5=OOA
>>VREF=ASKIP
>>GND=PWM
>>VRE5=365/460
>>VRE3=300/375 >>VREF=245/305
>>GND=200/250
8-,9-,11-,12-,38-,41-,42-,46-,47-,58-,61-
INVENTEC
TITLE
07A99 Preliminary Test
SYSTEM POWER(3V/5V)
CODE
SIZE
CHANGE by SHEET OF
24-Aug-2007KOBE
A3
DOC. NUMBER REV
CS
763
X01
+V3S
+V5A
11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
7-,8-,9-,11-,12-,38-,41-,42-,46-,47-,58-,61-
+VBAT
5-,6-,7-,8-,9-,11-,61-
PAD12
POWERPAD_2_0610
12
SLP_S3#_3R
100K_5%
7-,8-,9-,11-,12-,38-,41-,42-,46-,47-,58-,61-
SLP_S3#_3R
R2096
0.1uF_10v
R687
OPEN
R688
10K_5%
8-,11-,12-,36-,44-
C677
+V5A
1
2
1
2
VCCP_PG
11-
1 2
7-,8-,9-,11-,12-,38-,41-,42-,46-,47-,58-,61-
C681
1 2
0.1uF_10v
1
R1029
10K_5%
2
1uF_6.3v
C672
1uF_6.3v
C921
+V5A
1
2
1
2
R1009
10_5%
1 2
R692
10_5%
1 2
C915
OPEN
C679
OPEN
1 2
U51
1
EN_PSV
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
7
GND
1
TI_TPS51117_QFN_14P
2
2
274K_1%
U70
1
EN_PSV
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
7
GND
TI_TPS51117_QFN_14P
R698
2
274K_1%
R1008
VBST DRVH
TRIP
V5DRV
DRVL
PGND
VBST
DRVH
TRIP
V5DRV
DRVL PGND
1
LL
TML
8765
1
2.2_5%
R1001
C674
0.1uF_25v
12
C678
1
1uF_6.3v
2
R693
12
12
11.5K_1%
14 13 12
LL
11 10 9 8 15
TML
D
G
S
23
41
6
5
87
D
G
41S23
FDS8672S
FDS8878
Q85
Q86
1 2
SLP_S5#_3R SLP_S3#_3R
+VBAT
5-,6-,7-,8-,9-,11-,61-
8D7654
G
FDS8884
S
2.2_5%
R1011
C923
0.1uF_25v
12
C917
1
1uF_6.3v
2
R1010
12
12
15K_1%
14 13 12 11 10 9 8 15
Q87
123
8D7654
G
S 123
Q88
FDS6690AS
1 2
10uF_25v_K_X5R
C676
C670
1 2
4.7uF_25v
10uF_25v_K_X5R
12
MPLC0730_1R0_10.6A
9-,12-,36-,44-
8-,11-,12-,36-,44-
19-,26-,27-
M_VREF
PAD24
POWERPAD_2_0610
C1058
C919
1 2
4.7uF_25v
L80
12
MPLC0730_2R2_7.3A
VLDOIN
VTTSNS
+VCCP
+V0.9S
9-,12-,19-,23-,24-,26-,27-,61-
2 3
VTT
5
C1001
12
22uF_6.3v
POWERPAD_2_0610
C663
1
22uF_6.3v
2
28-,61-
PAD9
13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
C675
1
10uF_6.3v
2
U52
11
TML1VDDQSNS
10
VIN
9
S5
8
GND4PGND
7
S3
6
VTTREF
PAD11
POWERPAD_2_0610
L79
1
R1028
4.12K_1%
R1003
10K_1%
1
OPEN
C671
2
2
1
330uF_2v_15mR_Panasonic
2
C661
1 2
0.1uF_10v
1
C673
2
+V5A +V1.8
7-,8-,9-,11-,12-,38-,41-,42-,46-,47-,58-,61-
GMT_G2997F6U_MSOP10_10P
C662
1
1uF_10v
2
+V1.5S
9-,16-,24-,35-,36-,38-,54-,55-,56-,61-
PAD23
1
10uF_6.3v
2
C924
POWERPAD_2_0610
INVENTEC
TITLE
07A99 Preliminary Test
SYSTEM POWER(+VCCP/+V1.5S)
SIZE CODE
A3
DOC. NUMBER REV
CS
638KOBE 24-Aug-2007
1
R1013
10.2K_1%
1
OPEN
C920
2
2
1
2
R1012
10K_1%
C922
220uF_2v_15mR_Panasonic
1
2
CHANGE by SHEET OF
7-,8-,11-,12-,38-,41-,42-,46-,47-,58-,61-
+V5A
+VBAT
5-,6-,7-,8-,11-,61-
PAD15
POWERPAD_2_0610
SLP_S5#_3R
8-,12-,36-,44-
R2963
12
0_5%
C694
OPEN
1
R703
10_5%
2
C689
1 2
SLP_S3#_5R
1 2
1uF_6.3v
11-,12-,18-,30-,32-,36-,38-,40-,42-,44-,45-,46-,48-,51-,53-,58-,61-
R9014
12
12-
OPEN
C696
OPEN
C1002
OPEN12
U53
1
EN_PSV
2
TON
3
VOUT
4
V5FILT
5
VFB
6
PGOOD
7
GND
1
TI_TPS51117_QFN_14P
2
R706
2
1
274K_1%
14
VBST
13
DRVH
12
LL
11
TRIP
10
V5DRV
9
DRVL
8
PGND
15
TML
1 2
+V5S
8-,16-,24-,35-,36-,38-,54-,55-,56-,61-
C685
1
1uF_6.3v
2
6
U54
VCNTL
7
POK
VIN
VOUT VOUT
82
EN
FB
VIN
GND
9
1
ANPEC_APL5913_KAC_TRL_SOP_8P
1
12
C695
1uF_6.3v
5
3 4
R704
2.2_5%
2
R707 15K_1%
+V1.5S
1 2
C691
0.1uF_25v
1
2
C682
22uF_6.3v
1 2
C686
39pF_50v
1
R701
5.9K_1%
2
1
R700
10K_1%
2
G
41S2
G
4
3
65
8765
D
8
7
D
S
123
Q47
FDS6690AS
C683
1 2
22uF_6.3v
Q48
FDS8884
PAD13
POWERPAD_2_0610
C684
1 2
1uF_6.3v
1
C1059
C687
1
4.7uF_25v
2
2
10uF_25v_K_X5R
MPLC0730_2R2_7.3A
+V1.25S
19-,24-,38-
1
R699
200_5%
2
L81
12
14.3K_1%
10K_1%
R709
R708
1
2
1
2
1
OPEN
C688
2
C690
1
2
220uF_2v_15mR_Panasonic
8-,12-,19-,23-,24-,26-,27-,61-
PAD14
POWERPAD_2_0610
C692
1
10uF_6.3v
2
+V1.8
SLP_S3_5R
Q46
3
D
12-
G
1
SSM3K7002FU
S
2
INVENTEC
TITLE
07A99 Preliminary Test
SYSTEM POWER(+V1.8/+V1.25S)
SIZE
24-Aug-2007KOBE
A3
CODE
CS
DOC. NUMBER REV
963
OFCHANGE by SHEET
BLANK
CHANGE by
INVENTEC
TITLE
07A99 Preliminary Test
SIZE CODE DOC. NUMBER
A3
CS
30-Nov-2007KOBE
SHEET OF
10 63
REV
VR_PWRGD
IMVP_CKEN#
C3014
1
2
1000pF_50v
VCOREGND
R997
VCCP_PG
8-
12
120K_1%
1
3
2
16­16­16­16­16-
16­16-
15-
15-,19-,35-
19-,36-
1 2
2
CSREF
D103
BAT54C
2
C895
1 2
1uF_6.3v
VCOREGND
C3008
4700pF_25v
C3009
18pF_50v
C30121
680pF_50v
R3024
12
100K_5%
TP56
TP57
11-
C894
0.1uF_16v
5
U67
4
2
PHP_74LVC1G17_SOT753_5P
3
R3017
12
OPEN
R3018
12
499_1%
1
EN
2
PWRGD
12
3
PGDELAY
4
CLKEN
5
FBRTN
6
FB
7
COMP
8
SS
9
ST
10
VARFREQ
11
VRTT
12
TTSEN
115K_1%
1
C3007
1000pF_50v
2
VCOREGND
SLP_S3#_3R
8-,12-,36-,44-
R963
VR_PWRGD
11-,18-,36-
+V3S
8-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
1
120K_1%
H_VID6 H_VID5 H_VID4 H_VID3 H_VID2 H_VID1 H_VID0
PSI#
H_DPRSTP#
PM_DPRSLPVR
1
1
R3019
10K_5%
R3025
12
OPEN
R3020
10K_5%
2
2
VCORE_EN
11-,18-,36-
12
C3011
330pF_50v
12
R3022
1.65K_1%
R3023
432K_1%
+V5A
7-,8-,9-,12-,38-,41-,42-,46-,47-,58-,61-
R977
12
0_5%
R978
0_5%
12
C3010
220pF_25v
1
1
2
2
VCOREGND
16-
16-
11-,44-
R3021
12
12
61.9K_1%
C3013
0.012uF_16v
VCCSENSE
VSSSENSE
+V3S
5
2
3
C896
1 2
1uF_6.3v
12
19-,36-
48
47
49
46
45
44
42
41
40
39
PSI
TML
DPRSLP
DPRSTP
U69
ADI_ADP3208_LFCSP_48P
CLIM
PMON
PMONFS
15
13
14
R3011
VCOREGND
1
2
16
VID0
LLINE
VID1
CSCOMP
17
18
1 2
VID243VID3
VID4
RAMP20RPM22RT
CSFEF19CSSUM
21
2
1
2
R3009
274K_1%
1
1 2
VCOREGND
C3006
1000pF_50v
VID6
VID5
VRPM
R3008
80.6K_1%
1000pF_50v
8-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
U68
4
PHP_74LVC1G17_SOT753_5P
11-,44-
VCORE_EN
PM_PWROK
+V5A
7-,8-,9-,12-,38-,41-,42-,46-,47-,58-,61-
R3004
12
10_5%
C3002
1 2
2.2uF_6.3v
+VBAT_CPU
D3000
3
1
BAT54A_30V_0.2A
C3000
12
0.1uF_25v
C3001
12
0.1uF_25v
2
1
C893
2
2.2uF_6.3v
VCOREGND
38
37
SP
VCC
BST1
DRVH1
SW1 PVCC1 DRVL1
PGND1 PGND2
DRVL2 PVCC2
SW2 DRVH2
BST2
GND
23
24
R3007
237K_1%
1
12 C3003
1000pF_50v
R3010
12
10K_5%
R3050
12
0_5%
36 35 34 33 32 31 30 29 28 27 26 25
2
VCOREGND
R3005
12
2.2_5%
R3006
12
2.2_5%
C3004
R3012
12
105K_1%
R3013
12
105K_1%
1
C3005
1000pF_50v
2
R3014
12
115K_1%
2
1
R3015
76.8K_1%
1
R3016
220K_5%
2
FINE_TUNE
+VBAT
5-,6-,7-,8-,9-,11-,61-
1
L76
NFM60R30T222
4 3
2
1 2
10uF_25v_K_X5R
C899
1 2
10uF_25v_K_X5R
10uF_25v_K_X5R
C901
C907
1 2
R3002
12
OPEN
10uF_25v_K_X5R
C900
1 2
R3003
12
OPEN
+VBAT_CPU
G
56789
Q82
SI7686DP_T1_E3
1
C892
2
0.01uF_50v
4321
1
ETQP4LR36WFC_PANASONIC
1
D105
2
SSM34_3A40V_OPEN
G
4
765
8
D
1S23
Q81
FDMS8660S
1
9
R995
OPEN
2
1
C897
OPEN
2
CSREF
C891
1 2
0.01uF_50v
56789
Q83
SI7686DP_T1_E3
4G321
ETQP4LR36WFC_PANASONIC
D104
G
41S23
8765
9
D
Q78
FDMS8660S
1
R996
OPEN
1
2
C898
2
OPEN
1 2
SSM34_3A40V_OPEN
TITLE
SIZE CODE
CHANGE by SHEET OF
+VCC_CORE
L74
2
2 R3000
10_1%
1
11-
2 R3001
10_1%
1
L75
1
2
16-
INVENTEC
07A99 Preliminary Test
A3
DOC. NUMBER REV
CS
6311KOBE 24-Aug-2007
U43-F
74ACT14MTC
14
7
5-,6-,7-,12-,18-,29-,34-
1312
74ACT14MTC
U43-E
+V5LA
+V3S
+V3
14
1110
7
57-,58-
C590
47uF_6.3v
CHENMKO_BAT54_3P
SLP_S5#_5R
1
2
R586
200_5%
D71
5-,6-,7-,12-,18-,29-,34-
Q28
1
D
2 5 6
TPC6104
1
2
CHENMKO_BAT54_3P
1
3
U43-D
74ACT14MTC
G
S
1 2
3
1
+V5LA
4
3
C594
680pF_50v
D72
14
98
7
+V3LA
6-,7-,18-,34-,35-,41-,44-,58-,60-,61-
1
R585
220K_5%
2
5-,6-,7-,12-,18-,29-,34-
8-,11-,36-,44-
SLP_S3#_3R
4
S
TPC6104
Q27
1
D
2 5 63
G
C593
1 2
680pF_50v
+V5LA
14
U43-B
3
7
74ACT14MTC
8-,11-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
8-,9-,19-,23-,24-,26-,27-,61-
2
R582
1
200_5%
2
R580
200_5%
1
3
D
S
2
SSM3K7002FU
D69
2
3
1
BAT54A_30V_0.2A
SLP_S3#_5R
G
1
Q24
9-,12-
R581
220K_5%
4
R583
220K_5%
1
C591
2
47uF_6.3v
2
1
2
1
C595
12
680pF_50v
SSM3K7002FU
+V5S
+V1.8S+V1.8
33-
1
R588
200_5%
2
Q29
3
D
G
1
S
2
Q30
8
1
S
D
2
7
3
6 5
4
G
AO4406
R587
12
220K_5%
+V5A
7-,8-,9-,11-,38-,41-,42-,46-,47-,58-,61-9-,11-,12-,18-,30-,32-,36-,38-,40-,42-,44-,45-,46-,48-,51-,53-,58-,61-
Q25
1
4
D
S
2 5 63
G
TPC6104
Q26
1
4
D
S
2 5 63
G
TPC6104
C592
12
680pF_50v
9-,11-,12-,18-,30-,32-,36-,38-,40-,42-,44-,45-,46-,48-,51-,53-,58-,61-
CHENMKO_BAT54_3P 1
SLP_S3#_5R
9-,12-
+V5S
1
R584
200_5%
2
D70
5-,6-,7-,12-,18-,29-,34-
74ACT14MTC
SLP_S5_3R
5-,6-,7-,12-,18-,29-,34-
+V5LA
3
14
U43-C
56
+V5LA
12
C588
0.1uF_10v
U43-A
2
74ACT14MTC
14
8-,9-,36-,44-
1
SLP_S5#_3R
7
9-
SLP_S3_5R
7
INVENTEC
TITLE
07A99 Preliminary Test
POWER(SLEEP)
SIZE CODE
CHANGE by SHEET OF
A3
DOC. NUMBER REV
CS
6312KOBE 24-Aug-2007
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
CPU_BSEL1 CPU_BSEL2
CLK_R_SB14
FSB
FSA
1
0
+VCCP
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
15-,19­15-,19-
36-
1K_5%
R24
FSC
FSB CLOCK FREQUENCY
1
0
1
0
*CLKREQ# pin controls SRC Table.
Byte5: bit6 =0(PWD)
SRC0
CR#_A
Byte5: bit7=0, disable CR#_A; 1,enable CR#_A
Byte5: bit2 =0(PWD)
SRC0
CR#_C
Byte5: bit3=0, disable CR#_C; 1,enable CR#_C
L2
BLM11A121S
1
2
1
R29
OPEN
2
10K_5%
R18
2
1
667 800
Layout note: All decoupling 0.1uF disperse closed to pin
+VCCP_CLK_VDD
1 2
10uF_10v
C11
1 2
C6
10uF_10v
1 2
C9
C10
1 2
0.1uF_16v
0.1uF_16v
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
CPU_BSEL0
+VCCP
837 : R14 and R15 change to 12.1_1%
12
1 2
CLK_PWRGD
HOST CLOCK FREQUENCY
2
1K_5%
R2
1
R28
33_5%
36-
CLKREQ_R_SATA#
CLKREQ_R_MCH# CLK_R_KBPCI CLK_R_CBPCI
CLK_R_CARD48
CLK_R_SB48
44­52-
R21
1
OPEN
C2
33pF_50v
Please place close to CLKGEN within 500mils
166 200
Byte5: bit6 =1
SRC2
Byte5: bit2 =1
SRC2
CR#_B
CR#_D
Byte5: bit4 =0(PWD)
SRC1
Byte5: bit5=0, disable CR#_B; 1,enable CR#_B
SRC1
Byte5: bit1=0, disable CR#_D; 1,enable CR#_D
15-,19-
1 2
R10
1K_5%
1 2
0.1uF_16v
2
C5
1 2
+VCCP
12
12
2.2K_5%
53-
36-
36­19-
ICH_3S_SMCLK
ICH_3S_SMDATA
X1
14.31818MHZ
12
30PPM
C4
0.1uF_16v
R1
1 2
1 2
0.1uF_16v
12
R15
12
R16
12
R6
12
R17
12
C1
33pF_50v
Byte5: bit4 =1
SRC4
C3
33_5%
26-,27-,36­26-,27-,36-
Byte5: bit0 =1Byte5: bit0 =0(PWD)
SRC4
+V3S
8-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
Layout note: All decoupling 0.1uF disperse closed to pin
C7
1 2
0.1uF_16v
8-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
+V3S
R5
R25
10K_5%
2
1
1
10K_5%
1
2
R27
OPEN
R20
2
1
CLK_SB48
CLK_SB14 CLKREQ_SATA# CLKREQ_MCH#
CLK_KBPCI CLK_CBPCI
2
10K_5%
OPENR14
475_1%
12
475_1% 33_5% 33_5%R26
L1
BLM11A121S
1
2
C12
1 2
10uF_10v
U1
26
VDDSRC_IO
45
VDDSRC_IO
36
VDDSRC_IO
12
VDD_IO
39
VDD_SRC
61
VDDREF
20
VDDPLL3_IO
49
VDDCPU_IO
9
VDD48
2
VDDPCI
55
VDDCPU
16
VDD_PLL3
10
USB_48MHZ_FSLA
57
FSLB_TEST_MODE
62
REF0_FSLC_TEST_SEL
1
PCI0_CR#_A
3
PCI1_CR#_B
4
PCI2_TME
5
SRC5_EN_PCI3
56
CK_PWRGD_PD#
64
SCLK
63
SDTAT
60
X1
59
X2
8
GNDPCI
11
GND48
15
GND_IO
19
GND_PLL3
23
GNDSRC
29
27MHz_NonSS_SRCT1_SE1
GNDSRC
42
GNDSRC
58
GNDREF
52
GNDCPU
REA_RTM875T_606_TSSOP_64P
RESET#
PCI_STOP#_SRCT5
CPU_STOP#_SRCC5
CPUT1_F CPUC1_F
CPUT2_ITP_SRCT8
CPUC2_ITP_SRCC8
SRCT11_CR#_H
SRCC11_CR#_G
SRCT10
SRCC10
SRCT7_CR#_F SRCC7_CR#_E
PCI4_27M_Select
PCI_F5_ITP_EN
SRCT3_CR#_C
SRCC3_CR#_D
SRCT2_SATAT
SRCC2_SATAC
27MHz_SS_SRCC1_SE2
SRCT0_DOTT_96
SRCC0_DOTC_96
CPUT0
CPUC0
SRCT9
SRCC9
SRCT6
SRCC6
SRCT4
SRCC4
Byte6: bit7=0, disable CR#_E; 1,enable CR#_E
CR#_E
SRC6
Byte6: bit6=0, disable CR#_F; 1,enable CR#_F
CR#_F
SRC8
Byte6: bit5=0, disable CR#_G; 1,enable CR#_G
CR#_G
SRC9
Byte6: bit4=0, disable CR#_H; 1,enable CR#_H
CR#_H
SRC10
C8
1 2
0.1uF_16v
48
38 37
CLK_R_NBCLK
51
CLK_R_NBCLK#
50
CLK_R_CPUBCLK
54
CLK_R_CPUBCLK#
53
CLK_R_PCIE_NCARD
47
CLK_R_PCIE_NCARD#
46
CLKREQ_ROBSON#
33
CLKREQ_WLAN#
32
34 35
CLK_R_PCIE_WLAN
30
CLK_R_PCIE_WLAN#
31
44 43
CLK_R_PCIE_SB
41
CLK_R_PCIE_SB#
40
6 7
CLK_R_PEG_MCH
27
CLK_R_PEG_MCH#
28
CLK_R_PCIE_LAN
24
CLK_R_PCIE_LAN#
25
21
CLK_R_SATA1
CLK_R_SATA1#
22
CLKSS1_R_DREF
17
CLKSS1_R_DREF#
18
CLK_R_DREF
13
CLK_R_DREF#
14
8-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
+V3S_CLK_VDD
C13
1 2
0.1uF_16v
CLK_R_PCIE_ROBSON
CLK_R_PCIE_ROBSON#
CLK_MINICARD2 CLK_ICHPCI
1 2
0.1uF_16v
C14
1 2
R11
2
10K_5%
C15
0.1uF_16v
CHANGE by SHEET
8-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
+V3S
1
1
R4
R3
OPEN
OPEN
2
2
475_1%
12
475_1%
33_5% R19 33_5%
R23
2
10K_5%
27_Selet =0
LCD_SST 100MHZ
12
12 12
1
CLK_R_PCIE_ROBSON
CLK_R_PCIE_ROBSON#
1
27_Selet =1
27MHZ non-spread clock
24-Aug-2007KOBE
+V3S
1
1
R13
R12
10K_5%
10K_5%
2
2
36­36-
21­21-
14­14-
54-
R8 R9
R7
54-
55-
CLKREQ_R_ROBSON#
55-
CLKREQ_R_WLAN#
55­55-
55­55-
56­56-
36­36-
55-
CLK_R_MINICARD2
37-
CLK_R_ICHPCI
19­19-
49­49-
35­35-
19­19-
19­19-
INVENTEC
TITLE
07A99 Preliminary Test
CLOCK GENERATOR
CODE
SIZE
A3
CS
PCISTOP#_3 CPUSTOP#_3
CLK_R_NBCLK CLK_R_NBCLK#
CLK_R_CPUBCLK CLK_R_CPUBCLK#
CLK_R_PCIE_NCARD CLK_R_PCIE_NCARD#
CLK_R_PCIE_ROBSON CLK_R_PCIE_ROBSON#
CLK_R_PCIE_WLAN CLK_R_PCIE_WLAN#
CLK_R_PCIE_HDDVD CLK_R_PCIE_HDDVD#
CLK_R_PCIE_SB CLK_R_PCIE_SB#
CLK_R_PEG_MCH CLK_R_PEG_MCH#
CLK_R_PCIE_LAN CLK_R_PCIE_LAN#
CLK_R_SATA1 CLK_R_SATA1#
CLKSS1_R_DREF CLKSS1_R_DREF#
CLK_R_DREF CLK_R_DREF#
DOC. NUMBER
13 63
REV
X01
OF
H_A#(35:3)
H_ADSTB#1
H_STPCLK#
21-
H_A#(3) H_A#(4) H_A#(5) H_A#(6) H_A#(7) H_A#(8) H_A#(9) H_A#(10) H_A#(11) H_A#(12) H_A#(13) H_A#(14) H_A#(15) H_A#(16)
H_REQ#(4:0)
H_A#(17) H_A#(18) H_A#(19) H_A#(20) H_A#(21) H_A#(22) H_A#(23) H_A#(24) H_A#(25) H_A#(26) H_A#(27) H_A#(28) H_A#(29) H_A#(30) H_A#(31) H_A#(32) H_A#(33) H_A#(34) H_A#(35)
21-
35-
H_A20M#
35- 18-,19-,35-
H_FERR#
35-
H_IGNNE#
35­35-
H_INTR
35-
H_NMI
35-
H_SMI#
21-
H_REQ#(0) H_REQ#(1) H_REQ#(2) H_REQ#(3) H_REQ#(4)
H_ADSTB#0
21-
CN1-1
J4
A3#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L2
A13#
ADDR GROUP 0
P4
A14#
P1
A15#
R1
A16#
M1
ADSTB0#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L1
REQ4#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U1
A23#
R4
A24#
T5
A25#
T3
A26#
ADDR GROUP 1
W2
A27#
W5
A28#
Y4
A29#
U2
A30#
V4
A31#
W3
A32#
AA4
A33#
AB2
A34#
AA3
A35#
V1
ADSTB1#
A6
A20M#
A5
FERR#
C4
IGNNE#
ICH
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD01
N5
RESERVED
RSVD02
T2
RSVD03
V3
RSVD04
B2
RSVD05
C3
RSVD06
D2
RSVD07
D22
RSVD08
D3
RSVD09
F6
RSVD010
ADS# BNR#
BPRI#
DEFER#
DRDY# DBSY#
BR0#
IERR#
INIT#
CONTROL
LOCK#
RESET#
RS0# RS1# RS2#
TRDY#
HIT#
HITM#
BPM0#
BPM1# BPM2# BPM3#
PRDY# PREQ#
TCK
TDI TDO TMS
XDP/ITP SIGNALS
TRST#
DBR#
THERMAL
PROCHOT#
THERMDA THERMDC
THERMTRIP#
H CLK
BCLK0 BCLK1
H1 E2 G5
H5 F21 E1
F1
D20 B3
H4
C1 F3 F4 G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20
R36
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
56_5%
2
D21 A24 B25
C7
A22 A21
1
+VCCP
FOX_PZ4782K_274M_41_478P
GMCH
CPU ICH8
+VCCP
10mils/10mils
21-
H_ADS#
21-
H_BNR#
21-
H_BPRI#
21-
H_DEFER#
21-
H_DRDY#
21-
H_DBSY#
21-
H_BREQ#0
35-
H_INIT#
21-
H_LOCK#
21-
H_CPURST#
21-
H_TRDY#
21-
H_HIT#
21-
H_HITM#
14-
H_BPM5_PREQ#
14-
H_TCK
14-
TDI_FLEX
14-
H_TMS
36-
XDP_DBRESET#
18-
H_THERMDA
18-
H_THERMDC PM_THRMTRIP#
13-
CLK_R_CPUBCLK
13-
CLK_R_CPUBCLK#
+VCCP
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
12
54.9_1%
12
150_5%
12
39_5%
12
27_5%
R32
R33
R34
R35
TP1
H_RS#(0) H_RS#(1) H_RS#(2)
21-
14-
14-
14-
14-
+VCCP
CLOSED TO CPU
H_RS#(0:2)
H_BPM5_PREQ#
TDI_FLEX
H_TMS
H_TCK
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
1
R31
56_5%
2
H_TRST#
1
R30
619_1%
2
PM_THRMTRIP# should be T at CPU
INVENTEC
TITLE
07A99 Preliminary Test
CPU-1
SIZE CODE
CHANGE by SHEET OF
24-Aug-2007KOBE
A3
DOC. NUMBER REV
CS
14 63
H_D#(63:0)
H_DSTBN#0 H_DSTBP#0
H_DINV#0
H_D#(63:0)
+VCCP
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
1
R37
1K_1%
2
1
2
R38
2K_1%
GTLREF
Layout note: Zo=55 ohm,
0.5" max for GTLREF.
15-,21-
21­21­21-
15-,21-
H_DSTBN#1 H_DSTBP#1
H_DINV#1
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
CN1-2
H_D#(0) H_D#(1) H_D#(2) H_D#(3) H_D#(4) H_D#(5) H_D#(6) H_D#(7) H_D#(8) H_D#(9) H_D#(10) H_D#(11) H_D#(12) H_D#(13) H_D#(14) H_D#(15)
H_D#(16) H_D#(17) H_D#(18) H_D#(19) H_D#(20) H_D#(21) H_D#(22) H_D#(23) H_D#(24) H_D#(25) H_D#(26) H_D#(27) H_D#(28) H_D#(29) H_D#(30) H_D#(31)
21­21­21-
13-,19­13-,19­13-,19-
1
2
R43
OPEN
1
2
R44
OPEN
C16
1
OPEN
2
Place C5134 close to the TEST4 pin. Make sure TEST4 routing is reference to GND and away from other noisy signals.
E22
D0#
F24
D1#
E26
D2#
G22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
DATA GRP 0
D9#
J24
D10#
J23
D11#
H22
D12#
F26
D13#
K22
D14#
H23
D15#
J26
DSTBN0#
H26
DSTBP0#
H25
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L23
D20#
M24
D21#
L22
D22#
M23
D23#
P25
D24#
P23
D25#
P22
DATA GRP 1
D26#
T24
D27#
R24
D28#
L25
D29#
T25
D30#
N25
D31#
L26
DSTBN1#
M26
DSTBP1#
N24
DINV1#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
MISC
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL0
B23
BSEL1
C21
BSEL2
FOX_PZ4782K_274M_41_478P
D32# D33# D34# D35# D36# D37# D38# D39# D40#
DATA GRP 2DATA GRP 3
D41# D42# D43# D44# D45# D46#
D47# DSTBN2# DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63# DSTBN3# DSTBP3#
DINV3#
COMP0 COMP1 COMP2 COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
1
2
R45
OPEN
1
R46
OPEN
2
H_D#(32) H_D#(33) H_D#(34) H_D#(35) H_D#(36) H_D#(37) H_D#(38) H_D#(39) H_D#(40) H_D#(41) H_D#(42) H_D#(43) H_D#(44) H_D#(45) H_D#(46) H_D#(47)
H_D#(48) H_D#(49) H_D#(50) H_D#(51) H_D#(52) H_D#(53) H_D#(54) H_D#(55) H_D#(56) H_D#(57) H_D#(58) H_D#(59) H_D#(60) H_D#(61) H_D#(62) H_D#(63)
2
1
27.4_1%R39
12
54.9_1%R40
12
R41 27.4_1%
2
1
54.9_1%R42
11-,19-,35-
+VCCP
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
21-
H_DSTBN#3
21-
H_DSTBP#3
21-
H_DINV#3
CLOSED TO CPU < 0.5 inch
H_DPRSTP#
35-
H_DPSLP#
21-
H_DPWR#
35-
H_PWRGD
21-
H_CPUSLP#
11-
PSI#
15-,21-
15-,21-
21­21­21-
H_D#(63:0)
H_DSTBN#2 H_DSTBP#2 H_DINV#2
H_D#(63:0)
INVENTEC
TITLE
07A99 Preliminary Test
CPU-2
SIZE CODE
CHANGE by SHEET OF
30-Nov-2007KOBE
A3
DOC. NUMBER REV
CS
15 63
+VCC_CORE
11-,16- 11-,16-
12
3
900uF_2.5v
C28
CN1-3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
AA10
VCC053
AA12
VCC054
AA13
VCC055
AA15
VCC056
AA17
VCC057
AA18
VCC058
AA20
VCC059
AB9
VCC060
AC10
VCC061
AB10
VCC062
AB12
VCC063
AB14
VCC064
AB15
VCC065
AB17
VCC066
AB18
VCC067
FOX_PZ4782K_274M_41_478P
VCC068 VCC069 VCC070 VCC071 VCC072 VCC073 VCC074 VCC075 VCC076 VCC077 VCC078 VCC079 VCC080 VCC081 VCC082 VCC083 VCC084 VCC085 VCC086 VCC087 VCC088 VCC089 VCC090 VCC091 VCC092 VCC093 VCC094 VCC095 VCC096 VCC097 VCC098 VCC099
VCC0100
VCCP01 VCCP02 VCCP03 VCCP04 VCCP05 VCCP06 VCCP07 VCCP08 VCCP09 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16
VCCA01 VCCA02
VCCSENSE
VSSSENSE
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6
VID0
AF5
VID1
AE5
VID2
AF4
VID3
AE3
VID4
AF3
VID5
AE2
VID6
AF7
AE7
+VCC_CORE
+VCCP
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
1
220uF_2v_15mR_Panasonic
2
11-
H_VID0
11-
H_VID1
11-
H_VID2
11-
H_VID3
11-
H_VID4
11-
H_VID5
11-
H_VID6
C25
+VCC_CORE
11-,16-
1
R48
100_1%
2
1
R47
100_1%
2
11-
11-
+VCCP
8-,13-,14-,15-,16-,21-,23-,24-,35-,38-,61-
C19
2
0.1uF_16v
VCCSENSE
VSSSENSE
C20
1
C21
1 2
0.1uF_16v
0.1uF_16v
8-,9-,24-,35-,36-,38-,54-,55-,56-,61-
LAYOUT NOTE: PLACE C2461 NEAR PIN B26
PLACE THESE INSIDE SOCKET CAVITY ON L8 (NORTH SIDE SECONDARY)
C22
0.1uF_16v
11 2
C23
0.1uF_16v
1 22
1 2
+V1.5S
1
1
C18
0.01uF_16v
2
2
C24
0.1uF_16v
C17
10uF_6.3v
LAYOUT NOTE: ROUTE VCCSENSE AND VSSSENSE TRACE AT
24.7 OHM WITH 50 MIL SPACEING PLACE PU AND PD WITHIN I INCH OF CPU
CHANGE by
INVENTEC
TITLE
07A99 Preliminary Test
CPU-3
CODE DOC. NUMBER REV
SIZE
A3
CS
SHEET OF
6316KOBE 24-Aug-2007
CN1-4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
AF2
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
FOX_PZ4782K_274M_41_478P
VSS082 VSS083 VSS084 VSS085 VSS086 VSS087 VSS088 VSS089 VSS090 VSS091 VSS092 VSS093 VSS094 VSS095 VSS096 VSS097 VSS098 VSS099 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
INVENTEC
TITLE
07A99 Preliminary Test
CPU-4
SIZE CODE
CHANGE by SHEET OF
A3
DOC. NUMBER REV
CS
6317KOBE 24-Aug-2007
FAN1_DAC0_3
+V5LA
+V5S
9-,11-,12-,30-,32-,36-,38-,40-,42-,44-,45-,46-,48-,51-,53-,58-,61-
U3
1
C33
1 2
2.2uF_6.3v
44-
2
3
4
FON
VIN
VO
VSET
8
GND
7
GND
6
GND
5
GND
5-,6-,7-,12-,18-,29-,34-
R5581
12
OPEN
C5579
OPEN
FOR THERMAL TEST
5
43
1 2
GMT_G708T1U_SOT23_5P_OPEN
HYST
U5062
SETVCC
GND
OT
R5582
12
1
OPEN
2
7-,18-,44-
THRM_SHUTDWN#
GMT_G995P1U_SOP8_8P
8-,11-,12-,13-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
CN2
1
G1
G
2
G
G2
3
FAN CN
U2
R53
12
SET15VCC
23.2K_1%
2
GND
3
OT
7-,18-,44-
+V3S
1
C29
2
0.01uF_50v
1
R49
10K_5%
2
+V5LA
5-,6-,7-,12-,18-,29-,34-
0.1uF_10v
R52
12
150_5%
1
C34
2
C32
1 2
+V5S_FAN
2.2uF_6.3v
1 2 3
ACES_85205_0300N_3P
4
HYST
GMT_G708T1U_SOT23_5P
Thermal shoutdown at 88.5C +/-3C from 60C to 100C
RSET=0.0012*T - 0.9308*T+96.147 Hysteresis is 30C
2
H_THERMDA H_THERMDC
THRM_SHUTDWN#
14­14­7-,18-,44-
44-
FAN_TACH1
THRM_SHUTDWN#
1
0_5%
12
0_5% R9029
2
R9028
PM_THRMTRIP#
R54
OPEN
C35
12
2200pF_50v
14-,19-,35-
1
2
VR_PWRGD
R50
12
330_5%
2SC2411K
+V3LA
6-,7-,12-,34-,35-,41-,44-,58-,60-,61-
1
C30
2
0.1uF_10v
U4
1
VCC
2 3 4
SMBCLK
DXP
SMBDATA
DXN
ALERT#
THERM#
GMT_G784_MSOP_8P
11-,36-
Q2
2
GND
1
R51
2M_5%
2
SSM3K7002FU
3
C
B
E
1
8 7 6 5
5-,44­5-,44-
C31
1 2
OPEN
EC_CLK EC_DATA
7-,18-,44-
THRM_SHUTDWN#
Q3
3
D
1
G
S
2
Thermal Sensor For CPU
INVENTEC
TITLE
07A99 Preliminary Test
THERMAL&FAN CONTROLLER
SIZE CODE
A3
CHANGE by SHEET
24-Aug-2007KOBE
CS
DOC. NUMBER REV
18 63
OF
MCH_CFG(5)
MCH_CFG(13:12)
XOR/ALLZ
NOTE: CFG[2:0] STRP : 001b : 533 MT/S
+V1.8
8-,9-,12-,19-,23-,24-,26-,27-,61-
LOW=DMIx2
HIGH=DMIx4
00=PARTIAL CLOCK GATING DISABLE 01=XOR MODE ENABLE 10=ALL-Z MODE ENABLE 11=NORMAL OPERATION
011b : 667 MT/S
1
R77
20_1%
2
1
R78
20_1%
2
19-
19-
MCH_CFG(7)
(CPU Strap)
SM_RCOMP
SM_RCOMP#
LOW=RSVD HIGH=Mobile CPU
MCH_CFG(16) (FSB Dynamic ODT)
+V3S
8-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
12
12
R67 10K_5%
19-,26-
19-,27-
PM_EXTTS#0 PM_EXTTS#1
10K_5%R66
MCH_CFG(17:3)
+V3S
8-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
1
MCH_CFG(18) MCH_CFG(19) MCH_CFG(20)
MCH_CFG(8)
MCH_CFG(18) VCC SELECT
MCH_CFG(20) (PCIE BACKWARD INTERPOERABILITY MODE
1
R61
OPEN
2
19-
19-
19-
19-
LOW=1.05V
HIGH=1.5V
LOW=ONLY SDVO OR PCIE X1 IS
OPERATIONAL
HIGH=SDVO AND PCIE X1 ARE OPERATING SIMULTANEOUSLY
R62
OPEN
2
MCH_CFG(19) (DMI LANE REVERSAL)
1
1
R73
R64
OPEN
OPEN
2
2
LOW=NORMAL HIGH=LANES REVERSED
MCH_CFG(9) PCIE Graphics Lane
LOW=Dynamic ODT
Disable
HIGH=Dynamic ODT
Enable
MCH_CFG(18) MCH_CFG(19) MCH_CFG(20)
BM_BUSY#
H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1
PM_PWROK
PLT_RST#
PM_THRMTRIP#
PM_DPRSLPVR
LOW=Reverse Lane HIGH=Normal operation
MCH_CFG(11) PSB 4X CLK ENABLE
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
19-
19­19­19-
36­11-,15-,35­19-,26­19-,27­11-,19-,36­37-,44­14-,18-,35­11-,36-
MA_A(14) MB_A(14)
13-,15­13-,15­13-,15-
R68
LOW=CALISTOGA
HIGH=RESERVED
26-,28­27-,28-
1
1
2
2
R81
R69
1K_5%
1K_5%
MCH_CFG(3) MCH_CFG(4) MCH_CFG(5) MCH_CFG(6) MCH_CFG(7) MCH_CFG(8) MCH_CFG(9) MCH_CFG(10) MCH_CFG(11) MCH_CFG(12) MCH_CFG(13) MCH_CFG(14) MCH_CFG(15) MCH_CFG(16) MCH_CFG(17)
12
1
2
R70
1K_5%
100_5%
U5-2
P36
RSVD1
P37
RSVD2
R35
RSVD3
N35
RSVD4
AR12
RSVD5
AR13
RSVD6
AM12
RSVD7
AN13
RSVD8
J12
RSVD9
AR37
RSVD10
AM36
RSVD11
AL36
RSVD12
AM37
RSVD13
D20
RSVD14
H10
RSVD20
B51
RSVD21
BJ20
RSVD22
BK22
RSVD23
BF19
RSVD24
BH20
RSVD25
BK18
RSVD26
BJ18
RSVD
RSVD27
BF23
RSVD28
BG23
RSVD29
BC23
RSVD30
BD24
RSVD31
BJ29
RSVD32
BE24
RSVD33
BH39
RSVD34
AW20
RSVD35
BK20
RSVD36
C48
RSVD37
D47
RSVD38
B44
RSVD39
C44
RSVD40
A35
RSVD41
B37
RSVD42
B36
RSVD43
B34
RSVD44
C34
RSVD45
P27
CFG_0
N27
CFG_1
N24
CFG_2
C21
CFG_3
C23
CFG_4
F23
CFG_5
N23
CFG_6
G23
CFG_7
J20
CFG_8
C20
CFG_9
R24
CFG_10
L23
CFG_11
J23
CFG_12
E23
CFG_13
E20
CFG_14
K23
CFG_15
M20
CFG_16
M24
CFG_17
L32
CFG_18
N33
CFG_19
L35
CFG_20
G41
PM_BM_BUSY#
L39
PM_DPRSTP#
L36
PM_EXT_TS#_0
J36
PM_EXT_TS#_1
AW49
PWROK
AV20
RSTIN#
N20
THRMTRIP#
G36
DPRSLPVR
BJ51
NC1
BK51
NC2
BK50
NC3
BL50
NC4
BL49
NC5
BL3
NC6
BL2
NC7
BK1
NC8
BJ1
NC9
E1
NC10
A5
NC11
C51
NC12
B50
NC13
A50
NC14
A49
NC15
BK2
NC16
ITL_CRESTLINE_FCBGA_TSB_1299P
CFG
NC
PM
SM_RCOMP_VOH
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
DMI
ME
SDVO_CTRL_CLK
SDVO_CTRL_DATA
MISC
MCH_CFG(12) MCH_CFG(13) MCH_CFG(16)
MCH_CFG(9) MCH_CFG(7) MCH_CFG(5)
MCH_CFG(11)
AV29
SM_CK_0
BB23
SM_CK_1
BA25
SM_CK_3
AV23
SM_CK_4
AW30
SM_CK#_0
BA23
SM_CK#_1
AW25
SM_CK#_3
AW23
SM_CK#_4
BE29
SM_CKE_0
AY32
SM_CKE_1
BD39
SM_CKE_3
BG37
SM_CKE_4
BG20
SM_CS#_0
BK16
SM_CS#_1
DDR MUXING
BG16
SM_CS#_2
BE13
SM_CS#_3
BH18
SM_ODT_0
BJ15
SM_ODT_1
BJ14
SM_ODT_2
BE16
SM_ODT_3
BL15
SM_RCOMP
BK14
SM_RCOMP#
BK31
SM_VREF_0 SM_VREF_1
DPLL_REF_CLK DPLLREF_CLK#
PEG_CLK
PEG_CLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3
DFGT_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
CLK_REQ#
ICH_SYNC#
TEST_1 TEST_2
BL31
AR49 AW4
B42 C42 H48 H47
K44 K45
AN47 AJ38 AN42 AN46
AM47 AJ39 AN41 AN45
AJ46 AJ41 AM40 AM44
AJ47 AJ42 AM39 AM43
E35 A39 C38 B39 E36
AM49 AK50 AT43 AN49 AM50
H35 K36 G39 G40
A37 R32
SM_RCOMP_VOL
GRAPHICS VID
19­19­19­19­19­19­19-
12
0_5%
R74
R76
12
20K_5%
DMI_TXN(0) DMI_TXN(1) DMI_TXN(2) DMI_TXN(3)
DMI_TXP(0) DMI_TXP(1) DMI_TXP(2) DMI_TXP(3)
DMI_RXN(0) DMI_RXN(1) DMI_RXN(2) DMI_RXN(3)
DMI_RXP(0) DMI_RXP(1) DMI_RXP(2) DMI_RXP(3)
11-,19-,36-
1
2
R65
0_5%
36­36-
36-
33­33­13­36-
1
2
26-
MA_CLK_DDR1
26-
MA_CLK_DDR2
27-
MB_CLK_DDR1
27-
MB_CLK_DDR2
26-
MA_CLK_DDR1#
26-
MA_CLK_DDR2#
27-
MB_CLK_DDR1#
27-
MB_CLK_DDR2#
26-,28-
MA_CKE0
26-,28-
MA_CKE1
27-,28-
MB_CKE0
27-,28-
MB_CKE1
26-,28-
MA_CS0#
26-,28-
MA_CS1#
27-,28-
MB_CS0#
27-,28-
MB_CS1#
26-,28-
MA_ODT0
26-,28-
MA_ODT1
27-,28-
MB_ODT0
27-,28-
MB_ODT1
19-
SM_RCOMP
19-
SM_RCOMP#
19-
SM_RCOMP_VOH
19-
SM_RCOMP_VOL
8-,26-,27-
M_VREF
13-
CLK_R_PEG_MCH
13-
CLK_R_PEG_MCH#
36-
DMI_TXN(3:0)
8-,9-,12-,19-,23-,24-,26-,27-,61-
36-
DMI_TXP(3:0)
36-
DMI_RXN(3:0)
36-
DMI_RXP(3:0)
DFGT_VID_0 DFGT_VID_1 DFGT_VID_2 DFGT_VID_3 DFGT_VR_EN
CL_CLK0
CL_DATA0 PM_PWROK CL_RST#0
SDVO_CLK SDVO_DATA CLKREQ_R_MCH# MCH_ICH_SYNC#
CHANGE by
R63
OPEN
+V1.8
1
R79
1K_0.5%
2
1
R75
3K_1%
2
1
R80
1K_0.5%
2
1 2
1
2
R55
OPEN
C38
C36
1 2
0.01uF_16v
C37
1 2
0.01uF_16v
+V1.25S
0.1uF_16v
1
R56
OPEN
2
9-,24-,38-
1
R72
1K_1%
2
1
R71
392_1%
2
C39
1 2
C40
1 2
1
2
R57
OPEN
19-
1
1
R58
OPEN
2
2
13-
CLK_R_DREF
13-
CLK_R_DREF#
13-
CLKSS1_R_DREF
13-
CLKSS1_R_DREF#
SM_RCOMP_VOH
2.2uF_6.3v
19-
SM_RCOMP_VOL
2.2uF_6.3v
INVENTEC
TITLE
07A99 Preliminary Test
NB-1
SIZE CODE
A3
CS
SHEET
DOC. NUMBER
R59
OPEN
1
R60
OPEN
2
REV
OF
6319KOBE 24-Aug-2007
LCM_BKLTEN
LCM_DDCPCLK
LCM_DDCPDATA
LCM_3S_VDDEN
R98
12
120_1%
R97
12
120_1%
R94
12
120_1%
R93
12
120_1%
R92
12
120_1%
CLOSE TO CRESTLINE
32-,44-
32-
20-,31-
20-,31-
20-,30-
20-,30-
20-,30-
32­32-
1
R85
100K_1%
2
SVID_LUMA
SVID_CHROMA
CRTR_NB_COL
CRTG_NB_COL
CRTB_NB_COL
INV_PWM_3
R89
100K_1%
SVID_LUMA
SVID_CHROMA
CRT_DDCCLK
CRT_DDCDATA
CRT_HSYNC_NB_COL CRT_VSYNC_NB_COL
2
1.3K_0.5%
R91
1
32-,44-
1
1
R88
2.4K_1%
2
2
20-,31­20-,31-
TV ON:OPEN TV OFF:SHORT
CRTB_NB_COL CRTG_NB_COL CRTR_NB_COL
30­30­30-
30-
R90
12
OPEN
LVDS_TXDL0N LVDS_TXDL1N LVDS_TXDL2N
LVDS_TXDU0N LVDS_TXDU1N LVDS_TXDU2N
LVDS_TXDU0P LVDS_TXDU1P LVDS_TXDU2P
R99
12
20-,30-
20-,30-
20-,30-
R95
R96
R86
10K_5%
LVDS_TXCLN
LVDS_TXCLP LVDS_TXCUN LVDS_TXCUP
LVDS_TXDL0P LVDS_TXDL1P LVDS_TXDL2P
75_1%
R5030
12
OPEN
12
2
1
+V3S
8-,11-,12-,13-,18-,19-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,38-,42-,43-,44-,45-,46-,47-,49-,51-,52-,53-,54-,55-,56-,58-,61-
1
1
R87
10K_5%
2
2
30_5%
30_5%
U5-3
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
32-
D46
LVDSA_CLK#
32-
C45
LVDSA_CLK
32-
D44
LVDSB_CLK#
32-
E42
LVDSB_CLK
32-
G51
LVDSA_DATA#_0
32-
E51
LVDSA_DATA#_1
32-
F49
LVDSA_DATA#_2
32-
G50
LVDSA_DATA_0
32-
E50
LVDSA_DATA_1
32-
F48
LVDSA_DATA_2
32-
G44
LVDSB_DATA#_0
32-
B47
LVDSB_DATA#_1
32-
B45
LVDSB_DATA#_2
32-
E44
LVDSB_DATA_0
32-
A47
LVDSB_DATA_1
32-
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL0
P33
TV_DCONSEL1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
ITL_CRESTLINE_FCBGA_TSB_1299P
N43
PEG_COMPI
M43
PEG_COMPO
J51
PEG_RX#_0
L51
PEG_RX#_1
N47
PEG_RX#_2
T45
PEG_RX#_3
T50
PEG_RX#_4
U40
PEG_RX#_5
Y44
PEG_RX#_6
Y40
PEG_RX#_7
AB51
PEG_RX#_8
W49
PEG_RX#_9
AD44
PEG_RX#_10
AD40
PEG_RX#_11
LVDS
TV
VGA
AG46
PEG_RX#_12
AH49
PEG_RX#_13
AG45
PEG_RX#_14
AG41
PEG_RX#_15
J50
PEG_RX_0
L50
PEG_RX_1
M47
PEG_RX_2
U44
PEG_RX_3
T49
PEG_RX_4
T41
PEG_RX_5
W45
PEG_RX_6
W41
PEG_RX_7
AB50
PEG_RX_8
Y48
PEG_RX_9
AC45
PEG_RX_10
AC41
PEG_RX_11
AH47
PEG_RX_12
AG49
PEG_RX_13
AH45
PEG_RX_14
AG42
PEG_RX_15
N45
PEG_TX#_0
U39
PEG_TX#_1
U47
PEG_TX#_2
N51
PEG_TX#_3
R50
PEG_TX#_4
PCI-EXPRESS GRAPHICS
T42
PEG_TX#_5
Y43
PEG_TX#_6
W46
PEG_TX#_7
W38
PEG_TX#_8
AD39
PEG_TX#_9
AC46
PEG_TX#_10
AC49
PEG_TX#_11
AC42
PEG_TX#_12
AH39
PEG_TX#_13
AE49
PEG_TX#_14
AH44
PEG_TX#_15
M45
PEG_TX_0
T38
PEG_TX_1
T46
PEG_TX_2
N50
PEG_TX_3
R51
PEG_TX_4
U43
PEG_TX_5
W42
PEG_TX_6
Y47
PEG_TX_7
Y39
PEG_TX_8
AC38
PEG_TX_9
AD47
PEG_TX_10
AC50
PEG_TX_11
AD43
PEG_TX_12
AG39
PEG_TX_13
AE50
PEG_TX_14
AH43
PEG_TX_15
20-
20-
20­20­20­20-
20­20­20­20-
R84
12
24.9_1%
PEG_C_RXN1
PEG_C_RXP1
PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3
PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3
+V1.25S_PEG
24-
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_C_RXP1
PEG_C_RXN1
20-
C779
0.1uF_16v
33-
33-
33-
33-
33-
33-
33-
33-
33-
33-
HDMI_C_TX0P
HDMI_C_TX0N
HDMI_C_TX1P
HDMI_C_TX1N
HDMI_C_TX2P
HDMI_C_TX2N
HDMI_C_TX3P
HDMI_C_TX3N
HDMI_C_RX1P HDMI_C_RX1N
12
20-
C780
0.1uF_16v
12
20-
C781
0.1uF_16v
12
20-
C782
0.1uF_16v
12
20-
C783
0.1uF_16v
12
20-
C784
0.1uF_16v
12
20-
C785
0.1uF_16v
12
20-
C786
0.1uF_16v
12
C778
20-
20-
0.1uF_16v
12
C777
0.1uF_16v
12
INVENTEC
TITLE
07A99 Preliminary Test
NB-2
SIZE CODE
CHANGE by SHEET OF
KOBE 27-Sep-2007
A3
DOC. NUMBER REV
CS
6320
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