intersil X9511 DATA SHEET

®

www.BDTIC.com/Intersil

X9511

Single Push Button Controlled Potentiometer (XDCP™)

Data Sheet FN8205.3February 2, 2007

Linear, 32 Taps, Push Button Controlled,
Terminal Voltage ±5V

FEATURES

• Push button controlled

• Low power CMOS
—Active current, 3mA max
—Standby current, 100µA typical

• 31 resistive elements
—Temperature compensated
—±20% end to end resistance range
—-5V to +5V range

• 32 wiper tap points
—Wiper positioned via two push button inputs
—Slow and fast scan modes
—AUTOSTORE
—Manual store option
—Wiper position stored in nonvolatile memory

and recalled on power-up

• 100 year wiper position data retention

• X9511W = 10kΩ

• Packages
—8 Ld PDIP
—8 Ld SOIC

• Pb-free plus anneal available (RoHS compliant)

®

option

DESCRIPTION

The Intersil X9511 is a push button controlled potenti­ometer that is ideal for push button controlled resis­tance trimming.

The X9511 is a resistor array composed of 31 resistive
elements. Between each element and at either end
are tap points accessible to the wiper element. The
position of the wiper element is controlled by the PU
and PD inputs. The position of the wiper can be auto­matically stored in E

2

memory and then be recalled

upon a subsequent power-on operation.
The resolution of the X9511 is equal to the maximum

resistance value divided by 31. As an example, for the
X9511W (10kΩ) each tap po int represent s 323Ω.

All Intersil nonvolatile products are designed and
tested for applications requiring extended endurance
and data retention.

ORDERING INFORMATION

R

PART NUMBER PART MARKING

X9511WP X9511WP 10 0 to +70 8 Ld PDIP MDP0031
X9511WPZ (Note) X9511WP Z 0 to +70 8 Ld PDIP*** (Pb-free) MDP0031
X9511WPI X9511WP I -40 to +85 8 Ld PDIP MDP0031
X9511WPIZ (Note) X9511WP Z I -40 to +85 8 Ld PDIP*** (Pb-free) MDP0031
X9511WS** X9511W 0 to +70 8 Ld SOIC MDP0027

,

X9511WSZ*
X9511WSI*
X9511WSIZ*

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials
and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.

*Add "T1" suffix for tape and reel.
**Add "T2" suffix for tape and reel.
***Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder

processing applications.

**(Note) X9511W Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027

,

** X9511W I -40 to +85 8 Ld SOIC MDP0027

,

** (Note) X9511W Z I -40 to +85 8 Ld SOIC (Pb-free) MDP0027

TOTAL

(kΩ)

TEMPERATURE

RANGE (°C) PACKAGE PKG. DWG. #

1

XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2007. All Rights Reserved

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

BLOCK DIAGRAM

www.BDTIC.com/Intersil

X9511

PU
PD

ASE

5-BIT
UP/DOWN
COUNTER

5-BIT

EEPROM
MEMORY

STORE AND

RECALL

CONTROL

CIRCUITRY

31

30

29

28

ONE

OF

THIRTY-TWO

DECODER

V

H

TRANSFER

GATES

2

1

0

RESISTOR

ARRAY

V

L

V

W

2

FN8205.3

February 2, 2007

X9511

www.BDTIC.com/Intersil

PIN DESCRIPTIONS

and VL/R

V

H/RH

L

The high (VH/RH) and low (VL/RL) terminals of the
X9511 are equivalent to the fixed terminals of a
mechanical potentiometer. The minimum voltage is ­5V and the maximum is +5V. It should be noted that
the terminology of V

and VH/RH are in reference

L/RL

to the relative position of the terminal in relation to
wiper movement direction selected by the PU and PD
inputs, and not the voltage potential on the ter minal.

PU

The debounced PU input is for incrementing the wiper
position. An on-chip pull-up holds the PU

input HIGH.
A switch closure to ground or a LOW logic level will,
after a debounce time, move the wiper to the next
adjacent higher tap position.

PD

The debounced PD input is for decrementing the wiper
position. An on-chip pull-up holds the PD

input HIGH.
A switch closure to ground or a LOW logic level will,
after a debounce time, move the wiper to the next
adjacent lower tap position.

ASE

The debounced ASE (AUTOSTORE enable) pin can
be in one of two states:

- AUTOSTORE is enabled. When VCC powers

V

IL

down, an automatic store cycle takes place.

- AUTOSTORE is disabled. A LOW to HIGH will

V

IH

initiate a manual store operation. This is for the user
who wishes to connect a push button switch to this pin.
For every valid push, the X9511 will store the current
wiper position to the EEPROM.

PIN CONFIGURATION

DIP/SOIC

PU

1

PD

2

V

H

V

SS

X9511

3

4

V

8

7

6

5

CC

ASE

V

L

V

W

PIN NAMES

SYMBOL DESCRIPTION

VH/R

V

W/RW

V

L/RL

V

V

PU
PD

ASE

SS

CC

High Terminal

H

Wiper Terminal
Low Terminal
Ground
Supply Voltage
Push Up Input
Push Down Input
AUTOSTORE Enable Input

DEVICE OPERATION

There are three sections of the X951 1: the input control,
counter and decode section; the EEPROM memory;
and the resistor array. The input control section oper­ates just like an up/down counter. The output of this
counter is decoded to turn on a single electronic switch,
connecting a point on the resistor array to the wiper out­put. Under the proper conditions the contents of the
counter can be stored in EEPROM memory and
retained for future use. The resistor array is comprised
of 31 individual resistors connected in series. At either
end of the array and between each resistor is an elec­tronic switch that transfers the potential at that point to
the wiper.

The X9511 is designed to interface directly to two push
button switches for effectively moving the wiper up or
down. The PU

and PD inputs increment or decrement
a 5-bit counter respectively. The output of this counter
is decoded to select one of the thirty-two wiper posi­tions along the resistive array. The wiper increment
input, PU

and the wiper decrement input, PD are both
connected to an internal pull-up so that they normally
remain HIGH. When pulled LOW by an ex ternal push
button switch or a logic LOW level input, the wiper will
be switched to the next adjacent tap position.

Internal debounce circuitry prevents inadvertent
switching of the wiper position if PU

or PD remain
LOW for less than 40ms, typical. Each of the buttons
can be pushed either once for a single increment/dec­rement or continuously for a multiple increments/dec­rements. The number of increments/decrements of the
wiper position depend on how long the button is being
pushed. When making a continuous push, after the
first second, the increment/decrement speed
increases. For the first second the device will be in the
slow scan mode. Then if the bu tton is held for longer
than 1 second the device will go into the fast scan
mode. As soon as the button is released the X951 1 will
return to a standby condition.

3

FN8205.3

February 2, 2007

X9511

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The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the
last position. That is, the counter does not wrap
around when clocked to either extreme.

AUTOSTORE

The value of the counter is stored in EEPROM mem­ory whenever the chip senses a power-down of V

CC

while ASE is enabled (held LOW). When power is
restored, the content of the memory is recalled and the
counter reset to the last value stored.

If AUTOSTORE is to be implemented, ASE
hard wired to V

. If ASE is held HIGH during power-

SS

is typically

up and then taken LOW, the wiper will not respond to
the PU

or PD inputs until ASE is brought HIGH and

held HIGH.

V

CC

3

V

H

5

V

W

6

V

L

V

SS

2kΩ

8

V

CC

1

PU

2

PD

7

ASE

Manual (Push Button) Store

When ASE
switch may be used to pull ASE

is not enabled (held HIGH) a push button

LOW and released to

perform a manual store of the wiper position.

R

with VCC Removed

TOTAL

The end to end resistance of the array will fluctuate
once V

CC

V

CC

is removed.

3.3µF

8

V

CC

1

PU

2

PD

7

ASE

4

V

SS

3

V

H

5

V

W

6

V

L

FIGURE 1. TYPICAL CIRCUIT WITH ASE STORE

CONTROLLED BY PUSH BUTTON SWITCH

FIGURE 2. TYPICAL CIRCUIT WITH ASE STORE PIN USED

IN AUTOSTORE MODE

4

FN8205.3

February 2, 2007

X9511

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ABSOLUTE MAXIMUM RATINGS

Temperature under bias ....................-65°C to +135°C

Storage temperature..........................-65°C to +150°C

Volt age on PU

, PD, and V

CC

with respect to VSS................................. -1V to +7V

Volt age on V

and V

H

L

referenced to VSS................................... -8V to +8V

ΔV = |V

H

- VL|

X9511W .............................................................10V

Lead temperature (soldering 10 seconds)....... +300°C

Wiper current........................................................... ±1mA

ESD Rating

Linearity

Absolute linearity
Relative linearity

(1)

(3)

COMMENT

Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only; functional operation of the
device (at these or any other conditions above those
listed in the operational sections of this specification) is
not implied. Exposure to absolute maximum rating con-

ditions for extended periods may affect device reliability .
Human Body Model

(Per MIL-STD-883 Method 3015.7).................... 2.5kV

Machine Model

(Per EIAJ ED-4701 Method C-1 11)......................250V

Temperature Coefficient

-40°C to +85°C

X951 1W......................................+300 ppm/°C Typical

Ratiometric temperature coefficient ................±20 ppm

ANALOG CHARACTERISTICS

Wiper Adjustability
Electrical Characteristics

End-to-end resistance tolerance ...........................±20%

Unlimited wiper adjustment.......(Non-S tore operation)

Wiper position store operations.......................100,000

Power rating at +25°C

X9511W .........................................................10mW

Wiper current .................................................±1mA Max.

Typical wiper resistance .......................................40Ω

Typical noise..............................< -120dB/√Hz Ref: 1V

Resolution

Physical Characteristics

Marking Includes

Manufacturer’s Trademar k
Resistance Value or Code
Date Code

Resistance .............................................................3%

Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = [V

Maximum.
(2) 1 Ml = Minimum Increment = R
(3) Relative linearity is a measure of the error in step size between taps = (V

/31 for resistor mode or 1MI = [V

TOT

W(31)

- V

]/31 for voltage divider mode.

W(0)

- V

W(n+1)

] )/MI - 1= ±0.2 MI

W(n)

..........................................±1.0 MI

...........................................±0.2 MI

data changes

W(n)

- (n*MI + V

)]/MI = ±1 MI

W(0)

(2)
(2)

SYMBOL TABLE

WAVEFORM INPUTS OUTPUTS

Must be
steady

May change
from Low to
High

May change
from High to
Low

Don’t Care:
Changes
Allowed

N/A Center Line

Will be
steady

Will change
from Low to
High

Will change
from High to
Low

Changing:
State Not
Known

is High
Impedance

5

FN8205.3

February 2, 2007

RECOMMENDED OPERATING CONDITIONS

www.BDTIC.com/Intersil

X9511

Temp Min. Max.

Commercial 0×C +70°C

Industrial -40×C +85°C

Supply Voltage Limits

X9511 5V ± 10%

D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.)

Limits

(4)

Symbol Parameter

I

CC

I

SB

I

V

V

R

V

V

C

IN

VCC active current 1 3 mA PU or PD held at VIL the other at V
Standby supply current 100 500 µA PU = PD = V
PU, PD, ASE input leakage current 10 µA VIN = VSS to V

LI

PU, PD, ASE input HIGH voltage 2 V

IH

PU, PD, ASE input LOW voltage 0.8 V

lL

Wiper resistance 40 100 W Wiper Current VCC/R

W

VH terminal voltage -5 +5 V

VH

VL terminal voltage -5 +5 V

VL

(5)

ASE, PU, PD input capacitance 10 pF VCC = 5V, VIN = 0V, TA = +25°C,

Max.

Unit Test ConditionsMin. Typ.

IH

CC

TOT

f = 1MHz

A.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.)

IH

Limits

Symbol Parameter

t

GAP

t

t

S SLOW

t

S FAST

t

tR V

t

ASTO

V

ASTH

V

ASEND

DB

PU

CC

Time between two separate push button events 50
Debounce time 30 40 ms
After debounce to wiper change on a slow mode 100 250 375 ms
Wiper change on a fast mode 25 50 90 ms
Power-up to wiper stable 500
VCC power-up rate 0.2 50 V/ms

(5)

AUTOSTORE cycle time 2 ms

(5)

AUTOSTORE threshold voltage 4 V

(5)

AUTOSTORE cycle end voltage 3.5 V

(4)

Max.

UnitMin. Typ.

µs

µs

POWER-UP AND POWER-DOWN REQUIREMENTS

The are no restrictions on the sequencing of V

and the voltage applied to the potentiometer pins during power-up

CC

or power-down conditions. During po wer-up, th e data sheet parameter s for the DCP do not fu lly apply until 1m s after

reaches its final value. The VCC ramp rate spec is always in effect.

V

CC

6

FN8205.3

February 2, 2007

AUTOSTORE Cycle Timing Diagram

www.BDTIC.com/Intersil

5

V

CC

X9511

AUTOS CYCLE IN PROGRESS

V

ASTH

V

ASEND

VOLTS (V)

Notes: V

- AUTOSTORE threshold voltage

ASTH

V

ASEND -

t

ASTO -

(4) Typical values are for T
(5) This parameter is periodically sampled and not 100% tested.

AUTOSTORE cycle end voltage

AUTOSTORE cycle time

= +25°C and nominal supply voltage.

A

t

ASTO

STORE TIME

TIME (ms)

Slow Mode Timing

t

DB

PU

V

W

Note: (1) MI in the A.C. timing diagram refers to the minimum incremental change in the wiper voltage.

t

GAP

(1)

MI

Fast Mode Timing

t

DB

PU

t

S FAST

t

S SLOW

(1)

V

W

Note: (1) MI in the A.C. timing diagram refers to the minimum incremental change in the wiper voltage.

7

MI

1 Second

FN8205.3

February 2, 2007

Plastic Dual-In-Line Packages (PDIP)

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X9511

SEATING
PLANE

D

A2

A

L

L

e

b

A1

NOTE 5

c

E

eA
eB

N

PIN #1

E1

INDEX

12 N/2

b2

MDP0031

PLASTIC DUAL-IN-LINE PACKAGE

SYMBOL PDIP8 PDIP14 PDIP16 PDIP18 PDIP20 TOLERANCE NOTES

A 0.210 0.210 0.210 0.210 0.210 MAX

A1 0.015 0.015 0.015 0.015 0.015 MIN

A2 0.130 0.130 0.130 0.130 0.130 ±0.005

b 0.018 0.018 0.018 0.018 0.018 ±0.002

b2 0.060 0.060 0.060 0.060 0.060 +0.010/-0.015

c 0.010 0.010 0.010 0.010 0.010 +0.004/-0.002

D 0.375 0.750 0.750 0.890 1.020 ±0.010 1

E 0.310 0.310 0.310 0.310 0.310 +0.015/-0.010

E1 0.250 0.250 0.250 0.250 0.250 ±0.005 2

e 0.100 0.100 0.100 0.100 0.100 Basic

eA 0.300 0.300 0.300 0.300 0.300 Basic

eB 0.345 0.345 0.345 0.345 0.345 ±0.025

L 0.125 0.125 0.125 0.125 0.125 ±0.010

N 8 14 16 18 20 Reference

NOTES:

1. Plastic or metal protrusions of 0.010” maximum per side are not included.

2. Plastic interlead protrusions of 0.010” maximum per side are not included.

3. Dimensions E and eA are measured with the leads constrained perpendicular to the seating plane.

4. Dimension eB is measured with the lead tips unconstrained.

5. 8 and 16 lead packages have half end-leads as shown.

Rev. B 2/99

8

FN8205.3

February 2, 2007

Small Outline Package Family (SO)

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A

D

NN

(N/2)+1

X9511

h X 45°

PIN #1

E

C

SEATING
PLANE

0.004 C

E1

B

0.010 BM CA

I.D. MARK

1

e

0.010 BM CA

(N/2)

c

SEE DETAIL “X”

L1

H

A2

GAUGE
PLANE

A1

b

DETAIL X

L

4° ±4°

MDP0027

SMALL OUTLINE PACKAGE FAMILY (SO)

SYMBOL SO-8 SO-14

A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -

A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 ­A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -

b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -

c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 ­D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3
E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -

E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3

e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -

L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -

L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -

h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -

N 8 14 16 16 20 24 28 Reference -

NOTES:

1. Plastic or metal protrusions of 0.006” maximum per side are not included.

2. Plastic interlead protrusions of 0.010” maximum per side are not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994

SO16

(0.150”)

SO16 (0.300”)

(SOL-16)

SO20

(SOL-20)

SO24

(SOL-24)

SO28

(SOL-28) TOLERANCE NOTES

A

0.010

Rev. L 2/01

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implic atio n or other wise u nde r any p a tent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

9

FN8205.3

February 2, 2007