intersil X93256 DATA SHEET

®

www.BDTIC.com/Intersil

X93256

Data Sheet February 1, 2008

Dual Digitally Controlled Potentiometers
(XDCPs™)

The Intersil X93256 is a dual digitally controlled
potentiometer (XDCP). The device consists of two resistor
arrays, wiper switches, a control section, and nonvolatile
memory. The wiper positions are controlled by individual
Up/Down interfaces.

A potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. The position of each wiper element is controlled by
a set of independent CS

, U/D, and INC inputs. The position
of the wiper can be stored in nonvolatile memory and then
be recalled upon a subsequent power-up operation.

Each potentiometer is connected as a three-terminal
variable resistor and can be used in a wide variety of
applications including:

• Bias and Gain Control

• LCD Contrast Adjustment

Pinout

X93256

(14 LD TSSOP)

TOP VIEW

Rw1

R

CS
INC
U/D

R

V

*NC can be left unconnected, or connected to
any voltage between V

L1

H2

SS

1

2

2

1

2

3

4
5

6
7

and VCC.

SS

14

13

12

11
10

R

H1

U/D

1

INC

1

V

CC

CS

2

R

9
8

L2

Rw2

Features

• Dual solid-state potentiometers

• Individual Up/Down interfaces

• 32 wiper tap points per potentiometer

- Wiper position stored in nonvolatile memory and
recalled on power-up

• 31 resistive elements per potentiometer

- Temperature compensated

- Maximum resistance tolerance of ±25%

- Terminal voltage, 0 to V

• Low power CMOS

-V

= 2.7V to 5.5V.

CC

- Active current, 200µA typical per potentiometer

- Standby current, 4µA max per potentiometer

• High reliability

- Endurance 200,000 data changes per bit

- Register data retention, 100 years

•R

value = 12.5kΩ, 50kΩ

TOTAL

• Package

- 14 Ld TSSOP

• Pb-free available (RoHS compliant)

CC

FN8188.2

Ordering Information

TEMPERATURE

PART NUMBER PART MARKING VCC LIMITS (V) R

X93256UV14I-2.7* X9325 6UVG 2.7 to 5.5 50 -40 to +85 14 Ld TSSOP (4.4mm) M14.173
X93256UV14IZ-2.7*

(Note)
X93256WV14I-2.7* X9325 6WVG 12.5 -40 to +85 14 Ld TSSOP (4.4mm) M14.173
X93256WV14IZ-2.7*

(Note)
*Add "T1" suffix for tape and reel.Please refer to TB347 for details on reel specifications.

NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.

X9325 6UZG 50 -40 to +85 14 Ld TSSOP (4.4mm) (Pb-free) M14.173

X9325 6WZG 12.5 -40 to +85 14 Ld TSSOP (4.4mm) (Pb-free) M14.173

1

XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2008. All Rights Reserved

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

TOTAL

(kΩ)

RANGE (°C) PACKAGE

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

PKG.

DWG. #

X93256

www.BDTIC.com/Intersil

Block Diagram

DETAILED SINGLE POTENTIOMETER DESCRIPTION

5-BIT
UP/DOWN
COUNTER

5-BIT

NONVOLATILE

MEMORY

STORE AND

CONTROL

RECALL

CIRCUITRY

UP/DOWN

(U/D

AND U/D2)

1

INCREMENT

(INC

AND INC2)

1

DEVICE SELECT

AND CS2)

(CS

1

GENERAL DESCRIPTION

(SUPPLY VOLTAGE)

V

CC

30k

CONTROL

AND

MEMORY

(GROUND)

V

SS

U/D1

INC

R

H1

R

W1

R

L1

R

H2

R

W2

R

L2

1

CS

1

V

CC

V

SS

Pin Descriptions

TSSOP SYMBOL BRIEF DESCRIPTION

1R

2R

3CS

4INC

5U/D

6R

7V
8R

9R

10 CS

11 V
12 INC

13 U/D

14 R

RW1. The RW1 pin of the X93256 is the wiper terminal of the first potentiometer, which is equivalent to the movable

W1

terminal of a mechanical potentiometer.

RL1. The R

L1

minimum voltage is V
the terminal in relation to wiper movement direction selected by the U/D

Chip Select 1 (CS1). The first potentiometer is selected when the CS1 input is LOW. The current counter value is stored

1

in nonvolatile memory when CS
complete, the first potentiometer of the X93256 will be placed in the low power standby mode until the first potentiometer

H1

and R

pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The

L1

and the maximum is VCC. The terminology of RH1 and RL1 references the relative position of

SS

is returned HIGH while the INC1 input is also HIGH. After the store operation is

1

is selected once again.
Increment 2 (INC2). The INC2 input is negative-edge triggered. Toggling INC2 will move the wiper of the second

2

potentiometer and either increment or decrement the counter in the direction indicated by the logic level on the U/D
input.

Up/Down 2 (U/D2). The U/D2 input controls the direction of the second potentiometer wiper movement and whether the

2

counter for the second potentiometer is incremented or decremented.

RH2. The R

H2

minimum voltage is VSS and the maximum is VCC. The terminology of RH2 and RL2 references the relative position of

H2

and R

pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The

L2

the wiper terminal for the second potentiometer in relation to the wiper movement direction selected by the U/D
Ground.

SS

RW2. The RW2 pin of the X93256 is the wiper terminal of the second potentiometer, which is equivalent to the movable

W2

terminal of a mechanical potentiometer.

RL2. The R

L2

minimum voltage is VSS and the maximum is VCC. The terminology of RH2 and RL2 references the relative position of

H2

and R

pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The

L2

the wiper terminal for the second potentiometer in relation to the wiper movement direction selected by the U/D
Chip Select 2 (CS2). The second potentiometer is selected when the CS2 input is LOW. The current counter value is

2

stored in nonvolatile memory when CS

is returned HIGH while the INC2 input is also HIGH. After the store operation is

2

complete, the second potentiometer of the X93256 will be placed in the low power standby mode until the second
potentiometer is selected once again.

Supply Voltage.

CC

Increment 1(INC1). The INC1 input is negative-edge triggered. Toggling INC1 will move the wiper of the first

1

potentiometer and either increment or decrement the counter in the direction indicated by the logic level on the U/D
input.

Up/Down 1 (U/D1). The U/D1 input controls the direction of the first potentiometer wiper movement and whether the

1

counter for the first potentiometer is incremented or decremented.

RH1. The R

H1

minimum voltage is V
the wiper terminal for the first potentiometer in relation to the wiper movement direction selected by the U/D

H1

and R

pins of the X93256 are equivalent to the fixed terminals of a mechanical potentiometer. The

L1

and the maximum is VCC. The terminology of RH1 and RL1 references the relative position of

SS

ONE

OF

THIRTY

TWO

DECODER

input.

input.

1

R

H1

R

R

L1

input.

2

input.

2

W

2

1

31

30

29
28

TRANSFER

GATES

2

1
0

RESISTOR

ARRAY

2

FN8188.2

February 1, 2008

X93256

www.BDTIC.com/Intersil

Absolute Maximum Ratings Thermal Information

Voltage on CS, INC, U/D, RH, RL and V

with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . .-1V to +6.5V

Maximum resistor current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA

CC

Recommended Operating Conditions

Temperature Range

Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Supply Voltage

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V (Note 6)

V

CC

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.

NOTES:

1. Absolute linearity is utilized to determine actual wiper resistance vs expected resistance = (V
n = 1 .. 29 only.

2. Relative linearity is a measure of the error in step size between taps = V

3. 1 Ml = Minimum Increment = R

4. Typical values are for T

5. Limits established by characterization and are not production tested.

6. When performing multiple write operations, V

7. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.

= +25°C and nominal supply voltage.

A

TOT

/31.

must not decrease by more than 150mV from its initial value.

CC

Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C

Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Maximum reflow temperature (40s). . . . . . . . . . . . . . . . . . . . +240°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

H(n+1)

(actual) - V

H(n)

- [V

+ Ml] = ±0.5 Ml, n = 1 .. 29 only.

H(n)

(expected)) = ±1 Ml Maximum.

H(n)

Potentiometer Characteristics Over recommended operating conditions, unless otherwise stated.

SYMBOL PARAMETER TEST CONDITIONS/NOTES

R

TOT

V

R

I

W

C

H/CL/CW

R

W

End-to-End Resistance W option 9.375 12.5 15.625 kΩ

U option 37.5 50 62.5 kΩ
RH, RL Terminal Voltages 0 V
Power Rating R

Noise Ref: 1kHz (Note 5) -120 dBV

Wiper Resistance ((Note 5) 1100 Ω
Wiper Current (Notes 5) 0.6 mA
Resolution 3%
Absolute Linearity (Note 1) V

Relative Linearity (Note 2) V

Temperature Coefficient (Note 5) ±35 ppm/°C

R

TOTAL

Potentiometer Capacitances See “Circuit #2 SPICE Macro Model” on

= 50kΩ (Note 5) 1 mW

TOTAL

H(n)(actual)

H(n+1)

page 4

- [V

H(n) + MI

- V

H(n)(expected)

] ±0.5 MI

MIN

(Note 7)

TYP

(Note 4)

10/10/25 pF

MAX

(Note 7) UNIT

CC

(Note 6)

(Note 6)

±1 MI

(Note 3)

(Note 3)

(Note 5)

V

3

FN8188.2

February 1, 2008