intersil X9319 DATA SHEET

®
www.BDTIC.com/Intersil
X9319
Data Sheet FN8185.2September 26, 2006
Digitally Controlled Potentiometer (XDCP™)
FEATURES
• Solid-state potentiometer
• 3-wire serial interface
• 100 wiper tap points —Wiper position stored in nonvolatile memory
and recalled on power-up
• 99 resistive elements —Temperature compensated —End to end resistance range ±20%
• Low power CMOS —V —Active current, 3mA max. —Standby current, 1mA max.
• High reliability —Endurance, 100,000 data changes per bit —Register data retention, 100 years
•R
• Packages —8 Ld SOIC and PDIP
• Pb-free plus anneal available (RoHS compliant)
APPLICATIONS
= 5V
CC
value = 10kΩ and 50kΩ
TOTAL
DESCRIPTION
The Intersil X9319 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array composed of 99 resistive elements and a wiper switch­ing network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS
, and INC inputs. The position of the wiper can be
U/D stored in nonvolatile memory and then be recalled upon a subsequent power-up operation.
The device can be used as a three-terminal potentiometer for voltage control or as a two-terminal variable resistor for current control in a wide variety of applications.
PIN CONFIGURATION
PDIP/SOIC
INC
U/D
R
V
SS
1
2
X9319
3
H
4
V
8
CC
CS
7
R
6
5
L
R
W
,
• LCD bias control
• DC bias adjustment
• Gain and offset trim
• Laser diode bias control
• Voltage regulator output control
BLOCK DIAGRAM
V
(Supply Voltage)
CC
Up/Down
(U/D
)
Increment
(INC
Device Select
(CS
Control
V
SS
General
and
Memory
(Ground)
)
)
U/D INC
CS
R
H
R
W
R
L
V
CC
V
SS
Up/Down
Counter
7-Bit
Nonvolatile
Memory
Store and
Recall
Control
Circuitry
One
of
One Hundred Decoder
99
98
97
96
2
1
0
Detailed
Wiper
Switches
Resistor
Array
R
H
R
L
R
W
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Ordering Information
www.BDTIC.com/Intersil
X9319
PART NUMBER PART MARKING R
X9319WP8 X9319WP 10 0 to +70 8 Ld PDIP MDP0031 X9319WP8I X9319WP I -40 to +85 8 Ld PDIP MDP0031 X9319WS8* X9319W 0 to +70 8 Ld SOIC (150 mil) MDP0027 X9319WS8Z* (Note) X9319W Z 0 to +70 8 Ld SOIC (150 mil) (Pb-free) MDP0027 X9319WS8I* X9319W I -40 to +85 8 Ld SOIC (150 mil) MDP0027 X9319WS8IZ* (Note) X9319W ZI -40 to +85 8 Ld SOIC (150 mil) (Pb-free) MDP0027 X9319UP8I X9319UP I 50 -40 to +85 8 Ld PDIP MDP0031 X9319US8I* X9319U I -40 to +85 8 Ld SOIC (150 mil) MDP0027 X9319US8IZ (Note) X9319U ZI -40 to +85 8 Ld SOIC (150 mil) (Pb-free) MDP0027
*Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
(kΩ) TEMP RANGE (°C) PACKAGE PKG. DWG. #
TOTAL
PIN DESCRIPTIONS
DIP/SOIC Symbol Brief Description
1INCIncrement. Toggling INC while CS is low moves the wiper either up or down.
2U/D
3R
4V
SS
5R
6
R
7CS
Up/Down. The U/D input controls the direction of the wiper movement.
The high terminal is equivalent to one of the fixed terminals of a mechanical potentiometer.
H
Ground.
The wiper terminal is equivalent to the movable terminal of a mechanical potentiometer.
W
The low terminal is equivalent to one of the fixed terminals of a mechanical potentiometer.
L
Chip Select. The device is selected when the CS input is LOW, and de-selected when CS is high.
8V
CC
Supply Voltage.
2
FN8185.2
September 26, 2006
X9319
www.BDTIC.com/Intersil
ABSOLUTE MAXIMUM RATINGS
Junction Temperature under bias ...... -65°C to +135°C
Storage temperature ..........................-65C to +150C
Voltage on CS
, INC, U/D and V
CC
with respect to VSS................................. -1V to +7V
, RW, RL to ground..........................................+12V
R
H
Lead temperature (soldering 10s) ................... +300C
(10s) ..............................................................±6mA
I
W
COMMENT
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
POTENTIOMETER CHARACTERISTICS
= 5V ±10%, TA = Full Operating Temperature Range unless otherwise stated)
(V
CC
Limits
Symbol Parameter
End to end resistance tolerance -20 +20 % See ordering information
V
RH/RL
R
I
C
H/CL/CW
V
W
W
CC
RH/RL terminal voltage V
Power rating 25 mW
Wiper resistance 40 200 Ω IW = 1mA
Wiper current
(7)
Noise
Resolution 1 %
Absolute linearity
Relative linearity
R
TOTAL
Ratiometric temperature coefficient
(5)
Potentiometer capacitances 10/10/25 pF See equivalent circuit
Supply Voltage 4.5 5.5 V
(5)
(1)
(2)
temperature coefficient
(5)
(5),(6)
SS
-3.0 +3.0 mA See test circuit
-1 +1 MI
-0.2 +0.2 MI
-20 +20 ppm/C
(4)
-120 dBV Ref: 1kHz
±300 ppm/C
Max. Unit
10 V VSS = 0V
(3)
(3)
Test Conditions/NotesMin. Typ.
for values
V(RH) = 10V, V(RL) = 0V
D.C. OPERATING CHARACTERISTICS
= 5V ±10%, TA = Full Operating Temperature Range unless otherwise stated)
(V
CC
Limits
Symbol Parameter
I
CC
I
SB
I
LI
V
IH
V
IL
C
IN
VCC active current (Increment) 1 3 mA CS = VIL, U/D = VIL or VIH and
Standby supply current 300 1000 µA CS 2.4V, U/D and INC =0.4V
CS, INC, U/D input leakage current
CS, INC, U/D input HIGH voltage 2 VCC + 1 V
CS, INC, U/D input LOW voltage -1 0.8 V
(5)
CS, INC, U/D input capacitance 10 pF V
3
-10 +10 µA VIN = V
(4)
Max.
Unit Test ConditionsMin. Typ.
= 0.4V/2.4V @ min. t
INC RL, RH, RW not connected
, RH, RW not connected
R
L
to V
SS
= 5V, VIN = VSS, TA = +25C,
CC
f = 1MHz
CC
CYC
FN8185.2
September 26, 2006
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