intersil X9317 DATA SHEET

®

www.BDTIC.com/Intersil

X9317

Low Noise, Low Power, 100 Taps

Data Sheet June 25, 2008

Digitally Controlled Potentiometer
(XDCP™)

The Intersil X9317 is a digitally controlled potentiometer
(XDCP™). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by a 3-wire interface.

The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS

, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subsequent power-up
operation.

The device can be used as a three-terminal potentiometer
for voltage control or as a two-terminal variable resistor for
current control in a wide variety of applications.

Pinouts

X9317

(8 LD TSSOP)

TOP VIEW

FN8183.4

Features

• Solid-State Potentiometer

• 3-Wire Serial Up/Down Interface

• 100 Wiper Tap Points

- Wiper Position Stored in Nonvolatile Memory and
Recalled on Power-up

• 99 Resistive Elements

- Temperature Compensated

- End-to-end Resistance Range ±20%

• Low Power CMOS
= 2.7V to 5.5V, and 5V ±10%

-V

CC

- Standby Current <1µA

• High Reliability

- Endurance, 100,000 Data Changes per Bit

- Register Data Retention, 100 years

•R

• Packages

- 8 Ld SOIC, PDIP, TSSOP, and MSOP

• Pb-Free Available (RoHS Compliant)

Values = 1kΩ, 10kΩ, 50kΩ, 100kΩ

TOTAL

CS

V

CC

INC
U/D

(8 LD PDIP, 8 LD SOIC, 8 LD MSOP)

INC
U/D

R

V

SS

1
2

X9317

3
4

X9317

TOP VIEW

1
2

X9317

3

H

4

R

8

L

R

7

W

V

SS

6

R

H

5

V

8

CC

CS

7

R

L

6

R

W

5

Applications

• LCD Bias Control

• DC Bias Adjustment

• Gain and Offset Trim

• Laser Diode Bias Control

• Voltage Regulator Output Control

1

XDCP is a trademark of Intersil Americas, Inc. Copyright Intersil Americas Inc. 2004-2005, 2008. All Rights Reserved

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

X9317

www.BDTIC.com/Intersil

Ordering Information

LIMITS

V

CC

PART NUMBER PART MARKING

X9317ZM8* AFG 5 ±10% 1 0 to +70 8 Ld MSOP M8.118
X9317ZM8Z* (Note) DDA 0 to +70 8 Ld MSOP (Pb-free) M8.118
X9317ZM8I* AFI -40 to +85 8 Ld MSOP M8.118
X9317ZM8IZ* (Note) DCY -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317ZP X9317ZP 0 to +70 8 Ld PDIP MDP0031
X9317ZS8* X9317Z 0 to +70 8 Ld SOIC MDP0027
X9317ZS8Z* (Note) X9317Z Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027
X9317ZS8I* X9317Z I -40 to +85 8 Ld SOIC MDP0027
X9317ZS8IZ* (Note) X9317Z Z I -40 to +85 8 Ld SOIC (Pb-free) MDP0027
X9317ZV8* 9317Z 0 to +70 8 Ld TSSOP M8.173
X9317ZV8Z* (Note) 9317Z Z 0 to +70 8 Ld TSSOP (Pb-free) M8.173
X9317ZV8I* 317Z I -40 to +85 8 Ld TSSOP M8.173
X9317ZV8IZ* (Note) 9317Z IZ -40 to +85 8 Ld TSSOP (Pb-free) M8.173
X9317WM8* ABF 10 0 to +70 8 Ld MSOP M8.118
X9317WM8Z* (Note) DCW 0 to +70 8 Ld MSOP (Pb-free) M8.118
X9317WM8I* ADS -40 to +85 8 Ld MSOP M8.118
X9317WM8IZ* (Note) DCT -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317WP X9317WP 0 to +70 8 Ld PDIP MDP0031
X9317WPI X9317WP I -40 to +85 8 Ld PDIP MDP0031
X9317WS8* X9317W 0 to +70 8 Ld SOIC MDP0027
X9317WS8Z* (Note) X9317W Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027
X9317WS8I* X9317W I -40 to +85 8 Ld SOIC MDP0027
X9317WS8IZ* (Note) X9317W ZI -40 to +85 8 Ld SOIC (Pb-free) MDP0027
X9317WV8*, ** 9317W 0 to +70 8 Ld TSSOP M8.173
X9317WV8Z* (Note) 9317W Z 0 to +70 8 Ld TSSOP (Pb-free) M8.173
X9317WV8I* 317W I -40 to +85 8 Ld TSSOP M8.173
X9317WV8IZ* (Note) 9317W IZ -40 to +85 8 Ld TSSOP (Pb-free) M8.173
X9317UM8* AEC 50 0 to +70 8 Ld MSOP M8.118
X9317UM8Z* (Note) DCS 0 to +70 8 Ld MSOP (Pb-free) M8.118
X9317UM8I* AFE -40 to +85 8 Ld MSOP M8.118
X9317UM8IZ* (Note) DCR -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317UP X9317UP 0 to +70 8 Ld PDIP MDP0031
X9317UPI X9317UP I -40 to +85 8 Ld PDIP MDP0031
X9317US8* X9317U 0 to +70 8 Ld SOIC MDP0027
X9317US8Z* (Note) X9317U Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027
X9317US8I* X9317U I -40 to +85 8 Ld SOIC MDP0027
X9317US8IZ* (Note) X9317U ZI -40 to +85 8 Ld SOIC (Pb-free) MDP0027
X9317UV8* 9317U 0 to +70 8 Ld TSSOP M8.173
X9317UV8Z* (Note) 9317U Z 0 to +70 8 Ld TSSOP (Pb-free) M8.173
X9317UV8I* 317U I -40 to +85 8 Ld TSSOP M8.173
X9317UV8IZ* (Note) 9317U IZ -40 to +85 8 Ld TSSOP (Pb-free) M8.173

(V)

R

TOTAL

(kΩ)

TEMPERATURE

RANGE (°C) PACKAGE

PKG.

DWG. #

2

FN8183.4

June 25, 2008

X9317

www.BDTIC.com/Intersil

Ordering Information (Continued)

V

LIMITS

PART NUMBER PART MARKING

X9317TM8*, ** AGD 5 ±10% 100 0 to +70 8 Ld MSOP M8.118
X9317TM8Z* (Note) DCN 0 to +70 8 Ld MSOP (Pb-free) M8.118
X9317TM8I*, ** AGF -40 to +85 8 Ld MSOP M8.118
X9317TM8IZ* (Note) DCL -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317TP X9317TP 0 to +70 8 Ld PDIP MDP0031
X9317TPI X9317TP I -40 to +85 8 Ld PDIP MDP0031
X9317TS8 X9317T 0 to +70 8 Ld SOIC MDP0027
X9317TS8Z (Note) X9317T Z 0 to +70 8 Ld SOIC (Pb-free) MDP0027
X9317TS8I X9317T I -40 to +85 8 Ld SOIC MDP0027
X9317TS8IZ (Note) X9317T ZI -40 to +85 8 Ld SOIC (Pb-free) MDP0027
X9317TV8*, ** 9317T 0 to +70 8 Ld TSSOP M8.173
X9317TV8Z* (Note) 9317T Z 0 to +70 8 Ld TSSOP (Pb-free) M8.173
X9317TV8I*, ** 317T I -40 to +85 8 Ld TSSOP M8.173
X9317TV8IZ* (Note) 9317T IZ -40 to +85 8 Ld TSSOP (Pb-free) M8.173
X9317ZM8-2.7* AFH 2.7 to 5.5 1 0 to +70 8 Ld MSOP M8.118
X9317ZM8Z-2.7* (Note) AOA 0 to +70 8 Ld MSOP (Pb-free) M8.118
X9317ZM8I-2.7* AFJ -40 to +85 8 Ld MSOP M8.118
X9317ZM8IZ-2.7* (Note) DCZ -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317ZS8-2.7* X9317Z F 0 to +70 8 Ld SOIC MDP0027
X9317ZS8Z-2.7* (Note) X9317Z ZF 0 to +70 8 Ld SOIC (Pb-free) MDP0027
X9317ZS8I-2.7* X9317Z G -40 to +85 8 Ld SOIC MDP0027
X9317ZS8IZ-2.7* (Note) X9317Z ZG -40 to +85 8 Ld SOIC (Pb-free) MDP0027
X9317ZV8-2.7* 317Z F 0 to +70 8 Ld TSSOP M8.173
X9317ZV8Z-2.7* (Note) 9317Z FZ 0 to +70 8 Ld TSSOP (Pb-free) M8.173
X9317ZV8I-2.7*, ** 317Z G -40 to +85 8 Ld TSSOP M8.173
X9317ZV8IZ-2.7* (Note) 9317Z GZ -40 to +85 8 Ld TSSOP (Pb-free) M8.173
X9317WM8-2.7* ACZ 10 0 to +70 8 Ld MSOP M8.118
X9317WM8Z-2.7* (Note) DCX 0 to +70 8 Ld MSOP (Pb-free) M8.118
X9317WM8I-2.7* ADT -40 to +85 8 Ld MSOP M8.118
X9317WM8IZ-2.7* DCU -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317WP-2.7 X9317WP F 0 to +70 8 Ld PDIP MDP0031
X9317WPI-2.7 X9317WP G -40 to +85 8 Ld PDIP MDP0031
X9317WS8-2.7* X9317W F 0 to +70 8 Ld SOIC MDP0027
X9317WS8Z-2.7* (Note) X9317W ZF 0 to +70 8 Ld SOIC (Pb-free) MDP0027
X9317WS8I-2.7*, ** X9317W G -40 to +85 8 Ld SOIC MDP0027
X9317WS8IZ-2.7*
X9317WV8-2.7* 317W F 0 to +70 8 Ld TSSOP M8.173
X9317WV8Z-2.7*
X9317WV8I-2.7*, ** 317W G -40 to +85 8 Ld TSSOP M8.173
X9317WV8IZ-2.7* (Note) AKZ -40 to +85 8 Ld TSSOP (Pb-free) M8.173

(Note) X9317W ZG -40 to +85 8 Ld SOIC (Pb-free) MDP0027

(Note) 9317W FZ 0 to +70 8 Ld TSSOP (Pb-free) M8.173

CC

(V)

R

TOTAL

(kΩ)

TEMPERATURE

RANGE (°C) PACKAGE

PKG.

DWG. #

3

FN8183.4

June 25, 2008

X9317

www.BDTIC.com/Intersil

Ordering Information (Continued)

V

LIMITS

PART NUMBER PART MARKING

X9317UM8-2.7* AED 2.7 to 5.5 10 0 to +70 8 Ld MSOP M8.118
X9317UM8Z-2.7* (Note) AOB 0 to +70 8 Ld MSOP (Pb-free) M8.118
X9317UM8I-2.7*, ** AFF -40 to +85 8 Ld MSOP M8.118
X9317UM8IZ-2.7* (Note) AOH -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317US8-2.7* X9317U F 50 0 to +70 8 Ld SOIC MDP0027
X9317UP-2.7 X9317UP F 0 to +70 8 Ld PDIP MDP0031
X9317UPI-2.7 X9317UP G -40 to +85 8 Ld PDIP MDP0031
X9317US8Z-2.7* (Note) X9317U ZF 0 to +70 8 Ld SOIC (Pb-free) MDP0027
X9317US8I-2.7*, ** X9317U G -40 to +85 8 Ld SOIC MDP0027
X9317US8IZ-2.7* (Note) X9317U ZG -40 to +85 8 Ld SOIC (Pb-free) MDP0027
X9317UV8-2.7* 317U F 0 to +70 8 Ld TSSOP M8.173
X9317UV8Z-2.7* (Note) 9317U FZ 0 to +70 8 Ld TSSOP (Pb-free) M8.173
X9317UV8I-2.7*, ** 317U G -40 to +85 8 Ld TSSOP M8.173
X9317UV8IZ-2.7* (Note) 9317U GZ -40 to +85 8 Ld TSSOP (Pb-free) M8.173
X9317TM8-2.7*, ** AGE 100 0 to +70 8 Ld MSOP M8.118
X9317TM8Z-2.7* (Note) DCP 0 to +70 8 Ld MSOP (Pb-free) M8.118
X9317TM8I-2.7*, ** AGG -40 to +85 8 Ld MSOP M8.118
X9317TM8IZ-2.7* (Note) DCM -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317TP-2.7 X9317TP F 0 to +70 8 Ld PDIP MDP0031
X9317TPI-2.7 X9317TP G -40 to +85 8 Ld PDIP MDP0031
X9317TS8-2.7*, ** X9317T F 0 to +70 8 Ld SOIC MDP0027
X9317TS8Z-2.7* (Note) X9317T ZF 0 to +70 8 Ld SOIC (Pb-free) MDP0027
X9317TS8I-2.7*, ** X9317T G -40 to +85 8 Ld SOIC MDP0027
X9317TS8IZ-2.7* (Note) X9317T ZG -40 to +85 8 Ld SOIC (Pb-free) MDP0027
X9317TV8-2.7*, ** 317T F 0 to +70 8 Ld TSSOP M8.173
X9317TV8Z-2.7* (Note) 9317T FZ 0 to +70 8 Ld TSSOP (Pb-free) M8.173
X9317TV8I-2.7*, ** 317T G -40 to +85 8 Ld TSSOP M8.173
X9317TV8IZ-2.7* (Note) 9317T GZ -40 to +85 8 Ld TSSOP (Pb-free) M8.173

NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

*Add "T1" suffix for tape and reel. Please refer to TB347 for details on reel specifications.
**Add "T2" suffix for tape and reel. Please refer to TB347 for details on reel specifications.

CC

(V)

R

TOTAL

(kΩ)

TEMPERATURE

RANGE (°C) PACKAGE

PKG.

DWG. #

4

FN8183.4

June 25, 2008

Block Diagram

www.BDTIC.com/Intersil

X9317

VCC (SUPPLY VOLTAGE)

UP/DOWN

(U/

INCREMENT

(

INC)

DEVICE SELECT

(

CS)

D)

VSS (GROUND)

CONTROL

AND

MEMORY

GENERAL

U/D
INC

CS

R

H

R

W

R

L

V

CC

V

SS

UP/DOWN
COUNTER

7-BIT

NONVOLATILE

MEMORY

STORE AND

RECALL

CONTROL

CIRCUITRY

ONE

OF

ONE
HUNDRED
DECODER

99

98

97

96

2

1

0

DETAILED

Pin Descriptions

PDIP/SOIC/MSOP TSSOP SYMBOL BRIEF DESCRIPTION

13INC
24U/DUp/Down. The U/D input controls the direction of the wiper movement.
35R
46V

SS

57R
68

R

71CS

82V

CC

Increment. Toggling INC while CS is low moves the wiper either up or down.

The high terminal is equivalent to one of the fixed terminals of a mechanical potentiometer.

H

Ground.

The wiper terminal is equivalent to the movable terminal of a mechanical potentiometer.

W

The low terminal is equivalent to one of the fixed terminals of a mechanical potentiometer.

L

Chip Select. The device is selected when the CS input is LOW, and de-selected when CS is
high.

Supply Voltage.

WIPER

SWITCHES

RESISTOR

ARRAY

R

H

R

L

R

W

5

FN8183.4

June 25, 2008