intersil X90100 DATA SHEET

®

www.BDTIC.com/Intersil

X90100

Data Sheet February 2, 2005

NV Electronically Programmable
Capacitor

The Intersil X90100 is a non-volatile electronically
programmable capacitor. The device is programmed through
a simple digital interface. After programming, the chosen
setting for the device is retained by internal EEPROM
storage whether or not DC power is maintained. There are
32 programmable capacitance values selectable, ranging
from 7.5pF to 14.5pF in 0.23pF increments, in single-ended
mode. The dielectric is highly stable, and the capacitance
exhibits a very low voltage coefficient. It has virtually no
dielectric absorbtion and has a very low temperature drift
coefficient in differential mode (<50ppm/°C).

The X90100 is programmed through three digital interface
pins, which have Schmitt triggers and pullup resistors to
secure code retention. The three pins, INC

, U/D, and CS,
are identical in operation to other Intersil chips with up/down
interface, such as the X9315 5-bit Digitally Controlled
Potentiometer (DCP).

Pinout

X90100

(8 LD MSOP)

TOP VIEW

INC

U/D

Vss

Cp

1

2

3

4

V

8

CC

CS

7

N/C

6

Cm

5

FN8156.0

Features

• Non-volatile EEPROM storage of programmed trim codes

• Power On Recall of capacitance setting

• High-Performance Electronically Trimmable Capacitance

• Excellent linearity: <0.5 LSB error

• Very Simple Digital Interface

• Fast adjustments: 5µs max incremental change

• Eliminates the need for mechanical tuning

• Capacitance trimmable from 7.5pF to 14.5pF (single­ended mode)

• Packages:

- MSOP (1.1mm x 3.0mm x 3.0mm)

Applications

• Post-trim of low-cost regenerative receivers

• Tunable RF stages

• Low-cost, Low temperature drift oscillators

• Garage door openers

• Keyless entry

• Industrial wireless control

• Capacitive sensor trimming

• RFID tags

Ordering Information

ORDERING

NUMBER C

X90100M8I 7.5pF to 14.5pF,

X90100M8IT1 7.5pF to 14.5pF,

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

TOTAL

Single Ended

Single Ended

Copyright Intersil Americas Inc. 2005. All Rights Reserved

PACKAGE

8 Ld MSOP -40 to +85

8 Ld MSOP

Tape and Reel

TEMP

RANGE

(°C)

-40 to +85

Block Diagram

www.BDTIC.com/Intersil

X90100

Cm

U/D

INC

V

CC

1*C

U

2*C

4*C

8*C

16*C

2

U

U

U

U

C

PAD

Logic and E

Power On Reset

Cp

C

PAD

V

SS

CS

Pin Descriptions

MSOP SYMBOL BRIEF DESCRIPTION

1INC

2U/D

3V

4CpCp. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical

5CmCm. The high (Cp) and low (Cm) terminals of the X90100 are equivalent to the fixed terminals of a mechanical

6N/CNot Connected. Must be floating.

7CS

8V

SS

CC

Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the capacitance value and
either increment or decrement the counter in the direction indicated by the logic level on the U/D

Up/Down (U/D). The U/D input controls the direction of the trimmed capacitor value and whether the counter
is incremented or decremented.

Ground.

trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance
across the terminals is determined by digital inputs INC

trimmable capacitor. The minimum dc voltage is VSS and the maximum is VCC. The value of capacitance
across the terminals is determined by digital inputs INC

Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in
nonvolatile memory when CS
complete the X90100 will be placed in the low power standby mode until the device is selected once again.

Positive Supply Voltage.

is returned HIGH while the INC input is also HIGH. After the store operation is

, U/D, and CS.

, U/D, and CS.

input.

2

FN8156.0

February 2, 2005

X90100

www.BDTIC.com/Intersil

Absolute Maximum Ratings

Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C

Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Voltage on CS

C

M

CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; the functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

, INC, U/D, CP, and

with respect to VSS. . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V

∆V = |V

Lead temperature (soldering 10 seconds) . . . . . . . . . . . . . . . . 300°C

|. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V

CP-VCM

Capacitor Specifications V

SYMBOL PARAMETER TEST CONDITIONS/NOTES MIN TYP

Absolute accuracy ±15 %

V

Cp

V

Cm

∆C Capacitance increments 0.23 pF

∆C Capacitance range 7pF

C

TOTAL

C

TOTAL

Q Quality factor

INL Absolute linearity error

DNL Relative linearity error

TC

V

CC

Notes: (1) Absolute linearity is used to determine actual capacitance versus expected capacitance = C

(2) Relative linearity is a measure of the error in step size between settings = C
(3) lsb = least significant bit = C
(4) Typical v alues are f or T
(5) This parameter is not 100% tested.

Cp terminal voltage 0 V

Cm terminal voltage 0 V

Capacitance at Code=0 7.5 pF

Capacitance at Code=31 14.5 pF

(5)

Resolution 5bits

C

1

Temperature Coefficient

TOTAL

Supply Voltage 2.7 5.5 V

= +5V, TA = 25°C, single ended mode, CM = 0V, unless otherwise stated.

CC

f = 315MHz 7

(1)

(2)

(5)

/31.

TOT

= 25°C and nominal supply voltage.

A

Differential Mode ±50 ppm/°C

-[C

(n+1)

+ Ml] = ±0.15 Ml.

(n)

(actual) - C

(n)

(4)

±0.15 lsb

±0.15 lsb

(n)

MAX UNIT

CC

CC

(expected) = ±0.15 Ml.

V

V

DC Electrical Specifications V

SYMBOL PARAMETER TEST CONDITIONS MIN TYP

VCC active current (Increment) CS = VIL, U/D = VIL or VIH and

VCC active current (Store) (EEPROM
Store)

Standby supply current CS = VCC - 0.3V, U/D and INC = VSS

SB

I

CS, INC, U/D input leakage current VIN = V

LI

CS, INC, U/D input HIGH voltage V

IH

CS, INC, U/D input LOW voltage -0.5 V

IL

(5)

, INC, U/D input capacitance VCC = 5V, VIN = VSS, TA= 25°C,

CS

C

I

CC1

I

CC2

I

V

V

IN

= 5V, TA = 25°C unless otherwise specified.

CC

INC

= 0.4V @ max. t

CS = VIH, U/D = VIL or VIH and

=V

CC

@ max. t

IH

- 0.3V

SS

INC

or V

f=1MHz

CYC

WR

x 0.7 VCC + 0.5 V

CC

3

(4)

50 100 µA

250 500 µA

0.5 2 µA

-15 µA

MAX UNIT

x 0.1 V

CC

10 pF

FN8156.0

February 2, 2005