intersil SN7002W DATA SHEET

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Final data

SN7002W

SIPMOS Small-Signal-Transistor

Feature

• N-Channel

• Enhancement mode

• Logic Level

• dv/dt rated

Gate
pin1

Type Package Ordering Code Tape and Reel Information

SN7002W

SOT-323 Q67042-S4186

E6327: 3000 pcs/reel

SN7002W SOT-323 Q67042-S4193 E6433: 10000 pcs/reel

Product Summary

V

DS

R

DS(on)

I

D

SOT-323

Drain
pin 3

Source
pin 2

60 V

5 Ω

0.23 A

Marking

sSN
sSN

Maximum Ratings, at Tj = 25 °C, unless otherwise specified
Parameter Symbol Value Unit

Continuous drain current

TA=25°C
TA=70°C

Pulsed drain current

TA=25°C

Reverse diode dv/dt

IS=0.23A, VDS=48V, di/dt=200A/µs, T

jmax

=150°C

Gate source voltage V

I

D

I

D puls

dv/dt

GS

0.23

0.18

0.92

6 kV/µs

±20

A

V

ESD Sensitivity (HBM) as per MIL-STD 883 Class 1
Power dissipation

TA=25°C

Operating and storage temperature T

P

tot

, T

j

stg

0.5 W

-55... +150

°C

IEC climatic category; DIN IEC 68-1 55/150/56

Page 1

2003-04-03

Final data

SN7002W

Thermal Characteristics
Parameter Symbol Values Unit

min. typ. max.

Characteristics

Thermal resistance, junction - ambient

R

thJS

- - 250 K/W

at minimal footprint

Electrical Characteristics, at Tj = 25 °C, unless otherwise specified
Parameter Symbol Values Unit

min. typ. max.

Static Characteristics

Drain-source breakdown voltage

VGS=0, ID=250µA

Gate threshold voltage, VGS = V

ID=26µA

Zero gate voltage drain current

VDS=60V, VGS=0, Tj=25°C
VDS=60V, VGS=0, Tj=150°C

Gate-source leakage current

VGS=20V, VDS=0

DS

V

(BR)DSS

V

GS(th)

I

DSS

I

GSS

60 - - V

0.8 1.4 1.8

-

-

-

-

0.1
5

- - 10 nA

µA

Drain-source on-state resistance

VGS=4.5V, ID=0.2A

Drain-source on-state resistance

VGS=10V, ID=0.23A

Page 2

R

DS(on)

R

DS(on)

- 4.1 7.5

- 2.3 5

2003-04-03

Ω

Final data

f

SN7002W

Electrical Characteristics, at Tj = 25 °C, unless otherwise specified
Parameter Symbol Conditions Values Unit

min. typ. max.

Dynamic Characteristics

Transconductance g

Input capacitance C
Output capacitance C

Reverse transfer capacitance C
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t

Gate Charge Characteristics

Gate to source charge Q
Gate to drain charge Q
Gate charge total Q

Gate plateau voltage V

fs

iss
oss

rss
d(on)
r
d(off)

gs
gd
g

(plateau)

VDS≥2*ID*R
ID=0.18A

VGS=0, VDS=25V,
f=1MHz

DS(on)max

,

0.1 0.21 - S

- 34 45 pF

- 7.2 9.6

- 3 4.5

VDD=30V, VGS=10V,
ID=0.23A, RG=6Ω

- 2.4 3.6 ns

- 2.8 4.2

- 6 9

- 8.5 12.75

VDD=48V, ID=0.23A - 0.11 0.17 nC

- 0.42 0.63

VDD=48V, ID=0.23A,
VGS=0 to 10V

VDD=48V, ID = 0.23 A - 3.4 - V

- 1 1.5

Reverse Diode

Inverse diode continuous

I

forward current
Inv. diode direct current, pulsedI
Inverse diode forward voltage V
Reverse recovery time t
Reverse recovery charge Q

S

SM

SD

rr

rr

TA=25°C - - 0.23 A

- - 0.92

VGS=0, IF=0.23A - 0.85 1.2 V
VR=30V, I

diF/dt=100A/µs

Page 3

F=lS

,

- 10.8 16.2 ns

- 3.2 4.8 nC

2003-04-03