intersil SN7002N DATA SHEET
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Final data
SN7002N
SIPMOS Small-Signal-Transistor
Feature
• N-Channel
• Enhancement mode
• Logic Level
• dv/dt rated
Gate
pin1
Type Package Ordering Code Tape and Reel Information
SN7002N
SOT-23 Q67042-S4185
E6327: 3000 pcs/reel
SN7002N SOT-23 Q67042-S4192 E6433: 10000 pcs/reel
Product Summary
V
DS
R
DS(on)
I
D
SOT-23
Drain
pin 3
Source
pin 2
60 V
5 Ω
0.2 A
Marking
sSN
sSN
Maximum Ratings, at Tj = 25 °C, unless otherwise specified
Parameter Symbol Value Unit
Continuous drain current
TA=25°C
TA=70°C
Pulsed drain current
TA=25°C
Reverse diode dv/dt
IS=0.2A, VDS=48V, di/dt=200A/µs, T
jmax
=150°C
Gate source voltage V
I
D
I
D puls
dv/dt
GS
0.2
0.16
0.8
6 kV/µs
±20
A
V
ESD Sensitivity (HBM) as per MIL-STD 883 Class 1
Power dissipation
TA=25°C
Operating and storage temperature T
P
tot
, T
j
stg
0.36 W
-55... +150
°C
IEC climatic category; DIN IEC 68-1 55/150/56
Page 1
2003-03-26
Final data
SN7002N
Thermal Characteristics
Parameter Symbol Values Unit
min. typ. max.
Characteristics
Thermal resistance, junction - ambient
R
thJA
- - 350 K/W
at minimal footprint
Electrical Characteristics, at Tj = 25 °C, unless otherwise specified
Parameter Symbol Values Unit
min. typ. max.
Static Characteristics
Drain-source breakdown voltage
VGS=0, ID=250µA
Gate threshold voltage, VGS = V
ID=26µA
Zero gate voltage drain current
VDS=60V, VGS=0, Tj=25°C
VDS=60V, VGS=0, Tj=150°C
Gate-source leakage current
VGS=20V, VDS=0
DS
V
(BR)DSS
V
GS(th)
I
DSS
I
GSS
60 - - V
0.8 1.4 1.8
-
-
-
-
0.1
5
- - 10 nA
µA
Drain-source on-state resistance
VGS=4.5V, ID=0.17A
Drain-source on-state resistance
VGS=10V, ID=0.5A
Page 2
R
DS(on)
R
DS(on)
- 3.9 7.5
- 2.5 5
2003-03-26
Ω
Final data
f
Inv. diode direct current, pulsed
SM
rr
rr
SN7002N
Electrical Characteristics, at Tj = 25 °C, unless otherwise specified
Parameter Symbol Conditions Values Unit
min. typ. max.
Dynamic Characteristics
Transconductance g
Input capacitance C
Output capacitance C
Reverse transfer capacitance C
Turn-on delay time t
Rise time t
Turn-off delay time t
Fall time t
Gate Charge Characteristics
Gate to source charge Q
Gate to drain charge Q
Gate charge total Q
Gate plateau voltage V
fs
iss
oss
rss
d(on)
r
d(off)
gs
gd
g
(plateau)
VDS≥2*ID*R
ID=0.16A
VGS=0, VDS=25V,
f=1MHz
DS(on)max
,
0.09 0.17 - S
- 34 45 pF
- 7.2 9.6
- 2.8 4.2
VDD=30V, VGS=10V,
ID=0.5A, RG=6Ω
- 2.4 3.6 ns
- 3.2 4.8
- 5.3 8
- 3.6 5.4
VDD=48V, ID=0.5A - 0.14 0.21 nC
- 0.42 0.63
VDD=48V, ID=0.5A,
VGS=0 to 10V
VDD=48V, ID = 0.5 A - 4.5 - V
- 1 1.5
Reverse Diode
Inverse diode continuous
I
forward current
I
Inverse diode forward voltage V
Reverse recovery time t
Reverse recovery charge Q
S
SD
TA=25°C - - 0.2 A
- - 0.8
VGS=0, IF = I
VR=30V, I
diF/dt=100A/µs
Page 3
F=lS
S
,
- 0.83 1.2 V
- 14.2 21.3 ns
- 5.9 8.8 nC
2003-03-26
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