Datasheet RHR1K160D Datasheet (Intersil)

RHR1K160D
[ /Title (RHR1 K160D ) /Sub­ject (1A, 600V Hyper­fast Dual Diode) /Autho r () /Key­words (Inter­sil Corpo­ration, semi­con­ductor, Ava­lanche Energy Rated, Switch ing Power Sup­plies, Power Switch ing Cir­cuits, Rectifi­ers,
Data Sheet January 2000
1A, 600V Hyperfast Dual Diode
The RHR1K160D is a hyperfastdual diode withsoft recovery characteristics (t time of ultrafast diodes and is silicon nitride passivated ion­implanted epitaxial planar construction.
This device is intended for use as freewheeling/clamping diodes and rectifiers in a variety of switching power supplies and other power switching applications. Itslow stored charge and hyperfast soft recovery minimize ringing and electrical noise in many power switching circuits reducing power loss in the switching transistors.
Formerly developmental type TA49185.
< 25ns). It has about half the recovery
Features
• Hyperfast with Soft Recovery. . . . . . . . . . . . . . . . . .<25ns
• Operating Temperature. . . . . . . . . . . . . . . . . . . . . . .150
• Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .600V
Thermal Impedance SPICE® Model
Thermal Impedance SABER© Model
• Avalanche Energy Rated
• Planar Construction
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”
Ordering Information
PART NUMBER PACKAGE BRAND
RHR1K160D MS-012AA RHR1K160D
NOTE: When ordering, use the entire part number. For ordering in tape and reel, add the suffix 96 to the part number, i.e., RHR1K160D96.
Packaging
JEDEC MS-012AA
BRANDING DASH
5
1
2
3
4
Absolute Maximum Ratings (Per Leg) T
Peak Repetitive Reverse Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Working Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DC Blocking Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Average Rectified Forward Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
TA = 65oC
Repetitive Peak Surge Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Square Wave, 20kHz
Nonrepetitive Peak Surge Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Halfwave, 1 phase, 60Hz
Maximum Power Dissipation (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Avalanche Energy (See Figures 11 and 12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
= 25oC, Unless Otherwise Specified
A
Applications
• Switching Power Supplies
• Power Switching Circuits
• General Purpose
Symbol
ANODE 1 (2)
ANODE 2 (3)
RRM RWM
F(AV)
FRM
FSM
STG,TJ
AVL
pkg
R
D
L
NC (1)
NC (4)
File Number 4788
o
C
CATHODE 1 (8)
CATHODE 1 (7)
CATHODE 2 (6)
CATHODE 2 (5)
RHR1K160D UNITS
600 V 600 V 600 V
1A
2A
10 A
2.5 W 5mJ
-55 to 150
300 260
o
C
o
C
o
C
1
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000
SABERis a Copyright of Analogy, Inc.
RHR1K160D
Electrical Specifications (Per Leg) T
= 25oC, Unless Otherwise Specified
A
SYMBOL TEST CONDITION MIN TYP MAX UNITS
V
F
IF = 1A - - 2.1 V IF = 1A, TA = 150oC - - 1.7 V
I
R
VR = 600V - - 100 µA VR = 600V, TA = 150oC - - 500 µA
t
rr
t
a
t
b
Q
RR
C
J
R
θJA
IF = 1A, dIF/dt = 200A/µs--25ns IF = 1A, dIF/dt = 200A/µs - 10.5 - ns IF = 1A, dIF/dt = 200A/µs-5-ns IF = 1A, dIF/dt = 200A/µs - 20 - nC VR = 10V, IF = 0A - 10 - pf Pad Area = 0.483 in2(Note 1) - - 50 Pad Area = 0.027 in2(Note 2) (Figure 13) - - 201 Pad Area = 0.006 in2(Note 2) (Figure 13) - - 239
DEFINITIONS
VF = Instantaneous forward voltage (pw = 300µs, D = 2%).
IR = Instantaneous reverse current. trr= Reverse recovery time (See Figure 10), summation of ta+tb.
ta = Time to reach peak reverse current (See Figure 10). tb = Time from peak IRM to projected zero crossing of IRM based on a straight line from peak IRM through 25% of IRM (See Figure 10).
Qrr = Reverse recovery charge.
CJ = Junction Capacitance.
R
= Thermal resistance junction to ambient.
θJA
pw = Pulse width.
D = Duty cycle.
NOTES:
1. Measured using FR-4 copper board at 0.8 seconds.
2. 2. Measured using FR-4 copper board at 1000 seconds.
o o o
C/W C/W C/W
Typical Performance Curve
10
100oC
1
, FORWARD CURRENT (A)
F
I
0.1 0 0.5 1 1.5 2 2.5 4
150oC
VF, FORWARD VOLTAGE (V)
25oC
3.53
FIGURE 1. FORWARD CURRENT vs FORWARD VOLTAGE FIGURE 2. REVERSE CURRENT vs REVERSE VOLTAGE
2
10
1
0.1
REVERSE CURRENT ( A)
0.01
R,
I
0.001 0 600100 500200
o
C
150
o
100
C
25oC
300 400
VR, REVERSE VOLTAGE (V)
Typical Performance Curve (Continued)
RHR1K160D
20
TA = 25oC, dIF/dt = 200A/µs
16
12
8
4
t, RECOVERY TIMES (ns)
0
0.1
t
rr
t
a
t
b
0.5
IF, FORWARD CURRENT (A)
1
35
TA = 100oC, dIF/dt = 200A/µs
30
25
20
15
10
t, RECOVERY TIMES (ns)
5
0
0.1
t
rr
t
b
t
a
0.5
IF, FORWARD CURRENT (A)
FIGURE 3. trr,taAND tbCURVES vs FORWARD CURRENT FIGURE 4. trr,taAND tbCURVES vs FORWARD CURRENT
50
TA = 150oC, dIF/dt = 200A/µs
40
30
20
t
rr
t
b
1.0
0.8
0.6
0.4
SQ. WAVE
DC
R
θJA
= 50oC/W
1
t, RECOVERY TIMES (ns)
10
0
0.1
a
0.5
IF, FORWARD CURRENT (A)
1
0.2
, AVERAGE FORWARD CURRENT (A)
0
F(AV)
I
50 75 12525 150100
T
, AMBIENT TEMPERATURE (oC)
A
t
FIGURE 5. trr,taAND tbCURVES vs FORWARD CURRENT FIGURE 6. CURRENT DERATING CURVE
50
40
30
20
10
, JUNCTION CAPACITANCE (pF)
J
C
0
0 20 40 60 10080
V
, REVERSE VOLTAGE (V)
R
FIGURE 7. JUNCTION CAPACITANCE vs REVERSE VOLTAGE
3
Typical Performance Curve (Continued)
RHR1K160D
10
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
1
0.02
0.01
, NORMALIZED
0.1
θJA
Z
THERMAL IMPEDANCE
SINGLE PULSE
0.01
-5
10
-4
10
FIGURE 8. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
Test Circuits and Waveforms
VGE AMPLITUDE AND RG CONTROL dIF/dt
AND t2CONTROL I
t
1
F
L
R
= 50oC/W
θJA
P
DM
t
1
t
NOTES: DUTY FACTOR: D = t
PEAK TJ = PDM x Z
-3
10
-2
10
-1
10
0
10
1
10
θJA
1/t2
10
x R
2
θJA
2
+ T
A
3
10
t, RECTANGULAR PULSE DURATION (s)
DUT
CURRENT
R
G
V
GE
t
1
t
2
IGBT
SENSE
dI
+
V
DD
-
0
F
I
F
dt
t
rr
t
a
FIGURE 9. trr TEST CIRCUIT FIGURE 10. trr WAVEFORMS AND DEFINITIONS
L = 20mH R < 0.1 E
AVL
Q
= IGBT (BV
1
= 1/2LI2 [V
R(AVL)
CES
/(V
> DUT V
R(AVL)
R(AVL)
- VDD)] )
LR
V
CURRENT
SENSE
Q
1
DUT
+ V
DD
I
L
IV
V
DD
­t
0
AVL
I
L
t
1
t
2
FIGURE 11. AVALANCHE ENERGY TEST CIRCUIT FIGURE 12. AVALANCHE CURRENT AND VOLTAGE
WAVEFORMS
t
b
0.25 I
RM
I
RM
t
4
RHR1K160D
Thermal Resistance vs Mounting Pad Area
The maximum rated junction temperature, TJM, and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, P application.Thereforetheapplication’sambienttemperature, T
(oC), and thermal resistance R
A
reviewed to ensure that T
JM
is never exceeded. Equation 1
(oC/W) must be
θJA
mathematically represents the relationship and serves as the basis for establishing the rating of the part.
P
TJMTA–()
-----------------------------=
DM
Z
θJA
In using surface mount devicessuch as the SOP-8 package, the environment in which it is applied will have a significant influence on the part’s current and maximum power dissipation ratings. Precise determination of P
DM
and influenced by many factors:
1. Mounting pad areaonto which the device is attached and whether there is copper on one side or both sides of the board.
2. The number of copper layersand the thickness of the board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the duty cycle and the transientthermal response of thepart, the board and the environment they are in.
Intersil provides thermal information to assist the designer’s preliminary application evaluation. Figure 13 defines the R
for the device as a function of the top copper
θJA
(component side) area. This is for a horizontally positioned FR-4 board with 2 oz. copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation. Pulse applications can be evaluated using the Intersil device SPICE thermal model or manually utilizing the normalized maximum transient thermal impedance curve.
,inan
DM
(EQ. 1)
is complex
350
R
= 110.2 - 25.24 x ln (AREA)
θJA
300
C/W)
o
250
200
150
, THERMAL IMPEDANCE
θJA
100
R
JUNCTION TO AMBIENT (
Rθβ= 43.81 - 22.66 x ln (AREA)
50
0.001
FIGURE 13. THERMAL RESISTANCE vs MOUNTING PAD AREA
Displayed on the curve are R
239oC/W - 0.006in
0.01 0.1
AREA, TOP COPPER AREA (in2)
values listed in the
θJA
2
201oC/W - 0.027in
2
Electrical Specifications table. These points were chosen to depict the compromise between the copper board area, the thermal resistance and ultimately the power dissipation, P
. Thermal resistances corresponding to other
DM
component side copper areas can be obtained from Figure 13 or by calculation using Equation 2. The area, in square inches is the top copper board area, the thermal resistance and ultimately the power dissipation, P
θJA
110.18 25.24 Area()ln×=
R
DM
.
(EQ. 2)
While Equation 2 describes the thermal resistance of a single die, the dual die SOP-8 package introduces an additional thermal component, thermal coupling resistance, R
. Equation 3 describes Rθβ as a function of the top
θβ
copper mounting pad area.
R
θβ
43.81 22.66 Area()ln×=
(EQ. 3)
The thermal coupling resistance vs. copper area is also graphically depicted in Figure 13. It is important to note the thermal resistance (R (
R
) are equivalent for both die. For example at 0.1 square
θβ
) and thermal coupling resistance
θJA
inches of copper: R R
θJA1 θβ1
= R
= R
θJA2
= 96oC/W
θβ2
= 168oC/W
TJ1 and TJ2 define the junction temperature of the respective die. Similarly, P
and P2 define the power
1
dissipated in each die. The steady state junction temperature can be calculated using Equation 4 for die 1 and Equation 5 for die 2.
Example: Use Equation 4 to calculate T calculate T
with the following conditions. Die 2 is
J2
and Equation 5 to
J1
dissipating 0.5W; die 1 is dissipating 0W; the ambient temperature is 60
o
C; the package is mounted to a top
copper area of 0.1 square inches per die.
5
RHR1K160D
.
T
J1P1RθJAP2RθβTA
++=
(EQ. 4)
TJ1 = (0W)(168oC/W) + (0.5W)(96oC/W) + 60oC TJ1 = 108oC
T
J2P2RθJAP1RθβTA
T
= (0.5W)(168oC/W) + (0W)(96oC/W) + 60oC
J2
++=
(EQ. 5)
TJ2 = 144oC The transient thermal impedance (Z
) is also effected by
θJA
varied top copper board area. Figure 14 shows the effect of
200
COPPER BOARD AREA - DESCENDING ORDER
2
0.020 in
2
0.140 in
150
C/W)
o
100
, THERMAL
θJA
Z
IMPEDANCE (
50
0.257 in
0.380 in
0.483 in
2 2 2
copper pad area on single pulse transient thermal impedance. Each trace represents a copper pad area in square inches corresponding to the descending list in the graph. SPICE and SABER thermal models are provided for each of the listed pad areas.
Copper pad area has no perceivable effect on transient thermal impedance for pulse widths less than 100ms. For pulse widths less than 100ms the transient thermal impedance is determinedby the die andpackage.Therefore, CTHERM1 through CTHERM6 and RTHERM1 through RTHERM5 remain constant for each of the thermal models. A listing of the model component values is availab le in Table 1.
0
-1
10
0
10
t, RECTANGULAR PULSE DURATION (s)
1
10
2
10
3
10
FIGURE 14. TRANSIENT THERMAL IMPEDANCE vs MOUNTING PAD AREA
6
RHR1K160D
SPICE Thermal Model
REV October 1998 RHR1K160D Copper Area = 0.483 in
2
CTHERM1 th 8 6e-6 CTHERM2 8 7 4e-5 CTHERM3 7 6 1.5e-4 CTHERM4 6 5 7.5e-4 CTHERM5 5 4 7e-3 CTHERM6 4 3 2e-2 CTHERM7 3 2 8e-2 CTHERM8 2 tl 2.5
RTHERM1 th 8 5e-2 RTHERM2 8 7 2.5e-1 RTHERM3 7 6 1.5 RTHERM4 6 5 2.5 RTHERM5 5 4 7.5 RTHERM6 4 3 22 RTHERM7 3 2 38 RTHERM8 2 tl 38
SABER Thermal Model
Copper Area = 0.483 in template thermal_model th tl
thermal_c th, tl { ctherm.ctherm1 th 8 = 6e-6 ctherm.ctherm2 8 7 = 4e-5 ctherm.ctherm3 7 6 = 1.5e-4 ctherm.ctherm4 6 5 = 7.5e-4 ctherm.ctherm5 5 4 = 7e-3 ctherm.ctherm6 4 3 = 2e-2 ctherm.ctherm7 3 2 = 8e-2 ctherm.ctherm8 2 tl = 2.5
rtherm.rtherm1 th 8 = 5e-2 rtherm.rtherm2 8 7 = 2.5e-1 rtherm.rtherm3 7 6 = 1.5 rtherm.rtherm4 6 5 = 2.5 rtherm.rtherm5 5 4 = 7.5 rtherm.rtherm6 4 3 = 22 rtherm.rtherm7 3 2 = 38 rtherm.rtherm8 2 tl = 38 }
2
RTHERM1
RTHERM2
RTHERM3
RTHERM4
RTHERM5
RTHERM6
RTHERM7
RTHERM8
th
8
7
6
5
4
3
2
t
l
JUNCTION
CTHERM1
CTHERM2
CTHERM3
CTHERM4
CTHERM5
CTHERM6
CTHERM7
CTHERM8
AMBIENT
TABLE 1. THERMAL MODELS
COMPONENT 0.02 in
2
0.14 in
2
0.257 in
2
0.38 in
2
0.483 in
CTHERM7 7.5e-2 8e-2 8e-2 8e-2 8e-2 CTHERM8 1 1.5 2 2 2.5 RTHERM6 25 22 22 22 22 RTHERM7 65 45 40 38 38 RTHERM8 70 55 48 43 38
7
2
RHR1K160D
MS-012AA
8 LEAD JEDEC MS-012AA SMALL OUTLINE PLASTIC PACKAGE
E E
1
1
2
D
56
o
h x 45
L
0.060
1.52
0.155
4.0
0.275
7.0
MINIMUM RECOMMENDED FOOTPRINT FOR
SURFACE-MOUNTED APPLICATIONS
A
A
1
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0532 0.0688 1.35 1.75 -
e
A
1
0.004 0.0098 0.10 0.25 ­b 0.013 0.020 0.33 0.51 ­c 0.0075 0.0098 0.19 0.25 -
D 0.189 0.1968 4.80 5.00 2
b
E 0.2284 0.244 5.80 6.20 -
E
1
0.1497 0.1574 3.80 4.00 3 e 0.050 BSC 1.27 BSC -
H 0.0099 0.0196 0.25 0.50 -
c
L 0.016 0.050 0.40 1.27 4
NOTES:
1. All dimensions are within allowabledimensions of Rev.C of JEDEC MS-012AA outline dated 5-90.
2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed
0o-8
0.004 IN
0.10 mm
o
0.006 inches (0.15mm) per side.
3. Dimension “E1” does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 0.010 inches (0.25mm) per side.
0.050
1.27
4. “L” is the length of terminal for soldering.
5. The chamferon the bodyis optional. Ifit is notpresent, a visualindex feature must be located within the crosshatched area.
0.024
0.6
1.5mm
DIA. HOLE
6. Controlling dimension: Millimeter.
7. Revision 8 dated 5-99.
4.0mm
USER DIRECTION OF FEED
2.0mm
1.75mm
MS-012AA
12mm TAPE AND REEL
C
L
12mm
8.0mm
40mm MIN. ACCESS HOLE
18.4mm
COVER TAPE
13mm
330mm
GENERAL INFORMATION
1. 2500 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION “A” SPECIFICATIONS.
50mm
12.4mm
8
RHR1K160D
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240
9
EUROPE
Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05
ASIA
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