Intersil RFL2N05, RFL2N06 Datasheet
January 1998
Semiconductor
RFL2N05,
RFL2N06
2A, 50V and 60V, 0.95 Ohm,
N-Channel Power MOSFETs
Features
• 2A, 50V and 60V
•r
DS(ON)
• SOA is Power-Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 0.95Ω
Components to PC Boards”
Ordering Information
PART NUMBER PACKAGE BRAND
RFL2N05 TO-205AF RFL2N05
RFL2N05 TO-205AF RFL2N05
NOTE: When ordering, include the entire part number.
Description
These are N-Channel enhancement mode silicon gate
power field effect transistors designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA09378.
Symbol
D
G
S
Packaging
JEDEC TO-205AF
DRAIN
(CASE)
SOURCE
GATE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright
© Harris Corporation 1997
5-1
File Number 1497.2
RFL2N05, RFL2N06
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
RFL2N05 RLF2N06 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (RGS = 1MΩ) (Note 1). . . . . . . . . . . . . . . . . . . . . .V
DSS
DGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain Current, RMS Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
GS
D
DM
D
50 60 V
50 60 V
±20 ±20 V
22A
10 10 A
8.33 8.33 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.0667 0.0667 W/oC
Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . TJ, T
STG
-55 to 150 -55 to 150
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . .T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maxim um Ratings” ma y cause permanent damage to the device . This is a stress only rating and oper ation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
300
260
300
260
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSSID
= 250µA, VGS = 0
RFL2N05 50 - - V
RFL2N06 60 - - V
Gate to Threshold Voltage V
Zero-Gate Voltage Drain Current I
GS(TH)VGS
DSS
= VDS, ID = 250µA, (Figure 8) 2 - 4 V
VDS = 0.8 x Rated BV
DSS
,
--1µA
TC = 25oC
T
= 125oC--25µA
C
Gate to Source Leakage Current I
Drain to Source On Voltage (Note 2) V
GSSVGS
DS(ON)ID
= ±20V, VDS = 0 - - ±100 nA
= 1A, VGS = 10V - - 0.95 V
ID = 2A, VGS = 10V - - 2.0 V
ID = 4A, VGS = 15V - - 4.8 V
Drain to Source On Resistance (Note 2) r
DS(ON)ID
Forward Transconductance (Note 2) g
Turn-On Delay Time t
d(ON)ID
Rise Time t
Turn-Off Delay Time t
d(OFF)
Fall Time t
Input Capacitance C
Output Capacitance C
Reverse-Transfer Capacitance C
Thermal Resistance Junction to Case R
fs
r
f
ISS
OSS
RSS
JC
θ
= 1A, VGS = 10V, (Figures 6, 7) - - 0.95 Ω
ID = 1A, VDS = 10V, (Figure 10) 400 - - S
≈ 1A, V
VGS = 10V, (Figures 11, 12, 13)
= 30V, RGS= 50Ω,
DD
- 6 15 ns
-1430ns
-1630ns
-3050ns
VGS = 0V, VDS = 25V,
f = 1MHz, (Figure 9)
- - 200 pF
- - 85 pF
- - 30 pF
--15
o
C/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) V
Diode Reverse Recovery Time t
NOTE:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
ISD = 1A - - 1.4 V
SD
ISD = 2A, dISD/dt = 50A/µs - 100 - ns
rr
5-2
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