Intersil RFL1N12, RFL1N15 Datasheet

January 1998
Semiconductor
RFL1N12,
RFL1N15
1A, 120V and 150V, 1.9 Ohm,
N-Channel Power MOSFETs
Features
•r
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 1.9
DS(ON)
Components to PC Boards”
Ordering Information
PART NUMBER PACKAGE BRAND
RFL1N12 TO-205AF RFL1N12 RFL1N15 TO-205AF RFL1N15
NOTE: When ordering, use the entire part number.
Description
These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits.
Formerly developmental type TA09196.
Symbol
D
G
S
Packaging
JEDEC TO-205AF
DRAIN (CASE)
SOURCE
GATE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. Copyright
© Harris Corporation 1997
5-1
File Number 1444.2
RFL1N12, RFL1N15
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
RFL1N12 RFL1N15 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Drain to Gate Voltage (RGS = 1M) (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . V
Continuous Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
DSS
DGR
D
DM
GS
D
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.0667 0.0667W/
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
120 150 V 120 150 V
11A 55A
±20 ±20 V
8.33 8.33 W
o
C
-55 to 150 -55 to 150
300 260
300 260
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
DSSID
= 250µA, VGS = 0V
RFL1N12 120 - - V
RFL1N15 150 - - V Gate Threshold Voltage V Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I Drain to Source On Voltage (Note 2) V
GS(TH)VGS
DSS
GSS
DS(ON)ID
= VDS, ID = 250µA, (Figure 8) 2 - 4 V VDS = 0.8 x Rated BV T
= 125oC--25µA
C
, TC = 25oC--1µA
DSS
VGS = ±20V, VDS = 0V - - ±100 nA
=1A, VGS =10V - - 1.9 V
ID = 2A, VGS = 10V - - 6.3 V
Drain to Source On Resistance (Note 2) r
DS(ON)ID
Forward Transconductance (Note 2) g Turn-On Delay Time t
d(ON)ID
Rise Time t Turn-Off Delay Time t
d(OFF)
Fall Time t Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Thermal Resistance Junction to Case R
fs
r
f
ISS OSS RSS
θJC
= 1A, VGS = 10V, (Figures 6, 7) - - 1.9
ID = 1A, VDS = 10V, (Figure 10) 400 - - S
1A, VDD = 75V, RGS = 50
VGS = 10V, (Figures 11, 12, 13)
-1725ns
-3045ns
-3045ns
-3050ns
VGS = 0V, VDS = 25V, f = 1MHz, (Figure 9) - - 200 pF
- - 80 pF
- - 25 pF
--15
o
C/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) V Reverse Recovery Time t
NOTE:
2. Pulse test: pulse width 300µs maximum, duty cycle 2%.
SD
rr
ISD = 1A - - 1.4 V ISD = 1A, dISD/dt = 50A/µs - 150 - ns
5-2
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