RFD7N10LE, RFD7N10LESM
Data Sheet October 1999
7A, 100V, 0.300 Ohm, N-Channel, Logic
Level, Power MOSFETs
These N-Channel power MOSFETs are manufacturedusing
a modern process. This process, which uses feature sizes
approaching those of LSI integrated circuits gives optimum
utilization of silicon, resulting in outstanding performance.
They were designed for use in applications such as
switching regulators, switching converters, motor drivers,
relaydriversand emitter switches forbipolar transistors.This
performance is accomplished through a special gate oxide
design which provides full rated conductance at gate bias in
the 3V to 5V range, thereby facilitating true on-off power
control directly from logic level (5V) integrated circuits.
Formerly developmental type TA49046.
Ordering Information
PART NUMBER PACKAGE BRAND
RFD7N10LE TO-251AA 7N10L
RFD7N10LESM TO-252AA 7N10LE
NOTE: When ordering, use theentirepart number. Addsuffix9A toobtain the TO-252AA variant in the tape and reel, i.e., RFD7N10LESM9A.
File Number 3598.3
Features
• 7A, 100V
DS(ON)
= 0.300Ω
®
Model
•r
• Temperature Compensating PSPICE
• Can be Driven Directly from CMOS, NMOS, TTL Circuits
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
o
C Operating Temperature
• 175
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
(FLANGE)
DRAIN
JEDEC TO-251AA JEDEC TO-252AA
SOURCE
DRAIN
GATE
GATE
SOURCE
DRAIN
(FLANGE)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
RFD7N10LE, RFD7N10LESM
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
RFD7N10LE,
RFD7N10LESM UNITS
Drain to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Drain to Gate Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DSS
DGR
GS
100 V
100 V
+10, -8 V
Drain Current
Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
DM
AS
D
Refer to Peak Current Curve
Refer to UIS Curve
D
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
7
47
0.318
-55 to 175
300
260
A
W
W/oC
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 150oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V
Zero Gate Voltage Drain Current I
DSS
GS(TH)
DSS
ID = 250µA, VGS = 0V 100 - - V
VGS = VDS, ID = 250µA1-3V
VDS = 95V, VGS = 0V - - 1 µA
VDS = 90V, VGS = 0V, TC = 150oC - - 250 µA
Gate to Source Leakage Current I
On Resistance r
DS(ON)ID
Turn-On Time t
Turn-On Delay Time t
d(ON)
Rise Time t
Turn-Off Delay Time t
d(OFF)
Fall Time t
Turn-Off Time t
Total Gate Charge Q
g(TOT)
Gate Charge at 5V Q
Threshold Gate Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R
GSS
ON
r
f
OFF
g(5)
g(TH)
ISS
OSS
RSS
θJC
θJA
VGS = +10, -8V - - 10 µA
= 7A, VGS = 5V - - 0.300 Ω
VDD = 50V, ID = 7A
RL = 7.1Ω, VGS = 5V
RGS = 2.5Ω
- - 110 ns
-10- ns
-65- ns
-23- ns
-18- ns
- - 60 ns
VGS = 0 to 10V VDD = 80V
VGS = 0 to 5V - 67 80 nC
ID = 7A,
RL = 11.4Ω
- 125 150 nC
VGS = 0 to 1V - 3.7 4.5 nC
VDS = 25V, VGS = 0V
f = 1MHz
- 360 - pF
-70- pF
-20- pF
- - 3.15
TO-251 and TO-252 Package - - 100
o
C/W
o
C/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t
2
SD
rr
ISD = 7A - - 1.5 V
ISD = 7A, dISD/dt = 100A/µs - - 130 ns
RFD7N10LE, RFD7N10LESM
Typical Performance Curves Unless Otherwise Specified
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
0
25 50 75 100
125
150
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
1
0.5
0.2
0.1
0.1
0.05
NORMALIZED
0.02
θJC,
0.01
Z
THERMAL IMPEDANCE
0.01
-5
10
SINGLE PULSE
-4
10
-3
10
t, RECTANGULAR PULSE DURATION (s)
8
6
4
, DRAIN CURRENT (A)
2
D
I
1750
0
25 50 75 100
125 150
175
TC, CASE TEMPERATURE (oC)
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
P
DM
t
1
t
θJC
2
X R
θJC
2
+ T
C
1
10
NOTES:
DUTY FACTOR: D = t1/t
PEAK TJ = PDM X Z
-2
10
-1
10
0
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
20
14
10
1
, DRAIN CURRENT (A)
D
I
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
TC = 25oC
0.1
J
V
DSS
MAX = 100V
T
= MAX RATED
1 10 200
VDS, DRAIN TO SOURCE VOLTAGE (V)
100µs
1ms
10ms
20
14
VGS = 5V
10
, PEAK CURRENT (A)
I
FOR TEMPERATURES
ABOVE 25
CURRENT AS FOLLOWS:
DM
I = I
5
-3
10
10
25
-2
o
C DERATE PEAK
175 - T
(
10
C
150
-1
10
t, PULSE WIDTH (ms)
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
)
1
0
10
10
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY
3
2
10
4
3
10