intersil PX3511D DATA SHEET

®

PX3511D

Data Sheet February 26, 2007

Advanced Synchronous Rectified Buck
MOSFET Driver with Protection Features

The PX3511D is high frequency MOSFET driver specifically
designed to drive upper and lower power N-Channel
MOSFETs in a synchronous rectified buck converter
topology. This driver combined with the PX3511D Digital
Multi-Phase Buck PWM controller and N-Channel MOSFETs
forms a complete core-voltage regulator solution for
advanced microprocessors.

The PX3511D drives both upper and lower gates over a
range of 4.5V to 13.2V. This drive-voltage provides the
flexibility necessary to optimize applications involving trade­offs between gate charge and conduction losses.

An advanced adaptive zero shoot-through protection is
integrated to prevent both the upper and lower MOSFETs
from conducting simultaneously and to minimize the dead
time. The PX3511D includes an overvoltage protection
feature operational before VCC exceeds its turn-on
threshold, at which the PHASE node is connected to the
gate of the low side MOSFET (LGATE). The output voltage
of the converter is then limited by the threshold of the low
side MOSFET, which provides some protection to the
microprocessor if the upper MOSFET(s) is shorted.

The PX3511D also features an input that recognizes a high­impedance state, working together with Intersil multi-phase
PWM controllers to prevent negative transients on the
controlled output voltage when operation is suspended. This
feature eliminates the need for the schottky diode that may
be utilized in a power system to protect the load from
negative output voltage damage.

FN6463.0

Features

• Dual MOSFET Drives for Synchronous Rectified Bridge

• Pin-to-pin Compatible with ISL6596

• Advanced Adaptive Zero Shoot-Through Protection

- Body Diode Detection

- Auto-zero of r

Conduction Offset Effect

DS(ON)

• Adjustable Gate Voltage for Optimal Efficiency

• 36V Internal Bootstrap Schottky Diode

• Bootstrap Capacitor Overcharging Prevention

• Supports High Switching Frequency (up to 2MHz)

- 3A Sinking Current Capability

- Fast Rise/Fall Times and Low Propagation Delays

• Optimized for 3.3V PWM Input

• Three-State PWM Input for Output Stage Shutdown

• Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement

• Pre-POR Overvoltage Protection

• VCC Undervoltage Protection

• Expandable Bottom Copper Pad for Enhanced Heat
Sinking

• Dual Flat No-Lead (DFN) Package

- Near Chip-Scale Package Footprint; Improves PCB

Efficiency and Thinner in Profile

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

Ordering Information

TEMP.

PART NUMBER

(Note)

PX3511DDDG-RA 11DD 0 to +85 10 Ld 3x3 DFN

NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.

PART

MARKING

RANGE

(°C)

1

PACKAGE

(Pb-free)

Tape and Reel

PKG.

DWG. #

L10.3X3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

• Optimized for POL DC/DC Converters for IBA Systems

• Core Regulators for Intel® and AMD® Microprocessors

• High Current DC/DC Converters

• High Frequency and High Efficiency VRM and VRD

Related Literature

Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”

Technical Brief TB389 “PCB Land Pattern Design and
Surface Mount Guidelines for QFN (MLFP) Packages”

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Copyright Intersil Americas Inc. 2006. All Rights Reserved

PX3511D

Pinouts

Block Diagram

VCC

PWM

+5V

13.6K

6.4K

UVCC

Pre-POR OVP

FEATURES

POR/

CONTROL

LOGIC

UGATE

BOOT

N/C

PWM

GND

PX3511D

(10 LD 3x3 DFN)

TOP VIEW

1

2

GND

3

4

5

PX3511D

SHOOT-

THROUGH

PROTECTION

10

9
8
7

6

PHASE
PVCC

N/C
VCC

LGATE

(LVCC)

BOOT

UGATE

PHASE

PVCC

UVCC = PVCC FOR PX3511D

LGATE

PAD

GND

FOR DFN DEVICES, THE PAD ON THE BOTTOM SIDE OF
THE PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND.

2

FN6463.0

February 26, 2007

Typical Application - 4 Channel Converter Using ISL6595 and PX3511D Gate Drivers

+12V

+5V

3

+3.3V

VDD

ISL6595

VID4
VID3
VID2
VID1

FROM µP

TO µP

FAULT

OUTPUTS

February 26, 2007

FN6463.0

I2C I/F

BUS

VID0
VID5
LL0
LL1
OUTEN

VCC_PWRGD

RESET_N

FAULT1

FAULT2

SDA

SCL
SADDR

V12_SEN

GND

OUT1

OUT2

ISEN1

OUT3
OUT4

ISEN2

OUT5

OUT6

ISEN3

OUT7

OUT8

ISEN4

OUT9

OUT10

ISEN5

ISEN5

OUT11

OUT12

ISEN6

TEMP_SEN

CAL_CUR_EN

CAL_CUR_SEN

VSENP
VSENN

1

UGATE

2

BOOT

3

PWM

4

GND

1

UGATE

2

BOOT

3

PWM

4

GND

1

UGATE

2

BOOT

3

PWM

4

GND

1

UGATE

2

BOOT

3

PWM

4

GND

PX3511D

PHASE

LGATE

PX3511D

PHASE

LGATE

PX3511D

PHASE

LGATE

PX3511D

PHASE

LGATE

PVCC

VCC

PVCC

VCC

PVCC

VCC

PVCC

VCC

8

7

6

5

8

7

6

5

PX3511D

Vout

8

7

6

5

RTN

8

7

6

5

RTHERM