intersil PX3511A, PX3511B DATA SHEET

®

PX3511A, PX3511B

Data Sheet February 26, 2007

Advanced Synchronous Rectified Buck
MOSFET Drivers with Protection Features

The PX3511A and PX3511B are high frequency MOSFET
drivers specifically designed to drive upper and lower power
N-Channel MOSFETs in a synchronous rectified buck
converter topology. These drivers combined with the
ISL6595 Digital Multi-Phase Buck PWM controller and
N-Channel MOSFETs form a complete core-voltage
regulator solution for advanced microprocessors.

The PX3511A drives the upper gate to 12V, while the lower
gate can be independently driven over a range from 5V to
12V . The PX3511B drives both upper and lower gates over a
range of 5V to 12V. This drive-voltage provides the flexibility
necessary to optimize applications involving trade-offs
between gate charge and conduction losses.

An adaptive zero shoot-through protection is integrated to
prevent both the upper and lower MOSFETs from conducting
simultaneously and to minimize the dead time. These
products add an overvoltage protection feature operational
before VCC exceeds its turn-on threshold, at which the
PHASE node is connected to the gate of the low side
MOSFET (LGATE). The output voltage of the converter is
then limited by the threshold of the low side MOSFET , which
provides some protection to the microprocessor if the upper
MOSFET(s) is shorted during initial start-up.

These drivers also feature a three-state PWM input which,
working together with Intersil’s multi-phase PWM controllers,
prevents a negative transient on the output voltage when the
output is shut down. This feature eliminates the Schottky
diode that is used in some systems for protecting the load
from reversed output voltage events.

FN6462.0

Features

• Dual MOSFET Drives for Synchronous Rectified Bridge

• Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency

• 36V Internal Bootstrap Schottky Diode

• Bootstrap Capacitor Overcharging Prevention

• Supports High Switching Frequency (up to 2MHz)

- 3A Sinking Current Capability

- Fast Rise/Fall Times and Low Propagation Delays

• Three-State PWM Input for Output Stage Shutdown

• Three-State PWM Input Hysteresis for Applications With
Power Sequencing Requirement

• Pre-POR Overvoltage Protection

• VCC Undervoltage Protection

• Expandable Bottom Copper Pad for Enhanced Heat
Sinking

• Dual Flat No-Lead (DFN) Package

- Near Chip-Scale Package Footprint; Improves PCB

Efficiency and Thinner in Profile

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Core Regulators for Intel® and AMD® Microprocessors

• High Current DC/DC Converters

• High Frequency and High Efficiency VRM and VRD

Related Literature

• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”

• Technical Brief TB417 for Power Train Design, Layout
Guidelines, and Feedback Compensation Design

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Copyright Intersil Americas Inc. 2006. All Rights Reserved

PX3511A, PX3511B

Ordering Information

PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. #

PX3511ADAG (Note) PX3511 ADAG 0 to +85 8 Ld SOIC (Pb-free) M8.15
PX3511ADAG-R3 (Note) PX3511 ADAG 0 to +85 8 Ld SOIC (Pb-free) Tape and Reel M8.15
PX3511ADDG 11AD 0 to +85 10 Ld 3x3 DFN L10.3x3
PX3511ADDG-RA 11AD 0 to +85 10 Ld 3x3 DFN Tape and Reel L10.3x3
PX3511BDAG (Note) PX351 BDAG 0 to +85 8 Ld SOIC (Pb-free) M8.15
PX3511BDAG-R3 (Note) PX3511 BDAG 0 to +85 8 Ld SOIC (Pb-free) Tape and Reel M8.15
PX3511BDDG 11BD 0 to +85 10 Ld 3x3 DFN L10.3x3
PX3511BDDG-RA 11BD 0 to +85 10 Ld 3x3 DFN Tape and Reel L10.3x3

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

Pinouts

PX3511ACB, PX3511BCB

UGATE

BOOT

PWM

GND

Block Diagram

(8 LD SOIC)

TOP VIEW

1
2
3
4

VCC

PWM

+5V

10K

8K

8

PHASE

7

PVCC

6

VCC

5

LGATE

UVCC

Pre-POR OVP

FEATURES

POR/

CONTROL

LOGIC

PX3511A AND PX3511B

SHOOT-

THROUGH

PROTECTION

PX3511ACR, PX3511BCR

CRDL

UGATE

BOOT

USB

N/C

PPR

PWM

CHG

GND

NTC or OVP

or EN

(LVCC)

(10 LD 3x3 DFN)

TOP VIEW

1

2

3

4

5

BOOT

UGATE

PHASE

PVCC

UVCC = VCC FOR PX3511A
UVCC = PVCC FOR PX3511B

LGATE

10

9

8

7

6

BAT

PHASE
PVCC

ICDL
GND

N/C
VCC

USBP
IUSB

LGATE

GND

PAD

2

FOR DFN -DEVICES, THE PAD ON THE BOTTOM SIDE OF
THE PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND.

FN6462.0

February 26, 2007

Typical Application - 4 Channel Converter Using ISL6595 and PX3511A Gate Drivers

+12V

+5V

3

+3.3V

VDD

ISL6595

VID4
VID3
VID2
VID1

FROM µP

TO µP

FAULT

OUTPUTS

February 26, 2007

FN6462.0

I2C I/F

BUS

VID0
VID5
LL0
LL1
OUTEN

VCC_PWRGD

RESET_N

FAULT1

FAULT2

SDA

SCL
SADDR

V12_SEN

GND

OUT1

OUT2

ISEN1

OUT3
OUT4

ISEN2

OUT5

OUT6

ISEN3

OUT7

OUT8

ISEN4

OUT9

OUT10

ISEN5

ISEN5

OUT11

OUT12

ISEN6

TEMP_SEN

CAL_CUR_EN

CAL_CUR_SEN

VSENP
VSENN

1

UGATE

2

BOOT

3

PWM

4

GND

1

UGATE

2

BOOT

3

PWM

4

GND

1

UGATE

2

BOOT

3

PWM

4

GND

1

UGATE

2

BOOT

3

PWM

4

GND

PX3511

PHASE

LGATE

PX3511

PHASE

LGATE

PX3511

PHASE

LGATE

PX3511

PHASE

LGATE

PVCC

VCC

PVCC

VCC

PVCC

VCC

PVCC

VCC

8

7

6

5

8

7

6

5

Vout

8

7

6

5

RTN

8

7

6

5

RTHERM

PX3511A, PX3511B