®
ISL98012
Data Sheet October 15, 2008
1.8V Input PWM Step-Up Regulator
The ISL98012 is a high frequency, high efficiency step-up
DC/DC regulator operated in fixed frequency PWM mode.
With an integrated 1.4A MOSFET , it can deliver up to 600mA
output current at up to 92% efficiency. The adjustable
switching frequency is up to 750kHz, making it ideal for
common boost applications.
When shut down, it draws <1µA of current. This feature,
along with the minimum starting voltage of 1.8V, makes it
suitable for portable equipment powered by 1 Lithium Ion, 3
to 4 NiMH cells, or 2 cells of alkaline battery.
The ISL98012 is available in a 10 Ld MSOP package, with a
maximum height of 1.1mm. With proper external
components, the whole converter takes less than 0.25in
2
PCB space.
This device is specified for operation over the full -40°C to
+85°C temperature range.
Pinout
ISL98012
(10 LD MSOP)
TOP VIEW
PGND
1
SGND
2
RT
3
EN
4
5 6
LX
10
VDD
9
FB
8
SS
7
LBOLBI
FN6654.0
Features
• Up to 92% Efficiency
• Up to 600mA I
•4.5V < V
•1.8V < V
< 17V
OUT
< 13.2V
IN
OUT
• Up to 750kHz Adjustable Frequency
• <1µA Shutdown Current
• Adjustable Soft-Start
• Low Battery Detection
• Internal Thermal Protection
• 1.1mm Max Height 10 Ld MSOP Package
• Pb-Free (RoHS compliant)
Applications
• 1.8V to 15V Converters - OLED
• 5V to 12V Converters
• 3V to 5V and 3V to 12V Converters
•TFT-LCD
• Portable Equipment
Ordering Information
PART NUMBER
(Note)
ISL98012IUZ 98012 10 Ld MSOP MDP0043
PART
MARKING
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL98012IUZ-T* 98012 10 Ld MSOP MDP0043
ISL98012IUZ-TK* 98012 10 Ld MSOP MDP0043
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
Typical Application
V
(1.8V TO 9V)
IN
1.8V TO 12V
EN
C
10µF
1
R
3
56kΩ
ISL98012
L
1
10µH
1
PGND
SGND
2
RT
3
EN
4
LBI
5 6
LX
VDD
FB
SS
LBO
D
1
R
4
5k
10
9
8
C
3
7
20nF
C
4
0.1µF
C
5
22µF
R
2
113kΩ
R
1
10kΩ 4.7nF
C
V
OUT
(15V UP TO
200mA)
10
2
FN6654.0
October 15, 2008
ISL98012
Absolute Maximum Ratings (T
FB, SS, RT, . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, 6.5V
LX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, +18V
VDD, EN, LBI, LBO . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V, +12V
= +25°C) Thermal Information
A
Thermal Resistance (Typical, Note 1) θ
10 Lead MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
(°C/W)
JA
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Maximum Operating Conditions
Maximum Operating Frequency. . . . . . . . . . . . . . . . . . . . . . .750kHz
Minimum Operating Frequency . . . . . . . . . . . . . . . . . . . . . . .380kHz
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
Operating Junction Temperature: . . . . . . . . . . . . . . . . . . . . .+135°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
NOTE:
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
1. θ
JA
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T
.
Electrical Specifications V
IN
= 5V, V
= TC = T
J
= 12V, L = 10µH, I
OUT
A
= 0mA, RT = 56kΩ, TA = +25°C, Unless Otherwise Specified.
OUT
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
V
IN
OUT
Input Voltage Range R4 must ensure VDD ≤ 12V 1.8 13.2 V
Output Voltage Range Note 2 4.5 17 V
IQ1 Quiescent Current - Shut-down VEN = 0, feedback resistors disconnected 1 µA
IQ2 Quiescent Current V
V
FB
I
FB
D
MAX
I
LIM
I
EN
V
LBI
V
OL-LBO
I
LEAK-LBO
R
DS(ON)
I
LEAK-SWITCH
ΔV
/ΔVIN/V
OUT
ΔV
OUT/VOUT
I
Soft Start Current 0 < VSS< 0.1V 12 µA
SS
V
RT
f
OSC1
Feedback Voltage 1.29 1.33 1.37 V
Feedback Input Bias Current 0 < V
Maximum Duty Cycle 89.5 92 %
Current Limit - Max Peak Input Current 1 1.4 A
Enable Input Bias Current 1µA
LBI Threshold Voltage 180 220 250 mV
LBO Output Low I
LBO Output Leakage Current V
Switch On Resistance At 12V output 220 mΩ
Switch Leakage Current LX = 18V 1 µA
Line Regulation 3V < V
OUT
Load Regulation I
Voltage at RT for Bias Current RT = 56kΩ 1.34 V
Switching Frequency RT = 56kΩ 600 670 750 kHz
= 2V, Continuous operation 1.4 2 mA
EN
< 1.5V 0.10 µA
FB
= 1mA 0.1 0.2 V
LBO
= 250mV, V
LBI
< 6V, V
IN
= 50mA to 150mA 1 %
OUT
= 5V 0.02 2 µA
LBO
= 12V, no load 0.4 %/V
OUT
VHI_EN EN Input High Threshold 1.6 V
VLO_EN EN Input Low Threshold 0.5 V
NOTE:
2. Minimum V
of 4.5V is tested with V
OUT
IN
= 1.8V.
3
FN6654.0
October 15, 2008
ISL98012
Pin Descriptions
PIN NUMBER PIN NAME PIN FUNCTION
1 PGND Power ground; connected to the source of internal N-Channel power MOSFET
2 SGND Signal ground; ground reference for all the control circuitry; needs to have only a single connection to PGND
3 RT Timing resistor to adjust the oscillation frequency of the converter. Resistor value on RT pin determines
frequency. Range varies from R
= 49.9kΩ for 750kHz and RT = 100kΩ for 380kHz
T
4 EN Chip enable; connects to logic HI (>1.6V) for chip to function
5 LBI Low battery input; connects to a sensing voltage, or connect to GND if function is not used
6 LBO Low battery detection output; connected to the open drain of a MOSFET; able to sink 1mA current
7 SS Soft-start; connects to a capacitor to control the start-up of the converter. During start-up, V
current limit and hence the in-rush current.
8 FB Voltage feedback input; needs to connect to resistor divider to decide V
O
9 VDD Control circuit positive supply
10 LX Inductor drive pin; connected to the drain of internal N-Channel power MOSFET
Block Diagram
= 15V
V
10kΩ
4.7nF
113k
5kΩ
OUT
0.1µF
22µF
10µA
controls the
SS
V
IN
10µF
56kΩ
R
EN
LBO
LBI
T
REFERENCE
GENERATOR
+
220mV
FB V
MAX_DUTY
V
V
RAMP
REF
PWM
COMPARATOR
OSCILLATOR
START-UP
DD
THERMAL
SHUT-DOWN
PWM
LOGIC
-
+
I
LOUT
SGND PGNDSS
7.2kΩ
LX
0.2Ω
12µA
80mΩ
20nF
4
FN6654.0
October 15, 2008
Typical Performance Curves
90
80
V
IN
@ 1.8V
ISL98012
92
90
88
86
V
@ 3.3V
IN
70
EFFICIENCY (%)
60
0 50 100 150 200 250 300
FIGURE 1. EFFICIENCY vs I
94
92
90
88
86
84
EFFICIENCY (%)
82
80
78
0 100 200 300 400 500 600
FIGURE 3. EFFICIENCY vs I
I
OUT
I
OUT
(mA)
(mA)
OUT
OUT
, V
84
EFFICIENCY (%)
82
80
0 100 200 300 400 500 600 700
, VO = 15V FIGURE 2. EFFICIENCY vs I
1.6
V
= 10V, VO = 12V TO 17V
DD
CONTINUOUS MODE
1.5
1.4
1.3
(mA)
1.2
DD
I
1.1
1.0
0.9
300 400 500 600 700 800
= 5V, VO = 12V FIGURE 4. IDD vs F
IN
I
(mA)
OUT
OUT
FREQUENCY (kHz)
, V
= 3.3V, VO = 5V
IN
S
DD
RT = 51.1kΩ
RT = 71.5kΩ
RT = 100kΩ
RT = 200kΩ
(V)
DD
750
(kHz)
S
F
200
0
56 9 12
710811
V
FIGURE 5. FS vs V
5
80
70
60
50
FREQUENCY (kHz)
40
30
40 60 80 100 120
R (kΩ)
FIGURE 6. FS vs R
V
= 10V
DD
T
FN6654.0
October 15, 2008
Typical Performance Curves (Continued)
ISL98012
OUTPUT RIPPLE
INPUT RIPPLE
LX
ILX
FIGURE 7. STEADY STA TE OPERA TION (INDUCTOR
DISCONTINUOUS CONDUCTION), V
V
= 15V, IO < 1mA
O
ΔV
IN
V
LX
= 3.3V,
IN
50mV/DIV
10V/DIV
OUTPUT RIPPLE
INPUT RIPPLE
LX
ILX
FIGURE 8. STEADY STA TE OPERA TION (INDUCTOR
ΔV
CONTINUOUS CONDUCTION), V
V
= 15V, IO = 30mA
O
IN
V
LX
= 3.3V,
IN
50mV/DIV
10V/DIV
ΔV
O
I
L
1.0µs/DIV
FIGURE 9. STEADY STA TE OPERA TION (INDUCTOR
DISCONTINUOUS CONDUCTION), V
V
= 12V, IO = 30mA
O
ILX
FIGURE 11. POWER-UP, V
= 3.3V, VO = 15V, IO = 30mA FIGURE 12. POWER-UP, V
IN
20mV/DIV
0.5A/DIV
= 5V,
IN
ΔV
O
I
L
1.0µs/DIV
20mV/DIV
0.5A/DIV
FIGURE 10. STEADY STA TE OPERA TION (INDUCTOR
ΔV
CONTINUOUS CONDUCTION), V
V
= 12V, IO = 300mA
O
IN
V
O
I
L
0.5ms/DIV
= 5V, VO = 12V, IO = 300mA
IN
IN
= 5V,
2V/DIV
5V/DIV
0.5A/DIV
6
FN6654.0
October 15, 2008
Typical Performance Curves (Continued)
ISL98012
OUTPUT LOAD CURRENT
FIGURE 13. LOAD TRANSIENT RESPONSE 10mA TO 30mA,
V
= 1.8V, FREQ = 56.2k, VO = 15V,
IN
I
= 10mA TO 30mA
O
10mV/DIV
I
O
ΔV
O
0.2ms/DIV
FIGURE 14. LOAD TRANSIENT RESPONSE, V
V
= 12V, IO = 50mA TO 300mA
O
10mV/DIV
IN
100mA/DIV
0.5V/DIV
= 5V ,
FIGURE 15. OUTPUT RIPPLE, V
= 1.8V, VO = 15V, IO = 30mA FIGURE 16. OUTPUT RIPPLE, V
IN
Applications Information
The ISL98012 is a fixed frequency step-up pulse-width
modulation (PWM) regulator. The input voltage range is 1.8V
to 13.2V and output voltage range is 4.5V to 17V. The
switching frequency (up to 750kHz) is decided by the
resistor connected to RT pin.
Start-Up
During start-up, as VDD reaches a threshold of about 1.6V, a
start-up oscillator generates a fixed duty-ratio of 0.5 to 0.7 at
a frequency of several hundred kHz. This will boost the
output voltage.
When V
over control. The duty ratio will be decided by the least of the
multiple-input direct summing comparator, the Max_Duty
signal (about 92% duty-ratio), or the Current Limit
Comparator.
reaches about 3.7V, the PWM comparator takes
DD
7
= 3.3V, VO = 15V, IO = 30mA
IN
Soft-start is provided by ramping up the current limit
comparator. An internal 12µA current source charges the
external CSS capacitor. The peak MOSFET current is limited
by the voltage on this capacitor. This in turn controls the
rising rate of the output voltage.
The regulator goes through the same start-up sequence as
well after the EN signal is pulled to HI.
Steady-State Operation
When the output reaches the preset voltage, the reg ulator
operates in steady state. Depending on the i nput/output
conditions and component values, the inductor operates in
either continuous-conduction mode or discontinuous-conduction
mode.
In continuous-conduction mode, inductor current is a
triangular waveform and LX voltage a pulse waveform. In
discontinuous-conduction mode, inductor current has
FN6654.0
October 15, 2008
)
ISL98012
completely dried out before the MOSFET is turned on again.
The input voltage source, the inductor, and the MOSFET and
output diode parasitic capacitors form a resonant circuit.
Oscillation will occur in this period. This oscillation is normal
and will not affect regulation.
At very low load, the MOSFET will skip pulses sometimes;
this is normal.
Current Limit
The MOSFET current limit is nominally 1.4A and guaranteed
1A. This restricts the maximum output current I
OMAX
based
on Equation 1:
V
ΔI
L
I
OMAX
⎛⎞
1
–
⎝⎠
--------
IN
---------
×=
2
V
O
(EQ. 1
where:
• ΔIL is the inductor peak-to-peak current ripple and is
decided by Equation 2:
V
D
ΔI
L
×=
L
f
S
IN
---- -
---------
(EQ. 2)
• D is the MOSFET turn-on ratio and is decided by
Equation 3:
–
V
OVIN
----------------------- -
D
=
V
O
is the switching frequency
•f
S
(EQ. 3)
Table1 gives typical values:
TABLE 1. MAX CONTINUOUS OUTPUT CURRENTS
V
IN
(V)
2 5 10 750 360
2 9 10 750 190
2 12 10 750 140
3.3 5 10 750 600
3.3 9 10 750 310
3.3 12 10 750 230
5 9 10 750 470
5 12 10 750 340
9 12 10 750 630
12 15 10 750 670
V
(V)
O
L
(µH)
f
S
(kHz)
I
OMAX
(mA)
Component Considerations
It is recommended that CIN is larger than 10µF.
Theoretically, the input capacitor has a ripple current of ΔI
Due to high-frequency noise in the circuit, the input current
ripple may exceed the theoretical value. A larger capacitor
will reduce the ripple further.
L
The inductor has peak and average current decided by
Equations 4 and 5:
I
LPKILAVG
=
-------------
1D–
I
LAVG
L
--------
+=
2
I
O
(EQ. 4)
(EQ. 5)
ΔI
The inductor should be chosen to handle this current.
Furthermore, due to fixed internal compensation, it is
recommended that maximum inductance of 10µH and 15µH
be used in the 5V and 12V or higher output voltage,
respectively.
The output diode has an average current of I
and peak
O
current is the same as the inductor's peak current. A
Schottky diode is recommended and it should be able to
handle those current s .
The output voltage ripple can be calculated as Equation 6:
ΔV
O
IOD×
----------------------
×
F
SCO
I
LPK
ESR×+=
(EQ. 6)
Where:
•C
is the output capacitance.
O
• The ESR is the output capacitor ESR value.
Low ESR capacitors should be used to minimize output
voltage ripple. Multilayer ceramic capacitors (X5R and X7R)
are preferred for output capacitors since they have a low
ESR and small packages. Tantalum capacitors also can be
used, but they take more board space and have higher ESR.
A minimum of 22µF output capacitor is sufficient for high
output current application. For lower output current, the
output capacitor can be smaller, like 4.7µF. The capacitor
should always have enough voltage rating. In addition to the
voltage rating, the output capacitor should also be able to
handle the RMS current, which is given by Equation 7:
I
CORMS
⎛
1( D) D
⎜
×
– I
⎜
⎝
------------------- -
+
I
LAVG
2
ΔI
L
⎞
1
⎟
------
×=
×
2
12
LAVG
⎟
⎠
(EQ. 7)
Output Voltage
An external resistor divider is required to divide the output
voltage down to the nominal reference voltage. The current
drawn by the resistor network should be limited to maintain
the overall converter efficiency. The maximum value of the
resistor network is limited by the feedback input bias current
and the potential for noise being coupled into the feedback
pin. A resistor network less than 300kΩ is recommended.
.
8
FN6654.0
October 15, 2008
ISL98012
The boost converter output voltage is determined by the
relationship in Equation 8:
V
OUTVFB
where V
2
-------
1
+
×=
⎜⎟
R
⎝⎠
1
slightly changes with VDD.
FB
(EQ. 8)
R
⎛⎞
RC Filter
The maximum voltage rating for the VDD pin is 12V. An RC
filter is recommended to clean the output ripple before
bootstrapping the part. For bootstrapped applications with
V
greater than 10V, R4 can drop V
OUT
for coupling into
OUT
the VDD pin and is given by Equation 9:
VO10–
-------------------- -
R
=
4
I
DD
where I
is shown in the IDD vs fS curve. Otherwise, R4
DD
can be 10Ω to 51Ω with C
= 0.1µF.
4
(EQ. 9)
Thermal Performance
The ISL98012 uses a fused-lead package, which has a
reduced θ
+115°C/W on a two-layer board. Maximizing copper around
the ground pins will improve the thermal performance.
of +100°C/W on a four-layer board and
JA
Layout Considerations
The layout is very important for the converter to function
properly. power ground ( ) and signal ground ( ) should
be separated to ensure that the high pulse current in the
power ground never interferes with the sensitive signals
connected to signal ground. They should only be connected
at one point.
The trace connected to pin 8 (FB) is the most sensitive trace.
It needs to be as short as possible and in a “quiet” place,
preferably between PGND or SGND traces.
In addition, the bypass capacitor connected to the VDD pin
needs to be as close to the pin as possible.
The heat of the chip is mainly dissipated through the SGND
pin. Maximizing the copper area around it is preferable. In
addition, a solid ground plane is always helpful for the EMI
performance.
The demo board is a good example of layout based on these
principles. Please refer to the ISL98012 Technical Brief for
the layout. http://www.intersil.com/data/tb/tb429.pdf
This chip also has internal thermal shut-down set at around
+135°C to protect the component.
9
FN6654.0
October 15, 2008
Mini SO Package Family (MSOP)
M
C
SEATING
PLANE
0.10 C
N LEADS
c
0.25 C A B
E1E
B
e
L1
SEE DETAIL "X"
D
N
1
b
A
(N/2)+1
PIN #1
I.D.
(N/2)
H
M
0.08 C A B
A
ISL98012
MDP0043
MINI SO PACKAGE FAMILY
SYMBOL
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
2. Plastic interlead protrusions of 0.25mm maximum per side are
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
MILLIMETERS
TOLERANCE NOTESMSOP8 MSOP10
A1.101.10 Max. A1 0.10 0.10 ±0.05 A2 0.86 0.86 ±0.09 -
b 0.33 0.23 +0.07/-0.08 -
c0.180.18 ±0.05 -
D 3.00 3.00 ±0.10 1, 3
E4.904.90 ±0.15 E1 3.00 3.00 ±0.10 2, 3
e0.650.50 Basic -
L0.550.55 ±0.15 -
L1 0.95 0.95 Basic -
N 8 10 Reference -
Rev. D 2/07
included.
not included.
A2
GAUGE
A1
L
DETAIL X
PLANE
3¬¨¬®¬
0.25
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
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notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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For information regarding Intersil Corporation and its products, see www.intersil.com
10
FN6654.0
October 15, 2008
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