intersil ISL97519A DATA SHEET

®

ISL97519A

Data Sheet June 30, 2008

600kHz/1.2MHz PWM Step-Up Regulator

The ISL97519A is a high frequency, high efficiency step-up
voltage regulator operated at constant frequency PWM
mode. With an internal 2.0A, 200mΩ MOSFET, it can deliver
up to 1A output current at over 90% efficiency. Two
selectable frequencies, 600kHz and 1.2MHz, allow trade offs
between smaller components and faster transient response.
An external compensation pin gives the user greater
flexibility in setting frequency compensation allowing the use
of low ESR Ceramic output capacitors.

When shut down, it draws <1µA of current and can operate
down to 2.3V input supply. These features along with

1.2MHz switching frequency makes it an ideal device for
portable equipment and TFT-LCD displays.

The ISL97519A is available in an 8 Ld MSOP package with a
maximum height of 1.1mm. The device is specified for
operation over the full -40°C to +85°C temperature range.

Pinout

ISL97519A

(8 LD MSOP)

TOP VIEW

COMP SS

1

FB FSEL

2

EN VDD

3

GND LX

4

8

7

6

5

FN6683.2

Features

• >90% Efficiency

• 2.0A, 200mΩ Power MOSFET

• 2.3V to 5.5V Input

• Up to 25V Output

• 600kHz/1.2MHz Switching Frequency Selection

• Adjustable Soft-Start

• Internal Thermal Protection

• 1.1mm Max Height 8 Ld MSOP Package

• Pb-Free (RoHS compliant)

• Halogen Free

Applications

• TFT-LCD displays

• DSL modems

• PCMCIA cards

• Digital cameras

• GSM/CDMA phones

• Portable equipment

• Handheld devices

Ordering Information

PART

NUMBER

(Note)

ISL97519AIUZ 7519A 8 Ld MSOP MDP0043
ISL97519AIUZ-T* 7519A 8 Ld MSOP MDP0043
ISL97519AIUZ-TK* 7519A 8 Ld MSOP MDP0043
*Please refer to TB347 for details on reel specifications.

NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.

PART

MARKING

PACKAGE

(Pb-Free)

PKG.

DWG. #

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Copyright Intersil Americas Inc. 2008. All Rights Reserved

ISL97519A

Absolute Maximum Ratings (T

LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27V

V

to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6V

DD

COMP, FB, EN, SS, FSEL to GND . . . . . . . . . -0.3V to (V

= +25°C) Thermal Information

A

Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Operating Ambient Temperature . . . . . . . . . . . . . . . .-40°C to +85°C

DD

+0.3V)

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . .+135°C

Power Dissipation . . . . . . . . . . . . . . . . . . . . . See Curves on page 5

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = T

Electrical Specifications V

= 3.3V, V

IN

OUT

= 12V, I

A

= 0mA, FSEL = GND, TA = -40°C to +85°C unless otherwise specified.

OUT

Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature
limits established by characterization and are not production tested.

PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT

IQ1 Quiescent Current - Shutdown EN = 0V 1 5 µA
IQ2 Quiescent Current - Not Switching EN = V
IQ3 Quiescent Current - Switching EN = V

V

FB

I

B-FB

V

DD

D

-600kHz Maximum Duty Cycle FSEL = 0V 85 92 %

MAX

D

-1.2MHz Maximum Duty Cycle FSEL = V

MAX

I

LIM1

I

LIM2

I

EN

r

DS(ON)

I

LX-LEAK

ΔV

/ΔVINLine Regulation 3V < VIN < 5.5V, V

OUT

/ΔI

ΔV

OUT

F

OSC1

F

OSC2

V

IL

V

IH

G

M

V

DD-ON

HYS V

I

SS

-en Minimum Soft-Start Enable Voltage 40 65 150 mV

V

SS

ILIM-V

SS

Feedback Voltage 1.228 1.24 1.252 V
Feedback Input Bias Current 0.01 0.5 µA
Input Voltage Range 2.3 5.5 V

Current Limit - Max Peak Input Current VDD < 2.8V 1.0 A
Current Limit - Max Peak Input Current VDD > 2.8V 1.5 2.0 A
Shutdown Input Bias Current EN = 0V 0.01 0.5 µA
Switch ON-Resistance VDD = 2.7V, ILX = 1A 0.2 Ω
Switch Leakage Current VSW = 27V 0.01 3 µA

Load Regulation VIN = 3.3V, V

OUT

Switching Frequency Accuracy FSEL = 0V 500 620 740 kHz
Switching Frequency Accuracy FSEL = V
EN, FSEL Input Low Level 0.5 V
EN, FSEL Input High Level 1.5 V
Error Amp Tranconductance ΔI = 5µA 70 130 150 1µ/Ω
VDD UVLO On Threshold 1.95 2.1 2.25 V

UVLO Hysteresis 140 mV

DD

Soft-Start Charge Current 2 3 4 µA

-en Current Limit Around SS Enable V SS = 200mV 300 350 400 mA

, FB = 1.3V 0.7 mA

DD

, FB = 1.0V 3 4.5 mA

DD

DD

= 12V 0.2 %

OUT

= 12V , IO = 30mA to 200mA 0.3 %

OUT

DD

85 90 %

1000 1250 1500 kHz

OTP Over-Temperature Protection 150 °C

2

FN6683.2

June 30, 2008

Block Diagram

ISL97519A

EN SS

SHUTDOWN

AND START -UP

CONTROL

VDD

REFERENCE
GENERATOR

COMPARATOR

COMP

FSEL

OSCILLATOR

CURRENT

SENSE

GM

AMPLIFIER

PWM LOGIC

CONTROLLER

Pin Descriptions

PIN NUMBER PIN NAME DESCRIPTION

FET

DRIVER

LX

GND

FB

1 COMP Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground.
2 FB Voltage feedback pin. Internal reference is 1.24V nominal. Connect a resistor divider from V

V
3 EN Shutdown control pin. Pull EN low to turn off the device.
4 GND Analog and power ground.
5 LX Power switch pin. Connected to the drain of the internal power MOSFET.
6 VDD Analog power supply input pin.
7 FSEL Frequency select pin. When FSEL is set low, switching frequency is set to 620kHz. When connected to

high or VDD, switching frequency is set to 1.25MHz.
8 SS Soft-start control pin. Connect a capacitor to control the converter start-up.

Typical Application Circuit

R

3

1kΩ

C

4.7nF

5

OPEN

= 1.24V (1 + R1/R2). See “Typical Application Circuit” on page 3.

OUT

1

COMP

85.2kΩR

1

R

C

5

10kΩ

2

S1

FB

2

EN

3

GND

4

SS

FSEL

VDD

LX

8

7

6

5

C

4

27nF

C

2

0.1µF

+

C

1

22µF

10µH

D

1

2.3V TO 5.5V

C

+

3

22µF

12V

OUT

.

3

FN6683.2

June 30, 2008

Typical Performance Curves

95

90

85

80

VIN = 5V, VO = 12V, fs = 620 kHz

75

EFFICIENCY (%)

VIN = 5V, VO = 9V, fs = 620 kHz

70

65

60

0 200 400 600 800 1000

FIGURE 1. BOOST EFFICIENCY vs I

VIN = 5V, VO = 12V, fs = 1.25 MHz

VIN = 5V, VO = 9V, fs = 1.25MHz

(mA)

I

OUT

OUT

ISL97519A

92
90
88
86
84
82

EFFICIENCY (%)

80
78
76
74

VIN = 3.3V, VO = 12V,

= 620kHz

f

s

0 100 200 300 400 500

VIN = 3.3V, VO = 12V,

fs = 1.25MHz

I

OUT

VIN = 3.3V, VO = 9V,
f

= 620kHz

s

VIN = 3.3V, VO = 9V,

= 1.25MHz

f

s

(mA)

FIGURE 2. BOOST EFFICIENCY vs I

OUT

0.9
VIN = 5V, VO = 12V,

0.8
fs = 1.25MHz

0.7

0.6

0.5

0.4

0.3

0.2

LOAD REGULATION (%)

0.1

0

0 200 400 600 800 1000

VIN = 5V, VO = 12V,

= 620kHz

f

s

I

OUT

VIN = 5V, VO = 9V,

= 1.25MHz

f

s

VIN = 5V, VO = 9V,

= 620kHz

f

s

(mA)

FIGURE 3. LOAD REGULATION vs I

0.6

VO = 9V, IO = 80mA

0.5
= 1.25MHz

f

s

0.4

0.3

VO = 12V, IO = 80mA
f

= 1.25MHz

0.2

s

VO = 9V, IO = 100mA

f

= 620kHz

s

OUT

0.7
VIN = 3.3V, VO = 12V,

0.6

0.5

0.4

0.3

0.2

LOAD REGULATION (%)

0.1

= 1.25MHz

f

s

0

0 100 200 300 400 500

FIGURE 4. LOAD REGULATION vs I

VO = 12V

VIN = 3.3V

VIN = 3.3V, VO = 9V,

fs = 1.25MHz

VIN = 3.3, VO = 9V ,

fs = 620kHz

VIN = 3.3, VO = 12V,

= 620kHz

f

s

I

(mA)

OUT

f

= 600kHz

s

OUT

I

= 50mA TO 300mA

O

0.1

LINE REGULATION (%)

0

-0.1
2

FIGURE 5. LINE REGULATION vs V

VO = 12V, IO = 80mA

= 620kHz

f

s

3 4 5 6

V

(V)

IN

IN

4

FIGURE 6. TRANSIENT RESPONSE

FN6683.2

June 30, 2008

Typical Performance Curves (Continued)

I

= 50mA to 300mA

O

VO = 12V

ISL97519A

VIN = 3.3V

f

= 1.2MHz

s

FIGURE 7. TRANSIENT RESPONSE FIGURE 8. SS DELAY AND LX DELAY DURING EN = VDD

START- UP

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD

1.0

0.9
870mW

0.8

0.7

0.6

0.5

0.4

0.3

0.2

POWER DISSIPATION (W)

0.1

0

0 255075100125

AMBIENT TEMPERATURE (°C)

M

θ

S

J

O

A

=

P

+

8

1

1

5

°

C

/

W

85

JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD

0.6

0.5
486mW

0.4

0.3

0.2

0.1

POWER DISSIPATION (W)

0.0

0 25 50 75 100 125

AMBIENT TEMPERATURE (°C)

M

θ

S

J

O

A

=

P

8

+

2

0

6

°

C

/

W

85

FIGURE 9. PACKAGE POWER DISSIPA TION vs AMBIENT

TEMPERATURE

Applications Information

The ISL97519A is a high frequency, high efficiency boost
regulator operated at constant frequency PWM mode. The
boost converter stores energy from an input voltage source
and delivers it to a higher output voltage. The input voltage
range is 2.3V to 5.5V and output voltage range is 5V to 25V.
The switching frequency is selectable between 600kHz and

1.2MHz allowing smaller inductors and faster transient
response. An external compensation pin gives the user
greater flexibility in setting output transient response and
tighter load regulation. The converter soft-start characteristic
can also be controlled by external C
allows the user to completely shutdown the device.

Boost Converter Operations

Figure 11 shows a boost converter with all the key
components. In steady state operating and continuous
conduction mode where the inductor current is continuous,

5

capacitor. The EN pin

SS

FIGURE 10. PACKAGE POWER DISSIPA TION vs AMBIENT

TEMPERATURE

the boost converter operates in two cycles. During the first
cycle, as shown in Figure 12, the internal power FET turns
on and the Schottky diode is reverse biased and cuts off the
current flow to the output. The output current is supplied
from the output capacitor. The voltage across the inductor is
V

and the inductor current ramps up in a rate of VIN/L, L is

IN

the inductance. The inductance is magnetized and energy is
stored in the inductor. The change in inductor current is
shown in Equation 1:

V

IN

ΔT1

D

------------

F

SW

I

OUT

----------------

C

OUT

---------

×=

L

×=

ΔT

1

(EQ. 1)

FN6683.2

June 30, 2008

ΔI

ΔT1

D Duty Cycle=

ΔV

L1

=

O

ISL97519A

During the second cycle, the power FET turns off and the
Schottky diode is forward biased, (see Figure 13). The
energy stored in the inductor is pumped to the output
supplying output current and charging the output capacitor.
The Schottky diode side of the inductor is clamped to a
Schottky diode above the output voltage. So the voltage
drop across the inductor is V

IN

- V

OUT

. The change in
inductor current during the second cycle is shown in
Equation 2:

–

V

INVOUT

=

1D–

-------------

F

SW

------------------------------- -

×=

L

(EQ. 2)

ΔILΔT2

ΔT2

For stable operation, the same amount of energy stored in
the inductor must be taken out. The change in inductor
current during the two cycles must be the same as shown in
Equation 3.

ΔI1 ΔI2+ 0=

D

------------

F

SW

V

OUT

--------------- -

V

IN

V

---------

=

IN

L

1

-------------

1D–

V

1D–

-------------

------------------------------- -

×+× 0=

F

SW

–

INVOUT

L

(EQ. 3)

LD

V

IN

ΔV

C

OUT

O

C

IN

ISL97519A

I

ΔT

L

2

ΔI

L2

V

OUT

FIGURE 13. BOOST CONVERTER - CYCLE 2, POWER

SWITCH OPEN

Output Voltage

An external feedback resistor divider is required to divide the
output voltage down to the nominal 1.24V reference voltage.
The current drawn by the resistor network should be limited
to maintain the overall converter efficiency. The maximum
value of the resistor network is limited by the feedback input
bias current and the potential for noise being coupled into
the feedback pin. A resistor network less than 100k is
recommended. The boost converter output voltage is
determined by the relationship in Equation 4:

R

⎛⎞

1

V

OUTVFB

-------

1

+

×=

⎜⎟

R

⎝⎠

2

The nominal VFB voltage is 1.24V.

(EQ. 4)

LD

LD

V

V

IN

IN

C

C

IN

IN

ISL97519A

C

C

OUT

OUT

FIGURE 11. BOOST CONVERTER

L

V

IN

C

IN

ISL97519A

I

L

ΔT

ΔV

O

1

C

OUT

ΔI

L1

FIGURE 12. BOOST CONVERTER - CYCLE 1, POWER

SWITCH CLOSE

V

V

V

OUT

OUT

OUT

Inductor Selection

The inductor selection determines the output ripple voltage,
transient response, output current capability, and efficiency.
Its selection depends on the input voltage, output voltage,
switching frequency, and maximum output current. For most
applications, the inductance should be in the range of 2µH to
33µH. The inductor maximum DC current specification must
be greater than the peak inductor current required by the
regulator.The peak inductor current can be calculated in
Equation 5:

I

L PEAK()

I

×

OUTVOUT

------------------------------------

V

IN

V

INVOUTVIN

-----------------------------------------------------

12⁄

×+= (EQ. 5)

LV

OUT

–()×

FREQ××

Output Capacitor

Low ESR capacitors should be used to minimized the output
voltage ripple. Multi-layer ceramic capacitors (X5R and X7R)
are preferred for the output capacitors because of their lower
ESR and small packages. Tantalum capacitors with higher
ESR can also be used. The output ripple can be calculated
as shown in Equation 6:

I

D×

ΔV

O

×

F

SWCO

I

OUT

ESR×+=

OUT

---------------------------

For noise sensitive application, a 0.1µF placed in parallel
with the larger output capacitor is recommended to reduce
the switching noise coupled from the LX switching node.

(EQ. 6)

6

FN6683.2

June 30, 2008

ISL97519A

Schottky Diode

In selecting the Schottky diode, the reverse break down
voltage, forward current and forward voltage drop must be
considered for optimum converter performance. The diode
must be rated to handle 2.0A, the current limit of the
ISL97519A. The breakdown voltage must exceed the
maximum output voltage. Low forward voltage drop, low
leakage current, and fast reverse recovery will help the
converter to achieve the maximum efficiency.

Input Capacitor

The value of the input capacitor depends the input and
output voltages, the maximum output current, the inductor
value and the noise allowed to put back on the input line. For
most applications, a minimum 10µF is required. For
applications that run close to the maximum output current
limit, input capacitor in the range of 22µF to 47µF is
recommended.

The ISL97519A is powered from the VIN. A high frequency

0.1µF bypass capacitor is recommended to be close to the
VIN pin to reduce supply line noise and ensure stable
operation.

Loop Compensation

The ISL97519A incorporates a transconductance amplifier in
its feedback path to allow the user some adjustment on the
transient response and better regulation. The ISL97519A
uses current mode control architecture which has a fast
current sense loop and a slow voltage feedback loop. The
fast current feedback loop does not require any
compensation. The slow voltage loop must be compensated
for stable operation. The compensation network is a series
RC network from COMP pin to ground. The resistor sets the
high frequency integrator gain for fast transient response
and the capacitor sets the integrator zero to ensure loop
stability. For most applications, the compensation resistor in
the range of 0.5k to 7.5k and the compensation capacitor in
the range of 3nF to 10nF.

Soft-Start

During power-up, assuming EN is tied to VDD, as VDD rises
above VDD UVLO, the SS capacitor begins to charge up
with a constant 3µA current. During the time the part takes to
rise to 60mV the boost will not be enabled. Depending on
the value of the capacitor on the SS pin, this provides
sufficient (540µs for a 27nf capacitor or 2ms for a 100nf
capacitor) time for the passive in-rush current to settle down,
allowing the output capacitors to be charged to a diode drop
below VDD.

After the SS pin passes above the threshold beyond which
the part is enabled (60mV) the part begins to switch. The
linearly rising SS voltage, at a charge rate proportional to
3µA, has a direct effect on the current limit allowing the
current limit to linearly ramp-up to full current limit. SS
voltage of 200mV corresponds to a current limit around
350mA and 0.6V corresponds to full current limit.

The total soft-start time is calculated in Equation 7:

Css 0.6V×

------------------------------

t

==

ss

3μ A

Css 2 10××

5

(EQ. 7)

The full current is available after the soft-start period is
finished. The soft-start capacitor should be selected to be big
enough that it doesn't reach 0.6V before the output voltage
reaches the final value.

When the ISL97519A is disabled, the soft-start capacitor will
be discharged to ground.

Frequency Selection

The ISL97519A switching frequency can be user selected to
operate at either constant 620kHz or 1.25MHz. Connecting
F

pin to ground sets the PWM switching frequency to

SEL

620kHz. When connecting F

high or VDD, the switching

SEL

frequency is set to 1.25MHz.

Shutdown Control

When the EN pin is pulled down, the ISL97519A is shutdown
reducing the supply current to <1µA.

Maximum Output Current

The MOSFET current limit is nominally 2.0A and guaranteed

1.5A when V
maximum output current, I

I

LIL-AVG

where:

= MOSFET current limit

I

L

I

L-AVG

ΔIL = inductor ripple current

V

IN

------------------------------------------------------------------------------

=

ΔI

L

V

= Schottky diode forward voltage, typically, 0.6V

DIODE

FS = switching frequency, 600kHz or 1.2MHz

=

I

L-AVG

D = MOSFET turn-on ratio:

D1

--------------------------------------------

–=

V

Table 1 gives typical maximum I
switching frequency and 10µH inductor.

is greater than 2.8V. This restricts the

DD

12⁄ΔIL×()+=

, based on Equation 8:

OMAX

= average inductor current

VOV

+()VIN–[]×

( V

LV

I

OUT

-------------

1D–

OUTVDIODE

DIODE

DIODE

) FS×+×

values for 1.2MHz

OUT

O

V

IN

+

(EQ. 8)

(EQ. 9)

(EQ. 10)

(EQ. 11)

7

FN6683.2

June 30, 2008

ISL97519A

TABLE 1. TYPICAL MAXIMUM I

V

(V) V

IN

3.3 5 1150

3.3 9 655

3.3 12 500
5 9 990
5 12 750

(V) I

OUT

OUT

VALUES

OMAX

(mA)

Cascaded MOSFET Application

A 25V N-Channel MOSFET is integrated in the boost
regulator. For applications where the output voltage is
greater than 25V, an external cascaded MOSFET is needed
as shown in Figure 14. The voltage rating of the external
MOSFET should be greater than A

V

IN

LX

INTERSIL

ISL97519A

FB

VDD

.

A

VDD

DC PATH BLOCK APPLICATION

Note that there is a DC path in the boost converter from the
input to the output through the inductor and diode. The input
voltage will be seen at the output less a forward voltage drop
of the diode before the part is enabled. If this direct
connection is not desired, the following circuit can be
inserted between input and inductor to disconnect the DC
path when the part is disabled (see Figure 15).

TO INDUCTOR

EN

FIGURE 15. CIRCUIT TO DISCONNECT THE DC PA TH OF

BOOST CONVERTER

INPUT

FIGURE 14. CASCADED MOSFET TOPOLOGY FOR HIGH

OUTPUT VOLTAGE APPLICATIONS

8

FN6683.2

June 30, 2008

Mini SO Package Family (MSOP)

M

C

SEATING
PLANE

0.10 C

N LEADS

c

0.25 C A B

E1E

B

e

L1

SEE DETAIL "X"

D

N

1

b

A

(N/2)+1

PIN #1
I.D.

(N/2)

H

M

0.08 C A B

A

ISL97519A

MDP0043

MINI SO PACKAGE FAMILY

SYMBOL

NOTES:

1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.

2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.

MILLIMETERS

TOLERANCE NOTESMSOP8 MSOP10

A1.101.10 Max. ­A1 0.10 0.10 ±0.05 ­A2 0.86 0.86 ±0.09 -

b 0.33 0.23 +0.07/-0.08 -

c0.180.18 ±0.05 ­D 3.00 3.00 ±0.10 1, 3
E4.904.90 ±0.15 -

E1 3.00 3.00 ±0.10 2, 3

e0.650.50 Basic ­L0.550.55 ±0.15 -

L1 0.95 0.95 Basic -

N 8 10 Reference -

Rev. D 2/07

A2

GAUGE

A1

L

DETAIL X

PLANE

3¬¨Ðó

0.25

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implicat ion or oth erwise u nde r any p a tent or p at ent r ights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

9

FN6683.2

June 30, 2008