intersil ISL6753 DATA SHEET
®
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ISL6753
Data Sheet April 4, 2006 FN9182.2
ZVS Full-Bridge PWM Controller
The ISL6753 is a high-performance, low-pin-count
alternative, zero-voltage switching (ZVS) full-bridge PWM
controller. Like the ISL6551, it achieves ZVS operation by
driving the upper bridge FETs at a fixed 50% duty cycle while
the lower bridge FETS are trailing-edge modulated with
adjustable resonant switching delays. Compared to the more
familiar phase-shifted control method, this algorithm offers
equivalent efficiency and improved overcurrent and lightload performance with less complexity in a lower pin count
package.
This advanced BiCMOS design features low operating
current, adjustable oscillator frequency up to 2MHz,
adjustable soft-start, internal over temperature protection,
precision deadtime and resonant delay control, and short
propagation delays. Additionally, Multi-Pulse Suppression
ensures alternating output pulses at low duty cycles where
pulse skipping may occur.
Ordering Information
PART
NUMBER
ISL6753AAZA
(See Note)
Add -T suffix to part number for tape and reel packaging
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
PART
MARKING
ISL6753AAZ -40 to 105 16 Ld QSOP
TEMP.
RANGE (°C) PACKAGE
(Pb-free)
PKG.
DWG. #
M16.15A
Pinout
ISL6753 (QSOP)
TOP VIEW
Features
• Adjustable Resonant Delay for ZVS Operation
• Voltage- or Current-Mode Operation
• 3% Current Limit Threshold
• 175µA Startup Current
• Supply UVLO
• Adjustable Deadtime Control
• Adjustable Soft-Start
• Adjustable Oscillator Frequency Up to 2MHz
• Tight Tolerance Error Amplifier Reference Over Line,
Load, and Temperature
• 5MHz GBWP Error Amplifier
• Adjustable Cycle-by-Cycle Peak Current Limit
• Fast Current Sense to Output Delay
• 70ns Leading Edge Blanking
• Multi-Pulse Suppression
• Buffered Oscillator Sawtooth Output
• Internal Over Temperature Protection
• Pb-Free Plus Anneal Available and ELV, WEEE,
RoHS Compliant
Applications
• ZVS Full-Bridge Converters
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
1
VERR VREF
2
CTBUF
3
RTD
RESDEL
4
5
CT
6
FB
7
RAMP
89
CS GND
1
16
15
14
13
12
11
10
SS
VDD
OUTLL
OUTLR
OUTUL
OUTUR
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
Functional Block Diagram
www.BDTIC.com/Intersil
VDD
UVLO
OVER-
TEMPERATURE
2
PROTECTION
VREF
PWM
STEERING
LOGIC
50%
PWM
VDD
OUTUL
OUTUR
OUTLL
OUTLR
GND
VREF
RESDEL
CT
RTD
CTBUF
SS
OSCILLATOR
VREF
+
-
OVER CURRENT
COMPARATOR
+
-
PWM
COMPARATOR
SOFTSTART
CONTROL
1.00V
0.33
80mV
70 nS
LEADING
EDGE
BLANKING
VREF
1 mA
CS
RAMP
ISL6753
VERR
+
0.6V
-
FB
April 4, 2006
FN9182.2
Typical Application - High Voltage Input ZVS Full-Bridge Converter
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P1
VIN+
+
+
3
P2
VIN-
300 - 400
VDC
+ +
BIAS
C1-C4
33uF
450V
1
BAV70
Q11
MJD50
0.1uF
R1
4.7k
5%
2512
R2
4.7k
5%
2512
R3
4.7k
5%
2512
32
31
CR1
100k
1206
R4
4.7k
5%
2512
2
1
3
BAT54C
1
3
2
C5
VR1
BZX84-C12
P8205
R5
CR2
Q1
FQB6N50
3
Q6
BSS138LT1
R13
10.0k
Q4
FQB6N50
78
T2
R7A, B
3
1
1
2
R14
CR3
4.99
SS12
0805
Q10
ZXTDB2M832
7,8
1
2
4
3
Q8
ZXTDB2M832
5,6
R11
3.65k
R8
45.3k
R6
5.11k
18.7
0805
R9
499
C6
180pF
5% COG
10.0k
R10
47pF
C7
T3
P0544
5
7,8
1
2
4
3
5,6
U1
ISL6753
VERR VREF
CTBUF
RTD
OUTLL
RESDEL
CT
OUTLR
OUTUL
FB1
OUTUR
RAMP
CS GND
R12
20.0k
C8
1.0nF
0.1uF
VDD
634
8
1
C13
SS
0.47uF
CR4
SS12
7,8
1
2
4
3
5,6
C12
1.0uF
C10
C9
0.1uF
Q5
BSS138LT1
ZXTDB2M832
R17
10.0
Q2
FQB6N50
3
1
R15
4.99
0805
Q9
C11
0.1uF
2
1
3
ZXTDB2M832
R29
20.0k
R16
10.0k
15, 16
T1
2, 3
13, 14
Np
11, 12
6, 7
9, 10
7,8
2
Q3
C22
FQB6N50
4
5,6
Q7
20.0k
4700pF
250VAC
SAFETY
R30
C17
R18
100pF
10
250V
5%
COG
2512
221,C
Ns
CR5
CSD10060G
CR6
CSD10060G
Ns
C23
4700pF
250VAC
SAFETY
100pF
250V
COG
L1
PB2020.103
1,C
C16
R19
10
2512
100V
1210
C18
1uF
100V
1210
+
+
C20
C19
470uF
1uF
C21
470uF
63V
63V
10.0k
2512
P4
RETURN
R28
P3
+ Vout
(48V@10A)
ISL6753
R27
10.0k
C15
220pF
0805
R26
10.0k
0805
R24
100k
R23
1.10k
4
3
U2
PS2701-1P
1
2
R20
499
VR2
BZX84-C6V8
3.74k
1206
3.74k
1206
R25
R21
R22
37.4k
0805
CR7
BAT54
31
2
C14
4.7nF
3
1
1
U3
2
3
April 4, 2006
FN9182.2
ISL6753
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Absolute Maximum Ratings Thermal Information
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
OUTxxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.0V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1A
ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .3000V
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . .1000V
REF
+ 0.3V
Thermal Resistance (Typical) θ
16 Lead QSOP (Note 1). . . . . . . . . . . . . . . . . . . . . . 95
Maximum Junction Temperature . . . . . . . . . . . . . . . . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(QSOP- Lead Tips Only)
Operating Conditions
Temperature Range
ISL6753AAxx . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . 9-16 VDC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
1. θ
JA
2. All voltages are with respect to GND.
JA
(°C/W)
Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0kΩ, CT = 470pF, T
= 25°C
T
A
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
SUPPLY VOLTAGE
Supply Voltage --20-
Start-Up Current, IDD VDD = 5.0V - 175 400 µA
, C
Operating Current, IDD R
UVLO START Threshold 8.00 8.75 9.00 V
UVLO STOP Threshold 6.50 7.00 7.50 V
Hysteresis -1.75- V
REFERENCE VOLTAGE
Overall Accuracy I
Long Term Stability T
Operational Current (source) -10 - - mA
Operational Current (sink) 5 - - mA
Current Limit VREF = 4.85V -15 - -100 mA
CURRENT SENSE
Current Limit Threshold VERR = VREF 0.97 1.00 1.03 V
CS to OUT Delay Excl. LEB (Note 4) - 35 50 ns
Leading Edge Blanking (LEB) Duration (Note 4) 50 70 100 ns
CS to OUT Delay + LEB T
CS Sink Current Device Impedance V
Input Bias Current V
RAMP
RAMP Sink Current Device Impedance V
RAMP to PWM Comparator Offset T
LOAD
= 0 - -10mA 4.850 5.000 5.150 V
VREF
= 125°C, 1000 hours (Note 4) - 3 - mV
A
= 25°C - - 130 ns
A
= 1.1V - - 20 Ω
CS
= 0.3V -1.0 - 1.0 µA
CS
RAMP
= 25°C 658095mV
A
= 0 - 11.0 15.5 mA
OUT
= 1.1V - - 20 Ω
= -40°C to 105°C (Note 3), Typical values are at
A
4
FN9182.2
April 4, 2006
ISL6753
www.BDTIC.com/Intersil
Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0kΩ, CT = 470pF, T
T
= 25°C (Continued)
A
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Bias Current V
Clamp Voltage (Note 4) 6.5 - 8.0 V
PULSE WIDTH MODULATOR
Minimum Duty Cycle VERR < 0.6V - - 0 %
Maximum Duty Cycle (per half-cycle) VERR = 4.20V, V
Zero Duty Cycle VERR Voltage 0.85 - 1.20 V
VERR to PWM Comparator Input Offset T
VERR to PWM Comparator Input Gain 0.31 0.33 0.35 V/V
Common Mode (CM) Input Range (Note 4) 0 - V
ERROR AMPLIFIER
Input Common Mode (CM) Range (Note 4) 0 - VREF V
GBWP (Note 4) 5 - - MHz
VERR VOL I
VERR VOH I
VERR Pull-Up Current Source VERR = 2.5V 0.8 1.0 1.3 mA
EA Reference T
EA Reference + EA Input Offset Voltage 0.590 0.600 0.612 V
OSCILLATOR
Frequency Accuracy, Overall (Note 4) 165 183 201 kHz
Frequency Variation with VDD T
Temperature Stability VDD = 10V, |F
Charge Current T
Discharge Current Gain 19 20 23 µA/µA
CT Valley Voltage Static Threshold 0.75 0.80 0.88 V
CT Peak Voltage Static Threshold 2.75 2.80 2.88 V
CT Pk-Pk Voltage Static Value 1.92 2.00 2.05 V
RTD Voltage 1.97 2.00 2.03 V
RESDEL Voltage Range 0 - 2 V
CTBUF Gain (V
CTBUF Offset from GND V
CTBUF VOH ∆V(I
CTBUFp-p/VCTp-p
)V
= 0.3V -5.0 - -2.0 µA
RAMP
= 0V,
20V
-40°C
|/F
= 0mA, I
RAMP
- - F
25°C
LOAD
10V
- F
)/F
10V
|/F
0°C
= -2mA),
0°C
= 0V (Note 5) - 94 - %
V
CS
RTD = 2.00kΩ, CT = 220pF - 97 - %
RTD = 2.00kΩ, CT = 470pF - 99 - %
= 25°C 0.7 0.8 0.9 V
A
= 2mA - - 0.4 V
LOAD
= 0mA 4.20 - - V
LOAD
= 25°C 0.594 0.600 0.606 V
A
= 25°C, (F
A
- F
|F
0°C
(Note 4)
V
105°C
= 25°C -193 -200 -207 µA
A
= 0.8V, 2.6V 1.95 2.0 2.05 V/V
CT
= 0.8V 0.34 0.40 0.44 V
CT
LOAD
= 2.6V
CT
= -40°C to 105°C (Note 3), Typical values are at
A
SS
-10 - +10 %
-0.31.7%
-4.5- %
-1.5- %
- - 0.10 V
V
5
FN9182.2
April 4, 2006
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