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ISL6752
DATA SHEET
16 pgs668.17 Kb0

intersil ISL6752 DATA SHEET

®
N
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数据资料
兼有可调性的同步整流控制及 ZVS 全桥式电流模式
主要特点
April 2005 FN9181.1
ISL6752
PWM 控制器
ISL6752 是高性能, 少引脚的零电压 (ZVS)全桥式脉冲宽度 (PWM)控制器。与 Intersil 的 ISL6551 相似, 通过上层开关启 动于固定的 50%占空比, 下层开关调整脉冲宽度于后沿, 它能 实现ZVS 运行。与熟悉的相位位移控制方法(Phase-Shifted) 比较, 这个方法用较少数目引脚的包装, 相应简单地提供同等 的效率性能以及改善的过流保护和轻载性能。
ISL6752 为同步整流控制具备互补 PWM 输出端。利用外部 控制电压, 这些互补的输出端可以动态地被前置或者延迟。
这个先进的 BiCMOS 设计不但兼容了精确的死区时间控制以 及共振延迟控制, 而且具有一个可调振荡器其频率高达 2MHz。另外, 当跳脉冲可能发生的情况下, 多相脉冲抑制能在 低工作周期时保证相应的输出脉冲。
定购资料
零件号码 温度范围
(°C)
ISL6752AAZA
(Note)
Add -T suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
-40 to 105
包装 包装图号 #
16 Ld QSOP
(Pb-free)
M16.15A
• ZVS 运行可调共振延迟
• 延迟/前置可调的同步整流控制输出
• 电流摸式控制
• 3%限流临界
• 可调死区时间控制
• 175µA 启动电流
• 输入电源欠压切断保护
• 可调振荡频率高达 2MHz
• 内部过温保护
• 缓冲振荡锯齿输出
• 快电流传感延迟
• 可调周期性峰值限流电流
• 70ns 上升沿消隐
多脉冲抑制
•
• 不含铅 (RoHS Compliant)
• ELV, WEEE, and RoHS Compliant
应用
• ZVS 全桥转换器
• 电信和信息电源
• 无线基站电源
• 档案服务器电源
• 工业动力系统
插脚引线
ISL6752 (QSOP)
顶视图
1
VADJ
VREF
2
VERR
3
CTBUF
4
RTD
5
RESDEL
6
CT
7
CS
8
16
15
14
13
12
11
10
9
VDD
OUTLL
OUTLR
OUTUL
OUTUR
OUTL LN
OUTLR
GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143|Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners
Copyright © Intersil Americas Inc. 2005. All Rights Reserved
www.BDTIC.com/Intersil
内部电路结构
VDD
TEM PERATUR E
UVLO
OVER-
PROTECTION
VREF
ISL6752
STEERING
LO GIC
PW M
50%
PW M
DELAY/
ADVANCE
TIMING
CONTRO L
VDD
OUTUL
OUTUR
OUTLL
OUTLR
GND
VRE F
RESDEL
CT
RTD
CTBUF
OSCILLATOR
+
-
OVERCURRENT
COMPARATO R
+
-
PWM
COMPARATO R
1.00V
0.33
80m V
70ns
L EADING
EDGE
BLANKING
VREF
1mA
OUTLL N
OUTLRN
VADJ
CS
VERR
2
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典型应用电路 – 高压输入原边控制 ZVS 全桥转换器
VIN+
VIN-
400 VDC
Q8A
Q8B
Q1
+
C1
R1
Q6A
Q6B
Q4
CR1
T2
R2
R3
R4
Q11
VDD
C2
VR1
R5
R6
CR2
C8
R19
R8
R20
R7
C3
C4
C17
R21
Q10A
Q10B
T3
VADJ VDD
VREF
VERR
CTBUF
RTD
RESDEL
CT
CS GND
R23
R22
C10
ISL6752
OUTLLN
OUTLRN
U1
C16
OUTLL
OUTLR
OUTUL
OUTUR
ISL6752
CR3
Q2
Q5A
R11R10
Q5B
C9
T1
R12
Q9A
Q9B
R13
Q3
Q7A
Q7B
EL7212 EL7212
C5
U5
R24
Q14
U2
C6
C13
R23
T4
CR4
R24
Q12
Q13
U4
C12
L1
C7
C15
R17
U3
+
R18
C14
C11
R15
+ Vout
RETURN
R16
R14
3
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典型应用电路 – 高压输入次边控制 ZVS 全桥转换器
VIN+
ISL6752
VIN-
400 VDC
SECONDARY BIAS SUPPLY
Q11A
Q11B
Q10A
Q10B
T3
1:1:1
T4
1:1:1
VADJ VDD
VREF
VERR
CTBUF
RTD
RESDEL
CT
CS GND
R5
Q2
Q6
CR3
R12
C10
C7
ISL6752
U1
OUTLL
OUTLR
OUTUL
OUTUR
OUTLLN
OUTLRN
Q12A
Q12B
Q9A
Q9B
CR5
R11
C9
Q3
Q8A
Q8B
C6
T1
Np:Ns:Ns=9:2:2
Np
R14
C11
Ns
Ns
Q13A
Q13B
Q14A
Q14B
R15
Q16
Q15
VREF
R22
R21
L1
C12
C16
C15
R18
U3
-
+
C18
C14
C13
+
R17
C17
Q17
R16
R20
R19
+ Vout
RETURN
Q1
Q5
CR2
R13
+
C1
Q4
Q7A
Q7B
T2
CR1
R1
C2
R2
R3
CR4
R10
C8
VREF
R8
R7
R9
R6
R4
C4
C5C3
4
ISL6752
www.BDTIC.com/Intersil
额定值
Supply Voltage, VDD ----------------GND - 0.3V to +20.0V OUTxxx ------------------------------------GND - 0.3V to VDD Signal Pins-------------------------GND - 0.3V to V
REF
+0.3V Peak GATE Current -----------------------------------------0.1A ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7)------3000V
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93)-------1000V
运行条件
热性能的资料
Thermal Resistance Junction to Ambient (Typical) θJA (oC/W) 16 Lead QSOP (Note 1)-------------------------------------105 Maximum Junction Temperature -------------------55 Maximum Storage Temperature Range-----------65 Maximum Lead Temperature (Soldering 10s)--------------300
o
C to 150oC
o
C to 150oC
o
C
(QSOP – Lead Tips Only)
Supply Voltage Range (Typical)------------------9V-16VDC Temperature Range ISL6752AAxx------------------------------ -40
o
C to 105oC
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied.
Notes:
1) θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for
details.
2) All voltages are with respect to GND.
Electrical Specifications
电气规范
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block Diagram and Typical Application Schematic.
9V < V
< 20V, RTD = 10.0kΩ, CT = 470pF, TA = -40oC to 105oC (Note 3), Typical values are at TA= 25oC.
DD
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
SUPPLY VOLTAGE
Supply Voltage - - 20 V
Start-Up Current, IDD V
Operating Current, IDD R
= 5.0V - 175 400
DD
, C
LOAD
=0 - 11.0 15.5 mA
OUT
µA
UVLO START Threshold 8.00 8.75 9.00 V
UVLO STOP Threshold 6.50 7.00 7.50 V
Hysteresis
- 1.75 - V
REFERENCE VOLTAGE
Overall Accuracy
I
VREF
= 0-10mA
4.850 5.000 5.150
V
Long Term Stability TA = 125oC, 1000 hours (Note 4) - 3 - mV
Operational Current (source) -10 - - mA
Operational Current (sink) 5 - - mA
Current Limit VREF = 4.85V -15 - -100 mA
CURRENT SENSE
Current Limit Threshold
VERR = VREF
0.97 1.00 1.03
V
CS to OUT Delay Excl. LEB (Note 4) - 35 50 ns
Leading Edge Blanking (LEB) Duration (Note 4) 50 70 100 ns
CS to OUT Delay + LEB TA = 25oC - - 130 ns
CS Sink Current Device Impedance VCS = 1.1V
Input Bias Current VCS = 0.3V
- - 20
-6.00 - -2.00
Ω
µA
5
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