intersil ISL6745 DATA SHEET
®
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PRELIMINARY
数据资料
精确的死区時間控制的桥型控制器
ISL6745是成本低、双端控制器。主要应用于全桥和半桥型拓
扑结构的电源和线调节的总线变换器。器件的主要特点是精
确的开关频率控制、可调软启动、和过流关断保护。另外，
ISL6745 可精确地调整MOSFET 不交迭的死区時間低至
35ns ，允許电源设计师优化开环总线变换器的效率。
ISL6745 还包括电压控制输入适合于闭环PWM控制和线压前
馈控制。
ISL6745的低启动和运作电流特点，使其在AC-DC和DC-DC
应用容易地偏压。
Data Sheet November 22, 2004 FN9161.3
主要特点
• 精确的占空比和死区時間控制
• 100µA 启动电流
• 可调延迟过流关断和重新启动
• 可调振荡器频率高至 2MHz
• 1A MOSFET 门极驱动器
• 可调软启动
• 内部过热保护
• 控制到输出的延迟是 35ns
• 体积小和极少的外部元件
• 输入欠压保护
• 不含 Pb 的包装
ISL6745
这先进的BiCMOS设计特点是可调开关频率高至1MHz，1A
FET驱动器，和非常低的传输延迟适合于过流快反应。
定购资料
零件号码 温度范围
ISL6745AU -40 to 105 10 Ld MSOP M10.118
ISL6745AUZ
(See Note)
Add -T suffix to part number for tape and reel packaging
NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb
and Pb-free soldering operations. Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020C.
(°C) 包装 包装图号 #
-40 to 105
10 Ld MSOP
(Pb-free)
M10.118
应用
• 半桥和全桥型拓扑结构的变换器
• 线调节的总线变换器
• AC-DC 电源
• 通信、信息和档案服务器的电源
插脚引线 (顶视图)
ISL6745 (MSOP)
SS 1
RTD
2
3
VE RR
4
CS
5
CT
10
9
8
7
6
VDD
VDDP
OU TB
OU TA
GN D
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143|Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
V
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GND
ISL6745
V
FL
V
V
DD
UVLO
+
-
INTERNAL
BG
OT SHUTDOWN
130 - 150 C
BIAS
5.00 V
BIAS
Q
T
Q
PWM TOGGLE
DDP
OUTA
OUTB
V
BIAS
70 uA
ON
V
BIAS
SS CLAMP
R
TD
I
RTD
V
BIAS
160 uA
ON
C
T
RTD
= 55 x I
DCH
I
CS
2.0 V
-
15 uA
PEAK
+
-
VALLEY
+
0.6 V
PWM COMPARATOR
C
T
+
-
-
SRQ
Q
RESET
DOMINANT
+
-
CLK
OC DETECT
2.8 V
0.8 V
I
DCH
ON
V
BIAS
-
+
4.0 V
50 µS
RETRIGGERABLE
ONE SHOT
SRQ
Q
PWM LATCH
SET
DOMINANT
+
SS CHARGED
-
SRQ
Q
OC LATCH
Q
Q
V
UV
BIAS
4.65V ↓ 4.80V ↑
+
-
3.9 V
SS LOW
FAULT LATCH
SET DOMINANT
SRQ
FL
Q
-
+
BG
+
SS
15 uA
0.27 V
-
SS
V
BIAS
V
ERR
0.8
SS
0.8
ISL6745 内部电路结构
2
ISL6745
电气规
范
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额定值 热性能的资料
bsolute Voltage Ratings
Supply Voltage, VDD----------------------GND-0.3V to +20V
OUTA, OUTB ------------------------------- GND -0.3V to V
Signal Pins------------------------------------- GND-0.3V to 5V
Peak GATE Current ------------------------------------------- 1A
ESD Classification
Human Body Model (Per JEDEC22 std. Method A114-B)---Class 2
Machine Model (Per JEDEC22 std. Method A115-A)---------Class A
Recommended Operating Conditions
运行条件
Supply Voltage Range (Typical) -------------------9-16VDC
Temperature Range
ISL6745AU--------------------------------- -40
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTES:
1) θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for
details.
2) All voltages are to be measured with respect to GND, unless otherwise specified.
o
C to 105oC
DD
Thermal Information
Thermal Resistance (Typical, Note 1) ---------- θJA (oC/W)
10 Lead MSOP ------------------------------------------------ 128
Maximum Junction Temperature ---------- -55
Maximum Storage Temperature Range - -65
Maximum Lead Temperature (Soldering 10s)------ 300
o
C to 150oC
o
C to 150oC
o
C
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block Diagram and Typical Application Schematic.
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
SUPPLY VOLTAGE
9V<V
<16V, RTD= 51.1KΩ, CT = 470pF, TA = -40oC to 105oC (Note 4), Typical values are at TA= 25oC.
DD
Start-Up Current, IDD V
Operating Current, IDD C
UVLO START Threshold 5.9 6.3 6.6 V
UVLO STOP Threshold
Hysteresis
CURRENT SENSE
Current Limit Threshold
CS to OUT Delay
CS Sink Current
Input Bias Current
PULSE WIDTH MODULATOR
Minimum Duty Cycle
Maximum Duty Cycle
V
to PWM Comparator Input
ERR
Gain
CT to PWM Comparator Input
Gain
SS to PWM Comparator Input
Gain
< START Threshold - - 175
DD
= 1nF - 5 8.5 mA
OUTA, B
(Note 4)
V
R < CT Offset
ERRO
CT = 470pF, RTD = 51.1KΩ
C
= 470pF, RTD = 1.1KΩ (Note 4)
T
(Note 4)
(Note 4)
5.3 5.7 6.3
- 0.6 -
0.55 0.6 0.65
- 35 -
8 10 -
-1 - 1
- - 0
- 94 -
- 99 -
- 0.8 -
- 1 -
- 0.8 -
µA
ns
mA
µA
V/V
V/V
V/V
V
V
V
%
%
%
OSCILLATOR
T
= 25oC
Charge Current
RTD Voltage
Discharge Current Gain
A
143 156 170
1.925 2 2.075
45 - 65
3
µA
V
µA/µA
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