intersil ISL6744 DATA SHEET

®

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Data Sheet September 22, 2005

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ISL6744

FN9147.8

Intermediate Bus PWM Controller

The ISL6744 is a low cost, primary side, double-ended controller intended for applications using full and half-bridge topologies for unregulated DC/DC converters. It is a voltagemode PWM controller designed for half-bridge and fullbridge power supplies. It provides precise control of switching frequency, adjustable soft-start, precise deadtime control with deadtimes as low as 35ns, and overcurrent shutdown.

Low start-up and operating currents allow for easy biasing in both AC/DC and DC/DC applications. This advanced BiCMOS design features low start-up and operating currents, adjustable switching frequency up to 1MHz, 1A FET drivers, and very low propagation delays for a fast response to overcurrent faults.

Ordering Information

TEMP.

PART NUMBER

ISL6744AU -40 to 105 8 Ld MSOP M8.118 ISL6744AUZ

(Note) ISL6744AB -40 to 105 8 Ld SOIC M8.15 ISL6744ABZ

(Note)

Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

RANGE (°C) PACKAGE

-40 to 105 8 Ld MSOP (Pb-free)

-40 to 105 8 Ld SOIC (Pb-free)

PKG.

DWG. #

M8.118

M8.15

Features

• Precision Duty Cycle and Deadtime Control

• 100µA Start-up Current

• Adjustable Delayed Overcurrent Shutdown and Restart

• Adjustable Oscillator Frequency Up to 2MHz

• 1A MOSFET Gate Drivers

• Adjustable Soft-Start

• Internal Over Temperature Protection

• 35ns Control to Output Propagation Delay

• Small Size and Minimal External Component Count

• Input Undervoltage Protection

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Telecom and Datacom Isolated Power

• DC Transformers

• Bus Converters

Pinout

ISL6744 (SOIC, MSOP)

TOP VIEW

SS

RTD

CS CT

1

2 3 4

8 7 6 5

VDD OUTB OUTA GND

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Internal Architecture

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V

DD

GND

2

BG

UVLO

+

INTERNAL

OT SHUTDOWN

130 - 150 C

V

BIAS

5.00 V

V

FL

V

BIAS

Q

T

Q

PWM TOGGLE

DD

OUTA

OUTB

V

BIAS

70uA

ON

V

BIAS

SS CLAMP

R

TD

I

RTD

V

BIAS

160 uA

ON

C

T

RTD

= 55 x I

DCH

I

CS

2.0 V

-

2.8 V

0.8 V

I

DCH

ON

PEAK

+

-

VALLEY

+

-

0.6 V

SRQ

Q

RESET DOMINANT

OC DETECT

CLK

+

4.0 V

50 µS

RETRIGGERABLE

ONE SHOT

SRQ

Q

PWM LATCH

SET DOMINANT

+

SS CHARGED

-

SRQ

Q

OC LATCH

Q

V

UV

BIAS

4.65V ↓ 4.80V ↑

+

-

3.9 V

FAULT LATCH

SET DOMINANT

SRQ

FL

Q

-

+

BG

+

-

SS

15 uA

ISL6744

0.27 VSS LOW

V

BIAS

September 22, 2005

C

T

FN9147.8

SS COMPARATOR

+

-

0.8

SS

Typical Application using ISL6744 - 48V Input DC Transformer, 12V @ 8A Output

www.BDTIC.com/Intersil

VIN+

L1

C2

3

C1

TP1

QH

L3

C13

R10

T2

SP1

QR1

T1

C11

QR3

R8

C9

L2

R9

+12V

C8

RTN

VIN-

R1

TP6

QR2

U1

ISL6744

R6

SS CS

C

T

R

TD

U4

ISL6700

V

DD

HB HO HS

QL

C14

CR1

TP4

LO

V

SS

LI

HI

TP5

D2

C15

R11

CR2

R5

GND OUTB OUTA V

DD

R2

CR3

C3

C7

C4

C5

R7

Q5

QR4

C18

C12

C10

TP2

ISL6744

September 22, 2005

D1

FN9147.8

C6

C16

R12

ISL6744

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Absolute Maximum Ratings Thermal Information

Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V

OUTA, OUTB. . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to V

Signal Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 5V

Peak GATE Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1A

ESD Classification

Human Body Model (Per MIL-STD-883 Method 3015.7) . . .2000V

Machine Model (Per EIAJ ED-4701 Method C-111). . . . . . . .100V

Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . .1000V

DD

Thermal Resistance (Typical, Note 1) θ

8 Lead MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128

8 Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Maximum Junction Temperature . . . . . . . . . . . . . . . .-55°C to 150°C

Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C

Operating Conditions

Temperature Range

ISL6744AU . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 105°C

Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . 9-16 VDC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

1. θ

JA

2. All voltages are to be measured with respect to GND, unless otherwise specified.

(°C/W)

JA

Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application

schematic. 9V < V

= 25°C

T

A

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

SUPPLY VOLTAGE

Start-Up Current, I Operating Current, I

UVLO START Threshold 5.9 6.3 6.6 V UVLO STOP Threshold 5.3 5.7 6.3 V Hysteresis -0.6- V

CURRENT SENSE

Current Limit Threshold 0.55 0.6 0.65 V CS to OUT Delay (Note 4) - 35 - ns CS Sink Current 810-mA Input Bias Current -1 - 1 μA

PULSE WIDTH MODULATOR

Minimum Duty Cycle V Maximum Duty Cycle C

to SS Comparator Input Gain (Note 4) - 1 - V/V

C

T

SS to SS Comparator Input Gain (Note 4) - 0.8 - V/V

DD

< 16V, RTD = 51.1kΩ, CT = 470pF, TA = -40°C to 105°C (Note 4), Typical values are at

D

VDD < START Threshold - - 175 μA R

, C

LOAD

C

OUTA,B

< CT Offset - - 0 %

ERROR

= 470pF, RTD = 51.1kΩ -94-%

T

= 470pF, RTD = 1.1kΩ (Note 4) - 99 - %

C

T

= 0 - 2.89 - mA

OUTA,B

= 1nF - 5 8.5 mA

4

FN9147.8

September 22, 2005

ISL6744

www.BDTIC.com/Intersil

Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application

schematic. 9V < V T

= 25°C (Continued)

A

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

OSCILLATOR

Charge Current 143 156 170 μA

Voltage 1.925 2 2.075 V

R

TD

Discharge Current Gain 45 - 65 μA/μA

Valley Voltage 0.75 0.8 0.85 V

C

T

Peak Voltage 2.70 2.80 2.90 V

C

T

SOFT-START

Charging Current 45 - 68 µA

SS Clamp Voltage 3.8 4.0 4.2 V Overcurrent Shutdown Threshold Voltage (Note 4) - 3.9 - V Overcurrent Discharge Current 12 15 23 μA Reset Threshold Voltage (Note 4) 0.25 0.27 0.30 V

OUTPUT

High Level Output Voltage (VOH) V

Low Level Output Voltage (VOL) I Rise Time C Fall Time C

THERMAL PROTECTION

Thermal Shutdown (Note 4) - 145 - °C Thermal Shutdown Clear (Note 4) - 130 - °C Hysteresis, Internal Protection (Note 4) - 15 - °C

NOTES:

3. Specifications at -40°C are guaranteed by design, not production tested.

4. Guaranteed by design, not 100% tested in production.

< 16V, RTD = 51.1kΩ, CT = 470pF, TA = -40°C to 105°C (Note 4), Typical values are at

D

- V

DD

I

OUT

= 100mA - 0.5 1.0 V

OUT

GATE GATE

or V

OUTA

= -100mA

= 1nF, VDD = 12V - 17 60 ns = 1nF, VDD = 12V - 20 60 ns

OUTB

,

-0.52.0V

5

FN9147.8

September 22, 2005

Typical Performance Curves

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65

ISL6744

1-10

4

60

55

50

45

CT DISCHARGE CURRENT GAIN

40

0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 RTD CURRENT (mA)

3

1-10

DEADTIME (ns)

100

10

CT =

1000pF

680pF 470pF

CT = 270pF

CT = 100pF

10 20 30 40 50 60 70 80 90 100

RTD (kΩ)

FIGURE 1. OSCILLATOR CT DISCHARGE CURRENT GAIN FIGURE 2. DEADTIME vs CAPACITANCE

600

500

400

300

200

100

OSCILLATOR FREQUENCY (kHz)

0 100 200 300 400 500 600 700 800 900 1000

CT (pF)

FIGURE 3. CAPACIT ANCE vs OSCILLA TOR FREQUENCY

1.03

1.02

1.01

1.00

0.99

0.98

0.97

0.96

NORMALIZED CHARGING CURRENT

0.95

-40 -25 -10 5 35 50 65 80 95 110

20

TEMPERATURE (°C)

FIGURE 4. CHARGE CURRENT vs TEMPERATURE

(RTD = 49.9kΩ)

1.07

1.06

1.05

1.04

1.03

1.02

1.01

1.00

NORMALIZED VOLTAGE

0.99

0.98 0 102030 5060708090100

40

RTD (kΩ)

FIGURE 5. TIMING CAPACITOR VOLTAGE vs RTD

6

FN9147.8

September 22, 2005