intersil ISL6742 DATA SHEET

®
數据資料
先進的雙端 PWM 控制器
主要特點
July 2005 FN9183.0
ISL6742
ISL6742是高性能雙端(PWM)控制器并具備先進的同步整流
控制以及限流臨界的特點。它能用于電流以及電壓模式控制
方法。
ISL6742為同步整流控制具備互補PWM輸出端。利用外部控
制電壓, 這些互補的輸出端可以動態地被前置或者延遲。
它的优秀的電流傳感電路使用取樣及保存的方法提供精确的
平均電流信號。适用于平均限流保護, 這种保護方法消除了峰
值限流方法的局限, 也适用于均流電路以及平均電流模式控
制。
這個先進的BiCMOS設計不但兼容了一個可調振蕩器其頻率
高達2MHz, 內部過溫保護, 精确的死區時間控制以及共振延遲
控制。另外, 當跳脈沖可能發生的情況下, 多相脈沖抑制能在
低工作周期時保證相應的輸出脈沖。
定購資料
零件號碼 溫度范圍
(°C)
ISL6742AAZA
(Note)
Add -T suffix to part number for tape and reel packaging.
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
-40 to 105
包裝 包装圖號 #
16 Ld QSOP
(Pb-free)
M16.15A
延遲/前置可調的同步整流控制輸出
可調平均電流信號
3%峰值限流臨界
快電流傳感延遲
可調振蕩頻率高達 2MHz
可調死區時間控制
電壓或電流模式控制
RAMP 以及 CS 分開輸入益于電壓前饋控制或者電
流模式控制
誤差放大器的參考電壓具備精确的容差遍及輸入、
負載和溫度范圍
175µA 啟動電流
輸入電源欠壓切斷保護
可調軟啟動
70ns 上升沿消隱
多脈沖抑制
內部過溫保護
不含鉛, 以及 ELV, WEEE, and RoHS Compliant
應用
半橋, 全橋, 正向交錯, 以及推挽轉換器
電信和信息電源
無線基站電源
檔案服務器電源
工業動力系統
插腳引線
ISL6742 (QSOP)
頂視圖
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners
Copyright © Intersil Americas Inc. 2005. All Rights Reserved
內部電路結构
VDD
TEMPERATURE
PROTECTION
GND
VREF
IOUT
UVLO
OVER-
ISL6742
VDD
OUTA
OUTB
VREF
SAMPLE
AND
HOLD
4X
PWM
STEERING
LOGIC
OVER CURRENT
+
-
COMPARATOR
1.00V
+70 nS
LEADING
EDGE
BLANKING
DELAY/
ADVANCE
TIMING
CONTROL
OUTAN
OUTBN
VADJ
CS
CT
RTD
SS
OSCILLATOR
VREF
PWM
COMPARATOR
+
-
SOFTSTART
CONTROL
VREF
80mV
0.33
2
1 mA
RAMP
VERR
+
0.6V
-
FB
典型應用電路 – 電信原邊半橋式同步整流轉換器
VIN+
Q1
C2
C1
U1
HIP2100
VDD
VSS
HB
HO HS
R3
Q2
LO
LI HI
R5
C8
R1
CR3
36-75V
C3
VIN-
C7
C4
C5
R2
Q7
ISL6742
L1
Q3
Q5
C15
R13
T2
C14
CR1
C13
R6
T1
Q4
Q6
R17
C17
R9
CR2
R8
R7
U2
ISL6742
1
VREF
2
VERR
3
RTD
4
CT
5
FB
6
RAMP
7
CS
89
IOUT GND
16
SS
15
VADJ
14
VDD
OUTA
13
OUTB
12
11
OUTAN
10
OUTBN
R11
C16
R16
R25
R15
CR4
U6
R14
T3
C24
R19
R18
+
C22
EL7212EL7212
C18
U5
R20
C20
R21
+VOUT
C23
RTN
+VOUT
R22
R23
C19
C21
VR1
C6
R4
C9
R10
C11
C10
C12
R12
U3
VR2
U4
TL431
R24
3
典型應用電路 – 高壓輸入次邊控制 ZVS 全橋轉換器
VIN+
ISL6742
400 VDC
VIN-
SECONDARY BIAS SUPPLY
+
C1
T2
CR1 CR2
C2
Q1
Q5A
Q5B
Q4
Q7A
Q7B
R6
C3
R2
R3
CR4
R13
C9
CR6
R12
C8
VREF
R21
Q15
R9
C4
C12
R7
R8
R5
C5
T3
Q11A
Q11B
1
VREF
2
VERR
3
RTD
4
CT
5
FB
6
RAMP
7
CS
89
IOUT GND
C13
C6
CR3
R15
CR5
Q12A
Q12B
SS
16
VADJ
15
VDD
14
ISL6742
OUTA
13
OUTB
12
OUTAN
11
OUTBN
10
U1
R14
C10
R11
C7
R10
C14
Q2
Q6A
Q6B
T1
R16
Q16
C11
Q3
Q8A
Q8B
R4
C15
R17
C18
Q15
Q13A
Q13B
Q14A
Q14B
VREF
R22
R23
L1
C21
C19
C20
CR7
U3
+
C17
C16
R18
-
+
C22
+ Vout
RETURN
R20
R19
4
ISL6742
額定值
Supply Voltage, VDD ----------------GND - 0.3V to +20.0V OUTxxx ------------------------------------GND - 0.3V to VDD Signal Pins-------------------------GND - 0.3V to V VREF ---------------------------------------GND – 0.3V to 6.0V
REF
+0.3V
Peak GATE Current ----------------------------------------- 0.1A ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7)------2000V
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93)-------1000V
熱性能的資料
Thermal Resistance Junction to Ambient (Typical) θJA (oC/W) 16 Lead QSOP (Note 1)-------------------------------------95 Maximum Junction Temperature -------------------55 Maximum Storage Temperature Range-----------65 Maximum Lead Temperature (Soldering 10s)--------------300
o
C to 150oC
o
C to 150oC
o
C
(QSOP – Lead Tips Only)
運行條件
Supply Voltage Range (Typical)------------------9V-16VDC Temperature Range ISL6742AAxx------------------------------ -40
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied.
Notes:
1) θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for
details.
2) All voltages are with respect to GND.
電气規范
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block Diagram and Typical Application Schematic.
o
C to 105oC
9V < V
DD
Electrical Specifications
< 20V, RTD = 10.0k, CT = 470pF, TA = -40oC to 105oC (Note 3), Typical values are at TA= 25oC.
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
SUPPLY VOLTAGE
Supply Voltage - - 20 V
Start-Up Current, IDD VDD = 5.0V - 175 400
Operating Current, IDD R
LOAD
, C
= 0 - 7.5 12 mA
OUT
µA
UVLO START Threshold 8 8.75 9 V
UVLO STOP Threshold 6.5 7 7.5 V
Hysteresis - 1.75 - V
REFERENCE VOLTAGE
Overall Accuracy I
= 0 - 10mA 4.85 5 5.15 V
VREF
Long Term Stability TA = 125°C, 1000 hours (Note 4) - 3 - mV
Operational Current (source) -10 - - mA
Operational Current (sink) 5 - - mA
Current Limit VREF = 4.85V -15 - -100 mA
CURRENT SENSE
Current Limit Threshold VERR = VREF 0.97 1 1.03 V
CS to OUT Delay Excl. LEB (Note 4) - 35 50 ns
Leading Edge Blanking (LEB) Duration (Note 4) 50 70 100 ns
CS to OUT Delay + LEB TA = 25°C - - 130 ns
CS Sink Current Device Impedance VCS = 1.1V - - 20
Input Bias Current VCS = 0.3V -1.0 - 1.0
µA
5
電气規范
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block Diagram and Typical Application Schematic.
9V < V
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
IOUT Sample and Hold Buffer Amplifier Gain
IOUT Sample and Hold VOH
IOUT Sample and Hold VOL
RAMP
ISL6742
Electrical Specifications
< 20V, RTD = 10.0k, CT = 470pF, TA = -40oC to 105oC (Note 3), Typical values are at TA= 25oC. (continued)
DD
= 25°C 4 4.09 4.15 V/V
T
A
= 1.00V, I
V
CS
= 0.00V, I
V
CS
= -300µA
LOAD
= 10µA
LOAD
3.9 - - V
- - 0.3 V
RAMP Sink Current Device Impedance V
= 1.1V - - 20
RAMP
RAMP to PWM Comparator Offset TA = 25°C 65 80 95 mV
Bias Current V
= 0.3V -5 - -2
RAMP
µA
Clamp Voltage (Note 4) 6.5 - 8 V
SOFT-START
Charging Current SS = 3V -60 -70 -80
µA
SS Clamp Voltage 4.41 4.5 4.59 V
SS Discharge Current SS = 2V 10 - - mA
Reset Threshold Voltage TA = 25°C 0.23 0.27 0.33 V
ERROR AMPLIFIER
Input Common Mode (CM) Range (Note 4) 0 - VREF V
GBWP (Note 4) 5 - - MHz
VERR VOL I
VERR VOH I
= 2mA - - 0.4 V
LOAD
= 0mA 4.2 - - V
LOAD
VERR Pull-Up Current Source VERR = 2.50V 0.8 1 1.3 mA
EA Reference TA = 25°C 0.594 0.6 0.606 V
EA Reference + EA Input Offset Voltage 0.59 0.6 0.612 V
PULSE WIDTH MODULATOR
Minimum Duty Cycle VERR < 0.6V - - 0 %
Maximum Duty Cycle (per half-cycle)
VERR = 4.20V, V (Note 5)
RTD = 2.00k, CT = 220pF
RTD = 2.00k, CT = 470pF
= 0V, VCS = 0V
RAMP
94 %
- 97 -
%
- 99 - %
Zero Duty Cycle VERR Voltage 0.85 - 1.2 V
VERR to PWM Comparator Input Offset TA = 25°C 0.7 0.8 0.9 V
VERR to PWM Comparator Input Gain 0.31 0.33 0.35 V/V
Common Mode (CM) Input Range (Note 4) 0 - 4.45 V
OSCILLATOR
Frequency Accuracy, Overall
(Note 4) 165 183 201 kHz
-10 - 10 %
Frequency Variation with VDD TA = 25°C, (F
Temperature Stability
6
VDD = 10V, |F
|F
– F
0°C
105°C
- - F
)/F
20V
- F
-40°C
|/F
(Note 4) - 1.5 - %
25°C
- 0.3 1.7 %
10V
10V
|/F
- 4.5 - %
0°C
0°C
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