intersil ISL6740 DATA SHEET

®

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ISL6740, ISL6741

Data Sheet July 13, 2007

Flexible Double Ended Voltage and Current Mode PWM Controllers

The ISL6740, ISL6741 family of adjustable frequency, low power, pulse width modulating (PWM) voltage mode (ISL6740) and current mode (ISL6741) controllers is designed for a wide range of power conversion applications using half-bridge, full bridge, and push-pull configurations. These controllers provide an extremely flexible oscillator that allows precise control of frequency, duty cycle , an d deadtime.

This advanced BiCMOS design features low operating current, adjustable switching frequency up to 1MHz, adjustable soft-start, internal and external over-temperature protection, fault annunciation, and a bidirectional SYNC signal that allows the oscillator to be locked to paralleled units or to an external clock for noise sensitive applications.

Ordering Information

PART

NUMBER

ISL6740IB ISL6740IB -40 to +105 16 Ld SOIC M16.15 ISL6740IBZ

(See Note) ISL6740IV ISL67 40IV -40 to +105 16 Ld TSSOP M16.173 ISL6740IVZ

(See Note) ISL6741IB ISL6741IB -40 to +105 16 Ld SOIC M16.15 ISL6741IBZ

(See Note) ISL6741IV ISL67 41IV -40 to +105 16 Ld TSSOP M16.173 ISL6741IVZ

(See Note) Add -T suffix to part number for tape and reel packaging

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

PART

MARKING

6740IBZ -40 to +105 16 Ld SOIC

ISL67 40IVZ -40 to +105 16 Ld TSSOP

6741IBZ -40 to +105 16 Ld SOIC

ISL67 41IVZ -40 to +105 16 Ld TSSOP

x =CONTROL MODE

0 Voltage Mode 1 Current Mode

TEMP.

RANGE (°C) PACKAGE

(Pb-free)

PKG.

DWG. #

M16.15

M16.173

M16.15

M16.173

FN9111.4

Features

• Precision Duty Cycle and Deadtime Control

•95μA Startup Current

• Adjustable Delayed Overcurrent Shutdown and Re-start (ISL6740)

• Adjustable Short Circuit Shutdown and Re-start

• Adjustable Oscillator Frequency Up to 2MHz

• Bidirectional Synchronization

• Inhibit Signal

• Internal Over-Temperature Protection

• System Over-Temperature Protection Using a Thermistor or Sensor

• Adjustable Soft-start

• Adjustable Input Undervoltage Lockout

• Fault Signal

• Tight Tolerance Voltage Reference Over Line, Load, and Temperature

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Telecom and Datacom Power

• Wireless Base Station Power

• File Server Power

• Industrial Power Systems

• DC Transformers and Buss Regulators

Pinout

ISL6740, ISL6741

(16 LD SOIC, 16 LD TSSOP)

TOP VIEW

OUTA

SCSET

SYNC

V

ERROR

GND

C

CS

1 2 3 4

T

5 6 7 89UV

16 15 14 13 12

11 10

OUTB V

REF

V

DD

R

TD

R

TC

OTS FAULT SS

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Functional Block Diagram

T

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ISL6740

VDD

VREF

5.00 V 1%

2

+-BG

GND

INHIBIT/VIN UV

UV

RTC

RTD

SCSET

CT

CS

VERROR

OTS

July 13, 2007

FN9111.4

1.00V

IRTC

IRTD

ENABLE

+

-

INTERNAL

OT SHUTDOWN

+130°C TO +150°C

+

-

OSCILLATOR

0.4

INHIBIT

CLK

0.4

VREF

N_SYNC OUT

BI-DIRECTIONAL

SYNCHRONIZATION

EXT. SYNC

SHORT CIRCUIT

DETECTION

+

-

0.6V

+

-

SYNC

100

4.5k

OC DETECT

PWM

COMPARATOR

SYNC IN

SS DONE

0.5

FL

V

REF

70µA

OUTA

OUTB

ISL6740, 1SL6741

SS

FAUL

Q

T

Q

PWM TOGGLE

SC S/D

SRQ

SS LOW

+

4.5V

SS CLAMP

RETRIGGERABLE

SRQ

Q

PWM LATCH RESET DOMINANT

SS

VREF/2

+

Q

SC LATCH

SS DONE

300k

Q Q

50µS

ONE SHOT

INHIBIT

OC S/D

OC LATCH

SRQ

Q

VREF UV 4.65V

SS LOW

SC S/D

SS HI

FAULT LATCH SET DOMINANT

OC S/D

ON

15µA

+

-

4.25V

0.27V

+

-

SRQ

FL

Q

V

REF

-

+

BG

-

Functional Block Diagram (Continued)

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VDD

VREF

ISL6741

SYNC

Q

T

Q

SC S/D

SC LATCH

300k

SRQ

FL

OUTA

OUTB

V

REF

70µA

SRQ

BG

ON

SS

15µA

0.27VSS LOW

FL

Q

FAULT

V

REF

+

-

ISL6740, 1SL6741

Q

SS DONE

+

-

INHIBIT

SC S/D

VREF UV 4.65V

FAULT LATCH SET DOMINANT

-

+

VREF

5.00 V 1%

ENABLE

+

3

GND

UV

RTC

RTD

SCSET

CT

CS

VERROR

OTS

1.00 V

IRTC

IRTD

BG

+

-

INTERNAL

OT SHUTDOWN

+130°C TO +150°C

INHIBIT/VIN UV

+

-

OSCILLATOR

80mV

-

+

INHIBIT

CLK

0.25

N_SYNC OUT

BI-DIRECTIONAL

SYNCHRONIZATION

EXT. SYNC

SHORT CIRCUIT

DETECTION

0.6V

+

-

100

4.5k

OC DETECT

+

-

PWM

COMPARATOR

SYNC IN

SS DONE

0.2

PWM TOGGLE

+

4.5V

SS CLAMP

SRQ

Q

PWM LATCH RESET DOMINANT

SS

VREF/2

+

July 13, 2007

FN9111.4

Typical Application (ISL6740) - 48V Input DC Transformer, 12V @ 8A Output (ISL6740EVAL1)

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VIN+

L1

C2

4

C1

TP1

QH

L3

C13

R10

T2

T1

QR1

SP1

C11

QR3

R8

C9

L2

R9

+12V

C8

RTN

VIN-

R1

TP6

CR3

C3

QR4

C12

ISL6740, 1SL6741

TP2

C10

C18

RTD

OTS

VERROR ISL6740

VREF

SYNC

R14

UV

QR2

RTC

R6

V

REF

SS

CS CT

SCSET

R19

R13

U1

HIP2101 VDD

LO

VSS

HB HO HS

R17

QL

C14

CR1

TP4

LI HI

TP5

R3

C15

R11

CR2

R5

RT1

FAULT

U3

GND OUTB OUTA

V

DD

R2

C7

C4

C5

R7

Q5

D1

July 13, 2007

FN9111.4

C6

R18

R12

C16

C17

R15

Typical Application (ISL6740) - 36V to 75V Input, Regulated 12V @ 8A Output (ISL6740EVAL2Z)

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VIN+

L1

C2

5

36V TO 75V

VIN-

C1

R1

TP6

R2

CR3

C3

C7

C4

C5

R7

Q5

D1

TP1

U1

HIP2101

VDD HB

VSS HO HS

R17

C6

LO

QH

L3

C13

R10

T2

QL

C14

CR1

TP4

LI

HI

TP5

R3

C15

R18

CR5

CR6

R11

CR2

R5

RT1

FAULT

U3

GND OUTB OUTA

VDD

RTD

R12

T1

OTS

VERROR ISL6740

VREF

SYNC

R14

UV

C16

RTC

R27

CS CT

SS

SCSET

R26

QR1

R6

QR2

V

R19

R13

C17

R15

R8

CR4

REF

C11

QR4

C18

SP1

QR3

+

C9

L2

R9

C12

+12V

C21

C8

RTN

ISL6740, 1SL6741

TP2

C10

R19

R25

U2

D2

R20

C20

R21

U4

R23

+ 12V

R4

C22

C19

R24

July 13, 2007

FN9111.4

Typical Application (ISL6741) - 48V to 5V Push-Pull DC/DC Converter

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+48V

+ 5V

RTN

QR1

T1

EL7242

6

SYNC

VIN-

C1

Q1

R2 R3R1

R4

R5

Q2

R6

RT1

FAULT

GND OUTB OUTA

VDD

RTD

OTS

VERROR ISL6741

VREF

QR2

R12

R11

SYNC

SS

CS CT

RTC

SCSET

UV

R18

R19 R20

+

R14

C9

+5V

OUTB CR3

OUTA

+ 5V

R15

C8

ISL6740, 1SL6741

CR1

L1

CR2

U5

T3

U3

R21

CR4

R13

Q3

VR1

July 13, 2007

FN9111.4

C2

R8

R7

C3

C4

C5

R10

U2

C6

R9

R16

U4

C7

R17

ISL6740, 1SL6741

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Absolute Maximum Ratings Thermal Information

Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V

OUTA, OUTB, Signal Pins. . . . . . . . . . . . . . . . .GND - 0.3V to V

VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.0V

Peak GATE Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5A

ESD Classification

Human Body Model (Per MIL-STD-883 Method 3015.7) . . .1500V Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . .1000V

REF

Thermal Resistance Junction to Ambient (Typical) θ

16 Lead SOIC (Note 1) . . . . . . . . . . . . . . . . . . . . . . 77

16 Lead TSSOP (Note 1). . . . . . . . . . . . . . . . . . . . . 102

Maximum Junction Temperature . . . . . . . . . . . . . . .-55°C to +150°C

Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

Operating Conditions

Temperature Range

ISL6740Ix . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C

ISL6741Ix . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C

Supply Voltage Range (Typical). . . . . . . . . . . . . . . . 9VDC - 16VDC

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.

1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

2. All voltages are with respect to GND.

(°C/W)

JA

Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application

Schematic. 9V < V values are at T

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

SUPPLY VOLTAGE

Start-Up Current, I Operating Current, I

UVLO START Threshold 6.50 7.25 8.00 V UVLO STOP Threshold 6.00 6.75 7.50 V Hysteresis 0.25 0.50 0.75 V

REFERENCE VOLTAGE

Overall Accuracy I Long Term Stability T Fault Voltage 4.10 4.55 4.75 V

Good Voltage 4.25 4.75 V

V

REF

Hysteresis 75 165 250 mV Operational Current (source) -20 - - mA Operational Current (sink) 5- - mA Current Limit -25 - -100 mA

CURRENT SENSE

Current Limit Threshold V CS to OUT Delay -35 50 ns CS Sink Current -10 - mA Input Bias Current -1.00 - 1.00 μA CS to PWM Comparator Input Offset (ISL6741) (Note 4) - 80 - mV Gain (ISL6741) A SCSET Input Impedance 1- - MΩ SC Setpoint Accuracy -10 - %

DD

< 20 V, RTD = 51.1kΩ, R

DD

= +25°C

A

V

< START Threshold - 95 140 μA

DD

R

, C

LOAD

C

OUTA,B

= 0, -20mA 4.900 5.000 5.050 V

VREF

= +125°C, 1000 hours (Note 4) - 3 - mV

A

= V

ERROR

= ΔV

CS

= 0 - 5.0 8.0 mA

OUTA,B

= 1nF - 7.0 12.0 mA

REF

/ΔV

ERROR

CS

= 10kΩ, CT = 470pF, TA = -40°C to +105°C (Note 3), Typical

TC

- 0.05 V

REF

0.55 0.6 0.65 V

(Note 4) - 4 - V/V

7

FN9111.4

July 13, 2007

ISL6740, 1SL6741

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Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application

Schematic. 9V < V values are at T

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

PULSE WIDTH MODULATOR

V Minimum Duty Cycle V

Maximum Duty Cycle V V

(ISL6741) V V CT to PWM Comparator Input Gain (ISL6740) (Note 4) - 0.4 - V/V SS to PWM Comparator Input Gain (ISL6740) (Note 4) - 0.5 - V/V SS to PWM Comparator Input Gain (ISL6741) (Note 4) - 0.2 - V/V

OSCILLATOR

Frequency Accuracy T Frequency Variation with V

Temperature Stability (Note 4) - 8 - % Charge Current Gain 1.88 2.0 2.12 μA/μA Discharge Current Gain 45 55 65 μA/μA C C RTD, RTC Voltage R

SYNCHRONIZATION

Input High Threshold (VIH), Minimum 4.0 - - V Input Low Threshold (VIL), Maximum - - 0.8 V Input Impedance 4.5 - kΩ Input Frequency Range (Note 4) 0.6x

High Level Output Voltage (VOH) I Low Level Output Voltage (VOL) I SYNC Output Current VOH > 2.0V (Note 4) -10 - - mA SYNC Output Pulse Duration (minimum) (Notes 4, 5) 250 - 400 ns SYNC Advance SYNC rising edge to GATE falling edge,

SOFTSTART

Charging Current SS = 2V -45 -55 -75 μA SS Clamp Voltage 4.35 4.5 4.65 V Sustained Over Current Threshold Voltage

(ISL6740)

Input Impedance 400 - - kΩ

ERROR

to PWM Comparator Input Offset

ERROR

to PWM Comparator Input Gain (ISL6741) (Note 4) - 0.25 -

ERROR

to PWM Comparator Input Gain (ISL6740) (Note 4) - 0.4 - V/V

ERROR

DD

Valley Voltage 0.75 0.80 0.85 V

T

Peak Voltage 2.70 2.80 2.90 V

T

< 20 V, RTD = 51.1kΩ, R

DD

= +25°C (Continued)

A

< CS Offset (ISL6741) - - 0 %

ERROR

V

(Note 4) 0.4 1.0 1.25 V

T = +105°C (f T = -40°C (f

C (Note 4)

Charged Threshold minus: 0.20 0.25 0.30 V

< CT Valley Voltage (ISL6740) - - 0 %

ERROR

> 4.75V (Note 6) - 83 - %

ERROR

= +25°C 333 351 369 kHz

A

- - f9V)/f

20V

- - f9V)/f

20V

= 0 - 2.000 - V

LOAD

= -1mA - 4.5 - V

LOAD

= 10μA - - 100 mV

LOAD

= C

GATE

SYNC

9V

= 100pF

= 10kΩ, CT = 470pF, TA = -40°C to +105°C (Note 3), Typical

TC

9V

-2 3 %

- Free Running Hz

Free

Running

-5 - ns

8

FN9111.4

July 13, 2007

ISL6740, 1SL6741

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Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application

Schematic. 9V < V values are at T

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

Overcurrent/Short Circuit Discharge Current SS = 2V 13 18 23 μA Fault SS Discharge Current SS = 2V - 10.0 - mA Reset Threshold Voltage 0.25 0.27 0.33 V

FAULT

Fault High Level Output Voltage (VOH) I Fault Low Level Output Voltage (VOL) I Fault Rise Time C Fault Fall Time C

OUTPUT

High Level Output Voltage (VOH) V

Low Level Output Voltage (VOL) OUTA or OUTB - GND, I Rise Time C Fall Time C

THERMAL PROTECTION

Thermal Shutdown (Note 4) 135 145 155 °C Thermal Shutdown Clear (Note 4) 120 130 140 °C Hysteresis, Internal Protection (Note 4) - 15 - °C Reference, External Protection 2.375 2.50 2.625 V Hysteresis, External Protection 18 25 30 μA

SUPPLY UVLO/INHIBIT

Input Voltage Low/Inhibit Threshold 0.97 1.00 1.03 V Hysteresis, Switched Current Amplitude 7 10 15 μA Input High Clamp Voltage 4.8 - - V Input Impedance 1- - MΩ

NOTES:

3. Specifications at -40°C and 105°C are guaranteed by 25°C test with margin limits.

4. This parameter, although guaranteed by characterization or correlation testing, is not 100% tested in production.

5. SYNC pulse width is the greater of this value or the C

6. This is the maximum duty cycle achievable using the specified values of R obtained using other values for these components. See Equations 2 through 4.

< 20 V, RTD = 51.1kΩ, R

DD

= +25°C (Continued)

A

= -10mA 2.85 3.5 - V

LOAD

= 10mA - 0.4 0.9 V

LOAD

= 100pF (Note 4) - 15 - ns

LOAD

= 100pF (Note 4) - 15 - ns

LOAD

- OUTA or OUTB,

REF

= -50mA

I

OUT

= 1nF, VDD = 15V (Note 4) - 50 100 ns

GATE

= 1nF, VDD = 15V (Note 4) - 40 80 ns

GATE

discharge time.

T

= 10kΩ, CT = 470pF, TA = -40°C to +105°C (Note 3), Typical

TC

-0.5 1.0 V

= 50mA - 0.5 1.0 V

OUT

, RTD, and CT. Larger or smaller maximum duty cycles may be

TC

9

FN9111.4

July 13, 2007