intersil ISL6622 DATA SHEET

®

ISL6622

FN6470.2Data Sheet October 30, 2008

VR11.1 Compatible Synchronous
Rectified Buck MOSFET Drivers

The ISL6622 is a high frequency MOSFET driver designed to
drive upper and lower power N-Channel MOSFETs in a
synchronous rectified buck converter topology . The advanced
PWM protocol of ISL6622 is specifically designed to work
with Intersil VR11.1 controllers and combined with
N-Channel MOSFETs, form a complete core-volt age regulator
solution for ad va nc e d mi cr op r oc e sso r s. When ISL6622
detects a PSI
activates Diode Emulation (DE) and Gate Voltage
Optimization Technology (GVOT) operation; otherwise, it
operates in normal Continuous Conduction Mode (CCM)
PWM mode.

In the 8 Ld SOIC package, the ISL6622 drives the upper and
lower gates to VCC during normal PWM mode, while the
lower gate drops down to a fixed 5.75V (typically) during PSI
mode. The 10 Ld DFN part offers more flexibility: the upper
gate can be driven from 5V to 12V via the UVCC pin, while the
lower gate has a resistor-selectable drive voltage of 5.75V,

6.75V, and 7.75V (typically) during PSI
the flexibility necessary to optimize applications involving
trade-offs between gate charge and conduction losses.

To further enhance light load efficiency, the ISL6622 enables
diode emulation operation during PSI
Discontinuous Conduction Mode (DCM) by detecting when
the inductor current reaches zero and subsequently turning
off the low side MOSFET to prevent it from sinking current.

An advanced adaptive shoot-through protection is integrated
to prevent both the upper and lower MOSFETs from
conducting simultaneously and to minimize dead time. The
ISL6622 has a 20kΩ integrated high-side gate-to-source
resistor to prevent self turn-on due to high input bus dV/dt.
This driver also has an overvoltage protection feature
operational while VCC is below the POR threshold: the
PHASE node is connected to the gate of the low side
MOSFET (LGATE) via a 10kΩ resistor, limiting the output
voltage of the converter close to the gate threshold of the low
side MOSFET, dependent on the current being shunted,
which provides some protection to the load should the upper
MOSFET(s) become shorted.

protocol sent by an Intersil VR11.1 controller , it

mode. This provides

mode. This allows

Features

• Dual MOSFET Drives for Synchronous Rectified Bridge

• Advanced Adaptive Zero Shoot-through Protection

• Integrated LDO for Selectable Lower Gate Drive Voltage
(5.75V, 6.75V, 7.75V) to Optimize Light Load Efficiency

• 36V Internal Bootstrap Diode

• Advanced PWM Protocol (Patent Pending) to Support PSI
Mode, Diode Emulation, Three-State Operation

• Diode Emulation for Enhanced Light Load Efficiency

• Bootstrap Capacitor Overcharging Prevention

• Supports High Switching Frequency

- 3A Sinking Current Capability

- Fast Rise/Fall Times and Low Propagation Delays

• Integrated High-Side Gate-to-Source Resistor to Prevent
from Self Turn-On due to High Input Bus dV/dt

• Pre-POR Overvoltage Protection for Start-up and
Shutdown

• Power Rails Undervoltage Protection

• Expandable Bottom Copper Pad for Enhanced Heat
Sinking

• Dual Flat No-Lead (DFN) Package

- Near Chip-Scale Package Footprint; Improves PCB

Efficiency and Thinner in Profile

• Pb-Free (RoHS Compliant)

Applications

• High Light Load Efficiency Voltage Regulators

• Core Regulators for Advanced Microprocessors

• High Current DC/DC Converters

• High Frequency and High Efficiency VRM and VRD

Related Literature

• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”

• Technical Brief TB417 “Designing Stable Compensation
Networks for Single Phase Voltage Mode Buck
Regulators” for Power Train Design, Layout Guidelines,
and Feedback Compensation Design

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Copyright Intersil Americas Inc. 2008. All Rights Reserved

ISL6622

Ordering Information

PART NUMBER

(Note)

ISL6622CBZ* 6622 CBZ 0 to +70 8 Ld SOIC M8.15
ISL6622CRZ* 622Z 0 to +70 10 Ld 3x3 DF N L10.3x3
ISL6622IBZ* 6622IBZ -40
ISL6622IRZ* 622I -40
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.

NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020..

PART

MARKING

TEMP. RANGE

(°C)

to +85 8 Ld SOIC M8.15
to +85 10 Ld 3x 3 D FN L10.3x3

PACKAGE

(Pb-Free)

PKG.

DWG. #

Pinouts

UGATE

BOOT

PWM

GND

Block Diagrams

ISL6622

(8 LD SOIC)

TOP VIEW

1
2
3
4

UVCC

GD_SEL

VCC

PWM

ISL6622

(10 LD 3x3 DFN)

TOP VIEW

8

PHASE
7
6
5

VCC

LVCC

LGATE

UGATE

GD_SEL

1
2

BOOT

3
4

PWM

5

GND LGATE

GND

10

9
8
7
6

PHASE
VCC
UVCC
LVCC

ISL6622

BOOT

UGATE

PHASE

LVCC

LGATE

+5V

11.2k

9.6k

LDO

POR/

CONTROL

LOGIC

LVCC

SHOOT-

THROUGH

PROTECTION

20k

10k

GND

UVCC = VCC FOR SOIC
LVCC = 5.75V (TYP ICALLY) @ 50mA FOR SOIC

2

FN6470.2

October 30, 2008

Typical Application Circuit

ISL6622

VTT

VR_RDY

VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0

PSI

VR_FAN
VR_HOT

VIN

+5V

FB

VDIFF
VSEN
RGND
EN_VTT

EN_PWR

GND

IMON

TCOMP

+5V

COMP

ISL6334

TM

OFS FS SS

VCC

+5V

DAC

REF

PWM1

ISEN1-

ISEN1+

PWM2

ISEN2­ISEN2+

PWM3

ISEN3-

ISEN3+

PWM4
ISEN4­ISEN4+

+12V

+12V

+12V

+12V

LVCC

VCC

PWM

PVCC

VCC

PWM

PVCC

VCC

PWM

PVCC

ISL6622
DRIVER

ISL6612
DRIVER

ISL6612
DRIVER

BOOT

UGATE
PHASE

LGATE

GND

BOOT

UGATE
PHASE

LGATE

GND

BOOT

UGATE
PHASE

LGATE

GND

BOOT

VIN

VIN

VIN

µP

LOAD

VIN

NTC

VCC

ISL6612
DRIVER

PWM

3

UGATE
PHASE

LGATE

GND

FN6470.2

October 30, 2008

ISL6622

Absolute Maximum Ratings Thermal Information

Supply Voltage (VCC, UVCC) . . . . . . . . . . . . . . . . . . . . . . . . . . .15V

BOOT Voltage (V
Input Voltage (V

UGATE. . . . . . . . . . . . . . . . . . . V

V

LGATE. . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V

BOOT-GND

PWM

- 3.5V (<100ns Pulse Width, 2µJ) to V

PHASE

GND - 5V (<100ns Pulse Width, 2µJ) to V

PHASE. . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V

GND - 8V (<200ns, 10µJ) to 30V (<200ns, V

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.

). . . . . . . . . . . . . . . . . . . . . . . . . . . .36V

) . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to 7V

PHASE

- 0.3VDC to V

to V

DC

BOOT-GND

BOOT
BOOT

LVCC
LVCC

to 15V

DC

+ 0.3V
+ 0.3V
+ 0.3V
+ 0.3V

DC

<36V)

NOTES:

is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

1. θ

JA

is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See

2. θ

JA

Tech Brief TB379.

3. For θ

, the “case temp” location is the center of the exposed metal pad on the package underside.

JC

4. Limits should be considered typical and are not production tested.

Thermal Resistance θ

(°C/W) θJC (°C/W)

JA

SOIC Package (Note 1) . . . . . . . . . . . . 100 N/A

DFN Package (Notes 2, 3). . . . . . . . . . 48 7

Maximum Junction Temperature (Plastic Package) . . . . . . .+150°C

Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C

Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

Recommended Operating Conditions

Ambient Temperature Range

ISL6622IBZ, ISL6622IRZ. . . . . . . . . . . . . . . . . . . .-40°C to +85°C

ISL6622CBZ, ISL6622CRZ . . . . . . . . . . . . . . . . . . . 0°C to +70°C

Maximum Operating Junction Temperature. . . . . . . . . . . . . +125°C

Supply Voltage

VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.8V to 13.2V

UVCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.75V to 13.2V

Electrical Specifications Recommended Operating Conditions. Parameters with MIN and/or MAX limits are 100% tested at +25°C,

unless otherwise specified. Temperature limits established by characterization and are not
production tested

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

VCC SUPPLY CURRENT (Note 4)

No Load Switching Supply Current I

Standby Supply Current I

VCC

I

VCC

I

UVCC

VCC

I

VCC

I

UVCC

POWER-ON RESET

VCC Rising Threshold 6.25 6.45 6.70 V
VCC Falling Threshold 4.8 5.0 5.25 V
LVCC Rising Threshold (Note 4) -4.4- V
LVCC Falling Threshold (Note 4) -3.4- V

PWM INPUT (See “TIMING DIAGRAM” on page 6)

Input Current (Note 4) I

PWM

PWM Rising Threshold (Note 4) VCC = 12V - 3.4 - V
PWM Falling Threshold (Note 4) VCC = 12V - 1.6 - V
Three-State Lower Gate Falling Threshold (Note 4) VCC = 12V - 1.6 - V
Three-State Lower Gate Rising Threshold (Note 4) VCC = 12V - 1.1 - V
Three-State Upper Gate Rising Threshold (Note 4) VCC = 12V - 3.2 - V

ISL6622CBZ and ISL6622IBZ,
f

PWM

= 300kH z, V

VCC

= 12V

ISL6622CRZ and ISL6622IRZ,
f

PWM

= 300kHz, V

VCC

= 12V

ISL6622CBZ and ISL6622IBZ, PWM

-8.2-mA

-6.2-mA

-2.0-mA

-5.7-mA

Transition from 0V to 2.5V
ISL6622CRZ and ISL6622IRZ, PWM

Transition from 0V to 2.5V

V

= 5V - 500 - µA

PWM

V

= 0V - -430 - µA

PWM

-5-mA

-0.7-mA

4

FN6470.2

October 30, 2008