intersil ISL6609, ISL6609A DATA SHEET

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ISL6609, ISL6609A
Data Sheet August 10, 2005
Synchronous Rectified MOSFET Driver
The ISL6609, ISL6609A is a high frequency, MOSFET driver optimized to drive two N-Channel power MOSFETs in a synchronous-rectified buck converter topology. This driver combined with an Intersil ISL63xx or ISL65xx multiphase PWM controller forms a complete single-stage core-voltage regulator solution with high efficiency performance at high switching frequency for advanced microprocessors.
The IC is biased by a single low voltage supply (5V), minimizing driver switching losses in high MOSFET gate capacitance and high switching frequency applications. Each driver is capable of driving a 3nF load with less than 10ns rise/fall time. Bootstrapping of the upper gate driver is implemented via an internal low forward drop diode, reducing implementation cost, complexity, and allowing the use of higher performance, cost effective N-Channel MOSFETs. Adaptive shoot-through protection is integrated to prevent both MOSFETs from conducting simultaneously.
The ISL6609, ISL6609A features 4A typical sink current for the lower gate driver, enhancing the lower MOSFET gate hold-down capability during PHASE node rising edge, preventing power loss caused by the self turn-on of the lower MOSFET due to the high dV/dt of the switching node.
The ISL6609, ISL6609A also features an input that recognizes a high-impedance state, working together with Intersil multiphase PWM controllers to prevent negative transients on the controlled output voltage when operation is suspended. This feature eliminates the need for the schottky diode that may be utilized in a power system to protect the load from negative output voltage damage. In addition, the ISL6609A’s bootstrap function is designed to prevent the BOOT capacitor from overcharging, should excessively large negative swings occur at the transitions of the PHASE node.
Ordering Information
PART NUMBER
(Note)
ISL6609CBZ 0 to 70 8 Ld SOIC M8.15
ISL6609CRZ 0 to 70 8 Ld 3x3 QFN L8.3x3
ISL6609ACBZ 0 to 70 8 Ld SOIC M8.15
ISL6609ACRZ 0 to 70 8 Ld 3x3 QFN L8.3x3
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
TEMP.
RANGE (°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
FN9221.0
Features
• Drives Two N-Channel MOSFETs
• Adaptive Shoot-Through Protection
•0.4Ω On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency
- Fast Output Rise and Fall
- Ultra Low Three-State Hold-Off Time (20ns)
• ISL6605 Replacement with Enhanced Performance
• BOOT Capacitor Overcharge Prevention (ISL6609A)
•Low V
Internal Bootstrap Diode
F
• Low Bias Supply Current
• Enable Input and Power-On Reset
• QFN Package
- Compliant to JEDEC PUB95 MO-220 QFN-Quad Flat No Leads-Product Outline
- Near Chip-Scale Package Footprint; Improves PCB Efficiency and Thinner in Profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Core Voltage Supplies for Intel® and AMD® Microprocessors
• High Frequency Low Profile High Efficiency DC/DC Converters
• High Current Low Voltage DC/DC Converters
• Synchronous Rectification for Isolated Power Supplies
Related Literature
• Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)”
1
AMD® is a registered trademark of Advanced Micro Devices, Inc. All other trademarks mentioned are the property of their respective owners.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Copyright Intersil Americas Inc. 2005. All Rights Reserved. Intel® is a registered trademark of Intel Corporation.
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Pinouts
ISL6609/09A(SOIC)
TOP VIEW
ISL6609, ISL6609A
ISL6609/09A (QFN)
TOP VIEW
UGATE
BOOT
PWM
GND
Block Diagram
1
2
3
4
8
7
6
5
PHASE
EN
VCC
LGATE
BOOT
PWM
UGATE
PHASE
7
8
1
2
GND
6
6
EN
5
VCC
43
LGATE
ISL6609 and ISL6609A
R
SHOOT-
THROUGH
BOOT
BOOT
UGATE
PHASE
VCC
LGATE
VCC
EN
PWM
VCC
4.25K
PROTECTION
CONTROL
LOGIC
4K
INTEGRATED 3 RESISTOR (R
) AVAILABLE ONLY IN ISL6609A
BOOT
GND
2
FN9221.0
August 10, 2005
ISL6609, ISL6609A
Typical Application - Multiphase Converter Using ISL6609 Gate Drivers
V
IN
+5V
+5V
PGOOD
VID
(OPTIONAL)
+5V
FB
VCC
VSEN
PWM
CONTROL
(ISL63XX
or ISL65XX)
FS/EN
GND
ISL6609
ISL6609
BOOT
UGATE
PHASE
LGATE
BOOT
UGATE
PHASE
LGATE
COMP
PWM1
PWM2
ISEN1
ISEN2
R
IS REQUIRED FOR SPECIAL POWER SEQUENCING APPLICATIONS
UGPH
(SEE APPLICATION INFORMATION SECTION ON PAGE 8)
VCC
EN
PWM
+5V
VCC
EN
PWM
R
UGPH
+V
V
IN
R
UGPH
CORE
3
FN9221.0
August 10, 2005
ISL6609, ISL6609A
Absolute Maximum Ratings Thermal Information
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input Voltage (V BOOT Voltage (V BOOT To PHASE Voltage (V
, V
EN
PWM
BOOT-GND
) . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
). . . -0.3V to 25V (DC) or 36V (<200ns)
BOOT-PHASE
) . . . . . . -0.3V to 7V (DC)
-0.3V to 9V (<10ns)
PHASE Voltage . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 15V (DC)
GND -8V (<20ns Pulse Width, 10µJ) to 30V (<100ns)
UGATE Voltage . . . . . . . . . . . . . . . . V
V
- 5V (<20ns Pulse Width, 10µJ) to V
PHASE
- 0.3V (DC) to V
PHASE
BOOT BOOT
LGATE Voltage . . . . . . . . . . . . . . . GND - 0.3V (DC) to VCC + 0.3V
GND - 2.5V (<20ns Pulse Width, 5µJ) to VCC + 0.3V
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . -40°C to 125°C
HBM ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . -40°C to 100°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . 125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±10%
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
1. θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
2. θ
JA
, “case temperature” location is at the center of the package underside exposed pad. See Tech Brief TB379 for details.
3. θ
JC
Thermal Resistance (Notes 1, 2, & 3) θ
(°C/W) θJC(°C/W)
JA
SOIC Package (Note 1) . . . . . . . . . . . . 110 N/A
QFN Package (Notes 2 & 3) . . . . . . . . 95 36
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
Electrical Specifications These specifications apply for T
= -40°C to 100°C, unless otherwise noted
A
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
VCC SUPPLY CURRENT
Bias Supply Current I
VCC
PWM pin floating, V
= 5V - 132 - µA
VCC
POR Rising -3.44.2
POR Falling 2.2 3.0 -
Hysteresis - 400 - mV
PWM INPUT
Sinking Impedance R
Source Impedance R
PWM_SNK
PWM_SRC
Three-State Rising Threshold V
Three-State Falling Threshold V
Three-State Shutdown Holdoff Time t
TSSHDtPDLU
= 5V (100mV Hysteresis) - 1.70 2.00 V
VCC
= 5V (100mV Hysteresis) 3.10 3.41 - V
VCC
or t
+ Gate Falling Time - 20 - ns
PDLL
2.75 4 5.5 k
3 4.25 5.75 k
EN INPUT
EN LOW Threshold 1.0 1.3 - V
EN HIGH Threshold -1.62.0V
SWITCHING TIME (See Figure 1 on Page 6)
UGATE Rise Time (Note 4) t
LGATE Rise Time (Note 4) t
UGATE Fall Time (Note 4) t
LGATE Fall Time (Note 4) t
UGATE Turn-Off Propagation Delay t
LGATE Turn-Off Propagation Delay t
RU
RL
FU
FL
PDLU
PDLL
V
= 5V, 3nF Load - 8.0 - ns
VCC
V
= 5V, 3nF Load - 8.0 - ns
VCC
V
= 5V, 3nF Load - 8.0 - ns
VCC
V
= 5V, 3nF Load - 4.0 - ns
VCC
V
= 5V, Outputs Unloaded - 18 - ns
VCC
V
= 5V, Outputs Unloaded - 25 - ns
VCC
4
FN9221.0
August 10, 2005
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