intersil ISL6562 DATA SHEET

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ISL6562

Data Sheet March 2001

Microprocessor CORE Voltage Regulator
Two-Phase Buck PWM Controller

The ISL6562 two-phase current mode, PWM control IC
together with companion gate drivers, the HIP6601A,
HIP6602A, HIP6603A or HIP6604 and MOSFETs provides a
precision voltage regulation system for advanced
microprocessors. Two-phase power conversion is a marked
departure from earlier single phase converter configurations
previously employed to satisfy the ever increasing current
demands of modern microprocessors. Multi-phase
converters, by distributing the power and load current results
in smaller and lower cost transistors with fewer input and
output capacitors. These reductions accrue from the higher
effective conversion frequency with higher frequency ripple
current due to the phase interleaving process of this
topology. For example, a two phase converter operating at
350kHz per phase will have a ripple frequency of 700kHz.
Moreover, greater converter bandwidth of this design results
in faster response to load transients.

Outstanding features of this controller IC include
programmable VID codes from the microprocessor that
range from 1.050V to 1.825V with an accuracy of ±0.8%.
Pull up currents on these VID pins eliminates the need for
external pull up resistors.

Another feature of this controller IC is the PWRGD monitor
circuit which is held low until the CORE voltage increases, to
within 18% of the programmed voltage. Over-voltage, 24%
above programmed CORE voltage, results in the PWRGD
output going low to indicate that the CORE is above the
specified limit. Under voltage is also detected and results in
PWRGD going low if the CORE voltage falls 18% below the
programmed level. Over-current protection folds back the
output voltage to 95mV, reducing the regulator dissipation.
These features provide monitoring and protection for the
microprocessor and power system.

Ordering Information

PART NUMBER TEMP. (oC) PACKAGE PKG. NO.

ISL6562CB 0 to 70 16 Ld SOIC M16.15
ISL6562CB-T 16 Ld SOIC Tape and Reel
ISL6560/62EVAL1 Evaluation Platform

File Number 9012

Features

• Two-Phase Power Conversion

• Precision Channel Current Sharing

• Precision CORE Voltage Regulation

- ±0.8% Accuracy

• Microprocessor Voltage Identification Input

- 5-Bit VID Input

- 1.050V to 1.825V in 25mV Steps

- Programmable “Droop” Voltage

• Fast Transient Recovery Time

• Over Current Protection

• High Ripple Frequency, (Channel Frequency

Times Number of Channels). . . . . . . . . . . . .100kHz to 2MHz

Applications

• VRM8.5 Modules

• Intel® Tualatin Processor Voltage Regulator

• Low Output Voltage, High Current DC/DC Converters

Related Literature

• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”

Pinout

ISL6562 (SOIC)

TOP VIEW

1

VID3

2

VID2

3

VID1
VID0

4

VID25mV

5

COMP CS+

6

FB

7

CT

8

16
15
14
13
12
11
10

9

VCC
REF
CS­PWM1
PWM2

PWRGD
GND

1

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Block Diagram

REF

ISL6562

VCC

PWRGD

VID3
VID2
VID1
VID0

VID25mV

FB

COMP

D/A

Simplified Power System Diagram

FB

PWM 1

ISL6562

PWM 2

VID

SYNCHRONOUS

RECTIFIED BUCK

CHANNEL

MICROPROCESSOR

SYNCHRONOUS

RECTIFIED BUCK

CHANNEL

3V REFERENCE

X 0.82

X1.24

E/A

+

-

UVLO and

BIAS CIRCUITS

+

-

UV

+

-

OVP

GND

CONTROL

LOGIC

OSCILLATOR

CMP

+

-

CT

PWM1

PWM2

CS+

CS-

Current Sense Comparator. Pulling this pin to ground
disables the oscillator and drives both PWM outputs low.

FB (Pin 7)

Inverting input of the internal transconductance error
amplifier.

CT (Pin 8)

A capacitor on this terminal sets the frequency of the internal
oscillator.

Functional Pin Description

1

VID3

2

VID2

3

VID1
VID0

4

VID25mV

5

COMP CS+

6

FB

7

CT

8

VID3 (Pin 1), VID2 (Pin 2), VID1 (Pin 3), VID0 (Pin 4)
and VID25mV (Pin 5)

V oltage Identification inputs from microprocessor. These pins
respond to TTL and 3.3V logic signals. The ISL6562 decodes
VID bits to establish the output voltage. See Table 1.

COMP (Pin 6)

Output of the internal transconductance error amplifier.
Voltage at this terminal sets the output current level of the

16
15
14
13
12
11
10

9

VCC
REF
CS­PWM1
PWM2

PWRGD
GND

GND (Pin 9)

Bias and referenceground. All signals are referenced to this
pin.

PWRGD (Pin 10)

Open drain connection. A high voltage level at this pin with a
resistor connected to this terminal and VCC indicates that
CORE voltage is at the proper level,

CS+ (Pin 11) and CS- (Pin 14) These inputs monitor the

supply current to the converter positive input voltage. CS+ is
connected directly to the decoupled supply voltage and
current sampling resistor. CS- is connected to the other end
of the current sampling resistor and the upper drains of the
series transistors.

PWM2 (Pin 12) and PWM1 (Pin 13)

PWM outputs connected to the gate driver ICs.

REF (Pin 15)

Three volt supply used to bias the output of the
transconductance amplifier.

VCC (Pin 16)

Bias supply. Connect this pin to a 12V supply.

2