intersil ISL6557A DATA SHEET

®

ISL6557A

Data Sheet July 2004

Multi-Phase PWM Controller for
Core-Voltage Regulation

The ISL6557A provides core-voltage regulation by driving up
to four interleaved synchronous-rectified buck-converter
channels in parallel. Intersil multi-phase controllers together
with Intersil MOSFET drivers form the basis for the most
reliable power-suppply solutions available to pow er the latest
industry-leading microprocessors. Multi-phase buck
converter architecture uses interleaved timing to multiply
ripple frequency and reduce input and output ripple currents.
Lower ripple results in lower total component cost, reduced
dissipation, and smaller implementation area. Pre­configured for 4-phase operation, the ISL6557A offers the
flexibility of selectable 2- or 3-phase operation. Simply
connect the unused PWM pins to VCC. The channel
switching frequency is adjustable in the range of 50kHz to
igMHz giving the designer the ultimate flexibility in managing
the balance between high-speed response and good
thermal management.

New features on the ISL6557A include Dynamic-VID™
technology allowing seamless on-the-fly VID changes with
no need for any additional external components. When the
ISL6557A receives a new VID code, it incrementally steps
the output voltage to the new level. Dynamic VID changes
are fast and reliable with no output voltage overshoot or
undershoot. The RGND and VSEN pins provide inputs for
differential remote voltage sensing to improve regulation and
protection accuracy. A threshold-sensitive enable pin (EN)
can be used with an external resistor divider to optionally set
the power-on voltage level. This allows optional star t-up
coordination with Intersil MOSFET drivers or any other
devices powered from a separate supply.

Like other Intersil multiphase controllers, the ISL6557A uses
cost and space-saving r
balance, dynamic voltage positioning, and overcurrent
protection. Channel current balancing is automatic and
accurate with the integrated current-balance control system.
Overcurrent protection can be tailored to any application with
no need for additional parts. The IOUT pin carries a signal
proportional to load current and can be optionally connected
to FB for accurate load-line regulation.

An integrated DAC decodes the 5-bit logic signal present at
VID4-VID0 and provides an accurate reference for precision
voltage regulation. The high-bandwidth error amplifier,
differential remote-sensing amplifier, and accurate voltage
reference all work together to provide better than 0.8% total
system accuracy, and to enable the fastest transient
response available.

sensing for channel current

DS(ON)

FN9068.3

Features

• Multi-Phase Power Conversion

• Active Channel Current Balancing

• Precision r

DS(ON)

Current Sensing

-Low Cost

- Lossless

• Precision CORE Voltage Regulation

- Differential Remote Voltage Sensing

- ±0.8% System Accuracy

• Microprocessor Voltage Identification Input

- Dynamic VID technology

- 5-Bit VID Input

- 0.800V to 1.550V in 25mV Steps

• Programmable Power-On Bias Level

• Programmable Droop Voltage

• Fast Transient Recovery Time

• Precision Enable Threshold

• Overcurrent Protection

• 2-, 3-, or 4-Phase Operation

• High Ripple Frequency. Channel Frequency Times
Number Channels (100kHz to 6MHz)

• Pb-free available

Ordering Information

PART NUMBER TEMP. (oC) PACKAGE PKG. DWG. #

ISL6557ACB 0 to 70 24-Ld SOIC M24.3
ISL6557ACBZ

(See Note)

*Add “-T” suffix to part number for tape and reel packaging.

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding
compounds/die attach materials and 100% matte tin plate termination finish, which
is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J Std-020B.

0 to 70 24-Ld SOIC

(Pb-free)

M24.3

Pinout

ISL6557A 24 PIN (SOIC)

TOP VIEW

VID4
VID3
VID2
VID1
VID0

COMP

FB

IOUT

VDIFF

VSEN

RGND

GND

1
2
3
4
5
6
7
8

9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

VCC
EN
FS
PGOOD
PWM4
ISEN4
ISEN1
PWM1
PWM2
ISEN2
ISEN3
PWM3

1

All other trademarks mentioned are the property of their respective owners. Dynamic VID™ is a trademark of Intersil Americas Inc.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

| Intersil (and design) is a trademark of Intersil Americas Inc.

Copyright © Intersil Americas Inc. 2003, 2004. All Rights Reserved.

Block Diagram

ISL6557A

RGND

VSEN

COMP

VID0

VID1

VID2

VID3

VID4

-

+

x 0.9

2.5V

DYNAMIC

VID
D/A

VDIFF

x1

-

UV

+

+

OVP

-

PGOOD

S

OV

LATCH

+

∑

-

2.1V

SOFT-

START

AND FAULT

LOGIC

+

-

E/A

+

POWER-ON

RESET (POR)

∑

-

+

∑

VCC

CLOCK AND

SAWTOOTH

GENERATOR

-

+

∑

-

+

-

+

-

+

-

+

-

PWM

PWM

PWM

PWM

1.23V

-

+

EN

FS

PWM1

PWM2

PWM3

PWM4

FB

IOUT

I_TOT

OC

CURRENT

CORRECTION

I

OC

∑

+

+

+

+

GND

-

+

PHASE

NUMBER

CHANNEL

DETECTOR

ISEN1

ISEN2

ISEN3

ISEN4

2

ISL6557A

Typical Application - 4-Phase Buck Converter

+12V

VIN

PGOOD

VID4

VID3

VID2

VID1

VID0

RT

IOUT

FB COMP

VDIFF

VSEN

RGND

ISL6557A

FS

VCC

ISEN1

PWM1

PWM2

ISEN2

PWM3

ISEN3

PWM4

ISEN4

GND

EN

+5V

PVCC

PWM

+12V

PVCC

PWM

+12V

PVCC

PWM

VCC BOOT

HIP6601A

DRIVER

VCC BOOT

HIP6601A

DRIVER

VCC BOOT

HIP6601A

DRIVER

UGATE

PHASE

LGATE

GND

VIN

UGATE

PHASE

LGATE

GND

VIN

µP

LOAD

UGATE

PHASE

LGATE

GND

+12V

VIN

VCC BOOT

PVCC

PWM

HIP6601A

DRIVER

UGATE

PHASE

LGATE

GND

3

ISL6557A

Absolute Maximum Ratings

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V

Input, Output, or I/O Voltage . . . . . . . . . . GND -0.3V to V

ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5kV

CC

+ 0.3V

Recommended Operating Conditions

Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%

Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . 0

CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.

NOTE:

is measured with the component mounted on a high effective thermal conductivity test board in free air. (See Tech Brief TB379 for details.)

1. θ

JA

Electrical Specifications Operating Conditions: V

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

INPUT SUPPLY POWER

Input Supply Current RT = 100kΩ, EN = 5V 10.5 15 mA

RT = 100kΩ, EN = 0V 5 9.2 mA

Power-On Reset Threshold VCC Rising 4.25 4.38 4.5 V

VCC Falling 3.75 3.86 4.0 V

Enable Threshold EN Rising 1.206 1.230 1.254 V

EN Falling 1.106 1.15 1.194 V
Enable Hysteresis 60 100 mV
Enable Current EN = 3V 50 nA

SYSTEM ACCURACY

System Accuracy (Note 2) -0.8 0.8 %VID
VID Pull Up -40 -20 -10 µA
VID Input Low Level 0.8 V
VID Input High Level (Note 3) 2.0 V

OSCILLATOR

Accuracy -20 20 %
Frequency RT = 110kΩ (±1%) 250 kHz
Adjustment Range 80 1500 kHz
Sawtooth Amplitude 1.33 V
Duty-Cycle Range 075%

ERROR AMPLIFIER

Open-Loop Gain RL = 10kΩ to ground 72 dB
Open-Loop Bandwidth CL = 100pF, RL = 10kΩ to ground 18 MHz
Slew Rate CL = 100pF, RL = 10kΩ to ground 5 V/µs
Maximum Output Voltage RL = 10kΩ to ground 3.6 4.1 V

REMOTE-SENSE AMPLIFIER

Input Impedance 80 kΩ
Slew Rate 6V/µs
Bandwidth 10 MHz

o

C to 70oC

= 5V, TA = 0oC to 70oC, Unless Otherwise Specified.

CC

Thermal Information

Thermal Resistance (Typical, Note 1) θJA (oC/W)

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150

Maximum Storage Temperature Range. . . . . . . . . . -65

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300

(SOIC - Lead Tips Only)

o

C to 150oC

o

o

C

C

4

ISL6557A

Electrical Specifications Operating Conditions: V

PARAMETER TEST CONDITIONS MIN TYP MA X UNITS

ISEN

Overcurrent Trip Level -90 -75 -60 µA

PROTECTION and MONITOR

Overvoltage Threshold VSEN Rising 2.04 2.09 2.13 V

VSEN Falling VID V

Undervoltage Threshold VSEN Rising 92 %VID

VSEN Falling 90 %VID

PGOOD Low Voltage IPGOOD = 4mA 0.18 0.4 mV

NOTES:

2. These parts are designed and adjusted for accuracy within the system tolerance given in the Electrical Specifications. The system tolerance
accounts for offsets in the differential and error amplifiers; reference-voltage inaccuracies; temperature drift; and the full DAC adjustment range.

3. VID input levels above 2.9V may produce an reference-voltage offset inaccuracy.

= 5V, TA = 0oC to 70oC, Unless Otherwise Specified. (Continued)

CC

Functional Pin Descriptions

1

VID4

2

VID3

3

VID2

4

VID1

5

VID0

6

COMP

7

FB

8

IOUT

9

VDIFF

10

VSEN

11

RGND

12 13

GND

24
23
22
21
20
19
18
17
16
15
14

VCC
EN
FS
PGOOD
PWM4
ISEN4
ISEN1
PWM1
PWM2
ISEN2
ISEN3
PWM3

VID4, VID3, VID2, VID1, VID0 (Pins 1, 2, 3, 4, 5)

These are the inputs to the internal DAC that provides the
reference voltage for output regulation. Connect these pi ns
to either open-drain or active-pull-up type outputs. Pulling
these pins above 2.9V can cause a reference offset
inaccuracy.

FB (Pin 7) and COMP (Pin 6)

The internal error amplifier’s inverting input and output
respectively. These pins are connected to an external R-C
network to compensate the regulator.

IOUT (Pin 8)

The current out of this pin is proportional to output current
and is used for load-line regulation and load sharing. The
scale factor is set by the ratio of the ISEN resistors
(connected to pins 14, 15, 18, and 19) to the lower MOSFET

r

DS(ON)

.

VDIFF (Pin 9), VSEN (Pin 10), RGND (Pin 11)

VSEN and RGND are the inputs to the differential remote­sense amplifier. VDIFF is the output and it serves as the

input to the external regulation circuitry and the intern al
protection circuitry. Connect VSEN and RGND to the sense
pins of the remote load.

GND (Pin 12)

Return for VCC and signal ground for the IC.

PWM3, PWM2, PWM1, PWM4 (Pins 13, 16, 17, 20)

Pulse-width modulation outputs. These logic outputs tell the
driver IC(s) when to turn the MOSFETs on and off.

ISEN3, ISEN2, ISEN1, ISEN4 (PINS 14, 15, 18, 19)

Current sense inputs. A resistor connected between these
pins and the respective phase nodes has a current
proportional to the current in the lower MOSFET during its
conduction interval. The current is used as a reference for
channel balancing, load sharing, protection, and load-line
regulation.

PGOOD (Pin 21)

PGOOD is an open-drain logic output that changes to a logic
low when the differential output voltage at VDIFF swings
below 90% of the DAC setting or above 2.1V.

FS (Pin 22)

This pin has two functions. A resistor placed from FS to
ground sets the switching frequency. There is an inverse
relationship between the value of the resistor and the
switching frequency . This pin can also be used to disable the
controller. To disable the controller, pull this pin below 1V.

EN (Pin 23)

This is the threshold-sensitive enable input for the controller .
To enable the controller, pull this pin above 1.23V.

VCC (Pin 24)

Bias supply voltage for the controller. Connect this pin to a
5V power supply.

5

ISL6557A

FB

VDIFF

AMPLIFIER

REFERENCE

I

OUT

ERROR

-

+

DAC

&

+

x 1

-

COMP

VIN

L

1

+

PWM

CIRCUIT

-

+

PWM

CIRCUIT

-

+

PWM

CIRCUIT

-

AVERAGE

+

-

+

-

+

-

CURRENT

SENSE

CURRENT

SENSE

CURRENT

SENSE

PWM1

ISEN1

PWM2

ISEN2

PWM3

ISEN3

R

R

R

HIP6601A

ISEN1

HIP6601A

ISEN2

HIP6601A

ISEN3

VIN

VIN

L

2

V

OUT

µP

C

O

LOAD

L

3

VSENRGND

FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6557A IN A 3-PHASE CONVERTER

Operation

Multi-Phase Power Conversion

Multi-phase power conversion provides the most cost­effective power solution when load currents are no longer
easily supported by single-phase converters. Although its
greater complexity presents additional technical challenges,
the multi-phase approach offers cost-saving advantages with
improved response time, superior ripple cancellation, and
excellent thermal distribution.

INTERLEAVING

The switching of each channel in a multi-phase converter is
timed to be symmetrically out of phase with each of the other
channels. In a 4-phase converter, each channel switches 1/4
cycle after the previous channel and 1/4 cycle before the
following channel. As a result, the four-phase converter has
a combined ripple frequency four times greater than the
ripple frequency of any one phase. In addition, the peak-to­peak amplitude of the combined inductor currents is reduced
in proportion to the number of phases (Equations 1 and 2).
Increased ripple frequency and lower ripple amplitude mean

that the designer can use less per-channel inductance and
lower total output capacitance for any performance
specification.

IL1 + IL2 + IL3, 7A/DIV

IL3, 7A/DIV

PWM3, 5V/DIV

IL2, 7A/DIV

PWM2, 5V/DIV

IL1, 7A/DIV

PWM1, 5V/DIV

1µs/DIV

FIGURE 2. PWM AND INDUCTOR-CURRENT WA VEFORMS

FOR 3-PHASE CONVERTER

6