intersil ISL6535 DATA SHEET
®
ISL6535
Data Sheet January 17, 2006 FN9255.0
Synchronous Buck Pulse-Width
Modulator (PWM) Controller
The ISL6535 is a high performance synchronous controller
for demanding DC/DC converter applications. It provides
overcurrent fault protection and is designed to safely startup
into prebiased output loads.
The output voltage of the converter can be precisely
regulated to as low as 0.597V, with a maximum tolerance of
±1% over the commercial temperature range, and ±1.5%
over the industrial temperature range.
The ISL6535 provides simple, single feedback loop, voltagemode control with fast transient response. It includes a
triangle-wave oscillator that is adjustable from below 50kHz
to over 1.5MHz. Full (0% to 100%) PWM duty cycle support
is provided.
The error amplifier features a 15MHz gain-bandwidth
product and 6V/µs slew rate which enables high converter
bandwidth for fast transient performance.
The ISL6535's overcurrent protection monitors the current
by using the r
the need for a current sensing resistor.
Pinouts
(14 LD NARROW SOIC AND 16 LD QFN)
OCSET
COMP
of the upper MOSFET which eliminates
DS(ON)
ISL6535
TOP VIEW
VCC
RT
SS
FB
EN
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
PVCC
LGATE
PGND
BOOT
UGATE
PHASE
Features
• Operates from +12V Input
• Excellent Output Voltage Regulation
- 0.597V Internal Reference
- ±1% Over the Commercial Temperature Range
- ±1.5% Over the Industrial Temperature Range
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
- Leading and Falling Edge Modulation
• Small Converter Size
- Constant Frequency Operation
- Oscillator Programmable from 50kHz to Over 1.5MHz
• 12V High Speed MOSFET Gate Drivers
- 2.0A Source/3A Sink at 12V Low Side Gate Drive
- 1.25A Source/2A Sink at 12V High Side Gate Drive
- Drives Two N-Channel MOSFETs
• Overcurrent Fault Monitor
- High-Side MOSFET’s r
DS(ON)
Sensing
- Reduced ~120ns Blanking Time
• Converter can Source and Sink Current
• Soft-Start Done and an External Reference Pin for
Tracking Applications are Available in the QFN Package
• Pin Compatible with ISL6522
• Supports Start-Up into Prebiased Loads
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Power Supply for some Pentium®, PowerPC™, as well as
Graphic CPUs
• High-Power 12V Input DC/DC Regulators
• Low-Voltage Distributed Power Supplies
SS
COMP
FB
EN
OCSET
SSDONE
1516 14 13
1
2
3
4
6578
GND
REFIN
1
RT
PHASE
VCC
12
11
10
9
UGATE
PVCC
LGATE
PGND
BOOT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Ordering Information
PAR T
NUMBER
(Note)
ISL6535CBZ 6535CBZ 0 to 70 14 Ld SOIC M14.15
ISL6535IBZ 6535IBZ -40 to 85 14 Ld SOIC M14.15
ISL6535CRZ 6535CRZ 0 to 70 16 Ld 4x4 QFN L16.4x4
ISL6535IRZ 6535IRZ -40 to 85 16 Ld 4x4 QFN L16.4x4
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate termination finish,
which are RoHS compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
All other trademarks mentioned are the property of their respective owners.
PAR T
MARKING
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
TEMP.
RANGE
(°C)
Copyright Intersil Americas Inc. 2006. All Rights Reserved
PACKAGE
(Pb-free)
PKG.
DWG. #
Block Diagram
EN
SS
VCC
INTERNAL
REGULATOR
6µA
2
REFIN
(QFN ONLY)
REFERENCE
V
= 0.597 V
REF
30µA
POWER-ON
RESET (POR)
SOFT-START
AND
FAULT LOGIC
SOURCE OCP
200µA
OCSET
BOOT
UGATE
ISL6535
GATE
FB
COMP
GND
EA
CONTROL
LOGIC
PWM
OSCILLATOR
PHASE
PVCC
LGATE
PGND
SSDONE
(QFN ONLY)
January 17, 2006
FN9255.0
RT
Simplified Power System Diagram
ISL6535
+12V
Typical Application
+12V
IN
C
F1
SSDONE
(QFN ONLY)
(QFN ONLY)
C
vcc
R
FS
R
FILTER
REFIN
R
OCSET
+1.2V to +12V
IN
Q1
L
OUT
V
OUT
ISL6535
C
L
C
OUT
BIN
OUT
V
OUT
Q2
C
SS
VCC
PVCC
R
2
L
IN
C
HFIN
C
F2
D
BOOT
R
1
BOOT
R
OCSET
OCSET
C
OCSET
Q1
C
BOOT
UGATE
PHASE
EN
LGATE
Q2
C
HFOUT
C
BOUT
PGND
R
RT
RT
ISL6535
SS
C
SS
3
COMP
FB
GND
C
2
C
1
R
2
R
O
C
R
3
3
R
1
FN9255.0
January 17, 2006
ISL6535
Absolute Maximum Ratings Thermal Information
Supply Voltage, V
Enable Voltage, V
Soft-start Done Voltage, V
Boot Voltage, V
Phase Voltage, V
All Other Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 5.0V
PVCC,VVCC
. . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +16V
EN
. . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +36V
BOOT
PHASE
. . . . . . . . . . . . . . GND - 0.3V to +16V
SSDONE
. . . . . . . . . V
. . . . . . . . . . GND - 0.3V to +16V
- 16V to V
BOOT
BOOT
+ 0.3V
Operating Conditions
Supply Voltage, V
Supply Voltage, V
Boot to Phase Voltage, V
Ambient Temperature Range, ISL6535C . . . . . . . . . . . . 0°C to 70°C
Ambient Temperature Range, ISL6535I. . . . . . . . . . . .-40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
is measured with the component mounted on an evaluation PC board in free air.
1. θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
2. θ
JA
Tech Brief TB379. For θ
3. Parameters designated by GBD are "Guaranteed by Design."
. . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
VCC
. . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
PVCC
- V
BOOT
, the “case temp” location is the center of the exposed metal pad on the package underside.
JC
. . . . . . . . . . . . . . <V
PHASE
PVCC
Electrical Specifications Recommended Operating Conditions, unless otherwise noted specifications in bold are valid for process,
temperature, and line operating conditions.
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
V
SUPPLY CURRENT
CC
Shutdown Supply V
Shutdown Supply V
CC
PVCC
POWER-ON RESET
V
CC/VPVCC
V
CC/VPVCC
Rising Threshold 6.55 7.10 7.55 V
Hysteresis 170 250 500 mV
OCSET Rising Threshold 0.70 0.73 0.75 V
OCSET Hysteresis 180 200 220 mV
Enable - Rising Threshold 1.4 1.5 1.60 V
Enable - Hysteresis 175 250 325 mV
OSCILLATOR
Trim Test Frequency R
Total Variation 8kΩ < R
Ramp Amplitude ∆V
ERROR AMPLIFIER
DC Gain R
Gain-Bandwidth Product GBWP R
Slew Rate SR R
PROTECTION
OCSET Current I
OCSET Current I
OCSET Measurement Offset OCP
Soft-start Current I
I
VCC
I
PVCC
OSC
OCSET
OCSET
OFFSET
SS
SS/EN = 0V 3.5 6.1 8.5 mA
SS/EN = 0V 0.30 0.5 0.75 mA
= OPEN V
RT
to GND < 200kΩ - GBD - ±15 - %
RT
RRT = OPEN 1.7 1.9 2.15 V
= 10kΩ, CL= 100pF - GBD - 88 - dB
L
= 10kΩ, CL= 100pF - GBD - 15 - MHz
L
= 10kΩ, CL= 100pF - GBD - 6 - V/µs
L
T
= 0°C to 70°C 180 200 220 µA
J
T
= -40°C to 85°C 176 200 224 µA
J
OCSET= 1.5V to 15.4V - GBD - ±10 - mV
Thermal Resistance (Typical) θ
(°C/W) θJC (°C/W)
JA
SOIC Package (Note 1) . . . . . . . . . . . . 95 N/A
QFN Package (Note 2). . . . . . . . . . . . . 47 8.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC - Lead tips only)
ESD Ratings
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
= 12 175 200 220 kHz
VCC
22 30 38 µA
P-P
4
FN9255.0
January 17, 2006
ISL6535
Electrical Specifications Recommended Operating Conditions, unless otherwise noted specifications in bold are valid for process,
temperature, and line operating conditions. (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
REFERENCE
Reference Voltage T
System Accuracy T
REFIN Current Source (QFN Only) -4 -6 -8 µA
REFIN Threshold (QFN Only) 2.10 - 3.50 V
REFIN Offset (QFN Only) -3 - 3 mV
GATE DRIVERS
Upper Drive Source Current I
Upper Drive Source Impedance R
Upper Drive Sink Current I
Upper Drive Sink Impedance R
Lower Drive Source Current I
Lower Drive Source Impedance R
Lower Drive Sink Current I
Lower Drive Sink Impedance R
U_SOURCEVBOOT
U_SOURCE
U_SINK
U_SINK
L_SOURCEVPVCC
L_SOURCE
L_SINK
L_SINK
SSDONE (QFN ONLY)
SSDONE Low Output Voltage I
= 0°C to 70°C 0.591 0.597 0.603 V
J
= -40°C to 85°C 0.588 0.597 0.606 V
T
J
= 0°C to 70°C -1.0 - 1.0 %
J
= -40°C to 85°C -1.5 - 1.5 %
T
J
- V
= 12V, 3nF Load - GBD - 1.25 - A
PHASE
90mA Source Current - 2.0 - Ω
V
BOOT
- V
= 12V, 3nF Load- GBD - 2 - A
PHASE
90mA Source Current - 1.3 - Ω
= 12V, 3nF Load - GBD - 2 - A
90mA Source Current - 1.3 - Ω
V
= 12V, 3nF Load - GBD - 3 - A
PVCC
90mA Source Current - 0.94 - Ω
SSDONE
= 2mA 0.30 V
Typical Performance Curves
RRT PULLUP
1000
100
RESISTANCE (kΩ)
10
10 100 1000
TO +12V
RRT PULLDOWN
TO GND
SWITCHING FREQUENCY (kHz)
FIGURE 1. RRT RESISTANCE vs FREQUENCY
Functional Pin Description (SOIC/QFN)
RT (Pin 1/14)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R
switching frequency is set from between 200kHz and
1.5MHz according to the following equation: .
RRTkΩ[]
------------------------------------------------------- 1.3kΩ–≈
F
kHz[]200 kHz[]–
s
) from this pin to GND, the
RT
6500
(RRT to GND)
80
70
60
50
(mA)
40
30
PVCC+VCC
I
20
10
0
100 200 300 400 500 600 700 800 900 1000
C
= 3300pF
GATE
SWITCHING FREQUENCY (kHz)
C
C
GATE
GATE
= 1000pF
= 10pF
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
Alternately ISL6535’s switching frequency can be lowered
from 200kHz to 50kHz by connecting the RT pin with a
resistor to VCC according to the following equation:
RRTkΩ[]
55000
------------------------------------------------------- 70kΩ+≈
200 kHz[]F
kHz[]–
s
(RRT to VCC)
5
FN9255.0
January 17, 2006
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