intersil ISL6422 DATA SHEET

®

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ISL6422

Data Sheet

Dual Output LNB Supply and Control
Voltage Regulator with I2C Interface for
Advanced Satellite Set-Top Box Designs

The ISL6422 is a highly integrated voltage regulator and
interface IC, specifically designed for supplying power and
control signals from advanced satellite set-top box (STB)
modules to the low noise blocks (LNBs) of two antenna
ports. The device is consists of two independent
current-mode boost PWMs and two low-noise linear
regulators along with the circuitry required for 22kHz tone
generation, modulation and I
makes the total LNB supply design simple, efficient and
compact with low external component count.

Two independent current-mode boost converters provide the
linear regulators with input voltages that are set to the final
output voltages, plus typically 0.8V to insure minimum power
dissipation across each linear regulator. This maintains
constant voltage drops across each linear pass element
while permitting adequate voltage range for tone injection.

The final regulated output voltages are available at two
output terminals to support simultaneous operation of two
antenna ports for dual tuners. The outputs for each PWM
can be controlled in two ways:

• Full control from I
and VBOT12 bits, or

• Set the I
higher range (18V/19V) with the SELVTOP1 or
SELVTOP2 pin.

All the functions on this IC are controlled via the I
writing 8-bit words onto the System Registers (SR). The
same register can be read back, and 4-bits per output will
report the diagnostic status. Sepa ra t e en a b le c om m a n d s s en t
on the I
each PWM and linear combination, disabling the output into
shut d ow n m od e . Each output channel is capable of providing
750mA of continuous current. The overcurrent limit can be
digitally programmed.

The External modulation input EXTM1, EXTM2 can accept a
modulated Diseqc command and transfer it symmetrically to
the output. Alternatively, the EXTM1 or EXTM2 pin can be
used to modulate the continuous internal tone.

The FLT
an over temperature, overcurrent or backwards overcurrent
fault conditions is detected by the LNB controller or when
both channels are disabled by the I
nature of the fault can be read of the I

2

C to the lower range (13V/14V) and switch to the

2

C bus provide independent standby mode control for

pin serves as an interrupt for the processor when

2

C using the VTOP1, VTOP2, VBOT1,

2

C device interface. The device

2

C bus by

2

C EN bits set low. The

2

C registers.

August 10, 2007

FN9190.2

Features

• Single Chip Power Solution

- True Dual Operation for 2-Tuner/2-Dish Applications

- Both Outputs May be Enabled Simultaneously at
Maximum Power

- Integrated DC/DC Converter and I

• Switch-Mode Power Converter for Lowest Dissipation

- Boost PWMs with >92% Efficiency

- Selectable 13.3V or 18.3V Outputs

- Digital Cable Length Compensation (1V)

2

C and Pin controllable output

-I

• Output Back Bias Capability of 28V

2

C Compatible Interface for Remote Device Control

•I

• Four level Slave Address 0001 00XX

• 2.5V, 3.3V, 5V Logic Compatible

• External Pins to Toggle Between V and H Polarization.

• Supports DiSEqC 2.0 Protocol

• Built-In Tone Oscillator Factory Trimmed to 22kHz

- Facilitates DiSEqC (EUTELSAT) Encoding

- External Modulation Input

• Internal Over-Temperature Protection and Diagnostics

• Internal OV, UV, Overload and Over-Temperature Flags
(Visible on I

Signal

•FLT

• LNB Short-Circuit Protection and Diagnostics

• QFN, EPTSSOP Packages

• Pb-Free Plus Anneal Available (RoHS Compliant)

2

C)

2

C Interface

Applications

• LNB Power Supply and Control for Satellite Set-Top Box

Ordering Information

PART NUMBER

(Note)

ISL6422ERZ* ISL6422 ERZ -20 to +85 40 Ld 6x6 QFN L40.6x6
ISL6422EVEZ* ISL6422 EVEZ -20 to+ 85 38 Ld EPTSSOP M38.173B

*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.

PART

MARKING

TEMP.

RANGE

(°C)

PACKAGE

(Pb-free)

PKG.

DWG . #

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Copyright Intersil Americas Inc. 2006, 2007. All Rights Reserved

Pinouts

www.BDTIC.com/Intersil

EXTM2

SGND

NC

FLT

SDA

SCL

ADDR0

ADDR1

EXTM1

BYP

ISL6422

(40 LD QFN)

TOP VIEW

SELVTOP2

TXT2

CS2

NC

NC

VSW2

ISL6422ERZ

CS1

VSW1

TXT1

SELVTOP1

GATE2

PGND2

39 38 37 36 35 34 33 32 31

40

1

2

3

4

5

6

7

8

9

10

11 12 13 14 15 16 17 18 19 20

GATE1

PGND1

TCAP1 TCAP2

NC

AGND

VOUT2

VOUT1

ISL6422

VOUT2

30

29

TDIN2

28

TDOUT2

27

CPVOUT

26

CPSWOUT

CPSWIN

25

24

VCC

23

TDOUT1

TDIN1

22

VOUT1

21

CS2
VSW2
VSW2

GATE2

PGND2

EXTM2

SGND

FLT

SDA

SCL

ADDR0
ADDR1

EXTM1

BYP

PGND1

GATE1

VSW1
VSW1

CS1

ISL6422

(38 LD EPTSSOP)

TOP VIEW

1
2
3
4
5
6
7
8
9

ISL6422EVEZ

10
11
12
13
14
15
16
17
18
19

TXT2

38

SELVTOP2

37

TCAP2

36

NC

35

VOUT2

34

TDIN2

33

TDOUT2

32

CPVOUT

31
30

CPSWOUT
CPSWIN

29

VCC

28

TDOUT1

27
26

TDIN1
VOUT1

25

AGND

24

TCAP1

23

SELVTOP1

22
21

NC
TXT1

20

2

FN9190.2

August 10, 2007

Block Diagram

www.BDTIC.com/Intersil

17

5

8

4

76

COUNTER

GATE1

12

3

PGND1

11

CS1

15

TDOUT1

23

TONE

DECODER

TDIN1

22

VSW1

14

19

24

2

NOTE:

VOUT1

AGND

VCC

SGND

20, 21

August 10, 2007

FN9190.2

OVERCURRENT

PROTECTION

LOGIC SCHEME 1

ILIM1

CS
AMP

ON CHIP

LINEAR

UVLO

POR

SOFT-START

BYP

10

PWM

LOGIC

Q

S

COMPENSATION

TXT1

INT 5V
SOFT-START

EN1/EN2

∑

OLF1

DCL1

OC1

CLK1

+

SLOPE

TXT1

16

-

­+

VREF1

SELVTOP1

+

-

BAND GAP

REF VOLTAGE

REF

VOLTAGE

ADJ1

SCL

SDA

SDA

SCL

ISEL1L AND
ISEL1H

EN1
ENT1
OTF

VTOP1

BGV

TONE

INJ

CKT 1

MSEL1

TCAP1

18

EXTM1

OLF1

FLT

FLT

ADDR0

OLF2

ADDR1

ADDR1

I2C

INTERFACE

VBOT1 VBOT2

CLK1

MSEL2

EXT TONE CKT

9

OSC.

1.1MHz

DIV AND

WAVE SHAPING

INT

TONE

ENT1

EXTM2

1

CLK2

ENT2

ADDR0

OUVF11

ISEL2L AND

TCAP2

33

OUVF1

OUVF2

ISEL2H

VTOP2

TONE

INJ

CKT 2

OUVF2

EN2

ENT2

DCL

OTF

TXT2

35

OLF2

DCL2

OC2

CLK2

BGV

REF

VOLTAGE

ADJ2

THERMAL

SHUTDOWN

OVERCURRENT

PROTECTION

LOGIC SCHEME 2

PWM

LOGIC

Q

S

­+

SLOPE

COMPENSATION

+

VREF2

+

-

CHARGE PUMP

ILIM2

∑

-

CPVOUT

27

COUNTER

PGND2

CS

AMP

SELVTOP2

TXT2

TDOUT2

TONE

DECODER

CPSWIN

CPSWOUT

26

GATE2

CS2

VSW2

VOUT2

TDIN2

39

40

36

ISL6422

34

37

30, 31

28

29

25

1. Pinouts shown are for the QFN package.

Typical Application Schematic QFN

www.BDTIC.com/Intersil

4

ISL6422

August 10, 2007

FN9190.2

ISL6422

www.BDTIC.com/Intersil

Absolute Maximum Ratings Thermal Information

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V to 18.0V

Logic Input Voltage Range

(SDA, SCL, ENT, DSQIN1 and DSQIN2,

SEL18V1 and SEL18V2) . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.

NOTES:

is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See

2. θ

JA

Tech Brief TB379.

3. For θ

4. The device junction temperature should be kept below +150°C. Thermal shut-down circuitry turns off the device if junction temperature exceeds

, the "case temp" location is the center of the exposed metal pad on the package underside.

JC

+150°C typically.

Thermal Resistance (Typical, Notes 2, 3) θ

EPTSSOP Package. . . . . . . . . . . . . . . 29 4

QFN Package. . . . . . . . . . . . . . . . . . . . 34 6

Maximum Junction Temperature (Note 4) . . . . . . . . . . . . . . .+150°C

Maximum Storage Temperature Range. . . . . . . . . .-40°C to +150°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.aspOperating

Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . .-20°C to +85°C

(°C/W) θJC (°C/W)

JA

Electrical Specifications V

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Operating Supply Voltage Range 81214 V
Standby Supply Current EN1 = EN2 = L 1.5 3.0 mA
Supply Current I

UNDERVOLTAGE LOCKOUT

Start Threshold 7.5 7.95 V
Stop Threshold 7.0 7.55 V
Start to Stop Hysteresis 350 400 500 mV

SOFT-START

COMP Rise Time (Note 5) (Note 5) 8196 Cycles
Output Voltage (Note 5) V

Line Regulation DV

Load Regulation DV

= 12V, TA = -20°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. EN1 = EN2 = H,

CC

VTOP1 = VTOP2 = L, ENT1 = ENT2 = L, DCL = L, DSQIN1 = DSQIN2 = L, I
noted. See “ISL6422 Software Description” on page 12 for I

EN1 = EN2 = VTOP1 = VTOP2 = VBOT1 =
VBOT2 = ENT1 = ENT2 = H, No Load

(Refer to Table 11) 13.04 13.3 13.56 V
(Refer to Table 11) 14.02 14.3 14.58 V
(Refer to Table 11) 17.94 18.3 18.66 V
(Refer to Table 11) 19.00 19.3 19.68 V
(Refer to Table 15) 13.04 13.3 13.56 V
(Refer to Table 15) 14.02 14.3 14.58 V
(Refer to Table 15) 17.94 18.3 18.66 V
(Refer to Table 15) 19.00 19.3 19.68 V
VIN = 8V to 14V; V

= 8V to 14V; V

V

IN

IO = 12mA to 350mA 50 80 mV

= 12mA to 750mA 100 200 mV

I

O

OUT1
OUT1

, V

, V

OUT2
OUT2

V
V
V
V
V
V
V

DV

DV

IN

OUT1
OUT1
OUT1
OUT1
OUT2
OUT2
OUT2
OUT2

OUT1,

OUT2

OUT1,

OUT2

2

C access to the system.

= 13V 4.0 40.0 mV
= 18V 4.0 60.0 mV

= 12mA, unless otherwise

OUT

4.0 8.0 mA

5

FN9190.2

August 10, 2007

ISL6422

www.BDTIC.com/Intersil

Electrical Specifications V

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Dynamic Output Current Limiting
(Note 8)

Dynamic Overload Protection Off Time t
Dynamic Overload Protection On Time t
Static Output Current Limiting I
Cable Fault CABF Asserted High I

TONE OSCILLATOR

Tone Frequency f
Tone Amplitude V
Tone Duty Cycle dc
Tone Rise or Fall Time t

TONE DECODER

Input Amplitude Vtdin 200 1000 mV
Frequency Capture Range Ftdin 17.5 26.5 kHz
Input Impedance Z
Detector Output Voltage V
Detector Output Leakage I
Tone Decoder Rx Threshold V
Tone Decoder Tx Threshold V

LINEAR REGULATOR

Drop-out Voltage I
Output Backward Leakage Current I
Output Backward Leakage Current I
Output Backward Current Threshold I
Output Backward Voltage I
Output Undervoltage

(Asserted high during soft-start)
Output Overvoltage

(Asserted high during soft-start)

= 12V, TA = -20°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. EN1 = EN2 = H,

CC

VTOP1 = VTOP2 = L, ENT1 = ENT2 = L, DCL = L, DSQIN1 = DSQIN2 = L, I
noted. See “ISL6422 Software Description” on page 12 for I

I

MAX

OFF

ON
MAX
CAB

tone

tone

tone

, t

r

DET

TDOUT_L

TDOUT_H

RXth
TXth

OBK
OBK

OBKTH

OBK

DCL = 0, ISEL1H and ISEL2H = 0,
ISEL1L and ISEL2L = 0,
ISEL1R and ISEL2R = 0

DCL = 0, ISEL1H and ISEL2H = 0,
ISEL1L and ISEL2L = 0,
ISEL1R and ISEL2R = 1

DCL = 0, ISEL1H and ISEL2H = 0,
ISEL1L and ISEL2L = 1,
ISEL1R and ISEL2R = 1

DCL = 0, ISEL1H and ISEL2H = 1,
ISEL1L and ISEL2L = 0,
ISEL1R and ISEL2R = 1

DCL = 0, ISEL1H and ISEL2H = 1,
ISEL1L and ISEL2L = 1,
ISEL1R and ISEL2R = 1

DCL = L, Output Shorted (Note 8) 900 ms

DCL = 1 (Note 8) 990 mA
EN1 and EN2 = 1; 2 10 20 mA

ENT1 and ENT2 = H 20.0 22.0 24.0 kHz
ENT1 and ENT2 = H, I
ENT1 and ENT2 = H 40 50 60 %
ENT1 and ENT2 = H 5 10 14 μs

f

Tone Present, I
Tone absent, VO = 6V 10 μA
TXT1 and TXT2 = L 100 150 200 mV
TXT1 and TXT2 = H 400 450 500 mV

= 750mA 0.8 1.0 V

OUT

EN1 and EN2 = 0; V
EN1 and EN2 = 0; V
EN1 and EN2 = 1; V
EN1 and EN2 = 0 27 V
OUVF1, OUVF2 bit is asserted high,

measured from the typ output set value
OUVF1, OUVF2 bit is asserted high,

measured from the typ output set value

LOAD

= 5mA 500 680 800 mV

OUT

= 3mA 0.4 V

= 27V 2.0 3.0 mA

OBK

= 28V 15.0 17.0 mA

OBK

= 19V (Note 7) 125 mA

OFAULT

2

C access to the system. (Continued)

270 305 345 mA

350 388 422 mA

515 570 630 mA

635 705 775 mA

800 890 980 mA

-6 2 %

+2 +6 %

= 12mA, unless otherwise

OUT

20 ms

8.6 kΩ

6

FN9190.2

August 10, 2007