intersil ISL6421A DATA SHEET

®

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ISL6421A

Data Sheet

Single Output LNB Supply and Control
Voltage Regulator with I2C Interface for
Advanced Satellite Set-top Box Designs

The ISL6421A is a highly integrated solution for providing
power and control signals from advanced satellite set-top
box (STB) modules to the low noise block (LNB). The
internal architecture of this device contains a current-mode
boost PWM and a low-noise linear regulator, along with the
circuitry required for I
DiSEqC™ standard control signals to the LNB.

A regulated output voltage is available at the output terminal
(VOUT) to support the operation of the antenna port in
advanced satellite STB applications. The regulated output
may be set to either 13V or 18V by use of the voltage select
command bit (VSEL) through the I
compensate for the voltage drop in the coaxial cable, the
voltage may be increased by 1V with the line length
compensation bit (LLC) feature. The device can be put into a
standby mode by means of the enable bit (EN), this disables
the PWM and Linear regulator combination and helps
conserve power.

The input to the linear regulator is derived from the current
mode boost converter, such that the required voltage is the
sum of the output voltage and the linear regulator drop (1.0V
typical). This ensures that the power dissipation is minimized
and maintains a constant voltage drop across the linear pass
element, while permitting an adequate voltage range for tone
injection.

The device is capable of providing 450mA (typical). The
overcurrent limit is either digitally or resistor programmable.

2

C device interfacing and for providing

2

C bus. Additionally, to

March 9, 2006

FN9167.3

Features

• Switch-Mode Power Converter for Lowest Dissipation

- Boost PWM with >92% Efficiency

- Selectable 13V or 18V Outputs

- Digital Cable Length Compensation (1V)

- Vsw tracks Vout ensures low dissipation

2

C Compatible Interface for Remote Device Control

•I

- Registered Slave Address 0001 00XX

- Fully Functional 3.3V, 5V Operation up to 400kHz

• Built-In Tone Oscillator Factory Trimmed to 22kHz

- Facilitates DiSEqC™ (EUTELSAT) Encoding

- External Modulation input DSQIN

• Internal Over Temperature Protection and Diagnostics

• Internal Overload and Over Temperature Flags
(Visible on I

2

C)

• Output Back-Bias Protection to 24V

• LNB Short-Circuit Protection and Diagnostics

• QFN Package

- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat

No Leads - Product Outline

- Near Chip-Scale Package Footprint

• External Pins to Select 13V/18V Options

• Pb-Free Available (RoHS Compliant)

Applications

• LNB Power Supply and Control for Satellite Set-Top Box

Pinout

ISL6421A (QFN) TOP VIEW

References

• Tech Brief 389 (TB389) - “PCB Land Pattern Design and
Surface Mount Guidelines for QFN Packages”; Available
on the Intersil website, www.intersil.com

Ordering Information

PART

NUMBER*

ISL6421AER ISL6421AER -20 to 85 32 Ld 5x5 QFN L32.5x5

ISL6421AERZ
(Note)

*Add -T for tape and reel package.

NOTE: Intersil Pb-free products employ special Pb-free material sets;
molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or
exceed the Pb-free requirements of IPC/JEDEC J STD-020.

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

PGND

NC

SGND

SEL18V

NC

BYPASS

PGND

GATE

NC

COMP

NC

VSW

NC

SDA

NC

NC

32 31 30 29 28 27 26 25

1

2

3

4

5

6

7

8

9 10111213141516

FB

CS

VCC

NC

1

CPVOUT

ADDR

SCL CPSWIN

24

CPSWOUT

23

NC

22

NC

21

NC

20

AGND

19

VOUT

18

DSQIN

17

TCAP

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

TEMP.

PART

MARKING

ISL6421AERZ -20 to 85 32 Ld 5x5 QFN

Copyright Intersil Americas Inc. 2004-2006. All Rights Reserved

RANGE

(°C) PACKAGE

(Pb-free)

PKG.

DWG. #

L32.5x5

Block Diagram

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COUNTER

OVERCURRENT

PROTECTION

LOGIC SCHEME 1

SEL18V

OLF

DCL

PWM

ILIM

LOGIC

Q

S

∑

SLOPE

COMPENSATION

2

GATE

PGND

CS

CS

COMP

FB

VSW

VOUT

AMP

CLK

OC

+

-

­+

VREF

BAND GAP

REF VOLTAGE

REF

VOLTAGE

ADJ

+

-

ISEL

EN

ENT

OTF

BGV

OLF

INTERFACE

LLC VSEL

TONE

INJ

CKT

OTF

I2C

CLK

220kHz

÷ 10 AND

WAVE SHAPING

THERMAL

SHUTDOWN

SDA

ADDR

SCL

OSC.

22kHz
TONE

SDA

ADDR

SCL

DCL

ISL6421A

ENT

DSQIN

VCC

SGND

March 9, 2006

FN9167.3

ON CHIP

LINEAR

UVLO

POR

SOFT-START

BYPASS

INT 5V
SOFT-START

EN

AGND

TCAP

CHARGE PUMP

CPSWOUT

CPVOUT

CPSWIN

Typical Application Schematic

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3

ISL6421A

March 9, 2006

FN9167.3

NOTE: SGND and PGND to be shorted as close to U1 at layout

ISL6421A

www.BDTIC.com/Intersil

Absolute Maximum Ratings Thermal Information

Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V to 18.0V

Logic Input Voltage Range (SDA, SCL, ENT) . . . . . . . . -0.5V to 7V

Output Current . . . . . . . . . . . . . . . . . . . . Externally/Internally Limited

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See

1. θ

JA

Tech Brief TB379.

2. For θ

, the “case temp” location is the center of the exposed metal pad on the package underside.

JC

Thermal Resistance (Notes 1, 2) θJA (°C/W) θJC (°C/W)

QFN Package. . . . . . . . . . . . . . . . . . . . 35 6

Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C

Maximum Storage Temperature Range. . . . . . . . . . . -40°C to 150°C

For recommended soldering conditions, see Tech Brief TB389.

NOTE: The device junction temperature should be kept below
150°C. Thermal shut-down circuitry turns off the device if junction
temperature exceeds +150°C typically.

Electrical Specifications VCC = 12V, T

ENT = L, DCL = L, DSQIN = L, Iout = 12mA, unless otherwise noted. See software description section for I
access to the system.

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Operating Supply Voltage Range 8 12 14 V

Standby Supply Current EN = L - 1.5 3.0 mA

Supply Current I

UNDERVOLTAGE LOCKOUT

Start Threshold 7.5 - 7.95 V

Stop Threshold 7.0 - 7.55 V

Start to Stop Hysteresis 350 400 500 mV

SOFT-START

COMP Rise Time (Note 3) (Note 5) - 1024 - Cycles

OUTPUT VOLTAGE

Output Voltage (Note 4) V

Line Regulation DV

Load Regulation DV

Dynamic Output Current Limiting I

Dynamic Overload Protection Off Time T

Dynamic Overload Protection On Time T

Output Backward Current I

22kHz TONE

Tone Frequency f

Tone Amplitude V

Tone Duty Cycle dc

Tone Rise or Fall Time T

= -20°C to +85°C, unless otherwise noted. Typical values are at TA = 25°C. EN = H, LLC = L,

A

IN

OUT

V

OUT

V

OUT

V

OOU

OUT

OUTIO

MAX

OFF

ON

OBK

tone

tone

tone

, T

r

EN = LLC = VSEL = ENT = H, No Load - 4.0 8.0 mA

VSEL = L, LLC = L 12.74 13.0 13.26 V

VSEL = L, LLC = H 13.72 14.0 14.28 V

VSEL = H, LLC = L 17.64 18.0 18.36 V

VSEL = H, LLC = H 18.62 19.0 19.38 V

VIN = 8V to 14V; V

= 8V to 14V; V

V

IN

= 12mA to 450mA - 50 80 mV

DCL = L 500 - 625 mA

DCL = L, Output Shorted (Note 5) - 900 - ms

EN = 0; V

ENT = H 20.0 22.0 24.0 kHz

ENT = H 500 680 900 mV

ENT = H 405060 %

ENT = H 5 8 14 µs

f

= 24V - 2.0 3.0 mA

OBK

= 13V - 4.0 40.0 mV

OUT

= 18V - 4.0 60.0 mV

OUT

-20- ms

2

C

4

FN9167.3

March 9, 2006