The ISL6228EVAL3Z evaluation board demonstrates the
performance of the ISL6228 dual-channel PWM controller.
The ISL6228 features Intersil's Robust Ripple Regulator (R
technology. Channel-1 output voltage is 1.5V or 1.8V,
pending the state of switch S5. Channel-2 output voltage is
1.8V. Each channel has an on-board dynamic-load
generator included for evaluating the transient-load
response. It applies a 300µs pulse of 4.5A load across V
and GND, and it applies a 300µs pulse of 5A load across
V
and GND.
O2
Contents of this document include:
• Recommended Test Equipment
• Interface Connections
• Switch Descriptions
• Test Point Descriptions
• Design Criteria
• Typical Performance
- Efficiency
- Start-up
- Shut-down
- Steady State, CCM
- Steady State, DCM
- Load-transient response
• Evaluation Board Documentation
- Bill of materials
- Schematic
- Silk-screen plots
- Board layer plots
TABLE 1. DC/DC DESIGN CRITERIA
PARAMETERVALUEUNITS
V
IN
V
O
Full-load8ADC
PWM Frequency270, 300kHz
3.3 to 25VDC
0.6 to 5VDC
O1
AN1291.0
Author: Jia Wei
Recommended Equipment
• (QTY 2) Adjustable 25V, 3A Power Supply
3
)
• (QTY 1) Fixed 5V, 100mA Power Supply
• (QTY 1) Fixed 12V, 100mA Power Supply
• (QTY 1) Adjustable 20A Constant Current Electronic Load
• (QTY 1) Digital Voltmeter
• (QTY 1) Four-Channel Oscilloscope
Interface Connections
•V
: Input voltage to the power stage of Channel-1
IN1
- J14: V
-TP20: V
- J14: V
-TP21: V
•V
IN2
-J1: V
-TP9: V
-J2: V
-TP10: V
•V
O1:
-J9: VO1 positive power output
-TP13: V
- J10: V
-TP14: VO1 return voltage sense
•V
: Regulated output voltage from Channel-2
O2
-J7: VO2 positive power output
-TP11: V
-J8: V
-TP12: V
• VCC: +5V input voltage
- TP1: 5V positive input
- TP2: 5V return input
• +12V: Input voltage for the dynamic-load generator
- TP15: 12V positive input
- TP16: 12V return input
positive power input
IN1
positive voltage sense
IN1
return power input
IN1
return voltage sense
IN1
: Input voltage to the power stage of Channel-2
positive power input
IN2
positive voltage sense
IN2
return power input
IN2
return voltage sense
IN2
Regulated output voltage from Channel-1
positive voltage sense
O1
return power output
O1
positive voltage sense
O2
return power output
O2
return voltage sense
O2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
Page 2
Application Note 1291
Test Set-up
_
12V+
+
TP15TP16
OFF
OFF
+
V
IN2
_
+
5V
_
_
V
IN1
+
J1
J2
TP1
TP2
J14
J13
VO1 INCREASE
ISL6228EVAL3Z
ON
J3
J4
OFF
ON
ON
S3
J5
J6
OFF
ON
S2
S1S4S5
J11
TP11
J7
J8
TP12
J10
TP14
J9
TP13
J12
V
_
+
FIGURE 1. TEST SET-UP
Switch Descriptions
• S1: Channel-1 Enable
- OFF: Short the Channel-1 EN pin to GND (disable
PWM)
- ON: Allow the Channel-1 EN pin to pull-up to +5V
(enable PWM)
• S4: Channel-1 Dynamic Load
- OFF: On-board Channel-1 dynamic load disabled
- ON: On-board Channel-1 dynamic load enabled
• S5: Channel-1 V
-OFF: V
O1
- ON: Parallel R
• S2: Channel-2 Enable
- OFF: Short the Channel-2 EN pin to GND (disable
PWM)
- ON: Allow the Channel-2 EN pin to pull-up to +5V
(enable PWM)
• S3: Channel-2 Dynamic Load
- OFF: On-board Channel-2 dynamic load disabled
- ON: On-board Channel-2 dynamic load enabled
Increase
O
is 1.5V, determined by R15 and R23.
with R15. VO1 is 1.8V.
49
V
READING
V
O1
READING
Test-point Descriptions
• J4: Scope-probe socket for measuring PHASE1
_
V
O2
+
V
O2
_
_
V
O1
+
• J6: Scope-probe socket for measuring V
O1
• J12: Scope-probe socket for measuring the current of the
Channel-1 on-board transient-load emulator
• J3: Scope-probe socket for measuring the PHASE2 node
• J5: Scope-probe socket for measuring V
O2
• J11: Scope-probe socket for measuring the current of the
Channel-2 on-board transient-load emulator
• TP1: Monitor the 5V positive input
• TP2: Monitor the 5V return input
• TP3: Monitor the PGOOD2 pin
• TP4: Monitor the PGOOD1 pin
• TP5: The common node of R
and R20; Useful for
24
Channel-1 loop gain measurement.
• TP6: The common node of R
and R23; Useful for
25
Channel-2 loop gain measurement
• TP7: The V
side of R24; Useful for Channel-1 loop gain
O1
measurement.
• TP8: The V
side of R25; Useful for Channel-1 loop gain
O2
measurement.
• TP9: Monitor the V
• TP10: Monitor the V
• TP11: Monitor the positive V
• TP12: Monitor the V
• TP13: Monitor the positive V
• TP14: Monitor the V
positive input
IN1
return input
IN1
return output
O1
return output
O2
O1
O2
output
output
• TP15: Monitor the 12V positive input
• TP16: Monitor the 12V return input
• TP17: Monitor the EN1 pin
• TP18: Monitor the gate of transistor Q
18
• TP19: Monitor the EN2 pin
• TP20: Monitor the V
• TP21: Monitor the V
positive input
IN2
return input
IN2
2
AN1291.0
May 17, 2007
Page 3
Application Note 1291
Typical Performance
100
VIN = 8V
95
90
85
80
75
EFFICIENCY (%)
70
65
60
012345678
VIN = 12V
VIN = 19V
I
OUT
(A)
FIGURE 2. CHANNEL-1 EFFICIENCY AT VO= 1.5VFIGURE 3. CHANNEL-2 EFFICIENCY AT VO=1.8V
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
13
FIGURE 18. LAYER 4
AN1291.0
May 17, 2007
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.