Page 1
®
ISL6227EVAL1 DDR Evaluation Board Setup
Procedure
Application Note June 2004 AN1067
This document describes the setup procedure for the
ISL6227 Evaluation Board DDR implementation. For
information about the dual switcher application, please refer
to the ISL6227EVAL2 Evaluation Board Setup Procedure.
General Description
The ISL6227 can control two output voltages adjustable from
0.9V to 5.5V. The ISL6227 combines two synchronous PWM
voltage regulators into a single IC. When the DDR pin is set
to high, it transforms the IC into a complete DDR application.
Channel 1 can be set at a fixed 300kHz forced PWM mode or
an automatic mode with hysteretic diode-emulation at light
load and constant-frequency PWM synchronous rectification
at heavy load, assure high efficiency over a wide range of
conditions. Channel 2 is set at fixed 300kHz forced PWM
mode with synchronous rectification because of sinking
current requirement for DDR applications. Both channels use
the lower MOSFET r
high efficiency operations. It is preferred that the input of the
second channel connects to the output of the first channel in
DDR applications.
Voltage-feed-forward ramp modulation, current mode control,
and internal feedback compensation provide fast response to
input voltage and output load transients.
ISL6227 monitors the output voltage of CH1 only by the
voltage on VSEN1 pin. PGOOD1 (power good) signal is
asserted after its soft-start sequence has completed, and the
output voltage within -11%/+15% of the set point. PGOOD2
pin is used to bring the VDDQ/2 into the chip as the
reference voltage of the second channel error amplifier.
Built-in overvoltage protection prevents the output from
going above 115% of the set point by holding the lower
MOSFET on and the upper MOSFET off. When the output
voltage decays below the overvoltage threshold, normal
operation automatically resumes. Once the soft-start
sequence has completed, undervoltage protection will latch
the channel off if the output drops below 75% of its set point
value. There is no overvoltage protection for Channel 2 in
DDR application.
Adjustable overcurrent protection (OCP) monitors the
voltage drop across the r
more precise current-sensing is required, an external current
sense resistor may be used. The OCP threshold can be
adjusted by the resistor on OCSET pin and the current
sensing gain can be adjusted by the resistor from ISEN pin
to the phase node of the converter. Any overcurrent on the
second channel will be reflected to the first channel. There is
no OCP for the second channel.
In order to alleviate the interaction between the two channels
caused by the switching noise, a phase shift has been
implemented on the controller. If the input voltage is above
5V, the VIN pin should connect the input voltage. This would
provide the input voltage feed forward function and
command the second channel 90 degree lagging the first
channel. If the input voltage is at 3.3V, the VIN pin should
connect to ground. This would result in a fixed ramp for the
PWM comparator and command an in-phase operation of
the two channels.
as the current sense element for
DS(ON)
of the lower MOSFET. If
DS(ON)
Features
• Provides regulated output voltage in the range of 0.9V–5.5V
- High efficiency over wide load range
- Synchronous buck converter with hysteretic operation at
light load
- Selection of hysteretic/CCM mode on channel 1. Forced
CCM on channel 2 for DDR application
• Uses MOSFET r
DS(ON)
for current sensing or uses
current-sense resistor for precision overcurrent protection
• Overvoltage, undervoltage and overcurrent protection
• Undervoltage lock-out on VCC pin
• Dual input voltage mode operation
- Operates directly from battery 5V to 24V input
- Operates from 3.3V or 5V system rail
• Excellent dynamic response
- Combined voltage feed-forward and current mode
control
• Power-good signal for channel 1 in DDR application
Ordering Information
PKG
PART # TEMP. (°C) PACKAGE
ISL6227CA -10 to 100 28 Ld SSOP M28.15
ISL6227CAZ
(Note)
ISL6227CA-T -10 to 100 28 Ld SSOP Tape and Reel M28.15
ISL6227CAZ-T
(Note)
NOTE: Intersil Lead-Free products employ special lead-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and leadfree soldering operations. Intersil Lead-Free products are MSL
classified at lead-free peak reflow temperatures that meet or exceed
the lead-free requirements of IPC/JEDEC J Std-020B.
Pinout
-10 to 100 28 Ld SSOP (Lead-Free) M28.15
-10 to 100 28 Ld SSOP Tape and Reel
ISL6227 (28 LD SSOP) TOP VIEW
GND
LGATE1
PGND1
PHASE1
UGATE1
BOOT1
ISEN1
EN1
VOUT1
VSEN1
SOFT1 SOFT2
DDR
VIN PG1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(Lead-Free)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
LGATE2
PGND2
PHASE2
UGATE2
BOOT2
ISEN2
EN2
VOUT2
VSEN2
OCSET2OCSET1
PG2/REF
DWG #
M28.15
1
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Copyright Intersil Americas Inc. 2004. All Rights Reserved
Page 2
2
1.
JP3 —shunted =
CH1 enabled
JP4 — shunted =
CH2 enabled
JP2 —
shunted toward FCCM
(CH1 Fixed PWM Continuous Mode
Operation)
FIGURE 1. INITIAL SHUNT PLACEMENT FOR ISL6227EVAL1 (see Quick Setup)
JP1 — shunted
An AmpMeter may be
connected across
these pins to measure
IC and GATE Drive
Current
JP5 —shunted toward VINPRG when
Vin >5V, for feed-forward and program
90 degree out of phase PWM for CH1 &
CH2
JP2 —
shunted away from FCCM
(CH1 Automatic Mode)
C21, soft start cap of Ch2
CR1
GREEN = VOUT1 within PGOOD
range
RED = VOUT1 outside PGOOD
range
ISL6227
Regulator
Application Note 1067
Page 3
3
S
Set the adjustable 5v output
voltage to zero volts. Connect
the positive terminal (+) to the
VCC terminal, and the positive
terminal (+) of the DVM to
J4 VCC.
Connect the negative
terminal
(-) of the electronic load
and negative terminal (-
) of the DVM to the
GND terminal J7 for ch1
(vddq).
Set the adjustable 24vdc output voltage to zero volts.
Connect the positive terminal (+) of the adjustable 24VDC
power supply and the positive terminal (+) of the dvm to
VIN terminal J2.
Connect the negative terminal (-) of
the 24VDC power supply and the
negative terminal (-) of the DVM to
the GND terminal J3.
FIGURE 2. WIRING CONNECTIONS FOR ISL6227EVAL1 (see Quick Setup)
Connect the positive terminal
(+) of the electronic load and
the positive terminal (+) of the
DVM to the VTT terminal J6
Connect the negative terminal (-)
of the 5VDC power supply and
the negative terminal
(-) of dvm and to the GND
terminal J1.
Connect the positive
terminal (+) of the
electronic load and
the positive terminal
(+) of the DVM to J5
VDDQ.
Connect the negative
terminal
(-) of the electronic load
and the negative
terminal
(-) of the DVM to the
GND terminal J9 for
ch2 (VTT)
Connect the positive terminal
(+) of the DVM to the V_ref
terminal J8
Connect the negative terminal
(-) of the DVM to the gnd
terminal J10
Oscilloscope tip
measurement point
for phase1
OSCILLOSCOPE TIP MEASUREMENT POINT FOR PHASE2
Application Note 1067
Page 4
Application Note 1067
.
What’s Inside
This Evaluation Board Kit contains the following materials:
• the ISL6227EVAL1 Evaluation Board
• the ISL6227EVAL1 Evaluation Board Setup
Procedure.
What is Needed
The following items will be needed to perform a complete
evaluation:
• 4 channel oscilloscope with probes
• 2 electronic loads
• 2 laboratory power supplies
• Precision digital multi-meters (DVM)
• Digital pulse generator
TABLE 1. Detailed Description of the Jumper Settings
Jumper Position Function
*An AmpMeter may be connected across
JP1 *Shunted
*FCCM *CH1 PWM Fixed Continuous Conduction
JP2
JP3
JP4
JP5
Away from
FCCM
Shunted CH1 enabled
* Removed * CH1 disabled
Shunted CH2 enabled
* Removed * CH2 disabled
*Toward
VINPRG
Away from
VINPRG
these pins to measure IC and GATE Drive
current
Mode Operation
CH1 Hysteretic Operation
enabled
* Use when Vin>5V, this will tie VIN pin to
the input voltage for feed forward and
program Ch2 PWM 90 phase lagging Ch1
Use when Vin<5V, this will tie VIN pin to
GND and program in phase PWM for CH1
and CH2
Quick Setup Note:
• The VIN Power Supply must always be the FIRST
supply on and the LAST supply off to ensure start
up.
•The 5V V
5%.
• Make sure the power is off before moving any
jumpers, except EN1 and EN2.
• Better connect/disconnect probes without
powering circuit
• Make sure the electronic loads are set at 0A
condition before the connection.
Step 1: Connect power supply and measurement
equipment.
1a. Connect VCC power supply
– Set the output voltage of the 5V adjustable power
supply to zero volts. Connect the positive terminal
(+) of the power supply to the VCC terminal J4.
Connect the negative terminal (-) of the 5VDC
power supply to the GND terminal J1.
1b. Connect VCC measurement equipment
– Connect the positive terminal (+) of a DVM to the
VCC terminal J4. Connect the negative terminal (-)
of the DVM to the GND terminal J1.
• Do not apply power yet
1c. Connect VIN power supply
– Set the adjustable 24VDC output voltage to zero
volts. Connect the positive terminal (+) of the power
supply to the VIN terminals J2. Connect the
negative terminal (-) of the 24VDC power supply to
the GND terminal J3.
1d. Connect VIN measurement equipment
– Connect the positive terminal (+) of a DVM to one of
the VIN terminals J2. Connect the negative terminal
(-) of the DVM to the GND terminal J3.
• Do not apply power yet
Power Supply must be between 5V ±
CC
NOTE * = initial setting
TABLE 2. LED condition indicator
LED Condition Condition Result
green VOUT1 WITHIN PGOOD
RANGE (89%-115% of
CR1
red
nominal value)
VOUT1 OUTSIDE PGOOD
RANGE (89-115% of
nominal value)
4
Page 5
Application Note 1067
Step 2: Connect load and measurement equipment
2a. Connect load for VDDQ channel and measurement
equipment
– Connect the positive terminal (+) of the electronic
load and the DVM to the VDDQ terminal J5.
Connect the negative terminal (-) of the electronic
load and the DVM to the GND terminal J7.
2b. Connect load for VTT channel and measurement
equipment
– Connect the positive terminal (+) of the electronic
load and the DVM to the VTT terminal J6. Connect
the negative terminal (-) of the electronic load and
the DVM to the GND terminal J9.
2c. Connect measurement equipment for VREF
– Connect the positive terminal (+) of a DVM to the
V_REF terminal J8. Connect the negative terminal
(-) of the DVM to the GND terminal J10.
Step 3: Set control jumper as illustrated in Table 1 on
page 4.
Step 4: Power up the EVAL board
4a. Take the adjustable 24VDC power supply that is
connected to the VIN terminals J2 and J3 and make
sure the output voltage is set to zero volts.
4b. Turn on the 24VDC power supply.
4c. While reading the DVM, increase the output voltage
of the 24VDC power supply to 5VDC.
4d. Turn on the 5VDC power supply, connected with
VCC.
4e. While reading the DVM, increase the output voltage
of the 5VDC power supply to 5VDC.
Step 5: Take initial measurements
(The LED should become red at this point)
5a. Install the EN1 shunt jumper JP3 for CH1 (VDDQ).
5b. Install the EN2 shunt jumper JP4 for CH2 (VTT).
5c. The last action will bring LED indictor from RED to
GREEN. And the PGOOD voltage on J11 should be
5V, equal to the VCC voltage.
5d. Read the DVM connected to the VDDQ
terminal J5. It should show a value between
2.450V-2.550V
5e. Read the DVM connected to the VTT
terminal J6. It should show a half the value of
VDDQ, between 1.225V-1.275V.
5f. Read the DVM connected to the V_REF terminal J8.
It should read half the value of VDDQ, between
1.225-1.275V.
NOTE: A 10 nF capacitor must be installed on to C21 position if JP4
is installed prior to JP3 to ensure proper start up. C21 is the soft start
capacitor for CH2, as shown in the schematics.
NOTE: Terminals J3 (EN1) and J4 (EN2) may be connected to a
pulse generator for controlled on/off operation and may be observed
with an oscilloscope. However, make sure the signal generator
enable voltage is no more than 5V VCC.
Step 6: Vary operating conditions
6a. Adjust the 24V VIN Power Supply between
5-24 VDC.
– The VDDQ and VTT DVM readings should stay at
the above reading range.
6b. Adjust the electronic load current level.
– The voltage readings on VDDQ, VTT, and V_REF
should be within the above reading range. The load
on VDDQ should be less than 5A with MOSFET
FDS6912 mounted in the original EVAL board
setup. The load on VTT should be less than 3A, and
the load on V_REF should be less than 10mA. A
resistor can be connected between J8 and J10 as a
load for V_REF. The resistor value should be
greater than 125 Ohm. If a larger current creating
MOSFET is used, the load on VDDQ can be higher
than 5A.
Step 7: Power off
7a. Turn off the VCC power supply
7b. Turn off the VIN power supply
5
Page 6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VOUT2
VCC'
PG1
VOUT2
PG1
VCC'
VIN'
VIN'
VOUT1
VOUT1
VOUT1
VCC
VCC
VCC
VCC'
Title
Size Document Number Rev
Date: Sheet
of
ISL6225A eval_DDR
A
ISL6227 EVALUATION BOARD (DDR)
INTERSIL
Building 2A,Suite 105
4020 Stirrup Creek Drive
B
11
Phone: (919) 405 3650
Durham, NC 27703
Fax: (919) 405 3651
VTT
VIN
GND
GND
VCC
VDDQ
GND
V_REF
GND
EN2
EN1
PGOOD
EN1 EN2
GND
FCCM
GND
VDDQ
VDDQ
VINPRG
VTT
+
C13
220u
R2
0
JP5
123
J13
C21
NI
JP1
R12
NI
C25
4.7u
10V
JP4
C7
1.0u
10V
C6
4.7u
10V
C26
10n
50V
R7
NI
J5
C23
4.7u
10V
C11
15n
50V
J6
+
C24
NI
L1
4.6u
Panasonic ETQ-P6F4R6HFA
+
C14
220u
4V
C10
0.15u
25V
+
C15
NI
Q1
BSS123LT1
R20
10.0K
+
C12
220u
4V
R13
NI
U2
FDS6912A
1
2
3
45
6
7
8
C2
10u
25V
X5R
+
C4
68u
16V
R16
680
J11
C16
4.7u
10V
JP3
TP1
VTT
R3
0
R8
17.8K
R18
680
J4
TP4
PHASE 1
R14
10.0K
C5
4.7u
10V
J1
J2
J7
J14
JP2
1
2
3
C18
NI
R1
100k
D2
BAT54WT1
13
J3
D1
BAT54WT1
13
+
C1
NI
J8
J12
U3
FDS6912A
1
2
3
4 5
6
7
8
R19
10.0K
R10
10.0k
C9
0.15u
25V
C17
NI
R4
2.49K
R15
680
R11
10.0K
R9
100k
TP3
PHASE 2
U1
ISL6227
GND
1
LGATE1
2
PGND1
3
PHASE1
4
UGATE1
5
BOOT1
6
ISEN1
7
EN1
8
VOUT1
9
VSEN1
10
OCSET1
11
SOFT1
12
DDR
13
VIN
14
PG1
15
PG2/REF
16
SOFT2
17
OCSET2
18
VSEN2
19
VOUT2
20
EN2
21
ISEN2
22
BOOT2
23
UGATE2
24
PHASE2
25
PGND2
26
LGATE2
27
VCC
28
RED GREEN
CR1
LXA3025IGC-TR
C22
NI
R17
680
C20
10n
50V
J9
TP2
VDDQ
C3
10u
25V
X5R
C8
1.0u
10V
J10
R6
NI
L2
1.5u
Panasonic ELL-6SH1R5M
R5
1.00K
C19
NI
FIGURE 3. ISL6227EVAL1 SCHEMATIC
Application Note 1067
Page 7
Application Note 1067
TABLE 3. Bill of Materials (BOM)
Qty Reference Description Vendor MFG. Part No.
1 PWB-PCB,ISL6227EVAL1,REVA Intersil ISL6227EVAL1PCB
1 C1 CAP, RADIAL, 220uF, 25V, 20%, ALUM, ELEC Panasonic EEU-FC1E221
2 C20,C26 CAPACITOR, SMD, 0805,.01uF,50V, 10%,X7R Panasonic ECJ-2VB1H103K
1 C11 CAPACITOR, SMD, 0805,.015uF,50V,10%,X7R Panasonic ECU-V1H153K
2 C9,C10 CAPACITOR, SMD,0805, 0.15uF,25V,10%, X7R Panasonic ECJ-2YB1E154K
2 C7,C8 CAPACITOR, SMD, 1206, 1uF,10V, 10%,X7R Venkel C1206X7R100-105KNE
5 C5,C6,C16,C23,C25 CAPACITOR,SMD,1206,4.7uF,10V,10%,X7R Venkel C1206X7R100475KNE
3 C12,C13,C14,C24 CAP TANT,LOW ESR,SMD,D3,220uF,4V,20% Sanyo 4TPC220M
1 C4 CAP TANT,LOW ESR,SMD, D, 68uF, 16V,10% Kemet T494D686K016AS
2 C2,C3 CAPACITOR,SMD,1812, 10uf, 25V,20%, X5R Taiyo Yuden TMK432BJ106MM-T
4 TP1-TP4 CONN-GEN,SCOPE PROBE TEST PT,COMPACT Tektronix 131-5031-00
12 J1-J11, J14 CONN-GEN,TERMINAL POST,TH,.09 INSERTION Keystone 1502-2
2 J12,J13 CONN-HEADER,1x1,BRKAWY 1X36,2.54mm,ST Berg/FCI 68000-236-1X1
2 JP2,JP5 CONN-HEADER,1x3,BRKAWY 1X36,2.54mm,ST Berg/FCI 68000-236-1X3
3 JP1,JP3,JP4 CONN-HEADER,1x2,RETENTIVE,2.54mm,ST Berg/FCI 69190-202
5 JP1-JP5 CONN-JUMPER,2PIN,SHUNT SPC02SYAN
2 D1,D2 DIODE-SCHOTTKYBARR,SMD,SOT323,3P,30V,.2A ON-Semiconductor BAT54WT1-T
1 CR1 LED,SMD,4P,OTHER,POLARIZEDRED/GRN Lumex SSL-LXA3025IGC-TR
1 L1 PWR CHOKE COIL, SMD, 5.7mm, 4.6uH, 25% Panasonic ETQ-P6F4R6HFA
1 U1 IC-DUAL SWITCHER 30V,28P,QSOP Intersil ISL6227CA
1 Q1 TRANSISTOR,N-CHANNEL,3P,SOT23 ON-Semiconductor BSS123LT1-T
2 U2,U3 TRANSIST-DUAL MOS, N-CHANNEL, 8P, SOIC,30V Fairchild FDS6912A
2 R2,R3 RESISTOR, SMD, 0805, 0ohm, 1/10W, TF Panasonic ERJ-6GEY0R00V
1 R5 RESISTOR, SMD, 0805, 1K, 1/10W, 1%, TF Panasonic ERJ-6ENF1001
5 R10,R11,R14,R19,R20 RESISTOR, SMD, 0805, 10K, 1/10W, 1%, TF Panasonic ERJ-6ENF1002V
2 R1,R9 RESISTOR,SMD, 0805, 100K, 1/10W, 1%, TF Panasonic ERJ-6ENF1003V
1 R8 RESISTOR,SMD, 0805, 17.8K, 1/10W, 1%, TF Panasonic ERJ-J6ENF1782V
1 R4 RESISTOR,SMD, 0805, 2.49K, 1/10W, 1%, TF Panasonic ERJ-6ENF2491
4 R15-R18 RESISTOR,SMD,0805,680ohm, 1/10W, 5%, TF Panasonic ERJ-6GEYJ681V
4 BAG,STATIC,5X8, ZIP LOC BUMPONS,.44inW x .20inH,DOMETOP,, BLACK SJ-5003-BLACK
0 C1,C15,C17,C18,C19,C21,C
22,C24
0 R6,R7,R12,R13 DO NOT POPULATE DNP
1 L2 PWR CHOKE COIL,SMD,6x6x3mm,1.5uH,20% 3.2A Panasonic ELL6SH1R5M
1 LABEL, FOR SERIAL NUMBER AND BOM REV # LABEL-SERIAL NUMBER
DO NOT POPULATE DNP
7
Page 8
Application Note 1067
8
Page 9
Application Note 1067
9
Page 10
Application Note 1067
10
Page 11
Application Note 1067
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
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