intersil ISL6161 DATA SHEET

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ISL6161

Data Sheet July 2004

Dual Power Distribution Controller

The ISL6161 is a HOT SWAP dual supply power distribution controller that can be used in PCI-Express applications.

Two external N-Channel MOSFETs are driven to distribute and control power while providing load fault isolation. At turnon, the gate of each external N-Channel MOSFET is charged with a 10µA current source. Capacitors on each gate (see the Typical Application Diagram), create a programmable ramp (soft turn-on) to control inrush currents. A built in charge pump supplies the gate drive for the 12V supply N-Channel MOSFET switch.

Over current protection is facilitated by two external current sense resistors and FETs. When the current through either resistor exceeds the user programmed value the controller enters the current regulation mode. The time-out capacitor, C

, starts charging as the controller enters the time out

TIM

period. Once C N-Channel MOSFETs are latched off. In the event of a hard and fast fault of at least three times the programmed current limit level, the N-Channel MOSFET gates are pulled low immediately before entering the time out period. The controller is reset by a rising edge on the ENABLE

The ISL6161 constantly monitors both output voltages and reports either one being low on the PGOOD output as a low. The 12V PGOOD Vth is ~10.8V and the 3.3V Vth is ~2.8V nominally.

charges to a 2V threshold, both the

TIM

pin.

FN9104.3

Features

• HOT SW AP Dual Pow er Distribution and Control f or +12V and +3.3V

• Provides Fault Isolation

• Programmable Current Regulation Level

• Programmable Time Out

• Charge Pump Allows the Use of N-Channel MOSFETs

• Power Good and Over Current Latch Indicators

• Adjustable Turn-On Ramp

• Protection During Turn-On

• Two Levels of Current Limit Detection Provide Fast Response to Varying Fault Conditions

•1µs Response Time to Dead Short

•3µs Response Time to 200% Current Overshoot

• Pb-free available

Applications

• PCI-Express Applications

• Power Distribution and Control

• Hot Plug, Hot Swap Components

TEMP. RANGE

PART NUMBER

(oC) PACKAGE

ISL6161CB -0 to 70 14 Ld SOIC M14.15 ISL6161CBZA

(See Note)

*Add “-T” suffix to part number for tape and reel packaging.

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.

-0 to 70 14 Ld SOIC (Pb-free)

PKG.

DWG. #

M14.15

Pinout

Typical Application Diagram

ISL6161 (SOIC)

TOP VIEW

12VS

12VG

ENABLE

3VG 3VS

1 2 3 4 5 6 7

12VISEN

ILIM

GND

PUMP

TIM

PGOOD

3VISEN

OPTIONAL

FILTER

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

12V

GATE

ENABLE

3.3V

GATE

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

INPUT

SENSE

ISL6161 12VS 12VG

ENABLE 3VG

3VS

SENSE

PUMP

12VISEN

ILIM

GND

PUMP

TIM

PGOOD

3ISEN

ILIM

TIM

LOAD

3.3V

LOAD

Simplified Schematic

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12VIN

SENSE

TO LOAD

10µA

12ISEN

ILIM

GND

PUMP

TIM

PGOOD

3ISEN

ILIM

ISL6161

PUMP

TIM

TO V

OPTIONAL

OC LATCH

GATE

OPTIONAL

FILTER

GATE

VDD

12VS

12VG

VDD

ENABLE

3VG

3VS

CLIM

FALLING

EDGE

10µA

18V

RISING

EDGE

RESET

12V

10µA

DELAY

ENABLE

FALLING

EDGE

DELAY

CLIM

18V

ENABLE

12V

POR

PGOOD

100µA

QPUMP

12V

5VIN

ISL6161

SENSE

TO LOAD

ISL6161

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Pin Descriptions

PIN # SYMBOL FUNCTION DESCRIPTION

1 12VS 12V Source Connect to source of associated external N-Channel MOSFET switch to sense output

2 12VG 12V Gate Connect to the gate of associated N-Channel MOSFET switch. A capacitor from this node

4 NC Not Connected 5 ENABLE

6 3VG 3V Gate Connect to the gate of the external 3V N-Channel MOSFET. A capacitor from this node to

7 3VS 3 Source Connect to the source side of 3V external N-Channel MOSFET switch to sense output

8 3VISEN 3V Current Sense Connect to the load side of the 3V sense resistor to measure the voltage drop across this

9 P GOOD Power Good indicator Indicates that all output voltages are within specification. PGOOD is driven by an open drain

Chip Supply Connect to 12V supply. This can be either connected directly to the +12V rail supplying the

Enable / Reset ENABLE is used to turn-on and reset the chip. Both outputs turn-on when this pin is driven

voltage.

to ground sets the turn-on ramp. At turn-on this capacitor will be charged to ~17.4V by a 10µA current source.

load voltage or to a dedicated V V

decoupling must be paid to prevent sagging as heavy loads are switched on.

low. After a current limit time out, the chip is reset by the rising edge of a reset signal applied to the ENABLE 5V open drain and standard logic.

ground sets the turn-on ramp. At turn-on this capacitor will be charged to ~11.4V by a 10µA current source.

voltage.

resistor between 3VS and 3VISEN pins.

N-Channel MOSFET. It is pulled low when any output is not within specification.

pin. This input has 100µA pull up capability which is compatible with 3V and

+12V supply. If the former is chosen special attention to

10 C

11 C

12 GND Chip Ground 13 R

14 12VISEN 12V Current Sense Connect to the load side of sense resistor to measure the v olt age drop acr oss this resisto r.

TIM

PUMP

ILIM

Current Limit Timing Capacitor

Charge Pump Capacitor

Current Limit Set Resistor

Connect a capacitor from this pin to ground. This capacitor controls the time between the onset of current limit and chip shutdown (current limit time-out). The duration of current limit time-out (in seconds) = 200kΩ x C

Connect a 0.1µF capacitor between this pin and VDD (pin 3). Provides charge storage for 12VG drive.

A resistor connected between this pin and ground determines the current level at which current limit is activated. This current is determined by the ratio of the R sense resistor (R

). The ISL6161 is limited to a 10kΩ min. value (OC Vth = 100mV) resistor whereas

SENSE

the ISL6161 can accommodate a 5kΩ resistor for a lower OC Vth (50mV).

). The current at current limit onset is equal to 10µA x (R

SENSE

TIM

(Farads).

resistor to the

ILIM

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