MP3/USB 2.0 High Speed Switch with
Negative Signal Handling
The Intersil ISL54206A dual SPDT (Single Pole/Double
Throw) switches combine low distortion audio and accurate
USB 2.0 high speed data (480Mbps) signal switching in the
same low voltage device. When operated with a 2.7V to 3.6V
single supply these analog switches allow audio signal
swings below-ground, allowing the use of a common USB
and audio headphone connector in Personal Media Players
and other portable battery powered devices.
The ISL54206A logic control pins are 1.8V compatible which
allows for control via a standard µcontroller. With a VDD
voltage in the range of 2.7V to 3.6V the IN pin voltage can
exceed the VDD rail allowing for the USB 5V VBUS voltage
from a computer to directly drive the IN pin to switch
between the audio and USB signal sources in the portable
device. The part has an audio enable control pin to open all
the switches and put the part in a low power state.
The ISL54206A is available in a small 10 Ld 2.1mmx1.6mm
ultra-thin µTQFN package and a 10 Ld 3mmx3mm TDFN
package. It operates over a temperature range of -40 to
+85°C.
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Application Note AN557 “Recommended Test Procedures
for Analog Switches”
FN6515.0
Features
• High Speed (480Mbps) and Full Speed (12Mbps)
Signaling Capability per USB 2.0
• Low Distortion Negative Signal Capability
• Control Pin to Open all Switches and Enter Low Power
State
• Compliant with USB 2.0 Short Circuit Requirements
Without Additional External Components
Applications
• MP3 and Other Personal Media Players
• Cellular/Mobile Phones
•PDA’s
• Audio/USB Switching
Application Block Diagram
VBUS
USB AND HEADPHONE JACK
1
IN
COM-
COM+
V
DD
ISL54206A
LOGIC CIRCUITRY
4MΩ
50kΩ
GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
50kΩ
µCONTROLLER
CTRL
USB
DD+
L
R
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
HIGH-SPEED
TRANSCEIVER
CODEC
Pinouts (Note 1)
VDD
IN
COM -
1
2
3
ISL54206A
(10 LD µTQFN)
TOP VIEW
CTRL
10
4M
LOGIC
CONTROL
ISL54206A
ISL54206A
(10 LD TDFN)
TOP VIEW
VDD
1
IN
COM -
COM +
2
3
4
D-
9
D+
8
L
7
LOGIC
CONTROL
4M
CTRL
10
D-
9
D+
8
7
L
R
COM +
4
50k
5
GND
6
50k
NOTE:
1. ISL54206A Switches shown for IN = Logic “0” and CTRL = Logic “1”.
Truth Table
ISL54206A
INCTRLL, RD+, D-
00OFFOFF
01ONOFF
1XOFFON
IN: Logic “0” when ≤0.5V, Logic “1” when ≥1.4V with 2.7V to 3.6V
supply.
CTRL: Logic “0” when ≤0.5V or Floating, Logic “1” when ≥1.4V with
2.7V to 3.6V supply.
50k
6
R
GND
5
50k
Pin Descriptions
ISL54206A
PIN NO.NAMEFUNCTION
1VDDPower Supply
2INDigital Control Input
3COM-Voice and Data Common Pin
4COM+Voice and Data Common Pin
5GNDGround Connection
6RAudio Right Input
7 LAudio Left Input
8D+USB Differential Input
9D-USB Differential Input
10CTRLDigital Control Input (Audio Enable)
Ordering Information
PART NUMBER
(Note)
ISL54206AIRTZ06AZ-40 to +8510 Ld 3mmx3mm TDFNL10.3x3A
ISL54206AIRTZ-T06AZ-40 to +8510 Ld 3mmx3mm TDFN Tape and ReelL10.3x3A
ISL54206AIRUZ-TFU-40 to +8510 Ld Col µTQFN L10.2.1X1.6A
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
or NiPdAu termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PART
MARKINGTEMP. RANGE (°C)PACKAGE (Pb-Free)PKG. DWG. #
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
2. Signals on D+, D-, L, R, COM-, COM+, CTRL, IN exceeding V
ratings.
3. θ
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
or GND by specified amount are clamped. Limit current to maximum current
Voltage Low, V
Voltage High, V
Input Current, I
Input Current, I
Input Current, I
, V
INL
CTRLL
, V
INH
CTRLH
INL, ICTRLL
INH
CTRLH
CTRL Pull-Down Resistor, R
CTRLVDD
V
= 2.7V to 3.6VFull--0.5V
DD
V
= 2.7V to 3.6VFull1.4--V
DD
V
= 3.6V, IN = 0V, CTRL = 0VFull-502050nA
DD
V
= 3.6V, IN = 3.6V, CTRL = 0VFull-502050nA
DD
V
= 3.6V, IN = 0V, CTRL = 3.6VFull-21.12μA
DD
= 3.6V, IN = 0V, CTRL = 3.6VFull-4-MΩ
NOTES:
4. V
= Input voltage to perform proper function.
LOGIC
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range..
matching between channels is calculated by subtracting the channel with the highest max RON value from the channel with lowest max
7. R
ON
R
value, between L and R or between D+ and D-.
ON
8. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested.
Test Circuits and Waveforms
DD
GND
C
COMx
R
L
------------------------------
RLR
+
ON()
RL
50Ω
V
OUT
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
V
V
INPUT
DD
0V
0V
50%
t
ON
90%
t
OFF
V
OUT
tr <20ns
<20ns
t
f
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
V
CTRL
AUDIO or USB
IN
SWITCH
INPUT
V
IN
V
INPUT
Repeat test for all switches. CL includes fixture and stray
capacitance.
V
OUT
=
V
(INPUT)
= 1.4V,
C
L
10pF
FIGURE 1A. MEASUREMENT POINTS
5
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
FN6515.0
June 25, 2007
Test Circuits and Waveforms (Continued)
V
LOGIC
INPUT
DD
0V
ISL54206A
V
INPUT
CTRL
D- or D+
L or R
IN
V
DD
C
V
R
50Ω
OUT
C
L
L
10pF
COMx
SWITCH
OUTPUT
V
L OR R
V
OUT
0V
t
D
FIGURE 2A. MEASUREMENT POINTS
V
DD
RON = V1/100mA
100mA
V
1
CTRL
L OR R
COMx
GND
V
90%
IN
Repeat test for all switches. C
capacitance.
FIGURE 2. BREAK-BEFORE-MAKE TIME
C
V
D- OR D+
OV
IN
GND
L
FIGURE 2B. TEST CIRCUIT
RON = V1/40mA
V
1
40mA
includes fixture and stray
V
DD
C
CTRL
D- OR D+
IN
COMx
GND
VDD
Repeat test for all switches.
FIGURE 3. AUDIO R
Repeat test for all switches.
TEST CIRCUITFIGURE 4. USB R
ON
6
TEST CIRCUIT
ON
FN6515.0
June 25, 2007
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