intersil ISL54200 DATA SHEET

®
ISL54200
Data Sheet January 24, 2007
USB 2.0 High/Full Speed Multiplexer
The Intersil ISL54200 dual 2:1 multiplexer IC is a single supply part that can operate from a single 2.7V to 5.5V supply . It contains two SPDT (Single Pole/Double Throw) switches configured as a DPDT. The part was designed for switching between USB High-Speed and USB Full-Speed sources in portable battery powered products.
The 7
Ω normally-closed (NC) FSx switches can swing rail to
rail and were specifically designed to pass USB full speed data signals (12Mbps) that range from 0V to 3.6V. The 4.5 normally-open (NO) HSx switches have high bandwidth and low capacitance and were specifically designed to pass USB high speed data signals (480Mbps) with minimal di stortion.
The part can be used in Personal Media Players and other portable battery powered devices that need to switch between a high-speed transceiver and a full-speed transceiver while connected to a single USB host (computer).
The digital logic inputs are 1.8V logic compatible when operated with a 2.7V to 3.6V supply. The part has an enable pin to open all switches. It can be used to facilitate pro per bus disconnect and connection when switching between the USB sources.
The ISL54200 is available in a 10 Ld 3mmx3mm TDFN and a small 10 Ld 2.1mmx1.6mm µTQFN packages. It operates over a temperature range of -40 to +85°C.
Ω
FN6408.0
Features
• High Speed (480Mbps) and Full Speed (12Mbps) Signaling Capability per USB 2.0
• 1.8V Logic Compatible (2.7V to +3.6V supply)
• Enable Pin to Open all Switches
• -3dB Frequency
- HSx Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . .880MHz
- FSx Switches. . . . . . . . . . . . . . . . . . . . . . . . . . . . .550MHz
• Cross-talk @ 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . -70dB
• OFF Isolation @ 100kHz . . . . . . . . . . . . . . . . . . . . . -98dB
• Single Supply Operation (V
• Available in Ultra-thin
) . . . . . . . . . . . . 2.7V to 5.5V
DD
µTQFN and TDFN Packages
• Pb-Free Plus Anneal (RoHS Compliant)
Applications
• MP3 and other Personal Media Players
• Cellular/Mobile Phones
•PDA’s
• Digital Cameras and Camcorders
Application Block Diagram
VBUS
D-
D+
USB CONNECTOR
GND
3.3V
V
IN
ISL54200
LOGIC CIRCUITRY
COMD1
COMD2
GND
DD
EN
4MΩ
HSD1 HSD2
FSD1
FSD2
µCONTROLLER
USB
HIGH-SPEED
TRANSCEIVER
USB
FULL-SPEED
TRANSCEIVER
PORTABLE MEDIA DEVICE
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
Pinouts
ISL54200
(10 LD TDFN
TOP VIEW
VDD
COMD1
COMD2
GND
1
IN
2
3
4
5
LOGIC
CONTROL
4M
EN
10
9
HSD1
8
HSD2
7
FSD1
6
FSD2
NOTE:
1. ISL54200 Switches Shown for IN = Logic “0” and EN = Logic “1”.
Ordering Information
ISL54200
VDD
COMD1
COMD2
ISL54200
(10 LD µTQFN)
TOP VIEW
EN
10
4M
HSD1
1
IN
2
3
4
LOGIC
CONTROL
5
GND
9
HSD2
8
FSD1
7
FSD2
6
PART NUMBER
(Note)
PART
MARKING TEMP. RANGE (°C) PACKAGE (Pb-Free) PKG. DWG. #
ISL54200IRZ 200Z -40 to +85 10 Ld 3x3 TDFN L10.3x3A ISL54200IRZ-T 200Z -40 to +85 10 Ld 3x3 TDFN Tape and Reel L10.3x3A ISL54200IRUZ-T FM -40 to +85 10 Ld 2.1x1.6mm μTQFN Tape and Reel L10.2.1x1.6A
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Truth Table
ISL54200
EN IN FSD1, FSD2 HSD1, HSD2
1 0 ON OFF 11OFFON 0XOFFOFF
Logic “0” when 0.5V, Logic “1” when 1.4V with a 2.7V to 3.6V Supply. X = Don’t Care
Pin Descriptions
ISL54200
PIN NO. NAME FUNCTION
1 VDD Power Supply 2 IN Select Logic Control Input 3 COMD1 USB Common Port 4 COMD2 USB Common Port 5 GND Ground Connection 6 FSD1 Full Speed USB Differential Port 7 FSD2 Full Speed USB Differential Port 8 HSD1 High Speed USB Differential Port 9 HSD2 High Speed USB Differential Port
10 EN Bus Switch Enable
2
FN6408.0
January 24, 2007
ISL54200
Absolute Maximum Ratings Thermal Information
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 6.0V
Input Voltages
FSD2, FSD1, HSD2, HSD1 (Note 2) . . . . . - 1V to ((V
IN, EN (Note 2). . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V
Output Voltages
DD DD
) +0.3V) ) +0.3V)
COMD1, COMD2 (Note 2) . . . . . . . . . . . . . . . . . . . . . . . -1V to 5V
Continuous Current (HSD2, HSD1, FSD2, FSD1). . . . . . . . . ±40mA
Peak Current (HSD2, HSD1, FSD2, FSD1)
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . ±100mA
ESD Rating:
HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>7kV
MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>400V
CDM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >1.4kV
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. Signals on FSD1, FSD2, HSD1, HSD2, COMD1, COMD2, EN, IN exceeding V maximum current ratings.
3. θ
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
JA
Thermal Resistance (Typical, Note 3) q
(°C/W)
JA
10 Ld 3x3 TDFN Package . . . . . . . . . . . . . . . . . . . . 55
10 Ld µTQFN Package . . . . . . . . . . . . . . . . . . . . . . 140
Maximum Junction Temperature (Plastic Package). . . . . . . +150°C
Maximum Stor age Temperatur e Range. . . . . . . . . . . -65°C to +150°C
Operating Conditions
Temperature Range
ISL54200IRZ and ISL54200IRUZ . . . . . . . . . . . . . . -40°C to +85°C
V
Supply Voltage Range. . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
DD
or GND by specified amount are clamped. Limit current to
DD
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: V
V
= 0.5V, (Notes 4, 6), Unless Otherwise Specified
ENL
PARAMETER TEST CONDITIONS ANALOG SWITCH CHARACTERISTICS NC Switches (FSD1, FSD2)
Analog Signal Range, V ON Resistance, r
Matching Between Channels,
r
(ON)
Δr
(ON)
r
Flatness, r
(ON)
OFF Leakage Current, I
ON Leakage Current, I
ANALOG
(ON)
FLAT(ON)
FSX(OFF)
FSX(ON)
NO Switches (HSD1, HSD2)
Analog Signal Range, V ON Resistance, r
ON Resistance, r
Matching Between Channels,
r
(ON)
Δr
(ON)
Flatness, r
r
(ON)
ANALOG
(ON)
(ON)
FLAT(ON)
V
= 3.3V, IN = 0V, EN = 3.3V Full 0 - V
DD
V
= 3.3V, IN = 0.5V, EN = 1.4V, I
DD
V
or V
FSD1
V
= 3.3V, IN = 0.5V, EN = 1.4V, I
DD
V
or V
FSD1
= 0V to 3.3V, (See Figure 4)
FSD2
= Voltage at ma x r
FSD2
= 40mA,
COMx
= 40mA,
COMx
over signal range
(ON)
of 0V to 3.3V, (Note 8) V
= 3.3V, IN = 0.5V, EN = 1.4V, I
DD
V
FSD1
or V
= 0V to 3.3V, (Note 7)
FSD2
COMx
= 40mA,
V+ = 3.6 V, IN = 3.6V, EN = 0V and 3.6V, V 3V , V
V+ = 3.6V, IN = 0V, EN = 3.6V, V V
V V
V
V V
V V r
V V
= 3V, 0.3V
FSX
= 0.3V, 3V,
= 0.3V, 3V
FSX
= 3.3V, IN = 3.3V, EN = 3.3V Full 0 - V
DD
= 3.3V, IN = 1.4V, EN = 1.4V, I
DD
or V
HSD2
= 3.3V, IN = 1.4V, EN = 1.4V, I
DD
or V
HSD2
= 3.3V, IN = 1.4V, EN = 1.4V, I
DD
or V
HSD2
over signal range of 0V to 400mV (Note 8)
(ON)
= 3.3V, IN = 1.4V, EN = 1.4V, I
DD
or V
HSD2
= 3.3V (See Figure 3)
HSD1
= 0V to 400mV (See Figure 3)
HSD1
= Voltage at max r
HSD1
= 0V to 400mV, (Note 7)
HSD1
COMx
COMx
COMx
COMx
, Voltage at max
(ON)
COMx
= 1mA,
= 40mA,
= 40mA,
= 40mA,
= +3.3V, GND = 0V, V
DD
= 0.3V,
COMx
TEMP
(°C)
= 1.4V, V
INH
MIN
(Note 5) TYP
= 0.5V, V
INL
= 1.4V,
ENH
MAX
(Note 5) UNITS
DD
+25 - 7 10 Ω
Full - - 15 Ω
+25 - 0.1 0.35 Ω
Full - - 0.4 Ω
+25 - 4 6 Ω
Full - - 8 Ω
+25 -20 2 20 nA
Full -70 - 70 nA
+25 -20 2 20 nA
Full -70 - 70 nA
DD
+25 - 20 30 Ω
Full - - 35 Ω
+25 - 4.5 6 Ω
Full - - 8 Ω
+25 - 0.01 0.1 Ω
Full - - 0.5 Ω
+25 - 0.4 1 Ω
Full - - 1.5 Ω
V
V
3
FN6408.0
January 24, 2007
ISL54200
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: V
V
= 0.5V, (Notes 4, 6), Unless Otherwise Specified (Continued)
ENL
PARAMETER TEST CONDITIONS
OFF Leakage Current, I or I
HSD1(OFF)
ON Leakage Current, I I
HSD1(ON)
HSD2(OFF)
HSD2(ON)
DYNAMIC CHARACTERISTICS
Turn-ON Time, t Turn-OFF Time, t
ON
OFF
Break-Before-Make Time Delay, t
Skew, t
SKEW
(HSx Switch)
Total Jitter, t
J
(HSx Switch) Propagation Delay, t
(HSx Switch) Skew, t
SKEW
PD
(FSx Switch)
Rise
/Fall Time Mismatch, t
(FSx Switch) Total Jitter, t
(FSx Switch) Propagation Delay, t
(FSx Switch)
J
PD
Crosstalk V
OFF Isolation V FSx Switch -3dB Bandwidth Signal = -10dBm, 1.0VDC offset, R HSx Switch -3dB Bandwidth Signal = -10dBm, 0.2VDC offset, R HSx OFF Capacitance, C
FSx OFF Capacitance, C
COM ON Capacitance, C
COM ON Capacitance, C
HSxOFF
FSxOFF
COMX(ON)
COMX(ON)
POWER SUPPLY CHARACTERISTICS
Power Supply Range, V Positive Supply Current, I
DD
DD
V
= 3.6V , IN = 0V, EN = 0 and 3.6V, V
DD
V
or
V V
V V V
D
V t
R
(See Figure 7) V
t
R
V (See Figure 7)
V t
R
(See Figure 7)
M
V t
R
V t
R
V (See Figure 7
= 3V, 0.3V, V
COMD2
= 3.6V, IN = 3.6V, EN = 3.6V, V
DD
= 0.3V, 3.0V, V
COMD2
= 3.3V, RL = 45Ω, CL = 10pF, (See Figure 1) +25 - 25 - ns
DD
= 3.3V, RL = 45Ω, CL = 10pF, (See Figure 1) +25 - 15 - ns
DD
= 3.3V, RL = 45Ω, CL = 10pF, (See Figure 2) +25 -7-ns
DD
= 3.3V , IN = 3.3V, EN = 3.3V , RL = 45Ω, CL = 10pF ,
DD
HSD2
HSD2
or V
or V
= tF= 720ps at 480Mbps, (Duty Cycle = 50%)
=3.3V , IN = 3.3V, EN = 3.3V, RL = 45Ω, CL = 10pF,
DD
= tF= 720ps at 480Mbps
= 3.3V , IN = 3.3V, EN = 3.3V , RL = 45Ω, CL = 10pF ,
DD
= 3.3V, IN = 0V, EN = 3.3V, RL = 39Ω, CL = 50pF,
DD
= tF = 12ns at 12Mbps, (Duty Cycle = 50%)
= 3.3V, IN = 0V, EN = 3.3V, RL = 39Ω, CL = 50pF,
DD
= tF = 12ns at 12Mbps, (Duty Cycle = 50%)
= 3.3V, IN = 0V, EN = 3.3V, RL = 39Ω, CL = 50pF,
DD
= tF = 12ns at 12Mbps
= 3.3V, IN = 0V, EN = 3.3V, RL = 39Ω, CL = 50pF,
DD
= 3.3V, RL = 45Ω, f = 1MHz
DD
HSD1
HSD1
COMD1
= 0.3V, 3V
COMD1
= 0.3V , 3.0V
(See Figure 6)
= 3.3V, RL = 45Ω, f = 100kHz +25 - -98 - dB
DD
= 45Ω, CL = 5pF +25 - 880 - MHz
L
= 45Ω, CL = 5pF +25 - 550 - MHz
L
f = 1MHz, V V
= V
HSD2
f = 1MHz, V V
FSD2
f = 1MHz, V V
= V
HSD2
f = 1MHz, V V
= V
FSD2
V
= 3.6V, IN = 0V or 3.6V, EN = 0V or 3.6V +25 - 20 60 nA
DD
= 3.3V, IN = 0V, EN = 3.3V, V
DD
= 0V, (See Figure 5)
COMx
= 3.3V, IN = 3.3V, EN = 3.3V, V
DD
= V
= 0V, (See Figure 5)
COMx
= 3.3V, IN = 3.3V, EN = 3.3V, V
DD
= 0V, (See Figure 5)
COMx
= 3.3V, IN = 0V, EN = 3.3V, V
DD
= 0V, (See Figure 5)
COMx
= +3.3V, GND = 0V, V
DD
TEMP
(°C)
or
+25 -20 2 20 nA
Full -70 - 70 nA
or
+25 -20 2 20 nA
Full -70 - 70 nA
+25 - 50 - ps
+25 - 210 - ps
+25 - 250 - ps
+25 - 0.15 - ns
+25 - 10 - %
+25 - 1.6 - ns
+25 - 0.9 - ns
+25 - -70 - dB
HSD1
FSD1
HSD1
FSD1
or
or
+25 - 6 - pF
or
+25 - 9 - pF
or
+25 - 12 - pF
+25 - 15 - pF
Full 2.7 - 5.5 V
Full - - 80 nA
= 1.4V, V
INH
INL
MIN
(Note 5) TYP
= 0.5V, V
ENH
MAX
(Note 5) UNITS
= 1.4V,
4
FN6408.0
January 24, 2007
ISL54200
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: V
V
= 0.5V, (Notes 4, 6), Unless Otherwise Specified (Continued)
ENL
PARAMETER TEST CONDITIONS
= +3.3V, GND = 0V, V
DD
TEMP
(°C)
= 1.4V, V
INH
INL
MIN
(Note 5) TYP
= 0.5V, V
ENH
MAX
(Note 5) UNITS
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V Input Voltage High, V Input Current, I Input Current, I Input Current, I
INL, IENL INH ENH
INL
INH
, V
, V
ENL
ENH
V
= 2.7V to 3.6V Full - - 0.5 V
DD
V
= 2.7V to 3.6V Full 1.4 - - V
DD
V
= 3.6V, IN = 0V, EN = 0V Full - 10 - nA
DD
V
= 3.6V, IN = 3.6 Full - 10 - nA
DD
V
= 3.6V, EN = 3.6 Full - 1 - μA
DD
NOTES:
4. V
= Input voltage to perform proper function.
LOGIC
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Parameters with limits are 100% tested at +25°C. Limits across the full temperature range are guaranteed by design and correlation.
7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range matching between channels is calculated by subtracting the channel with the highest max r
8. r
(ON)
r
value, between HSD2 and HSD1 or between FSD2 and FSD1.
(ON)
value from the channel with lowest max
(ON)
Test Circuits and Waveforms
V
tr < 20ns
< 20ns
t
f
90%
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
VIN
VIN
V
INPUT
0V
H
50%
L
t
OFF
V
OUT
90%
t
ON
Logic input waveform is inverted for switches that have the opposite logic sense.
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
V
SWITCH
INPUT
INPUT
VIN
Repeat test for all switches. C capacitance.
V
OUT
FIGURE 1B. TEST CIRCUIT
DD
EN
HSx or FSx
IN
V
=
(INPUT)
COMx
GND
includes fixture and stray
L
R
----------------------------
RLr
+
RL
45W
L
ON()
V
OUT
= 1.4V,
C
L
10pF
5
FN6408.0
January 24, 2007
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