intersil ISL5120, ISL5121, ISL5122, ISL5123 DATA SHEET

®

ISL5120, ISL5121, ISL5122, ISL5123

Data Sheet November 17, 2004

Low-Voltage, Single Supply, Dual SPST,
SPDT Analog Switches

The Intersil ISL5120, ISL5121, ISL5122, ISL5123 devices are
precision, bidirectional, dual analog switches designed to
operate from a single +2.7V to +12V supply. Targeted
applications include battery powered equipment that benefit
from the devices’ low power consumption (5µW), low leakage
currents (100pA max), and fast switching speeds (t
t

= 20ns). Cell phones, for example, often face ASIC

OFF

functionality limitations. The number of analog input or GPIO
pins may be limited and digital geometries are not well suited
to analog switch performance. This family of parts may be
used to “mux-in” additional functionality while reducing ASIC
design risk. Some of the smallest packages are available,
alleviating board space limitations, and making Intersil’s
newest line of low-voltage switches an ideal solution.

The ISL5120, ISL5121, ISL5122 are dual single-pole/single­throw (SPST) devices. The ISL5120 has two normally open
(NO) switches; the ISL5121 has two normally closed (NC)
switches; the ISL5122 has one NO and one NC switch and
can be used as an SPDT. The ISL5123 is a committed SPDT,
which is perfect for use in 2-to-1 multiplexer applications.

TABLE 1. FEATURES AT A GLANCE

ISL5120 ISL5121 ISL5122 ISL5123

Number of

Switches

SW 1/SW 2 NO/NO NC/NC NO/NC SPDT

3.3V R

ON

3.3V tON/t

5V tON/t

12V tON/t

5V R

ON

OFF

12V R

ON

OFF

Packages

OFF

2221

32Ω 32Ω 32Ω 32Ω

40ns /20ns 40ns /20ns 40ns /20ns 40ns /20ns

19Ω 19Ω 19Ω 19Ω

28ns/2y0ns 28ns/20ns 28ns/20ns 28ns/20ns

11Ω 11Ω 11Ω 11 Ω

25ns/17ns 25ns/17ns 25ns/17ns 25ns/17ns

8 Ld SOIC,

8 Ld SOT-23

8 Ld SOIC,

8 Ld SOT-23

= 28ns,

ON

8 Ld SOIC,
6 Ld SOT-23

FN6022.6

Features

• Improved (lower RON, faster switching), pin compatible
replacements for ISL84541–44

• Fully specified at 3.3V, 5V, and 12V supplies

• ON resistance (R

•R

matching between channels . . . . . . . . . . . . . . . . . ≤ 1Ω

ON

) . . . . . . . . . . . . . . . . . . . . . . . . . 19Ω

ON

• Low charge injection . . . . . . . . . . . . . . . . . . . . . . . . 5pC (Max)

• Single supply operation . . . . . . . . . . . . . . . . . .+2.7V to +12V

• Low power consumption (P

) . . . . . . . . . . . . . . . . . . . .<5µW

D

• Low leakage current. . . . . . . . . . . . . . . . . . . . . . . . . .10nA

• Fast switching action

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28ns

-t

ON

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns

-t

OFF

• Guaranteed break-before-make (ISL5122/ISL5123 only)

• Minimum 2000V ESD protection per method 3015.7

• TTL, CMOS compatible

• Available in SOT-23 packaging

• Pb-Free Available (RoHS Compliant)

Applications

• Battery powered, handheld, and portable equipment

- Cellular/mobile phones

- Pagers

- Laptops, notebooks, palmtops

• Communications systems

- Military radios

- PBX, PABX

• Test equipment

- Ultrasound

- Electrocardiograph

• Heads-up displays

• Audio and video switching

Related Literature

• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”

1

• Various circuits

- +3V/+5V DACs and ADCs

- Sample and hold circuits

- Digital filters

- Operational amplifier gain switching networks

- High frequency analog switching

- High speed multiplexing

- Integrator reset circuits

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Copyright Intersil Americas Inc. 2002-2004. All Rights Reserved

Pinouts (Note 1)

ISL5120 (SOIC)

TOP VIEW

ISL5120, ISL5121, ISL5122, ISL5123

ISL5120 (SOT-23)

TOP VIEW

NO

COM

GND

NC

COM

GND

NO

COM

GND

1

1

2

1

3

IN

2

4

1

1

2

1

IN

3

2

4

1

1

2

1

3

IN

2

4

ISL5121 (SOIC)

TOP VIEW

ISL5122 (SOIC)

TOP VIEW

V+

8

7

IN

1

6

COM

2

5

NO

2

NO

COM

1

1

V+

2

IN

3

2

4

2

COM

8

1

7

IN

1

6

GND

5

NO

2

ISL5121 (SOT-23)

TOP VIEW

V+

8

7

IN

1

6

COM

2

5

NC

2

NC

COM

1

1

V+

2

IN

3

2

4

2

COM

8

1

7

IN

1

6

GND

5

NC

2

ISL5122 (SOT-23)

TOP VIEW

V+

8

7

IN

1

6

COM

2

5

NC

2

NO

COM

1

1

2

V+

3

IN

2

4

2

8

COM

1

7

IN

1

6

GND

5

NC

2

ISL5123 (SOIC)

TOP VIEW

V+

NO

COM

NC

GND

1

2

3

4

8

7

IN

6

N.C.

5

N.C.

NOTE:

1. Switches Shown for Logic “0” Input.

Truth Table

ISL5120 ISL5121 ISL5122 ISL5123

LOGIC

NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V.

SW 1,2 SW 1,2 SW 1 SW 2 PIN NC PIN NO

0 OFF ON OFFONONOFF

1 ON OFF ON OFF OFF ON

ISL5123 (SOT-23)

TOP VIEW

NO

6

5

COM

4

NC

V+

GND

IN

1

2

3

Pin Descriptions

PIN FUNCTION

V+ System Power Supply Input (+2.7V to +12V)

GND Ground Connection

IN Digital Control Input

COM Analog Switch Common Pin

NO Analog Switch Normally Open Pin

NC Analog Switch Normally Closed Pin

N.C. No Internal Connection

2

FN6022.6

November 17, 2004

Ordering Information

ISL5120, ISL5121, ISL5122, ISL5123

PAR T N O.
(BRAND)*

ISL5120CB 0 to 70 8 Ld SOIC M8.15

ISL5120CBZ (Note) 0 to 70 8 Ld SOIC (Pb-free) M8.15

ISL5120IB -40 to 85 8 Ld SOIC M8.15

ISL5120IBZ (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15

ISL5120IH-T
(120I)

ISL5120IHZ-T (Note)
(120I)

ISL5121CB 0 to 70 8 Ld SOIC M8.15

ISL5121CBZ (Note) 0 to 70 8 Ld SOIC (Pb-free) M8.15

ISL5121IB -40 to 85 8 Ld SOIC M8.15

ISL5121IBZ (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15

ISL5121IH-T
(121I)

ISL5121IHZ-T (Note)
(121I)

ISL5122CB 0 to 70 8 Ld SOIC M8.15

ISL5122CBZ (Note) 0 to 70 8 Ld SOIC (Pb-free) M8.15

ISL5122IB -40 to 85 8 Ld SOIC M8.15

ISL5122IBZ (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15

ISL5122IH-T
(122I)

ISL5122IHZ-T (Note)
(122I)

ISL5123CB 0 to 70 8 Ld SOIC M8.15

ISL5123CBZ (Note) 0 to 70 8 Ld SOIC (Pb-free) M8.15

ISL5123IB -40 to 85 8 Ld SOIC M8.15

ISL5123IBZ (Note) -40 to 85 8 Ld SOIC (Pb-free) M8.15

ISL5123IH-T (123I) -40 to 85 6 Ld SOT-23 P6.064

ISL5123IHZ-T (Note)
(123I)

NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.

*Most surface mount devices are available on tape and reel;
add “-T” to suffix.

TEMP.

RANGE (°C) PACKAGE

-40 to 85 8 Ld SOT-23 P8.064

-40 to 85 8 Ld SOT-23
(Pb-free)

-40 to 85 8 Ld SOT-23 P8.064

-40 to 85 8 Ld SOT-23
(Pb-free)

-40 to 85 8 Ld SOT-23 P8.064

-40 to 85 8 Ld SOT-23
(Pb-free)

-40 to 85 6 Ld SOT-23
(Pb-free)

DWG. #

P8.064

P8.064

P8.064

P6.064

PKG.

3

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

Absolute Maximum Ratings Thermal Information

V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V

Input Voltages

IN (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)

NO, NC (Note 3) . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)

Output Voltages

COM (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)

Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA

Peak Current NO, NC, or COM

(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . 40mA

ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . . >2kV

Thermal Resistance (Typical, Note 4) θ

6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230

8 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 215

8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 170

Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C

Moisture Sensitivity (See Technical Brief TB363)

All Other Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1

8 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2

Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C

(Lead Tips Only)

Operating Conditions

Temperature Range

ISL512XCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

ISL512XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

2. Signals on NC , NO , COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.

is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

3. θ

JA

(°C/W)

JA

Electrical Specifications - 5V Supply Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, V

Unless Otherwise Specified

TEMP

PARAMETER TEST CONDITIONS

(°C)

= 2.4V, V

INH

(NOTE 6)

MIN TYP

= 0.8V (Note 5),

INL

(NOTE 6)

MAX UNITS

ANALOG SWITCH CHARACTERISTICS

Analog Signal Range, V

ON Resistance, R

ANALOG

ON

RON Matching Between Channels,
∆R

ON

R

Flatness, R

ON

FLAT(ON)

NO or NC OFF Leakage Current,
I

NO(OFF)

or I

NC(OFF)

COM OFF Leakage Current,
I

COM(OFF)

COM ON Leakage Current,
I

COM(ON)

V+ = 4.5V, I

= 1.0mA, VNO or VNC = 3.5V,

COM

(See Figure 5)

V+ = 5V, I

V+ = 5V, I

V+ = 5.5V, V
(Note 7)

V+ = 5.5V, V
(Note 7)

V+ = 5.5V, V

= 1.0mA, VNO or VNC= 3.5V 25 - 0.8 2 Ω

COM

= 1.0mA, VNO or VNC = 1V, 2V, 3V Full - 7 8 Ω

COM

= 1V, 4.5V, VNO or VNC = 4.5V, 1V,

COM

= 4.5V, 1V, VNO or VNC = 1V, 4.5V,

COM

= 1V, 4.5V, or VNO or VNC = 1V, 4.5V,

COM

or Floating, (Note 7)

Full 0 - V+ V

25 - 19 30 Ω

Full - 23 40 Ω

Full - 1 4 Ω

25 -0.1 0.01 0.1 nA

Full -5 - 5 nA

25 -0.1 - 0.1 nA

Full -5 - 5 nA

25 -0.2 - 0.2 nA

Full -10 - 10 nA

DYNAMIC CHARACTERISTICS

Turn-ON Time, t

Turn-OFF Time, t

ON

OFF

Break-Before-Make Time Delay
(ISL5122, ISL5123), t

D

VNO or VNC = 3V, RL =1kΩ, CL = 35pF, VIN = 0 to 3V,
(See Figure 1)

VNO or VNC = 3V, RL =1kΩ, CL = 35pF, VIN = 0 to 3V,
(See Figure 1)

RL = 300Ω, CL = 35pF, VNO = VNC = 3V, VIN = 0 to 3V,
(See Figure 3)

25 - 28 75 ns

Full - 40 150 ns

25 - 20 50 ns

Full - 30 100 ns

Full 3 10 - ns

Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω, (See Figure 2) 25 - 3 5 pC

OFF Isolation R

= 50Ω, CL = 5pF, f = 1MHz, (See Figure 4) 25 - 76 - dB

L

Crosstalk (Channel-to-Channel) RL = 50Ω, CL = 5pF, f = 1MHz, (See Figure 6) 25 - -105 - dB

4

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

Electrical Specifications - 5V Supply Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, V

= 2.4V, V

INH

= 0.8V (Note 5),

INL

Unless Otherwise Specified (Continued)

TEMP

PARAMETER TEST CONDITIONS

(°C)

(NOTE 6)

MIN TYP

(NOTE 6)

MAX UNITS

Power Supply Rejection Ratio RL = 50Ω, CL = 5pF, f = 1MHz 25 - 60 - dB

NO or NC OFF Capacitance, C

COM OFF Capacitance,
C

COM(OFF)

COM ON Capacitance, C

COM(ON)

f = 1MHz, VNO or VNC = V

OFF

f = 1MHz, VNO or VNC = V

f = 1MHz, VNO or VNC = V
ISL5120/1/2

f = 1MHz, V
ISL5123

NO

or VNC = V

= 0V, (See Figure 7) 25 - 8 - pF

COM

= 0V, (See Figure 7) 25 - 8 - pF

COM

= 0V, (See Figure 7),

COM

= 0V, (See Figure 7),

COM

25 - 21 - pF

25 - 28 - pF

POWER SUPPLY CHARACTERISTICS

Power Supply Range Full 2.7 12 V

Positive Supply Current, I+ V+ = 5.5V, V

= 0V or V+, all channels on or off Full -1 0.0001 1 µA

IN

DIGITAL INPUT CHARACTERISTICS

Input Voltage Low, V

Input Voltage High, V

Input Current, I

INH

, I

INL

INH

INL

V+ = 5.5V, VIN = 0V or V+ Full -1 - 1 µA

Full - - 0.8 V

Full 2.4 - - V

NOTES:

= input voltage to perform proper function.

4. V

IN

5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.

6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25°C.

Electrical Specifications - 3.3V Supply Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, V

Unless Otherwise Specified

PARAMETER TEST CONDITIONS

ANALOG SWITCH CHARACTERISTICS

Analog Signal Range, V

ON Resistance, R

RON Matching Between Channels,
∆R

ON

RON Flatness, R

NO or NC OFF Leakage Current,
I

NO(OFF)

or I

NC(OFF)

COM OFF Leakage Current,
I

COM(OFF)

COM ON Leakage Current,
I

COM(ON)

ON

FLAT(ON)

ANALOG

V+ = 3V, I

V+ = 3.3V, I

V+ = 3.3V, I

V+ = 3.6V, V
(Note 7)

V+ = 3.6V, V
(Note 7)

V+ = 3.6V, V
floating, (Note 7)

TEMP

= 1.0mA, VNO or VNC = 1.5V 25 - 32 50 Ω

COM

= 1.0mA, VNO or VNC = 1.5V 25 - 0.8 2 Ω

COM

= 1.0mA, VNO or VNC = 0.5V, 1V, 1.5V 25 - 6 8 Ω

COM

= 1V, 3V, VNO or VNC = 3V, 1V,

COM

= 3V, 1V, VNO or VNC = 1V, 3V,

COM

= 1V, 3V, or VNO or VNC = 1V, 3V, or

COM

(NOTE 6)

(°C)

Full 0 - V+ V

Full - 40 60 Ω

Full - 1 4 Ω

Full - 7 12 Ω

25 -0.1 0.01 0.1 nA

Full -5 - 5 nA

25 -0.1 0.01 0.1 nA

Full -5 - 5 nA

25 -0.2 - 0.2 nA

Full -10 - 10 nA

= 2.4V, V

INH

MIN TYP

= 0.8V (Note 5),

INL

(NOTE 6)

MAX UNITS

5

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

Electrical Specifications - 3.3V Supply Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, V

= 2.4V, V

INH

= 0.8V (Note 5),

INL

Unless Otherwise Specified (Continued)

TEMP

PARAMETER TEST CONDITIONS

(°C)

(NOTE 6)

MIN TYP

(NOTE 6)

MAX UNITS

DYNAMIC CHARACTERISTICS

Turn-ON Time, t

ON

VNO or VNC = 1.5V, RL =1kΩ, CL = 35pF, VIN = 0 to 3V 25 - 40 120 ns

Full - 60 200 ns

Turn-OFF Time, t

OFF

VNO or VNC = 1.5V, RL =1kΩ, CL = 35pF, VIN = 0 to 3V 25 - 20 50 ns

Full - 30 120 ns

Break-Before-Make Time Delay
(ISL5122, ISL5123), t

D

RL = 300Ω, CL = 35pF, VNO or VNC = 1.5V,
V

= 0 to 3V

IN

Full 3 20 - ns

Charge Injection, Q CL = 1.0nF, VG = 0V, RG = 0Ω 25 - 1 5 pC

OFF Isolation RL = 50Ω, CL = 5pF, f = 1MHz 25 - 76 - dB

Crosstalk (Channel-to-Channel) 25 - -105 - dB

Power Supply Rejection Ratio R

NO or NC OFF Capacitance, C

OFF

COM OFF Capacitance,
C

COM(OFF)

COM ON Capacitance, C

COM(ON)

= 50Ω, CL = 5pF, f = 1MHz 25 - 56 - dB

L

f = 1MHz, VNO or VNC = V

f = 1MHz, VNO or VNC = V

f = 1MHz, VNO or VNC = V

f = 1MHz, VNO or VNC = V

= 0V 25 - 8 - pF

COM

= 0V 25 - 8 - pF

COM

= 0V, ISL5120/1/2 25 - 21 - pF

COM

= 0V, ISL5123 25 - 28 - pF

COM

POWER SUPPLY CHARACTERISTICS

Positive Supply Current, I+ V+ = 3.6V, VIN = 0V or V+, all channels on or off Full -1 - 1 µA

DIGITAL INPUT CHARACTERISTICS

Input Voltage Low, V

Input Voltage High, V

Input Current, I

INH

, I

INL

INH

INL

V+ = 3.6V, VIN = 0V or V+ Full -1 - 1 µA

Full - - 0.8 V

Full 2.4 - - V

Electrical Specifications - 12V Supply Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, V

Unless Otherwise Specified

PARAMETER TEST CONDITIONS

ANALOG SWITCH CHARACTERISTICS

Analog Signal Range, V

ON Resistance, R

RON Matching Between Channels,
∆R

ON

RON Flatness, R

NO or NC OFF Leakage Current,
I

NO(OFF)

or I

NC(OFF)

COM OFF Leakage Current,
I

COM(OFF)

ON

FLAT(ON)

ANALOG

V+ = 10.8V, I

V+ = 12V, I

V+ = 12V, I

V+ = 13V, V
(Note 7

V+ = 13V, V
(Note 7

6

TEMP

= 1.0mA, VNO or VNC = 10V 25 - 11 20 Ω

COM

= 1.0mA, VNO or VNC = 10V 25 - 0.8 2 Ω

COM

= 1.0mA, VNO or VNC = 3V, 6V, 9V 25 - 1 4 Ω

COM

= 1V, 12V, VNO or VNC = 12V, 1V,

COM

= 12V, 1V, VNO or VNC = 1V, 12V,

COM

(NOTE 6)

(°C)

MIN TYP

Full 0 - V+ V

Full - 15 25 Ω

Full - 1 4 Ω

Full - - 6 Ω

25 -0.1 0.01 0.1 nA

Full -5 - 5 nA

25 -0.1 0.01 0.1 nA

Full -5 - 5 nA

INH

= 4V, V

= 0.8V (Note 5),

INL

(NOTE 6)

MAX UNITS

November 17, 2004

FN6022.6

ISL5120, ISL5121, ISL5122, ISL5123

Electrical Specifications - 12V Supply Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, V

INH

= 4V, V

= 0.8V (Note 5),

INL

Unless Otherwise Specified (Continued)

PARAMETER TEST CONDITIONS

COM ON Leakage Current,
I

COM(ON)

V+ = 13V, V
or floating, (Note 7)

= 1V, 12V, or VNO or VNC = 1V, 12V,

COM

TEMP

(°C)

(NOTE 6)

MIN TYP

(NOTE 6)

MAX UNITS

25 -0.2 - 0.2 nA

Full -10 - 10 nA

DYNAMIC CHARACTERISTICS

Turn-ON Time, t

ON

VNO or VNC = 10V, RL =1kΩ, CL = 35pF, VIN = 0 to 4V 25 - 25 35 ns

Full - 35 55 ns

Turn-OFF Time, t

OFF

VNO or VNC = 10V, RL =1kΩ, CL = 35pF, VIN = 0 to 4V 25 - 17 30 ns

Full - 26 50 ns

Break-Before-Make Time Delay
(ISL5122, ISL5123), t

D

Charge Injection, Q C

RL = 300Ω, CL = 35pF, VNO or VNC = 10V,
V

= 0 to 4V

IN

= 1.0nF, VG = 0V, RG = 0Ω 25 - 5 15 pC

L

Full 0 2 ns

OFF Isolation RL = 50Ω, CL = 5pF, f = 1MHz 25 - 76 - dB

Crosstalk (Channel-to-Channel) 25 - -105 - dB

Power Supply Rejection Ratio R

NO or NC OFF Capacitance, C

OFF

COM OFF Capacitance,
C

COM(OFF)

COM ON Capacitance, C

COM(ON)

= 50Ω, CL = 5pF, f = 1MHz 25 - 63 - dB

L

f = 1MHz, VNO or VNC = V

f = 1MHz, VNO or VNC = V

f = 1MHz, VNO or VNC = V

f = 1MHz, VNO or VNC = V

= 0V 25 - 8 - pF

COM

= 0V 25 - 8 - pF

COM

= 0V, ISL5120/1/2 25 - 21 - pF

COM

= 0V, ISL5123 25 - 28 - pF

COM

POWER SUPPLY CHARACTERISTICS

Positive Supply Current, I+ V+ = 13V, V

= 0V or V+, all channels on or off Full -1 - 1 µA

IN

DIGITAL INPUT CHARACTERISTICS

Input Voltage Low, V

Input Voltage High, V

Input Voltage High, V

Input Current, I

INH

, I

INL

INH

INH

INL

ISL5120CX only Full 2.9 - - V

V+ = 13V, VIN = 0V or V+ Full -1 - 1 µA

Full - - 0.8 V

Full 4 3 - V

Test Circuits and Waveforms

3V OR 4V

LOGIC

INPUT

SWITCH

INPUT

SWITCH

OUTPUT

0V

V

NO

0V

t

ON

50%

90%

t

OFF

V

OUT

Logic input waveform is inverted for switches that have the opposite
logic sense.

FIGURE 1A. MEASUREMENT POINTS

7

tr < 20ns

< 20ns

t

f

90%

FIGURE 1. SWITCHING TIMES

SWITCH

LOGIC

INPUT

INPUT

NO or NC

IN

Repeat test for all switches. C
capacitance.

=

V

OUT

V

(NO or NC)

FIGURE 1B. TEST CIRCUIT

V+

C

COM

R

RL
1kΩ

L

ON()

November 17, 2004

GND

includes fixture and stray

L

------------------------------

RLR

+

V

OUT

C

L

35pF

FN6022.6

ISL5120, ISL5121, ISL5122, ISL5123

Test Circuits and Waveforms (Continued)

V+

C

SWITCH

OUTPUT

V

LOGIC

INPUT

3V OR 4V

LOGIC

INPUT

SWITCH

OUTPUT

V

OUT1

SWITCH
OUTPUT

V

OUT2

R

G

NO or NC

GND

IN

OUT

ON

Q = ∆V

OUT

∆V

x C

OUT

L

OFF

ON

V+

0V

V

G

FIGURE 2A. MEASUREMENT POINTS FIGURE 2B. TEST CIRCUIT

FIGURE 2. CHARGE INJECTION

V+

C

0V

0V

0V

V

NX

90%

90%

t

D

t

D

LOGIC
INPUT

NO1

NC2

IN

IN

COM

COM

1

2

GND

COM

LOGIC

INPUT

1

2

R

300Ω

V

OUT

C

L

V

OUT1

V

R

OUT2

L1

300Ω

L2

C

L2

35pF

C

L1

35pF

FIGURE 3A. MEASUREMENT POINTS (ISL5122 ONLY)

3V OR 4V

LOGIC

INPUT

SWITCH
OUTPUT

V

OUT

0V

0V

t

D

FIGURE 3C. MEASUREMENT POINTS (ISL5123 ONLY)

FIGURE 3. BREAK-BEFORE-MAKE TIME

90%

C

includes fixture and stray capacitance.

L

FIGURE 3B. TEST CIRCUIT (ISL5122 ONLY)

V+

V

NX

LOGIC

INPUT

C

includes fixture and stray capacitance.

L

NO

NC

IN

GND

FIGURE 3D. TEST CIRCUIT (ISL5123 ONLY)

C

V

R

300Ω

OUT

C

L

L

35pF

COM

8

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

Test Circuits and Waveforms (Continued)

SIGNAL
GENERATOR

ANALYZER

FIGURE 4. OFF ISOLATION TEST CIRCUIT FIGURE 5. RON TEST CIRCUIT

SIGNAL
GENERATOR

GND

V+

IN

V+

C

0.8V or V

C

INH

V+

C

RON = V1/1mA

V

NO or NC

1

COM

NO or NC

NO or NC

V

NX

IN

0V or V

X

COM

GND

R

L

V+

C

NO1 or NC1

COM1

INH

50Ω

1mA

IN

1

0V or V

IN

2

INH

NC

ANALYZER

0V or 2.4V

R

L

COM2

NO2 or NC2

GND

FIGURE 6. CROSSTALK TEST CIRCUIT FIGURE 7. CAPACITANCE TEST CIRCUIT

Detailed Description

The ISL5120–ISL5123 bidirectional, dual analog switches
offer precise switching capability from a single 2.7V to 12V
supply with low on-resistance (19Ω) and high speed
operation (t
especially well suited to portable battery powered equipment
thanks to the low operating supply voltage (2.7V), low power
consumption (5µW), low leakage currents (100pA max), and
the tiny SOT-23 packaging. High frequency applications also
benefit from the wide bandwidth, and the very high off
isolation and crosstalk rejection.

ON

=28ns, t

= 20ns). The devices are

OFF

0V or V

IMPEDANCE

ANALYZER

COM

GND

IN

X

INH

Supply Sequencing And Overvoltage Protection

With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and GND (See
Figure 8). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.

Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (See Figure 8). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current

9

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

produces an insignificant voltage drop during normal
operation.

Adding a series resistor to the switch input defeats the
purpose of using a low R

switch, so two small signal

ON

diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (See Figure 8). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.

OPTIONAL PROTECTION
DIODE

OPTIONAL
PROTECTION
RESISTOR

IN

X

V

NO or NC

FIGURE 8. OVERVOLTAGE PROTECTION

V+

GND

OPTIONAL PROTECTION
DIODE

V

COM

Power-Supply Considerations

The ISL512X construction is typical of most CMOS analog
switches, except that they have only two supply pins: V+ and
GND. V+ and GND drive the internal CMOS switches and
set their analog voltage limits. Unlike switches with a 13V
maximum supply voltage, the ISL512X 15V maximum supply
voltage provides plenty of room for the 10% tolerance of 12V
supplies, as well as room for overshoot and noise spikes.

The minimum recommended supply voltage is 2.7V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages. Refer
to the electrical specification tables and Typical Performance
curves for details.

V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.

This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.

Logic-Level Thresholds

This switch family is TTL compatible (0.8V and 2.4V) over a
supply range of 3V to 11V (See Figure 15). At 12V the V

IH

level is about 2.5V. This is still below the TTL guaranteed
high output minimum level of 2.8V, but the noise margin is
reduced. For best results with a 12V supply, use a logic
family the provides a V

greater than 3V.

OH

The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.

High-Frequency Performance

In 50Ω systems, signal response is reasonably flat even past
300MHz (See Figure 16). Figure 16 also illustrates that the
frequency response is very consistent over a wide V+ range,
and for varying analog signal levels.

An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough, while Crosstalk indicates
the amount of feedthrough from one switch to another.
Figure 17 details the high Off Isolation and Crosstalk
rejection provided by this family. At 10MHz, Off Isolation is
about 50dB in 50Ω systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.

Leakage Considerations

Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.

Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog­signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.

10

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

Typical Performance Curves T

40

35

30

25

(Ω)

ON

20

R

15

10

85°C

25°C

-40°C

5

3 4 5 6 7 8 9 10 11 12 13

V+ (V)

= 25°C, Unless Otherwise Specified

A

FIGURE 9. ON RESISTANCE vs SUPPLY VOLTAGE

0.5

(Ω)

∆R

0.25

0.15

ON

0.05

0.15

0.05

0.4

0.3

0.2

0.1

0.2

0.1

0.1

25°C

85°C

0

25°C

85°C

0

-40°C

0

0 4 6 8 10 12

FIGURE 11. R

-40°C

85°C

-40°C

25°C

85°C

-40°C

2

ON

V

(V)

COM

MATCH vs SWITCH VOLTAGE FIGURE 12. CHARGE INJECTION vs SWITCH VOLTAGE

V+ = 3.3V

V+ = 5V

V+ = 12V

25°C

45

40

35

30

25

20

15
30

(Ω)

25

ON

20

R

15

10
20

85°C

15

10

-40°C

5

0 4 6 8 10 12

2

25°C

85°C

25°C

-40°C

85°C
25°C

-40°C

V

COM

(V)

FIGURE 10. ON RESISTANCE vs SWITCH VOLTAGE

60

50

40

30

20

Q (pC)

10

V+ = 3.3V

0

-10

-20
0 4 6 8 10 12

2

V+ = 5V

V

COM

V+ = 12V

(V)

V+ = 3.3V

V+ = 5V

V+ = 12V

100

90

80

70

60

(ns)

ON

t

50

40

30

20

23456789101112

85°C

-40°C

25°C

V+ (V)

35

30

85°C

(ns)

25

OFF

t

-40°C

20

15

23456789101112

V+ (V)

-40°C

FIGURE 13. TURN-ON TIME vs SUPPLY VOLTAGE FIGURE 14. TURN-OFF TIME vs SUPPLY VOLTAGE

11

25°C

FN6022.6

November 17, 2004

V

AND

V

(V)

ISL5120, ISL5121, ISL5122, ISL5123

Typical Performance Curves T

3.0

2.5

2.0

INL

1.5

INH

1.0

85°C

0.5
34 678910111213

25

-40°C

25°C

V

INH

-40°C

V+ (V)

V

INL

= 25°C, Unless Otherwise Specified (Continued)

A

85°C

85°C

25°C

FIGURE 15. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE

-10

V+ = 3V to 13V

-20

-30

-40

-50

-60

-70

CROSSTALK (dB)

-80

-90

-100

-110
1k 100k 1M 100M 500M10k 10M

ISOLATION

FREQUENCY (Hz)

CROSSTALK

10

20

30

40

50

60

70

80

90

100

110

FIGURE 17. CROSSTALK AND OFF ISOLATION FIGURE 18. ±PSRR vs FREQUENCY

V+ = 3.3V to 12V

0

GAIN

-3

-6

PHASE

NORMALIZED GAIN (dB)

RL = 50Ω
VIN = 0.2V
VIN = 0.2V

= 0.2V

V

IN

1 10 100 600

P-P
P-P
P-P

to 2.5V
to 4V
to 5V

P-P
P-P

P-P

(V+ = 3.3V)
(V+ = 5V)
(V+ = 12V)

FREQUENCY (MHz)

0

20

40

60

80

100

PHASE (DEGREES)

FIGURE 16. FREQUENCY RESPONSE

RL = 50Ω

0

10

20

30

40

±PSRR (dB)

50

OFF ISOLATION (dB)

60

70

80

V+ = 12V, SWITCH OFF

V+ = 3.3V, SWITCH ON

1 10 100 10000.3

V+ = 3.3V, SWITCH OFF

V+ = 12V, SWITCH ON

FREQUENCY (MHz)

Die Characteristics

SUBSTRATE POTENTIAL (POWERED UP):

GND

TRANSISTOR COUNT:

ISL5120: 66
ISL5121: 66
ISL5122: 66
ISL5123: 58

PROCESS:

Si Gate CMOS

12

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

Small Outline Plastic Packages (SOIC)

N

INDEX
AREA

123

-A-

E

-B-

SEATING PLANE

D

A

-C-

0.25(0.010) BM M

H

L

h x 45

o

α

e

B

0.25(0.010) C AM BS

M

NOTES:

1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.

4. Dimension “E” does not include interlead flash or protrusions. Inter­lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.

5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of

0.61mm (0.024 inch).

10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.

A1

C

0.10(0.004)

M8.15 (JEDEC MS-012-AA ISSUE C)

8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE

INCHES MILLIMETERS

SYMBOL

A 0.0532 0.0688 1.35 1.75 -

A1 0.0040 0.0098 0.10 0.25 -

B 0.013 0.020 0.33 0.51 9

C 0.0075 0.0098 0.19 0.25 -

D 0.1890 0.1968 4.80 5.00 3

E 0.1497 0.1574 3.80 4.00 4

e 0.050 BSC 1.27 BSC -

H 0.2284 0.2440 5.80 6.20 -

h 0.0099 0.0196 0.25 0.50 5

L 0.016 0.050 0.40 1.27 6

N8 87

o

α

0

o

8

o

0

o

8

Rev. 0 12/93

NOTESMIN MAX MIN MAX

-

13

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

Small Outline Transistor Plastic Packages (SOT23-6)

C

L

A2

A

SEATING

PLANE

0.20 (0.008)

C

L

b

12 3

e1

D

C

L

WITH

PLATING

4X θ1

C

4X θ1

M

e

456

0.10 (0.004) C

c

BASE METAL

L1

C

VIEW C

P6.064

6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE

INCHES MILLIMETERS

SYMBOL

NOTESMIN MAX MIN MAX

A 0.036 0.057 0.90 1.45 -

C

L

E

E1

A1 0.000 0.0059 0.00 0.15 -

A2 0.036 0.051 0.90 1.30 -

b 0.012 0.020 0.30 0.50 -

b1 0.012 0.018 0.30 0.45

c 0.003 0.009 0.08 0.22 6

C

c1 0.003 0.008 0.08 0.20 6

D 0.111 0.118 2.80 3.00 3

E 0.103 0.118 2.60 3.00 -

E1 0.060 0.068 1.50 1.75 3

A1

SEATING

PLANE

-C-

e 0.0374 Ref 0.95 Ref -

e1 0.0748 Ref 1.90 Ref -

L 0.014 0.022 0.35 0.55 4

L1 0.024 Ref. 0.60 Ref.

L2 0.010 Ref. 0.25 Ref.

b

b1

N6 65

R 0.004 - 0.10 -

R1 0.004 0.010 0.10 0.25

c1

α

o

0

o

8

o

0

o

8

-

Rev. 3 9/03

NOTES:

1. Dimensioning and tolerance per ASME Y14.5M-1994.

2. Package conforms to EIAJ SC-74 and JEDEC MO178AB.

3. Dimensions D and E1 are exclusive of mold flash, protrusions,

R1

or gate burrs.

4. Footlength L measured at reference to gauge plane.

R

GAUGE PLANE

L

α

L2

5. “N” is the number of terminal positions.

6. These Dimensions apply to the flat section of the lead between

0.08mm and 0.15mm from the lead tip.

7. Controlling dimension: MILLIMETER. Converted inch dimen­sions are for reference only

VIEW C

14

FN6022.6

November 17, 2004

ISL5120, ISL5121, ISL5122, ISL5123

Small Outline Transistor Plastic Packages (SOT23-8)

A

0.20 (0.008) M

C

L

b

87

C

L

1234

e1

D

C

L

A2

WITH

PLATING

4X θ1

SEATING

PLANE

C

4X θ1

C

e

56

0.10 (0.004) C

c

BASE METAL

L

L1

b1

R1

VIEW C

C

L

E

SEATING

A1

PLANE

-C-

b

c1

R

GAUGE PLANE

α

L2

E1

C

8 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE

INCHES MILLIMETERS

SYMBOL

NOTESMIN MAX MIN MAX

A 0.036 0.057 0.90 1.45 -

A1 0.000 0.0059 0.00 0.15 -

A2 0.036 0.051 0.90 1.30 -

b 0.009 0.015 0.22 0.38 -

b1 0.009 0.013 0.22 0.33

c 0.003 0.009 0.08 0.22 6

c1 0.003 0.008 0.08 0.20 6

D 0.111 0.118 2.80 3.00 3

E 0.103 0.118 2.60 3.00 -

E1 0.060 0.067 1.50 1.70 3

e 0.0256 Ref 0.65 Ref -

e1 0.0768 Ref 1.95 Ref -

L 0.014 0.022 0.35 0.55 4

L1 0.024 Ref. 0.60 Ref.

L2 0.010 Ref. 0.25 Ref.

N8 85

R 0.004 - 0.10 -

R1 0.004 0.010 0.10 0.25

o

α

0

o

8

o

0

o

8

-

Rev. 2 9/03

NOTES:

1. Dimensioning and tolerance per ASME Y14.5M-1994.

2. Package conforms to EIAJ SC-74 and JEDEC MO178BA.

3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.

4. Footlength L measured at reference to gauge plane.

5. “N” is the number of terminal positions.

6. These Dimensions apply to the flat section of the lead between

0.08mm and 0.15mm from the lead tip.

7. Controlling dimension: MILLIMETER. Converted inch dimen­sions are for reference only

P8.064

VIEW C

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

15

FN6022.6

November 17, 2004