These devices are BiCMOS interface ICs that are user
configured as either a single RS-422/485 differential
transceiver, or as a dual (2 Tx, 2 Rx) RS-232 transceiver.
In RS-232 mode, the on-board charge pump generates
RS-232 compliant ±5V Tx output levels, from a supply as low
as 4.5V. Four small 0.1µF capacitors are required for the
charge pump. The transceivers are RS-232 compliant, with
the Rx inputs handling up to ±25V, and the Tx outputs
handling ±12V.
In RS-485 mode, the transceivers support both the RS-485
and RS-422 differential communication standards. The
RS-485 receiver features "full failsafe" operation, so the Rx
output remains in a high state if the inputs are open or
shorted together. The RS-485 transmitter supports up to
three data rates, two of which are slew rate limited for
problem free communications. The charge pump disables in
RS-485 mode, thereby saving power, minimizing noise, and
eliminating the charge pump capacitors.
Both RS-232/485 modes feature loopback and shutdown
functions. The loopback mode internally connects the Tx
outputs to the corresponding Rx input, which facilitates the
implementation of board level self test functions. The outputs
remain connected to the loads during loopback, so
connection problems (e.g., shorted connectors or cables)
can be detected. The shutdown mode disables the Tx and
Rx outputs, disables the charge pump if in RS-232 mode,
and places the IC in a low current (20µA) mode.
The ISL41387 is a QFN packaged device that offers
additional functionality, including a lower speed and edge
rate option (115kbps) for EMI sensitive designs, or to allow
longer bus lengths. It also features a logic supply voltage pin
(V
) that sets the VOH level of logic outputs, and the
L
switching points of logic inputs, to be compatible with
another supply voltage in mixed voltage systems. The QFN's
choice of active high or low Rx enable pins increases design
flexibility, allowing Tx/Rx direction control via a single signal
by connecting DEN and RXEN
together.
FN6201.1
Features
• User Selectable RS-232 or RS-485/422 Interface Port
(Two RS-232 Transceivers or One RS-485/422
Transceiver)
• ±15kV (HBM) ESD Protected Bus Pins (RS-232 or
RS-485)
• Flow-Through Pinouts Simplify Board Layouts
• Pb-Free Plus Anneal Available (RoHS Compliant)
• Large (2.7V) Differential V
for Improved Noise
OUT
Immunity in RS-485/422 Networks
• Full Failsafe (Open/Short) Rx in RS-485/422 Mode
• Loopback Mode Facilitates Board Self Test Functions
• User Selectable RS-485 Data Rates . . . . . . . . . . 20Mbps
PART NUMBER (NOTE)PART MARKINGTEMP. RANGE (°C)PACKAGE (Pb-Free)PKG. DWG. #
ISL81387IAZ81387IAZ-40 to 8520 Ld SSOPM20.209
ISL81387IAZ-T81387IAZ-40 to 8520 Ld SSOP Tape and ReelM20.209
ISL81387IBZISL81387IBZ-40 to 8520 Ld SOICM20.3
ISL81387IBZ-TISL81387IBZ-40 to 8520 Ld SOIC Tape and ReelM20.3
ISL41387IRZ41387IRZ-40 to 8540 Ld QFNL40.6x6
ISL41387IRZ-T41387IRZ-40 to 8540 Ld QFN Tape and ReelL40.6x6
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinouts
ISL81387 (SOIC, SSOP)
TOP VIEW
20
C1+
C1V+
485/232
DEN
GND
1
2
3
A
4
B
5
Y
6
Z
7
8
9
10
C2+
C2-
19
V
18
CC
R
17
A
R
16
B
D
15
Y
D
/SLEW
14
Z
ON
13
12
RXEN
11
V-
V+
NC
NC
NC
NC
NC
ISL41387 (QFN)
TOP VIEW
NC
40
1
2
A
3
B
4
Y
5
Z
6
7
8
9
10
11 12 13 14 15 16 17 18 19 20
485/232
C1-
C1+
C2+
39 38 37 36 35 34 33 32 31
NC
DEN
SPB
GND
C2-NCV
GND
CC
RXEN
NC
NC
NC
V-
L
V
RXEN
30
29
28
27
26
25
24
23
22
21
R
A
R
B
D
Y
DZ/SLEW
NC
NC
NC
NC
NC
ON
2
FN6201.1
December 20, 2005
ISL81387, ISL41387
TABLE 2. ISL81387 FUNCTION TABLE
INPUTS
ONRXEN DEN SLEWR
RECEIVER
OUTPUTSDRIVER OUTPUTS
A
R
B
YZ
DRIVER
SPEED
(Mbps)
0100N.A.High-ZHigh-ZHigh-ZHigh-Z-ONOFFRS-232
0101N.A.High-ZHigh-ZONON0.46ONOFFRS-232
0110N.A.ONONHigh-ZHigh-Z-ONOFFRS-232
0111N.A.ONONONON0.46ONOFFRS-232
0001N.A.High-ZHigh-ZONHigh-Z0.46ONOFFRS-232
0010N.A.High-ZONONHigh-Z0.46ONOFFRS-232
0011N.A.ONONONON0.46ONONRS-232
X000XHigh-ZHigh-ZHigh-ZHigh-Z-OFFOFFShutdown
1100XHigh-ZHigh-ZHigh-ZHigh-Z-OFFOFFRS-485
1X011/0High-ZHigh-ZONON20/0.46OFFOFFRS-485
1X10XONHigh-ZHigh-ZHigh-Z-OFFOFFRS-485
11111/0ONHigh-ZONON20/0.46OFFOFFRS-485
10111/0ONHigh-ZONON20/0.46OFFONRS-485
NOTES:
1. Charge pumps are on if in RS-232 mode and ON or DEN or RXEN are high.
2. Loopback is enabled when ON = 0, and DEN = RXEN = 1.
CHARGE
PUMPS
(NOTE 1)
LOOPBACK
(NOTE 2)MODE485/232
ISL81387 Truth Tables
RS-232 TRANSMITTING MODE
INPUTS (ON = 1)OUTPUTS
485/232
010011
010110
011001
011100
00XXHigh-ZHigh-Z
485/232
010011
010110
011001
011100
01OpenOpen11
00XXHigh-ZHigh-Z
DEND
Y
D
Z
YZ
RS-232 RECEIVING MODE
INPUTS (ON = 1)OUTPUT
RXENABR
A
R
RS-485 TRANSMITTING MODE
INPUTS (ON = 1)OUTPUTS
DATA RATE
485/232
DENDYSLEWYZ
(Mbps)
110110 20
111101 20
110010 0.46
111001 0.46
10XXHigh-Z High-Z-
RS-485 RECEIVING MODE
INPUTS (ON = 1)OUTPUT
B
485/232
RXENB-AR
R
A
B
11≥ -40mV1High-Z
11≤ -200mV0High-Z
11Open or Shorted together1High-Z
10XHigh-ZHigh-Z
3
FN6201.1
December 20, 2005
ISL81387, ISL41387
TABLE 3. ISL41387 FUNCTION TABLE
RECEIVER
OUTPUTS
R
A
B
ON
INPUTS
RXEN
and/or
RXEN
DENSLEWSPBR
011 and 00N.A.N.A.High-Z High-Z High-Z High-Z-ONRS-232
011 and 01N.A.N.A.High-Z High-ZONON0.46ONRS-232
010 or 10N.A.N.A.ONONHigh-Z High-Z-ONRS-232
010 or 11N.A.N.A.ONONONON0.46ONRS-232
001 and 01N.A.N.A.High-Z High-ZONHigh-Z0.46ONRS-232
000 or 10N.A.N.A.High-ZONONHigh-Z0.46ONRS-232
000 or 11N.A.N.A.ONONONON0.46ONRS-232 (Note 4)
X01 and 00XXHigh-Z High-Z High-Z High-Z-OFFShutdown
111 and 00XXHigh-Z High-Z High-Z High-Z-OFFRS-485
1X1 and 0101/0High-Z High-ZONON0.46/0.115OFFRS-485
1X1 and 011XHigh-Z High-ZONON20OFFRS-485
1X0 or 10XXONHigh-Z High-Z High-Z-OFFRS-485
110 or 1101/0ONHigh-ZONON0.46/0.115OFFRS-485
110 or 111XONHigh-ZONON20OFFRS-485
100 or 1101/0ONHigh-ZONON0.46/0.115OFFRS-485 (Note 4)
100 or 111XONHigh-ZONON20OFFRS-485 (Note 4)
NOTES:
3. Charge pumps are on if in RS-232 mode and ON or DEN or RXEN is high, or RXEN
4. Loopback is enabled when ON = 0, and DEN = 1, and (RXEN = 1 or RXEN
= 0).
DRIVER
OUTPUTS
YZ
is low.
DRIVER
DATA
RATE
(Mbps)
CHARGE
PUMPS
(NOTE 3)MODE 485/232
ISL41387 Truth Tables
RS-232 TRANSMITTING MODE
INPUTS (ON=1)OUTPUTS
485/232
DEND
Y
0 1 0011
0 1 0110
0 1 1001
0 1 1100
00XXHigh-ZHigh-Z
RS-232 RECEIVING MODE
INPUTS (ON=1)OUTPUT
485/232
RXEN and/or ABR
00 or 10011
00 or 10110
00 or 11001
00 or 11100
00 or 1OpenOpen11
01 and 0XXHigh-Z High-Z
D
Z
YZ
R
A
B
RS-485 TRANSMITTING MODE
INPUTS (ON=1)OUTPUTSDATA
485/232
DEN SLEW SPBD
YZMbps
Y
11000/11/00/10.115
11010/11/00/10.460
111X0/11/00/120
10XXXHigh-Z High-Z-
RS-485 RECEIVING MODE
INPUTS (ON=1)OUTPUT
485/232
RXEN and/or B-AR
A
10 or 1 ≥ -40mV1High-Z
10 or 1≤ -200mV0High-Z
10 or 1Open or Shorted
1High-Z
together
11 and 0XHigh-Z High-Z
R
B
4
FN6201.1
December 20, 2005
ISL81387, ISL41387
Pin Descriptions
PINMODEFUNCTION
485/232
DENBOTHDriver output enable. The driver outputs, Y and Z, are enabled by bringing DEN high. They are high impedance when DEN
GNDBOTHGround connection.
NCBOTHNo Connection.
ONBOTHIn RS-232 mode only, ON high enables the charge pumps. ON low, with DEN and RXEN low (and RXEN
RXENBOTHReceiver output enable. Rx is enabled when RXEN is high; Rx is high impedance when RXEN is low and, if using the QFN
RXEN
V
D
D
SLEWRS-485 Slew rate control. With the SLEW pin high, the drivers run at the maximum slew rate (20Mbps). With the SLEW pin low, the
SPBRS-485 Speed control. Works in conjunction with the SLEW pin to select the 20Mbps, 460kbps or 115kbps RS-485 data rate.
R
R
C1+RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed in RS-485 Mode.
C1-RS-232 External capacitor (voltage doubler) is connected to this lead. Not needed in RS-485 Mode.
C2+RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed in RS-485 Mode.
C2-RS-232 External capacitor (voltage inverter) is connected to this lead. Not needed in RS-485 Mode.
V+RS-232 Internally generated positive RS-232 transmitter supply (+5.5V). C3 not needed in RS-485 Mode.
BOTHInterface Mode Select input. High for RS-485 Mode and low for RS-232 Mode.
is low.
high if QFN), turns
off the charge pumps (in RS-232 mode), and in either mode places the device in low power shutdown. In both modes, when
ON is low, and DEN is high, and RXEN is high or RXEN
package, RXEN
is high. When using the QFN and the active high Rx enable function, RXEN should be high or floating.
is low, loopback is enabled.
BOTHActive low receiver output enable. Rx is enabled when RXEN is low; Rx is high impedance when RXEN is high and RXEN
is low. (i.e., to use active low Rx enable function, tie RXEN to GND). For single signal Tx/Rx direction control, connect RXEN
to DEN. Internally pulled high. (QFN only)
BOTHSystem power supply input (5V).
CC
V
BOTHLogic-Level Supply. All TTL/CMOS inputs and outputs are powered by this supply. (QFN only)
L
ARS-232 Receiver input with ±15kV ESD protection. A low on A forces R
high; A high on A forces RA low.
A
RS-485 Inverting receiver input with ±15kV ESD protection.
BRS-232 Receiver input with ±15kV ESD protection. A low on B forces R
high; A high on B forces RB low.
B
RS-485 Noninverting receiver input with ±15kV ESD protection.
RS-232 Driver input. A low on DY forces output Y high. Similarly, a high on DY forces output Y low.
Y
RS-485 Driver input. A low on D
RS-232 Driver input. A low on DZ forces output Z high. Similarly, a high on DZ forces output Z low.
Z
forces output Y high and output Z low. Similarly, a high on DY forces output Y low and output Z high.
Y
drivers run at a reduced slew rate (460kbps). On the QFN version, works in conjunction with SPB to select one of three
RS-485 data rates. Internally pulled high in RS-485 mode.
Internally pulled high. (QFN only)
RS-232 Receiver output.
A
RS-485 Receiver output: If B > A by at least -40mV, R
is high; If B < A by -200mV or more, RA is low; RA = High if A and B are
A
unconnected (floating) or shorted together (i.e., full fail-safe).
RS-232 Receiver output.
B
RS-485 Not used. Output is high impedance, and unaffected by RXEN
and RXEN.
YRS-232 Driver output with ±15kV ESD protection.
RS-485 Inverting driver output with ±15kV ESD protection.
ZRS-232 Driver output with ±15kV ESD protection.
RS-485 Noninverting driver output with ±15kV ESD protection.
V-RS-232 Internally generated negative RS-232 transmitter supply (-5.5V). C4 not needed in RS-485 Mode.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
5. One output at a time, I
6. QFN θ
θ
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
JA
for other packages is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tec h B r i e f
RECEIVER ENABLE/DISABLE CHARACTERISTICS (ALL MODES AND VERSIONS AND SPEEDS)
Receiver Enable to Output Lowt
Receiver Enable to Output Hight
Receiver Disable from Output Lowt
Receiver Disable from Output Hight
Receiver Enable from Shutdown to
Output Low
Receiver Enable from Shutdown to
Output High
t
ZLSHDNCL
t
ZHSHDNCL
ZH
HZ
CL = 15pF, SW = VCC (Figure 5)Full-2260ns
ZL
CL = 15pF, SW = GND (Figure 5)Full-2360ns
CL = 15pF, SW = VCC (Figure 5)Full-2460ns
LZ
CL = 15pF, SW = GND (Figure 5)Full-2560ns
= 15pF, SW = VCC (Figure 5)
(Note 13)
= 15pF, SW = GND (Figure 5)
(Note 13)
RS-485 ModeFull-260700ns
RS-232 Mode25-35-ns
RS-485 ModeFull-260700ns
RS-232 Mode25-25-ns
NOTES:
7. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
8. Supply current specification is valid for loaded drivers when DEN = 0V.
9. Applies to peak current. See “Typical Performance Curves” for more information.
defaults to RS-485 mode (>15kΩ) when the device is unpowered (VCC = 0V), regardless of the state of the 485/232 pin.
10. R
IN
11. V
12. The Slew pin has a pull-up resistor that enables only when in RS-485 mode (485/232
≤ 5.25V.
CC
= VCC).
13. ON, RXEN, and DEN all simultaneously switched Low-to-High.
10
FN6201.1
December 20, 2005
Test Circuits and Waveforms
ISL81387, ISL41387
V
CC
SIGNAL
GENERATOR
DEN
D
Y
DEN
V
CC
D
Y
Y
V
D
Z
R
OD
D
R
+
V
CM
-
R
V
OC
FIGURE 1. RS-485 DRIVER VOD AND VOC TEST CIRCUIT
D
Y
CL = 100pF
Y
D
Z
R
DIFF
= 100pF
C
L
OUT (Z)
OUT (Y)
DIFF OUT (Z - Y)
t
PLH
50%50%
t
PHL
50%50%
t
DLH
90%90%
10%10%
t
R
0V0V
t
PHL
t
t
1.5V1.5V
PLH
DHL
3V
0V
V
OH
V
OL
V
OH
V
OL
+V
OD
-V
OD
t
F
FIGURE 2A. TEST CIRCUIT
FIGURE 2. RS-485 DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
DEN
DY
SIGNAL
GENERATOR
FOR SHDN TESTS, SWITCH ON AND DEN L- H SIMULTANEOUSLY
Y
D
Z
500Ω
C
L
SW
V
GND
PARAMETER OUTPUTRXENDYSWCL (pF)
t
HZ
t
LZ
t
ZH
t
ZL
t
ZH(SHDN)
t
ZL(SHDN)
Y/ZX0/1GND15
Y/ZX1/0V
CC
15
Y/ZX0/1GND100
Y/ZX1/0V
CC
100
Y/Z00/1GND100
Y/Z01/0V
CC
100
FIGURE 3A. TEST CIRCUIT
FIGURE 3. RS-485 DRIVER ENABLE AND DISABLE TIMES
11
CC
SKEW = |t
DEN
OUT (Y, Z)
t
OUT (Y, Z)
(Y or Z) - t
PLH
PHL
(Z or Y)|
FIGURE 2B. MEASUREMENT POINTS
ENABLED
t
ZH
t
ZH(SHDN)
ZL(SHDN)
t
ZL
OUTPUT HIGH
2.3V
2.3V
OUTPUT LOW
FIGURE 3B. MEASUREMENT POINTS
1.5V1.5V
t
HZ
t
LZ
3V
0V
VOH - 0.5V
VOL + 0.5V
December 20, 2005
V
OH
0V
V
CC
V
OL
FN6201.1
ISL81387, ISL41387
Test Circuits and Waveforms (Continued)
RXEN
V
CC
0V
SIGNAL
GENERATOR
A
B
R
A
R
15pF
FIGURE 4A. TEST CIRCUIT
FIGURE 4. RS-485 RECEIVER PROPAGATION DELAY
RXEN
A
SIGNAL
GENERATOR
FOR SHDN TESTS, SWITCH ON AND RXEN L- H SIMULTANEOUSLY
B
R
A
R
1kΩ
15pF
SW
V
GND
PAR AMETE RD ENBSW
t
HZ
t
LZ
t
ZH
t
ZL
t
ZH(SHDN)
t
ZL(SHDN)
X+1.5VGND
X-1.5VV
CC
X+1.5VGND
X-1.5VV
CC
0+1.5VGND
0-1.5VV
CC
FIGURE 5A. TEST CIRCUIT
FIGURE 5. RS-485 RECEIVER ENABLE AND DISABLE TIMES
CC
B
t
PLH
R
A
1.5V1.5V
FIGURE 4B. MEASUREMENT POINTS
ENABLED
RXEN
t
ZH
t
ZH(SHDN)
t
ZL(SHDN)
R
A
t
ZL
R
A
OUTPUT HIGH
1.5V
1.5V
OUTPUT LOW
FIGURE 5B. MEASUREMENT POINTS
t
t
HZ
t
0V0V
PHL
1.5V1.5V
LZ
+1.5V
-1.5V
3V
0V
VOH - 0.5V
VOL + 0.5V
V
CC
0V
V
OH
0V
V
CC
V
OL
V
CC
SIGNAL
GENERATOR
FIGURE 6A. TEST CIRCUIT
V
CC
SIGNAL
GENERATOR
FIGURE 7A. TEST CIRCUIT
DEN
D
Y,Z
RXEN
A, B
D
C
Y, Z
D
L
R
L
Y,Z
OUT (Y,Z)
SKEW = |t
t
DPHL
DPHL
- t
DPLH
0V0V
|
1.5V1.5V
3V
0V
t
DPLH
V
O+
V
O-
FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RS-232 DRIVER PROPAGATION DELAY
2.4V
3V
0V
V
OH
V
OL
A, B
R
A, RB
R
CL = 15pF
R
A, RB
SKEW = |t
RPHL
- t
RPLH
t
RPHL
|
0.8V
1.7V1.3V
t
RPLH
FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RS-232 RECEIVER PROPAGATION DELAY
12
FN6201.1
December 20, 2005
ISL81387, ISL41387
Detailed Description
The ISLX1387 port supports dual protocols: RS-485/422,
and RS-232. RS-485 and RS-422 are differential (balanced)
data transmission standards for use in high speed (up to
20Mbps) networks, or long haul and noisy environments.
The differential signalling, coupled with RS-485’s
requirement for extended common mode range (CMR) of
+12V to -7V make these transceivers extremely tolerant of
ground potential differences, as well as voltages induced in
the cable by external fields. Both of these effects are real
concerns when communicating over the RS-485/422
maximum distance of 4000’ (1220m). It is important to note
that the ISLX1387 don’t follow the RS-485 convention
whereby the inverting I/O is labelled “B/Z”, and the
noninverting I/O is “A/Y”. Thus, in the application diagrams
below the 1387 A/Y (B/Z) pins connect to the B/Z (A/Y) pins
of the generic RS-485/422 ICs.
RS-422 is typically a point-to-point (one driver talking to one
receiver on a bus), or a point-to-multipoint (multidrop)
standard that allows only one driver and up to 10 receivers
GENERIC 1/2 DUPLEX 485 XCVR
+
RO REDEDI
ISLX1387
RA
*
RXEN
Tx/Rx
* QFN ONLY,
CONNECT RXEN TO GND
DEN
DY
D
+5V
V
CC
B
R
A
Y
Z
GND
+
R
0.1µF
0.1µF
+5V
T
R
V
CC
FIGURE 8. TYPICAL HALF DUPLEX RS-485 NETWORK
on each bus. Because of the one driver per bus limitation,
RS-422 networks use a two bus, full duplex structure for
bidirectional communication, and the Rx inputs and Tx
outputs (no tri-state required) connect to different busses, as
shown in Figure 9. Tx and Rx enables aren’t required, so
connect RXEN and DEN to V
through a 1kΩ resistor.
CC
Conversely, RS-485 is a true multipoint standard, which
allows up to 32 devices (any combination of drivers- must be
tri-statable - and receivers) on each bus. Now bidirectional
communication takes place on a single bus, so the Rx inputs
and Tx outputs of a port connect to the same bus lines, as
shown in Figure 8. A port set to RS-485 /422 mode includes
one Rx and one Tx.
RS-232 is a point-to-point, singled ended (signal voltages
referenced to GND) communication protocol targeting fairly
short (<150’, 46m) and low data rate (<1Mbps) applications.
A port contains two transceivers (2 Tx and 2 Rx) in RS-232
mode.
Protocol selection is handled via the 485/232
GENERIC 1/2 DUPLEX 485 XCVR
D
GND
B/Z
A/Y
0.1µF
R
+
T
A/Y
+5V
V
B/Z
GND
logic pin.
CC
R
RO
RE
DE
DI
D
ISL81387 (MASTER)
.
1kΩ
DY
DEN
RXEN
RA
GENERIC 422 Rx (SLAVE)
+
RO RE
+5V
+
0.1µF
V
CC
D
Z
Y
A
R
B
GND
R
T
0.1µF
+5V
R
V
CC
B
GND
A
GENERIC FULL DUPLEX 422 XCVR (SLAVE)
+5V
+
0.1µF
V
B
Z
Y
A
GND
CC
RO
R
DI
D
R
T
FIGURE 9. TYPICAL RS-422 NETWORK
13
FN6201.1
December 20, 2005
ISL81387, ISL41387
ISLX1387 Advantages
These dual protocol ICs offer many parametric
improvements versus those offered on competing dual
protocol devices. Some of the major improvements are:
15kV Bus Pin ESD - Eases board level requirements;
2.7V Diff V
- Better Noise immunity and/or distance;
OUT
Full Failsafe RS-485 Rx - Eliminates bus biasing;
Selectable RS-485 Data Rate - Up to 20Mbps, or slew
rate limited for low EMI and fewer termination issues;
High RS-232 Data Rate - >460kbps
Lower Tx and Rx Skews - Wider, consistent bit widths;
Lower I
- Max ICC is 2-4X lower than competition;
CC
Flow-Thru Pinouts - Tx, Rx bus pins on one side/logic
pins on the other, for easy routing to connector/UART;
Smaller (SSOP and QFN) and Pb-free Packaging.
RS-232 Mode
Rx Features
RS-232 receivers invert and convert RS-232 input levels
(±3V to ±25V) to the standard TTL/CMOS levels required by
a UART, ASIC, or µcontroller serial port. Receivers are
designed to operate at faster data rates than the drivers, and
they feature very low skews (10ns) so the receivers
contribute negligibly to bit width distortion. Inputs include the
standards required 3kΩ to 7kΩ pulldown resistor, so unused
inputs may be left unconnected. Rx inputs also have built-in
hysteresis to increase noise immunity, and to decrease
erroneous triggering due to slowly transitioning input signals.
Rx outputs are short circuit protected, and are tri-statable via
the active high RXEN pin, when the IC is shutdown (SHDN;
see Tables 2 and 3, and the “Low Power Shutdown” section),
or via the active low RXEN
option (see “ISL41387 Special Features” for more details).
Tx Features
RS-232 drivers invert and convert the standard TTL/CMOS
levels from a UART, or µcontroller serial port to RS-232
compliant levels (±5V minimum). The Tx delivers these
compliant output levels even at data rates of 650kbps, and
with loads of 1000pF. The drivers are designed for low skew
(typically 12% of the 500kbps bit width), and are compliant to
the RS-232 slew rate spec (4 to 30V/µs) for a wide range of
load capacitances. Tx inputs float if left unconnected, and
may cause I
increases. For the best results, connect
CC
unused inputs to GND.
Tx outputs are short circuit protected, and incorporate a
thermal SHDN feature to protect the IC in situations of
severe power dissipation. See the RS-485 section for more
details. Drivers tri-state via the active high DEN pin, in SHDN
(see Tables 2 and 3, and the “Low Power Shutdown”
section), or when the 5V power supply is off.
pin available on the QFN package
Charge Pumps
The on-chip charge pumps create the RS-232 transmitter
power supplies (typically +6/-7V) from a single supply as low
as 4.5V, and are enabled only if the port is configured for
RS-232 operation, and not in SHDN. The efficient design
requires only four small 0.1µF capacitors for the voltage
doubler and inverter functions. By operating discontinuously
(i.e., turning off as soon as V+ and V- pump up to the
nominal values), the charge pump contribution to RS-232
mode I
is reduced significantly. Unlike competing devices
CC
that require the charge pump in RS-485 mode, disabling the
charge pump saves power, and minimizes noise. If the
application is a dedicated RS-485 port, then the charge
pump capacitors aren’t even required.
Data Rates and Cabling
Drivers operate at data rates up to 650kbps, and are
guaranteed for data rates up to 460kbps. The charge pumps
and drivers are designed such that one driver can be
operated at the rated load, and at 460kbps (see Figure 33).
Figure 33 also shows that drivers can easily drive several
thousands of picofarads at data rates up to 250kbps, while
still delivering compliant ±5V output levels.
Receivers operate at data rates up to 2Mbps. They are
designed for a higher data rate to facilitate faster factory
downloading of software into the final product, thereby
improving the user’s manufacturing throughput.
Figures 36and 37 illustrate driver and receiver waveforms at
250kbps, and 500kbps, respectively. For these graphs, one
driver drives the specified capacitive load, and a receiver.
RS-232 doesn’t require anything special for cabling; just a
single bus wire per transmitter and receiver, and another
wire for GND. So an ISLX1387 RS-232 port uses a five
conductor cable for interconnection. Bus terminations are
not required, nor allowed, by the RS-232 standard.
RS-485 Mode
Rx Features
RS-485 receivers convert differential input signals as small
as 200mV, as required by the RS-485 and RS-422
standards, to TTL/CMOS output levels. The differential Rx
provides maximum sensitivity, noise immunity, and common
mode rejection. Per the RS-485 standard, receiver inputs
function with common mode voltages as great as ±7V
outside the power supplies (i.e., +12V and -7V), making
them ideal for long networks where induced voltages are a
realistic concern. Each RS-485/422 port includes a single
receiver (RA), and the unused Rx output (RB) is disabled.
Worst case receiver input currents are 20% lower than the 1
“unit load” (1mA) RS-485 limit, which translates to a 15kΩ
minimum input resistance.
14
FN6201.1
December 20, 2005
ISL81387, ISL41387
These receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating), shorted together, or if the bus is
terminated but undriven (i.e., differential voltage collapses to
near zero due to termination). Failsafe with shorted, or
terminated and undriven inputs is accomplished by setting
the Rx upper switching point at -40mV, thereby ensuring that
the Rx recognizes a 0V differential as a high level.
All the Rx outputs are short circuit protected, and are tristatable via the active high RXEN pin, or when the IC is
shutdown (see Tables 2 and 3, and the “Low Power
Shutdown” section). ISL41387 (QFN) receiver outputs are
also tri-statable via an active low RXEN
input (see
“ISL41387 Special Features” for more details).
For the ISL41387 (QFN), when using the active high RXEN
function, the RXEN
high), or should be connected to V
If using the active low RXEN
pin may be left floating (internally pulled
through a 1kΩ resistor.
CC
, then the RXEN pin must be
connected to GND.
Tx Features
The RS-485/422 driver is a differential output device that
delivers at least 2.2V across a 54Ω load (RS-485), and at
least 2.5V across a 100Ω load (RS-422). Both levels
significantly exceed the standards requirements, and these
exceptional output voltages increase system noise immunity,
and/or allow for transmission over longer distances. The
drivers feature low propagation delay skew to maximize bit
widths, and to minimize EMI.
To allow multiple drivers on a bus, the RS-485 spec requires
that drivers survive worst case bus contentions undamaged.
The ISLX1387 drivers meet this requirement via driver
output short circuit current limits, and on-chip thermal
shutdown circuitry. The output stages incorporate current
limiting circuitry that ensures that the output current never
exceeds the RS-485 spec, even at the common mode
voltage range extremes. In the event of a major short circuit
condition, devices also include a thermal shutdown feature
that disables the drivers whenever the die temperature
becomes excessive. This eliminates the power dissipation,
allowing the die to cool. The drivers automatically re-enable
after the die temperature drops about 15 degrees. If the
contention persists, the thermal shutdown/re-enable cycle
repeats until the fault is cleared. Receivers stay operational
during thermal shutdown.
RS-485 multi-driver operation also requires drivers to include
tri-state functionality, so the port has a DEN pin to control
this function. If the driver is used in an RS-422 network, such
that driver tri-state isn’t required, then the DEN pin should
connect to V
through a 1kΩ resistor. Drivers are also tri-
CC
stated when the IC is in SHDN, or when the 5V power supply
is off.
Speed Options
The ISL81387 (SOIC/SSOP) features two speed options
that are user selectable via the SLEW pin: a high slew rate
setting optimized for 20Mbps data rates (Fast), and a slew
rate limited option for operation up to 460kbps (Med). The
ISL41387 (QFN) offers an additional, more slew rate limited,
option for data rates up to 115kbps (Slow). See the “Data
Rate“ and “Slew Rate Limited Data Rates” sections for more
information.
Receiver performance is the same for all three speed
options.
Data Rate, Cables, and Terminations
RS-485/422 are intended for network lengths up to 4000’
(1220m), but the maximum system data rate decreases as
the transmission length increases. Devices operating at the
maximum data rate of 20Mbps are limited to lengths of 2030’ (6-9m), while devices operating at or below 115kbps can
operate at the maximum length of 4000’ (1220m).
Higher data rates require faster edges, so both the
ISLX1387 versions offer an edge rate capable of 20Mbps
data rates. They both have a second option for 460kbps, but
the ISL41387 also offers another, very slew rate limited,
edge rate to minimize problems at slow data rates.
Nevertheless, for the best jitter performance when driving
long cables, the faster speed settings may be preferable,
even at low data rates. See the “RS-485 Slew Rate Limited
Data Rates” section for details.
Twisted pair is the cable of choice for RS-485/422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode
signals, which are effectively rejected by the differential
receivers in these ICs.
The preferred cable connection technique is “daisychaining”, where the cable runs from the connector of one
device directly to the connector of the next device, such that
cable stub lengths are negligible. A “backbone” structure,
where stubs run from the main backbone cable to each
device’s connector, is the next best choice, but care must be
taken to ensure that each stub is electrically “short”. See
Table 4 for recommended maximum stub lengths for each
speed option.
TABLE 4. RECOMMENDED STUB LENGTHS
SPEED OPTION
SLOW350-500 (107-152)
MED100-150 (30.5 - 46)
FAST1-3 (0.3 - 0.9)
MAXIMUM STUB LENGTH
ft (m)
15
FN6201.1
December 20, 2005
ISL81387, ISL41387
Proper termination is imperative to minimize reflections
when using the 20Mbps speed option. Short networks using
the medium and slow speed options need not be terminated,
but terminations are recommended unless power dissipation
is an overriding concern. Note that the RS-485 spec allows a
maximum of two terminations on a network, otherwise the Tx
output voltage may not meet the required V
OD
.
In point-to-point, or point-to-multipoint (RS-422) networks,
the main cable should be terminated in its characteristic
impedance (typically 120Ω) at the end farthest from the
driver. In multi-receiver applications, stubs connecting
receivers to the main cable should be kept as short as
possible, but definitely shorter than the limits shown in Table
4. Multipoint (RS-485) systems require that the main cable
be terminated in its characteristic impedance at both ends.
Again, keep stubs connecting a transceiver to the main
cable as short as possible, and refer to Table 4. Avoid “star”,
and other configurations, where there are many “ends”
which would require more than the two allowed terminations
to prevent reflections.
High ESD
All pins on the ISLX1387 include ESD protection structures
rated at ±4kV (HBM), which is good enough to survive ESD
events commonly seen during manufacturing. But the bus
pins (Tx outputs and Rx inputs) are particularly vulnerable to
ESD events because they connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can destroy an unprotected port.
ISLX1387 bus pins are fitted with advanced structures that
deliver ESD protection in excess of ±15kV (HBM), without
interfering with any signal in the RS-485 or the RS-232
range. This high level of protection may eliminate the need
for board level protection, or at the very least will increase
the robustness of any board level scheme.
Small Packages
Many competing dual protocol ICs are available only in
monstrously large 24 to 28 Ld SOIC packages. The
ISL81387’s 20 Ld SSOP is more than 50% smaller than
even a 24 Ld SOIC, and the ISL41387’s tiny 6x6mm QFN is
80% smaller than a 28 Ld SOIC.
Flow Through Pinouts
Even the ISLX1387 pinouts are features, in that the “flowthrough” design simplifies board layout. Having the bus pins
all on one side of the package for easy routing to a cable
connector, and the Rx outputs and Tx inputs on the other
side for easy connection to a UART, avoids costly and
problematic crossovers. Figure 10 illustrates the flowthrough nature of the pinout.
Low Power Shutdown (SHDN) Mode
The ISLX1387 enter the SHDN mode when ON = 0, and the
Tx and Rx are disabled (DEN = 0, RXEN = 0, and RXEN
1), and the already low supply current drops to as low as
5µA. SHDN disables the Tx and Rx outputs, and disables
=
the charge pumps if the port is in RS-232 mode, so V+
collapses to V
, and V- collapses to GND.
CC
All but 5µA of SHDN ICC current is due to control input (SPB,
SLEW, RXEN
I
varies depending on the ISLX1387 configuration. The
CC
) pull-up resistors (~20µA/resistor), so SHDN
spec tables indicate the worst case values, but careful
selection of the configuration yields lower currents. For
example, in RS-232 mode the SPB pin isn’t used, so floating
it or tying it high minimizes SHDN I
ISL81387
A
B
Y
CONNECTOR
FIGURE 10. ILLUSTRATION OF FLOW THROUGH PINOUT
Z
On the ISL41387, the SHDN I
decreases. V
its V
OH
powers each control pin input stage and sets
L
at VL rather than VCC. VCC powers the second
R
D
CC
.
CC
RA
DY
UART
OR
ASIC
OR
µCONTROLLER
increases as VL
stage, but the second stage input isn’t driven to the rail, so
some I
current flows. See Figure 20 for details.
CC
When enabling from SHDN in RS-232 mode, allow at least
20µs for the charge pumps to stabilize before transmitting
data. If fast enables are required, and I
isn’t the greatest
CC
concern, disable the drivers with the DEN pin to keep the
charge pumps active. The charge pumps aren’t used in
RS-485 mode, so the transceiver is ready to send or receive
data in less than 1µs, which is much faster than competing
devices that require the charge pump for all modes of
operation.
Internal Loopback Mode
Setting ON = 0, DEN = 1, and RXEN = 1 or RXEN = 0 (QFN
only), places the port in the loopback mode, a mode that
facilitates implementing board level self test functions. In
loopback, internal switches disconnect the Rx inputs from
the Rx outputs, and feed back the Tx outputs to the
appropriate Rx output. This way the data driven at the Tx
input appears at the corresponding Rx output (refer to
“Typical Operating Circuits”). The Tx outputs remain
connected to their terminals, so the external loads are
reflected in the loopback performance. This allows the
loopback function to potentially detect some common bus
faults such as one or both driver outputs shorted to GND, or
outputs shorted together.
Note that the loopback mode uses an additional set of
receivers, as shown in the “Typical Operating Circuits”.
16
FN6201.1
December 20, 2005
ISL81387, ISL41387
These loopback receivers are not standards compliant, so
the loopback mode can’t be used to implement a half-duplex
RS-485 transceiver.
ISL41387 (QFN Package) Special Features
Logic Supply (VL Pin)
The ISL41387 (QFN) includes a VL pin that powers the logic
inputs (Tx inputs and control pins) and Rx outputs. These
pins interface with “logic” devices such as UARTs, ASICs,
and µcontrollers, and today most of these devices use power
supplies significantly lower than 5V. Thus, a 5V output level
from a 5V powered dual protocol IC might seriously
overdrive and damage the logic device input. Similarly, the
the logic device’s low V
powered dual protocol input. Connecting the V
power supply of the logic device - as shown in Figure 11 limits the ISL41387’s Rx output V
and reduces the Tx and control input switching points to
values compatible with the logic device output levels.
Tailoring the logic pin input switching points and output levels
to the supply voltage of the UART, ASIC, or µcontroller
eliminates the need for a level shifter/translator between the
two ICs.
VCC = +5V
might not exceed the VIH of a 5V
OH
to VL (see Figure 14),
OH
VCC = +2V
pin to the
L
various V
particular V
The V
shown in Figures 19 and 20. All of the DC V
values so the user can ascertain whether or not a
L
voltage meets his needs.
L
TABLE 5. VIH AND VIL vs. VL FOR VCC = 5V
V
(V)VIH (V)VIL (V)
L
1.65V0.790.50
1.8V0.820.60
2.0V0.870.69
2.5V0.990.86
3.3V1.191.05
supply current (IL) is typically less than 60µA, as
L
current is due
L
to inputs with internal pull-up resistors (SPB, SLEW, RXEN
being driven to the low input state. The worst case I
current
L
occurs when all three of the inputs are low (see Figure 19),
due to the I
input pull-up resistor is ~20µA, so the I
by about 40µA (at V
through the pull-up resistors. IIL through an
L
= 5V) when the SPB is high and 232
L
in Figure 19 drops
L
mode disables the SLEW pin pull-up (middle vs. top curve).
When all three inputs are driven high, I
drops to ~10nA, so
L
to minimize power dissipation drive these inputs high when
unneeded (e.g., SPB isn’t used in RS-232 mode, so drive it
high).
)
= 5V
V
OH
R
A
≥ 2V
V
IH
D
Y
GND
ISL81387
VCC = +5V
V
L
R
A
D
Y
GND
ISL41387
FIGURE 11. USING VL PIN TO ADJUST LOGIC LEVELS
V
can be anywhere from VCC down to 1.65V, but the input
L
V
V
OH
= 0.9V
IH
V
= 2V
V
R
T
≤ 2V
OH
UART/PROCESSOR
R
T
≤ 2V
OH
UART/PROCESSOR
XD
XD
VCC = +2V
XD
XD
ESD
DIODE
GND
ESD
DIODE
GND
switching points may not provide enough noise margin when
V
< 1.8V. Table 5 indicates typical VIH and VIL values for
L
Active Low Rx Enable (RXEN)
In many RS-485 applications, especially half duplex
configurations, users like to accomplish “echo cancellation”
by disabling the corresponding receiver while its driver is
transmitting data. This function is available on the QFN
package via an active low RXEN
also simplifies direction control, by allowing a single Tx/Rx
pin. The active low function
direction control line. If the active high RXEN were used,
either two valuable I/O pins would be used for direction
control, or an external inverter is required between DEN and
RXEN. Figure 12 details the advantage of using the RXEN
pin. When using RXEN
, ensure that RXEN is tied to GND.
RS-485 Slew Rate Limited Data Rates
The ISLX1387 FAST speed option (SLEW = High) utilizes Tx
output transitions optimized for a 20Mbps data rate. These
fast edges may increase EMI and reflection issues, even
though fast transitions aren’t required at the lower data rates
used by many applications. With the SLEW pin low, both
product types switch to a moderately slew rate limited output
transition targeted for 460kbps (MED) data rates. The
ISL41387 (QFN version) offers an additional, slew rate
limited data rate that is optimized for 115kbps (SLOW), and
is selected when SLEW = 0 and SPB = 0 (see Table 3). The
slew limited edges permit longer unterminated networks, or
longer stubs off terminated busses, and help minimize EMI
and reflections. Nevertheless, for the best jitter performance
when driving long cables, the faster speed options may be
preferable, even at lower data rates. The faster output
transitions deliver less variability (jitter) when loaded with the
17
FN6201.1
December 20, 2005
ISL81387, ISL41387
1kΩ
OR NC
Tx/Rx
ACTIVE HIGH RX ENABLE
RXEN
RA
RXEN
Tx/Rx
RXEN *
RA
RXEN
DEN
DY
ISL41387
*
DEN
DY
* QFN ONLY
ISL41387
R
D
R
D
+5V
V
CC
B
A
Y
Z
GND
+5V
V
CC
B
A
Y
Z
GND
+
0.1µF
+
0.1µF
ACTIVE LOW RX ENABLE
FIGURE 12. USING ACTIVE LOW vs ACTIVE HIGH RX
ENABLE
large capacitance associated with long cables. Figures 42,
43, and 44 detail the jitter performance of the three speed
options while driving three different cable lengths. The
figures show that under all conditions the faster the edge
rate, the better the jitter performance. Of course, faster
transitions require more attention to ensuring short stub
lengths, and quality terminations, so there are trade-offs to
be made. Assuming a jitter budget of 10%, it is likely better
to go with the slow speed option for data rates of 115kbps or
less, to minimize fast edge effects. Likewise, the medium
speed option is a good choice for data rates between
115kbps and 460kbps. For higher data rates, or when the
absolute best jitter is required, use the high speed option.
Evaluation Board
An evaluation board, part number ISL41387EVAL1, is
available to assist in assessing the dual protocol IC’s
performance. The evaluation board contains a QFN
packaged device, but because the same die is used in all
packages, the board is also useful for evaluating the
functionality of the other versions. The board’s design allows
for evaluation of all standard features, plus the QFN specific
features. Refer to the eval board application note for details,
and contact your sales rep for ordering information.
18
FN6201.1
December 20, 2005
ISL81387, ISL41387
Typical Performance Curves V
50
40
30
20
10
RECEIVER OUTPUT CURRENT (mA)
0
012345
RECEIVER OUTPUT VOLTAGE (V)
V
OH
, 85°C
V
OH
= VL = 5V, TA = 25°C; Unless Otherwise Specified
CC
V
, 25°C
OL
V
, 85°C
OL
, 25°C
FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
100
90
80
70
60
50
40
30
20
DRIVER OUTPUT CURRENT (mA)
10
0
012345
DIFFERENTIAL OUTPUT VOLTAGE (V)
FIGURE 15. RS-485, DRIVER OUTPUT CURRENT vs
DIFFERENTIAL OUTPUT VOLTAGE
5
4
3
IOH = -1mA
2
IOH = -8mA
1
HIGH OUTPUT VOLTAGE (V)
0
012345
VL (V)
IOH = -4mA
FIGURE 14. RECEIVER HIGH OUTPUT VOLTAGE vs LOGIC
SUPPLY VOLTAGE (V
3.6
3.5
3.4
3.3
3.2
3.1
DIFFERENTIAL OUTPUT VOLTAGE (V)
3
-4005085
-252575
TEMPERATURE (°C)
R
DIFF
)
L
= 100Ω
R
DIFF
= 54Ω
FIGURE 16. RS-485, DRIVER DIFFERENTIAL OUTPUT
VOLTAGE vs TEMPERATURE
150
85°C
-40°C
Y OR Z = LOW
25°C
OUTPUT VOLTAGE (V)
100
50
0
-50
OUTPUT CURRENT (mA)
-100
-150
-7 -6-4-2024681012
FULL TEMP RANGE
Y OR Z = HIGH
FIGURE 17. RS-485, DRIVER OUTPUT CURRENT vs SHORT
CIRCUIT VOLTAGE
19
4
3.5
3
2.5
(mA)
CC
I
2
1.5
1
-4005085
RS-232, RXEN, RXEN, ON = X, DEN = V
RS-232, RXEN, RXEN = X, ON = VCC, DEN = GND
RS-485, HALF DUPLEX, DEN = VCC, RXEN, RXEN, ON = X
RS-485, FULL DUPLEX, DEN = VCC, RXEN, RXEN, ON = X
FIGURE 43. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 1000’ CAT 5 CABLE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
2490
100
SLOW
10
JITTER (%)
1
0.1
32 100 200 300 400 500 600 700 800 900 1000
DOUBLE TERM’ED WITH 121Ω
DATA RATE (kbps)
MED
FAST
FIGURE 44. RS-485, TRANSMITTER JITTER vs DATA RATE
WITH 350’ CAT 5 CABLE
PROCESS:
BiCMOS
24
FN6201.1
December 20, 2005
ISL81387, ISL41387
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
123
-A-
0.25(0.010)B
H
E
-B-
SEATING PLANE
D
A
-C-
M
L
M
h x 45°
α
e
B
0.25(0.010)C AMB
M
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
A1
0.10(0.004)
S
M20.3 (JEDEC MS-013-AC ISSUE C)
20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHESMILLIMETERS
SYMBOL
A0.09260.10432.352.65-
A10.00400.01180.100.30-
B0.0140.0190.350.499
C0.00910.01250.230.32-
D0.49610.511812.6013.003
E0.29140.29927.407.604
e0.050 BSC1.27 BSC-
H0.3940.41910.0010.65-
C
h0.0100.0290.250.755
L0.0160.0500.401.276
N20207
α
0°8°0°8°-
NOTESMINMAXMINMAX
Rev. 2 6/05
25
FN6201.1
December 20, 2005
ISL81387, ISL41387
Shrink Small Outline Plastic Packages (SSOP)
N
INDEX
AREA
123
-AD
e
B
0.25(0.010)C AMB
H
E
-B-
SEATING PLANE
A
-C-
A1
S
M
0.25(0.010)B
GAUGE
PLANE
α
0.10(0.004)
M
0.25
0.010
A2
M
L
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
40 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
(COMPLIANT TO JEDEC MO-220VJJD-2 ISSUE C)
MILLIMETERS
SYMBOL
A0.800.901.00-
A1--0.05-
A2--1.009
A30.20 REF9
b0.180.230.305, 8
D6.00 BSC-
D15.75 BSC9
D23.954.104.257, 8
E6.00 BSC-
E15.75 BSC9
E23.954.104.257, 8
e 0.50 BSC-
k0.25 -- -
L0.300.400.508
L1 --0.1510
N402
Nd103
Ne103
P- -0.609
θ--129
NOTES:
1. Dimensioning and tolerancing conform to ASME Y14.5-1994.
2. N is the number of terminals.
3. Nd and Ne refer to the number of terminals on each D and E.
4. All dimensions are in millimeters. Angles are in degrees.
5. Dimension b applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
7. Dimensions D2 and E2 are for the exposed pads which provide
improved electrical and thermal performance.
8. Nominal dimensions are provided to a ssist with PCB Land Pattern
Design efforts, see Intersil Technical Brief TB389.
9. Features and dimensions A2, A3, D1, E1, P & θ are present when
Anvil singulation method is used and not present for saw
singulation.
10. Depending on the method of lead termination at the edge of the
package, a maximum 0.15mm pull back (L1) maybe present. L
minus L1 to be equal to or greater than 0.3mm.
NOTESMINNOMINALMAX
Rev. 1 10/02
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
27
FN6201.1
December 20, 2005
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