Dual Micropower Single Supply
Rail-to-Rail Input and Output (RRIO)
Precision Op-Amp
The ISL28278 and ISL28478 are Dual and Quad channel
micropower precision operational amplifier optimized for
single supply operation at 5V and can operate down to 2.4V.
For equivalent performance in a single channel op-amp
reference EL8178.
The ISL28278 and ISL28478 feature an Input Range
Enhancement Circuit (IREC) which enables both parts to
maintain CMRR performance for input voltages equal to the
positive and negative supply rails. The input signal is
capable of swinging 10% above the positive supply rail and
to 100mV below the negative supply with only a slight
degradation of the CMRR performance. The output
operation is rail to rail.
The both parts draw minimal supply current while meeting
excellent DC-accuracy, AC-performance, noise and output
drive specifications.
The ISL28278 and ISL28478 can be operated from one
lithium cell or two Ni-Cd batteries. The input range includes
both positive and negative rail.
Ordering Information
PART
PART NUMBER
ISL28278FAZ
(See Note)
ISL28278FAZ-T7
(See Note)
Coming Soon
ISL28478FAZ
(Note)
Coming Soon
ISL28478FAZ-T7
(Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
MARKING
28278FAZ97/Tube 16 Ld QSOP
28278FAZ7”
28478FAZ97/Tube 16 Ld QSOP
28478FAZ7”
TAPE &
REELPACKAGE
(Pb-free)
16 Ld QSOP
(1000 pcs)
(1000 pcs)
(Pb-free)
(Pb-free)
16 Ld QSOP
(Pb-free)
PKG.
DWG. #
MDP0040
MDP0040
MDP0040
MDP0040
FN6145.1
Features
• Low Power 120µA typ supply current for both channels
• 225µV max offset voltage
• 30pA typ input bias current
• 300kHz gain-bandwidth product
• 100dB typ PSRR and CMRR
• Single supply operation down to 2.4V
• Input is capable of swinging above V+ and below V(ground sensing)
• Rail-to-rail input and output (RRIO)
• Pb-free plus anneal available (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 25mA current loops
• Handheld consumer products
• Medical devices
• Thermocouple amplifiers
• Photodiode pre-amps
• pH probe amplifiers
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT
: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified
temperature and are pulsed tests, therefore: T
Electrical Specifications V+ = 5V, V- = 0V,V
= TC = T
J
Boldface limits apply over the operating temperature range, -40°C to +125°C
FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGEFIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
100
80
60
40
20
-20
-40
-60
INPUT OFFSET VOLTAGE (µV)
-80
-100
V
= VDD/2
CM
V
= 5V
0
V
= 2.5V
DD
05
1324
OUTPUT VOLTAGE (V)
DD
0
-20
-40
-60
-80
INPUT OFFSET VOLTAGE (µV)
-100
VOS, µV
05
1324
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 3. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGEFIGURE 4. INPUT OFFSET VOLTAGE vs COMMON-MODE
INPUT VOLTAGE
4
FN6145.1
September 28, 2006
ISL28278, ISL28478
Typical Performance Curves (Continued)
120
80
40
GAIN (dB)
0
-40
-80
11k100k10M
10
FREQUENCY (Hz)
10k1M100
80
40
0
-40
-80
-120
100
80
60
40
PHASE (°)
GAIN (dB)
20
0
-20
1010k1M
100
FREQUENCY (Hz)
PHASE
GAIN
100k1k
200
150
100
50
0
-50
-100
-150
PHASE (°)
FIGURE 5. A
10
V
0
V
-10
R
-20
A
-30
-40
-50
-60
TEMPERATURE (°C)
-70
-80
-90
-100
101001k10k100k
vs FREQUENCY @ 100kΩ LOADFIGURE 6. A
VOL
= 5VDC
S
= 1Vp-p
SOURCE
= 10kΩ
L
= +1
V
PSRR -
PSRR +
1M
PSRR (dB)
vs FREQUENCY @ 1kΩ LOAD
VOL
10
0
= ±2.5VDC
V
S
-10
V
R
-20
-30
-40
CMRR (dB)
-50
-60
-70
-80
-90
-100
101001k10k100k
SOURCE
= 10kΩ
L
= 1Vp-p
TEMPERATURE (°C)
1M
FIGURE 7. PSRR vs FREQUENCYFIGURE 8. CMRR vs FREQUENCY
2.56
V
IN
2.54
2.52
V
= 5VDC
V
S
V
OUT
= 1kΩ
R
L
A
= +1
V
TIME (µs)
OUT
= 0.1Vp-p
2.50
2.48
VOLTS (V)
2.46
2.44
2.42
0246810 12 14 16 18 20
5.0
4.0
3.0
2.0
VOLTS (V)
1.0
0
050100150200250
VS = 5VDC
V
= 2Vp-p
OUT
R
= 1k
Ω
L
A
= -2
V
TIME (µs)
V
V
FIGURE 9. SMALL SIGNAL TRANSIENT RESPONSEFIGURE 10. LARGE SIGNAL TRANSIENT RESPONSE
OUT
IN
5
FN6145.1
September 28, 2006
ISL28278, ISL28478
Typical Performance Curves (Continued)
10.00
1k
1.00
0.10
CURRENT NOISE (pA/√Hz)
0.01
1101001k10k
FREQUENCY (Hz)
100k
100
10
VOLTAGE NOISE (nV/√Hz)
1
11010010k100k
1k
FREQUENCY (Hz)
FIGURE 11. CURRENT NOISE vs FREQUENCYFIGURE 12. VOLTAGE NOISE vs FREQUENCY
V/DIV)
µ
VOLTAGE NOISE (1
5.4µV
P-P
TIME (1s/DIV)
6
V
IN
5
4
3
VOLTS (V)
2
100K
100K
100K
VS +
VS +
100K
100K
100K
-
-
-
DUT
DUT
DUT
+
+
+
1K
1K
1K
VS -
VS -
Function
Function
Function
Generat or
Generat or
Generat or
33140A
33140A
33140A
1
0
050100150200
V+ = 5V
TIME (ms)
V
OUT
FIGURE 13. 0.1Hz TO 10Hz INPUT VOLTAGE NOISEFIGURE 14. INPUT VOLTAGE SWING ABOVE THE V+ SUPPLY
155
10µs/DIV
AV = -1
V
= 200mVp-p
IN
V+ = 5V
V- = 0V
135
115
95
75
SUPPLY CURRENT (µA)
55
35
23.545.5
2.554.53
SUPPLY VOLTAGE (V)
EN
INPUT
1V/DIV0.1V/DIV
0
V
OUT
0
FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGEFIGURE 16. ENABLE TO OUTPUT DELAY TIME
6
FN6145.1
September 28, 2006
ISL28278, ISL28478
Typical Performance Curves (Continued)
160
n = 12
150
140
A)
µ
130
120
CURRENT (
110
100
90
-40-200 20406080100120
MEDIAN
MIN
TEMPERATURE (°C)
MAX
FIGURE 17. SUPPLY CURRENT vs TEMPERA TURE VS = ±2.5V
ENABLED, R
100
0
n = 12
-100
-200
-300
-400
CURRENT (pA)
-500
-600
-700
-40 -20020406080 100 120
FIGURE 19. I BIAS(+) vs TEMPERATURE V
= INF
L
MAX
MEDIAN
TEMPERATURE (°C)
MIN
= ±2.5VFIGURE 20. I BIAS(-) vs TEMPERATURE VS = ±2.5V
S
4.8
n = 12
4.6
4.4
A)
µ
4.2
4
3.8
CURRENT (
3.6
3.4
3.2
-40 -20020406080 100 120
MEDIAN
MAX
MIN
TEMPERATURE (°C)
FIGURE 18. SUPPLY CURRENT vs TEMPERA TURE V
DISABLED, R
50
0
n = 12
-50
-100
-150
-200
CURRENT (pA)
-250
-300
-350
-40 -20020406080 100 120
= INF
L
MAX
MEDIAN
TEMPERATURE (°C)
MIN
= ±2.5V
S
50
0
n = 12
-100
-150
-200
CURRENT (pA)
-250
-300
-350
-50
MEDIAN
-40 -20020406080 100 120
Min
MIN
TEMPERATURE (°C)
MAX
FIGURE 21. INPUT OFFSET CURRENT vs TEMPERATURE
V
= ±2.5V
S
7
450.05
400.05
350.05
300.05
250.05
200.05
AVOL (V/mV)
150.05
100.05
50.05
n = 12
0.05
-40-200 20406080100120
MAX
MEDIAN
TEMPERATURE (°C)
MIN
FIGURE 22. AVOL vs TEMPERA TURE R
@ V
±2.5V
S
=100k, VO @ +2V/-2V
L
FN6145.1
September 28, 2006
ISL28278, ISL28478
Typical Performance Curves (Continued)
300
200
100
0
VOLTAGE (µV)
-100
-200
-300
n = 12
MAX
MEDIAN
MIN
-40-200 20406080100120
TEMPERATURE (°C)
FIGURE 23. INPUT OFFSET VOLTAGE vs TEMPERATURE
V
= ±2.5V
S
140
n = 12
130
120
MAX
400
n = 12
300
V)
µ
200
100
VOLTAGE (
0
-100
-200
-40 -20020406080 100 120
MAX
MEDIAN
MIN
TEMPERATURE (°C)
FIGURE 24. INPUT OFFSET VOLTAGE vs TEMPERATURE
VS = ±1.2V
140
n = 12
130
120
MAX
110
CMRR (dB)
MEDIAN
100
90
80
-40 -20020406080 100 120
MIN
TEMPERATURE (°C)
FIGURE 25. CMRR vs TEMPERATURE, FREQ = 0Hz,
V
= +2.5V TO -2.5V
CM
4.895
4.885
4.875
(V)
OUT
4.865
V
4.855
4.845
FIGURE 27. POSITIVE V
n = 12
4.89
MAX
4.88
4.87
MEDIAN
4.86
4.85
4.84
-40-200 20406080100120
V
= ±2.5V
S
MIN
TEMPERATURE (°C)
vs TEMPERATURE RL = 1k,
OUT
110
PSRR (dB)
MEDIAN
100
90
80
-40 -20020406080 100 120
MIN
TEMPERATURE (°C)
FIGURE 26. PSRR vs TEMPERA TURE, FREQ = 0Hz,
VS = ±1.2V TO ±2.5V
180
n = 12
170
160
150
MEDIAN
140
130
VOUT (mV)
120
110
100
-40-200 20406080100120
FIGURE 28. NEGATIVE V
V
= ±2.5V
S
MAX
MIN
TEMPERATURE (°C)
vs TEMPERATURE RL = 1k,
OUT
8
FN6145.1
September 28, 2006
ISL28278, ISL28478
Typical Performance Curves (Continued)
4.9984
4.9982
4.9978
4.9976
(V)
4.9974
OUT
4.9972
V
4.9968
4.9966
4.9964
4.998
4.997
n = 12
Median
MedianMEDIAN
-40 -20020406080 100 120
FIGURE 29. POSITIVE V
V
= ±2.5V
S
14.5
13.5
12.5
CURRENT (nA)
14
13
12
n = 12
MAX
MEDIAN
MAX
MIN
TEMPERATURE (°C)
vs TEMPERATURE RL = 100k,
OUT
MIN
4.3
n = 12
4.2
4.1
4
3.9
MEDIAN
(mV)
3.8
OUT
V
3.7
3.6
3.5
3.4
-40-200 20406080100120
FIGURE 30. NEGATIVE V
V
= ±2.5V
S
CURRENT (uA)
0.9
0.85
0.8
0.75
0.7
0.65
n = 12
MEDIAN
MAX
MIN
TEMPERATURE (°C)
vs TEMPERATURE RL = 100k,
OUT
MAX
MIN
11.5
11
-40 -20020406080 100 120
TEMPERATURE (°C)
FIGURE 31. I
0.2
0.19
0.18
0.17
0.16
0.15
0.14
0.13
SLEW RATE (V/µs)
0.12
0.11
0.1
0.09
-40 -20020406080 100 120
(EN) vs TEMPERATURE VS = ±2.5VFIGURE 32. IIH (EN) vs TEMPERATURE VS = ±2.5V
IL
n = 12
MAX
MEDIAN
MIN
TEMPERATURE (°C)
FIGURE 33. +SLEW RATE vs TEMPERA TURE V
INPUT = ±0.75V A
V
= 2
= ±2.5V ,
S
0.6
0.55
-40-200 20406080100120
0.2
n = 12
0.19
0.18
0.17
0.16
0.15
MEDIAN
0.14
SLEW RATE (V/µs))
0.13
0.12
0.11
0.1
-40 -20020406080 100 120
TEMPERATURE (°C)
MAX
MIN
TEMPERATURE (°C)
FIGURE 34. -SLEW RATE vs TEMPERATURE V
INPUT = ±0.75V A
V
= 2
= ±2.5V ,
S
9
FN6145.1
September 28, 2006
ISL28278, ISL28478
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
1.2
893mW
1
0.8
0.6
0.4
POWER DISSIPATION (W)
0.2
0
0 255075100150
FIGURE 35. PACKAGE POWER DISSIPA TION vs AMBIENT
Q
S
θ
O
P
J
A
1
=
6
1
1
2
°
C
/
W
AMBIENT TEMPERATURE (°C)
POWER DISSIPATION (W)
12585
FIGURE 36. PACKAGE POWER DISSIPA TION vs AMBIENT
TEMPERATURE
Pin Descriptions
ISL28278
(16 LD QSOP)
31OUT_ACircuit 3Amplifier A output
42IN-_ACircuit 1Amplifier A inverting input
53IN+_ACircuit 1Amplifier A non-inverting input
154V+Circuit 4Positive power supply
125IN+_BCircuit 1Amplifier B non-inverting input
136IN-_BCircuit 1Amplifier B inverting input
147OUT_BCircuit 3Amplifier B output
1, 2, 8, 9, 10, 168, 9NCNo internal connection
713V-Circuit 4Negative power supply
6EN
11EN
ISL28478
(16 LD QSOP)PIN NAME
EQUIVALENT
CIRCUITDESCRIPTION
10OUT_CCircuit 3Amplifier C output
11IN-_CCircuit 1Amplifier C inverting input
12IN+_CCircuit 1Amplifier B non-inverting input
14IN+_DCircuit 1Amplifier D non-inverting input
15IN-_DCircuit 1Amplifier D inverting input
16OUT_DCircuit 3Amplifier D output
_ACircuit 2Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state;
Logic “0” selects the enabled state.
_BCircuit 2Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled
state; Logic “0” selects the enabled state.
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2
1
0.8
633mW
0.6
0.4
0.2
0
0255075100150
Q
S
O
θ
P
1
J
AMBIENT TEMPERATURE (°C)
6
A
=
1
5
8
°
C
/
W
12585
TEMPERATURE
IN-
CIRCUIT 1
V+
V+
IN+
V-
LOGIC
PIN
CIRCUIT 2
V-
CIRCUIT 3
V+
OUT
V-
10
V+
V-
CIRCUIT 4
CAPACITIVELY
COUPLED
ESD CLAMP
September 28, 2006
FN6145.1
ISL28278, ISL28478
Applications Information
Introduction
The ISL28278 and ISL28478 are Dual and Quad channel
CMOS rail-to-rail input, output (RRIO) micropower precision
operational amplifier with an enable feature. The parts are
designed to operate from single supply (2.4V to 5.0V) or dual
supply (±1.2V to ±2.5V) while drawing only 120μA of supply
current. The device has an input common mode range that
extends 10% above the positive rail and up to 100mV below
the negative supply rail. The output operation can swing
within about 4mV of the supply rails with a 100kΩ load
(reference Figures 27 through 30). This combination of low
power and precision performance makes them suitable for
solar and battery power applications.
Rail-to-Rail Input
The input common-mode voltage range of the ISL28278 and
ISL28478 is from the negative supply to 10% greater than
the positive supply without introducing additional offset
errors or degrading performance associated with a
conventional rail-to-rail input operational amplifier. Many
rail-to-rail input stages use two differential input pairs, a longtail PNP (or PFET) and an NPN (or NFET). Severe penalties
have to be paid for this circuit topology. As the input signal
moves from one supply rail to another, the operational
amplifier switches from one input pair to the other causing
drastic changes in input offset voltage and an undesired
change in magnitude and polarity of input offset current.
The ISL28278 and ISL28487 achieve input rail-to-rail
operation without sacrificing important precision
specifications and degrading distortion performance. The
devices’ input offset voltage exhibits a smooth behavior
throughout the entire common-mode input range. The input
bias current versus the common-mode voltage range gives
us an undistorted behavior from typically 100mV below the
negative rail and 10% higher than the V+ rail (0.5V higher
than V+ when V+ equals 5V).
Input Protection
All input terminals have internal ESD protection diodes to
both positive and negative supply rails, limiting the input
voltage to within one diode beyond the supply rails. They
have additional back-to-back diodes across the input
terminals. For applications where the input differential
voltage is expected to exceed 0.5V , external series resistors
must be used to ensure the input currents never exceed
5mA.
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to
achieve the rail-to-rail output swing. The NMOS sinks
current to swing the output in the negative direction. The
PMOS sources current to swing the output in the positive
direction. The ISL28278 and ISL28478 with a 100kΩ load
will swing to within 4mV of the positive supply rail and within
3mV of the negative supply rail.
Enable/Disable Feature
The ISL28278 has an EN pin that disables the device when
pulled up to at least 2.0V. In the disabled state (output in a
high impedance state), the part consumes typically 4µA. By
disabling the part, multiple ISL28278 parts can be connected
together as a MUX. In this configuration, the outputs are tied
together in parallel and a channel can be selected by the EN
pin. The EN
the EN
pin also has an internal pull down. If left open,
pin will pull to the negative rail and the device will be
enabled by default.
The loading effects of the feedback resistors of the disabled
amplifier must be considered when multiple amplifier outputs
are connected together.
Using Only One Channel
The ISL28278 and ISL28478 are Dual and Quad channel
opamps. If the application only requires one channel when
using the ISL28278 or less than 4 channels when using the
ISL28478, the user must configure the unused channel (s) to
prevent them from oscillating. The unused channel (s) will
oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to short the output to the
negative input and ground the positive input (as shown in
Figure 37).
-
+
FIGURE 37. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
1/2 ISL28278
1/4 ISL28478
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance and low offset voltage, care should be taken in
the circuit board layout. The PC board surface must remain
clean and free of moisture to avoid leakage currents
between adjacent traces. Surface coating of the circuit board
will reduce surface moisture and provide a humidity barrier,
reducing parasitic resistance on the board. When input
leakage current is a concern, the use of guard rings around
the amplifier inputs will further reduce leakage currents.
Figure38 shows a guard ring example for a unity gain
amplifier that uses the low impedance amplifier output at the
same voltage as the high impedance input to eliminate
surface leakage. The guard ring does not need to be a
specific width, but it should form a continuous loop around
both inputs. For further reduction of leakage currents,
11
FN6145.1
September 28, 2006
ISL28278, ISL28478
components can be mounted to the PC board using PTFE
standoff insulators.
HIGH IMPEDANCE INPUT
IN
FIGURE 38. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
V+
1/2 ISL28278
1/4 ISL28478
Example Application
Thermocouples are the most popular temperature-sensing
device because of their low cost, interchangeability, and
ability to measure a wide range of temperatures. The
ISL28278 (Figure 39) is used to convert the differential
thermocouple voltage into single-ended signal with 10X gain.
The ISL28278's rail-to-rail input characteristic allows the
thermocouple to be biased at ground and the amplifier to run
from a single 5V supply.
R
4
100kΩ
10kΩR
K TYPE
THERMOCOUPLE
FIGURE 39. THERMOCOUPLE AMPLIFIER
3
10kΩR
2
V+
+
ISL28278
V-
R
1
100kΩ
+
410µV/°C
5V
Current Limiting
The ISL28278 and ISL28478 have no internal currentlimiting circuitry. If the output is shorted, it is possible to
exceed the Absolute Maximum Rating for output current or
power dissipation, potentially resulting in the destruction of
the device.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (T
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related in Eq.1.:
T
JMAXTMAXθJA
xPD
()+=
MAXTOTAL
where:
•P
DMAXTOTAL
is the sum of the maximum power
dissipation of each amplifier in the package (PD
•PD
for each amplifier can be calculated as shown in
MAX
Eq.2:
PD
MAX
2*VSI
SMAXVS
( - V
where:
•T
• θ
•PD
•V
•I
•V
= Maximum ambient temperature
MAX
= Thermal resistance of the package
JA
= Maximum power dissipation of 1 amplifier
MAX
= Supply voltage
S
= Maximum supply current of 1 amplifier
MAX
OUTMAX
= Maximum output voltage swing of the
application
= Load resistance
•R
L
) for all applications
JMAX
V
----------------------------
)
OUTMAX
×+×=
MAX
OUTMAX
R
L
(EQ. 1)
)
(EQ. 2)
12
FN6145.1
September 28, 2006
ISL28278, ISL28478
Quarter Size Outline Plastic Packages Family (QSOP)
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
GAUGE
PLANE
L
0.010
4°±4°
A2
A1
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implicat ion or oth erwise u nde r any p a tent or p at ent r ights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
13
FN6145.1
September 28, 2006
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