Dual Micropower Single Supply
Rail-to-Rail Input and Output (RRIO)
Precision Op-Amp
The ISL28288 is a dual channel micropower precision
operational amplifier optimized for single supply operation at
5V and can operate down to 2.4V. For equivalent
performance in a single channel op-amp reference EL8188.
The ISL28288 features an Input Range Enhancement Circuit
(IREC) which enables the ISL28288 to maintain CMRR
performance for input voltages equal to the positive and
negative supply rails. The input signal is capable of swinging
10% above the positive supply rail and to 100mV below the
negative supply with only a slight degradation of the CMRR
performance. The output operation is rail to rail.
The ISL28288 draws minimal supply current while meeting
excellent DC-accuracy, AC-performance, noise and output
drive specifications.
The ISL28288 can be operated from one lithium cell or two
Ni-Cd batteries. The input range includes both positive and
negative rail.
Ordering Information
PART
PART NUMBER
ISL28288FUZ
(See Note)
ISL28288FUZ-T7
(See Note)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
MARKING
28288Z50/Tube 10 Ld MSOP
28288Z7”
TAPE &
REELPACKAGE
(Pb-free)
10 Ld MSOP
(1500 pcs)
(Pb-free)
PKG.
DWG. #
MDP0043
MDP0043
FN6339.0
Features
• Low power 120µA typ supply current for both channels
• 1.5mV max offset voltage
• 30pA typ input bias current
• 300kHz gain-bandwidth product
• 100dB typ PSRR and CMRR
• Single supply operation down to 2.4V
• Input is capable of swinging above V+ and below V(ground sensing)
• Rail-to-rail input and output (RRIO)
• Pb-free plus anneal available (RoHS compliant)
Applications
• Battery- or solar-powered systems
• 4mA to 25mA current loops
• Handheld consumer products
• Medical devices
• Thermocouple amplifiers
• Photodiode pre-amps
• pH probe amplifiers
Pinout
ISL28288
(10 LD MSOP)
TOP VIEW
IN+_A
1
EN
_A
2
V-
3
EN
_B
4
IN+_BIN-_B
56
10
IN-_A
-
9
8
7
OUT_A
V+
OUT_B
+
+
-
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = T
Operating Junction
Electrical SpecificationsV+ = 5V, V- = 0V, V
Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data
CM
A
= 2.5V, VO = 1.4V, TA = +25°C unless otherwise specified.
guaranteed by characterization
PARAMETERDESCRIPTIONCONDITIONSMINTYPMAXUNIT
V
OS
∆V
OS
------------------
∆Ti me
∆V
OS
--------------- -
∆T
I
OS
I
B
e
N
Input Offset Voltage-1.5
-2
±0.051.5
2
mV
Long Term Input Offset Voltage Stability1.2µV/Mo
Input Offset Drift vs Temperature2.2µV/°C
Input Offset Current
-600
Input Bias Current
-40°C to +85°C
-30
-80
Input Noise Voltage Peak-to-Peakf = 0.1Hz to 10Hz5.4µV
±530
600
±1030
80
pA
pA
PP
Input Noise Voltage DensityfO = 1kHz48nV/√Hz
i
N
Input Noise Current DensityfO = 1kHz0.1pA/√Hz
CMIRInput Voltage RangeGuaranteed by CMRR test05V
CMRRCommon-Mode Rejection RatioV
= 0V to 5V80
CM
100dB
75
PSRRPower Supply Rejection Ratio V+ = 2.4V to 5V85
105dB
80
A
V
VOL
OUT
Large Signal Voltage GainVO = 0.5V to 4.5V, RL = 100kΩ 200
190
V
= 0.5V to 4.5V, RL = 1kΩ25V/mV
O
Maximum Output Voltage SwingOutput low, RL = 100kΩ3630mV
300V/mV
Output low, R
= 1kΩ130175
L
mV
225
Output high, R
Output high, R
SRSlew Rate0.12
= 100kΩ4.990
L
= 1kΩ4.800
L
4.97
4.750
0.09
4.996V
4.880V
±0.140.16
V/µs
0.21
GBWGain Bandwidth Product300kHz
2
FN6339.0
September 20, 2006
ISL28288
Electrical SpecificationsV+ = 5V, V- = 0V, V
Boldface limits apply over the operating temperature range, -40°C to +125°C, temperature data
= 2.5V, VO = 1.4V, TA = +25°C unless otherwise specified.
FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGEFIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
100
INPUT OFFSET VOLTAGE (µV)
80
60
40
20
-20
-40
-60
-80
-100
V
= VDD/2
CM
V
= 5V
0
V
= 2.5V
DD
05
1324
OUTPUT VOLTAGE (V)
DD
0
-20
-40
-60
-80
INPUT OFFSET VOLTAGE (µV)
-100
VOS, µV
05
1324
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 3. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGEFIGURE 4. INPUT OFFSET VOLTAGE vs COMMON-MODE
INPUT VOLTAGE
3
FN6339.0
September 20, 2006
Typical Performance Curves (Continued)
ISL28288
120
80
40
GAIN (dB)
0
-40
-80
11k100k10M
10
FREQUENCY (Hz)
FIGURE 5. A
10
VS = 5VDC
0
V
SOURCE
-10
= 10k
R
L
-20
AV = +1
-30
-40
-50
-60
-70
TEMPERATURE (°C)
-80
-90
-100
101001k10k100k
vs FREQUENCY @ 100kΩ LOADFIGURE 6. A
VOL
= 1Vp-p
Ω
PSRR -
10k1M100
PSRR +
PSRR (dB)
80
40
0
-40
-80
-120
1M
FIGURE 7. PSRR vs FREQUENCYFIGURE 8. CMRR vs FREQUENCY
100
80
60
PHASE (°)
40
GAIN (dB)
20
0
-20
1010k1M
100
FREQUENCY (Hz)
VOL
10
0
VS = ±2.5VDC
-10
V
= 1Vp-p
SOURCE
R
= 10k
Ω
L
-20
-30
-40
-50
-60
CMRR (dB)
-70
-80
-90
-100
101001k10k100k1M
TEMPERATURE (
PHASE
GAIN
100k1k
vs FREQUENCY @ 1kΩ LOAD
°
C)
200
150
100
50
0
-50
-100
-150
PHASE (°)
5.0
4.0
3.0
2.0
VOLTS (V)
1.0
0
050100150200250
VS = 5VDC
V
= 2Vp-p
OUT
R
= 1k
Ω
L
A
= -2
V
TIME (µs)
VOLTS (V)
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
V
IN
V
OUT
= 5VDC
V
S
V
= 0.1Vp-p
OUT
= 1kΩ
R
L
A
= +1
V
0 2 4 6 8 101214161820
TIME (µs)
FIGURE 9. SMALL SIGNAL TRANSIENT RESPONSEFIGURE 10. LARGE SIGNAL TRANSIENT RESPONSE
4
September 20, 2006
V
OUT
V
IN
FN6339.0
Typical Performance Curves (Continued)
10.00
ISL28288
1k
1.00
0.10
CURRENT NOISE (pA/√Hz)
0.01
1101001k10k
FREQUENCY (Hz)
100k
100
10
VOLTAGE NOISE (nV/√Hz)
1
11010010k100k
1k
FREQUENCY (Hz)
FIGURE 11. CURRENT NOISE vs FREQUENCYFIGURE 12. VOLTAGE NOISE vs FREQUENCY
6
V
5
4
100K
100K
3
VOLTS (V)
2
VOLTAGE NOISE (1µV/DIV)
5.4µV
P-P
1
100K
Function
Function
Function
Generat or
Generat or
Generat or
33140A
33140A
33140A
IN
100K
100K
100K
VS +
VS +
-
-
-
DUT
DUT
DUT
+
+
+
1K
1K
1K
VS -
VS -
0
050100150200
TIME (1s/DIV)
V+ = 5V
TIME (ms)
V
OUT
FIGURE 13. 0.1Hz TO 10Hz INPUT VOLTAGE NOISEFIGURE 14. INPUT VOLTAGE SWING ABOVE THE V+ SUPPLY
155
135
115
95
75
SUPPLY CURRENT (µA)
55
35
23.545.5
2.554.53
SUPPLY VOLTAGE (V)
EN
Input
1V/DIV0.1V/DIV
0
V
OUT
0
10µs/DIV
AV = -1
V
= 200mVp-p
IN
V+ = 5V
V- = 0V
FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGEFIGURE 16. ENABLE TO OUTPUT DELAY TIME
5
September 20, 2006
FN6339.0
Typical Performance Curves (Continued)
ISL28288
160
n = 12
150
140
130
120
CURRENT (uA)
110
100
90
-40-200 20406080100120
MEDIAN
MIN
MAX
TEMPERATURE (°C)
FIGURE 17. SUPPLY CURRENT vs TEMPERA TURE
V
= ±2.5V ENABLED, RL = INF
S
100
0
n = 12
-100
-200
-300
-400
CURRENT (pA)
-500
-600
-700
-40 -20020406080 100 120
TEMPERATURE (°C)
FIGURE 19. I BIAS(+) vs TEMPERATURE V
MAX
MEDIAN
MIN
= ±2.5VFIGURE 20. I BIAS(-) vs TEMPERATURE VS = ±2.5V
S
4.8
n = 12
4.6
4.4
4.2
4
3.8
CURRENT (uA)
3.6
3.4
3.2
-40 -20020406080100 120
MEDIAN
MAX
MIN
TEMPERATURE (°C)
FIGURE 18. SUPPLY CURRENT vs TEMPERA TURE
VS = ±2.5V DISABLED, RL = INF
50
0
n = 12
-50
-100
-150
-200
CURRENT (pA)
-250
-300
-350
-40 -20020406080100 120
TEMPERATURE (°C)
MAX
MEDIAN
MIN
50
0
n = 12
-50
-100
-150
-200
CURRENT (pA)
-250
-300
-350
MEDIAN
-40 -20020406080100 120
Min
MIN
TEMPERATURE (°C)
MAX
FIGURE 21. INPUT OFFSET CURRENT vs TEMPERATURE
V
= ±2.5V
S
6
450.05
400.05
350.05
300.05
250.05
200.05
AVOL(V/mV)
150.05
100.05
50.05
n = 12
0.05
-40 -20020406080 100 120
MAX
MEDIAN
TEMPERATURE (°C)
MIN
FIGURE 22. AVOL vs TEMPERA TURE R
@ V
±2.5V
S
=100k, VO @ +2V/-2V
L
FN6339.0
September 20, 2006
Typical Performance Curves (Continued)
ISL28288
800
n = 12
600
400
200
0
-200
VOLTAGE (µV)
-400
-600
-800
-1000
MIN
-40 -20020406080 100 120
MAX
MEDIAN
TEMPERATURE (°C)
FIGURE 23. INPUT OFFSET VOLTAGE vs TEMPERATURE
V
= ±2.5V
S
140
n = 12
130
120
110
CMRR (dB)
100
MAX
MEDIAN
800
n = 12
600
400
200
0
-200
VOLTAGE (µV)
-400
-600
MIN
-800
-1000
-40 -20020406080100 120
MAX
MEDIAN
TEMPERATURE (°C)
FIGURE 24. INPUT OFFSET VOLTAGE vs TEMPERATURE
VS = ±1.2V
140
n = 12
130
120
MAX
110
MEDIAN
PSRR (dB)
100
90
80
-40 -20020406080100 120
MIN
TEMPERATURE (°C)
FIGURE 25. CMRR vs TEMPERATURE, FREQ = 0Hz,
V
= +2.5V TO -2.5V
CM
4.895
4.885
4.875
(V)
OUT
4.865
V
4.855
4.845
FIGURE 27. POSITIVE V
n = 12
4.89
MAX
4.88
4.87
MEDIAN
4.86
4.85
4.84
-40 -20020406080100 120
V
S
= ±2.5V
MIN
TEMPERATURE (°C)
vs TEMPERATURE RL = 1k,
OUT
90
80
-40-200 20406080100120
MIN
TEMPERATURE (°C)
FIGURE 26. PSRR vs TEMPERATURE, FREQ = 0Hz,
VS = ±1.2V TO ±2.5V
180
n = 12
170
160
150
(mV)
V
MEDIAN
140
OUT
130
120
110
100
-40-200 20406080100120
FIGURE 28. NEGATIVE V
V
= ±2.5V
S
MAX
MIN
TEMPERATURE (°C)
vs TEMPERATURE RL = 1k,
OUT
7
FN6339.0
September 20, 2006
Typical Performance Curves (Continued)
ISL28288
4.9984
4.9982
4.9978
4.9976
4.9974
4.9972
VOUT (V)
4.9968
4.9966
4.9964
4.998
4.997
n = 12
MEDIAN
MIN
-40 -20020406080 100 120
FIGURE 29. POSITIVE V
V
= ±2.5V
S
14.5
14
13.5
13
12.5
CURRENT (nA)
12
n = 12
MAX
MEDIAN
MAX
TEMPERATURE (°C)
vs TEMPERATURE RL = 100k,
OUT
MIN
4.3
n = 12
4.2
4.1
4
MEDIAN
3.9
3.8
VOUT (mV)
3.7
3.6
3.5
3.4
-40 -20020406080 100 120
FIGURE 30. NEGATIVE V
V
= ±2.5V
S
0.9
0.85
0.8
0.75
0.7
CURRENT (µA)
0.65
n = 12
MEDIAN
MIN
MAX
MIN
TEMPERATURE (°C)
vs TEMPERATURE RL = 100k,
OUT
MAX
11.5
11
-40-200 20406080100120
TEMPERATURE (°C)
FIGURE 31. I
0.2
0.19
0.18
0.17
0.16
0.15
0.14
0.13
SLEW RATE (V/µs)
0.12
0.11
0.1
0.09
-40-200 20406080100120
(EN) vs TEMPERATURE VS = ±2.5V FIGURE 32. IIH (EN) vs TEMPERATURE VS = ±2.5V
IL
n = 12
MAX
MEDIAN
MIN
TEMPERATURE (°C)
FIGURE 33. +SLEW RATE vs TEMPERA TURE V
INPUT = ±0.75V A
V
= 2
= ±2.5V ,
S
0.6
0.55
-40 -20020406080100 120
0.2
n = 12
0.19
0.18
0.17
SLEW RATE (V/µs))
0.16
0.15
0.14
0.13
0.12
0.11
0.1
MEDIAN
-40 -20020406080100 120
TEMPERATURE (°C)
MAX
MIN
TEMPERATURE (°C)
FIGURE 34. -SLEW RATE vs TEMPERATURE V
INPUT = ±0.75V A
V
= 2
= ±2.5V ,
S
8
FN6339.0
September 20, 2006
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
ISL28288
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2
1.2
893mW
1
0.8
0.6
0.4
POWER DISSIPATION (W)
0.2
0
0 255075100150
Q
S
θ
O
P
J
A
1
=
6
1
1
2
°
C
/
W
AMBIENT TEMPERATURE (°C)
12585
FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Pin Descriptions
ISL28288
(10 LD MSOP)PIN NAME
1IN+_ACircuit 1Amplifier A non-inverting input
2EN
3V-Circuit 4Negative power supply
4EN
5IN+_BCircuit 1Amplifier B non-inverting input
6IN-_BCircuit 1Amplifier B inverting input
7OUT_BCircuit 3Amplifier B output
8V+Circuit 4Positive power supply
9OUT_ACircuit 3Amplifier A output
10IN-_ACircuit 1Amplifier A inverting input
EQUIVALENT
CIRCUITDESCRIPTION
_ACircuit 2Amplifier A enable pin internal pull-down; Logic “1” selects the disabled state; Logic “0” selects the
enabled state.
_BCircuit 2Amplifier B enable pin with internal pull-down; Logic “1” selects the disabled state; Logic “0”
selects the enabled state.
1
0.8
633mW
0.6
0.4
POWER DISSIPATION (W)
0.2
0
0255075100150
Q
S
O
θ
P
1
J
AMBIENT TEMPERATURE (°C)
6
A
=
1
5
8
°
C
/
W
12585
FIGURE 36. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
IN-
CIRCUIT 1
V+
V+
IN+
V-
LOGIC
PIN
V-
CIRCUIT 3CIRCUIT 2
V+
OUT
V-
9
V+
V-
CIRCUIT 4
CAPACITIVELY
COUPLED
ESD CLAMP
September 20, 2006
FN6339.0
ISL28288
Applications Information
Introduction
The ISL28288 is a dual CMOS rail-to-rail input, output
(RRIO) micropower precision operational amplifier with an
enable feature. The part is designed to operate from single
supply (2.4V to 5.0V) or dual supply (±1.2V to ±2.5V) while
drawing only 120µA of supply current. The device has an
input common mode range that extends 10% above the
positive rail and up to 100mV below the negative supply rail.
The output operation can swing within about 4mV of the
supply rails with a 100kΩ load (reference Figures 27 through
30). This combination of low power and precision
performance makes this device suitable for solar and battery
power applications.
Rail-to-Rail Input
The input common-mode voltage range of the ISL28288
goes from negative supply to 10% greater than the positive
supply without introducing additional offset errors or
degrading performance associated with a conventional railto-rail input operational amplifier. Many rail-to-rail input
stages use two differential input pairs, a long-tail PNP (or
PFET) and an NPN (or NFET). Severe penalties have to be
paid for this circuit topology. As the input signal moves from
one supply rail to another, the operational amplifier switches
from one input pair to the other causing drastic changes in
input offset voltage and an undesired change in magnitude
and polarity of input offset current.
Enable/Disable Feature
The ISL28288 offers an EN pin that disables the device
when pulled up to at least 2.0V. In the disabled state (output
in a high impedance state), the part consumes typically 4µA.
By disabling the part, multiple ISL28288 parts can be
connected together as a MUX. In this configuration, the
outputs are tied together in parallel and a channel can be
selected by the EN
down. If left open, the EN
pin. The EN pin also has an internal pull
pin will pull to the negative rail and
the device will be enabled by default.
The loading effects of the feedback resistors of the disabled
amplifier must be considered when multiple amplifier outputs
are connected together.
Using Only One Channel
The ISL28288 is a dual opamp. If the application only
requires one channel, the user must configure the unused
channel to prevent it from oscillating. The unused channel
will oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to short the output to the
negative input and ground the positive input (as shown in
Figure 37).
ISL28288
+
The ISL28288 achieves input rail-to-rail without sacrificing
important precision specifications and degrading distortion
performance. The devices’ input offset voltage exhibits a
smooth behavior throughout the entire common-mode input
range. The input bias current versus the common-mode
voltage range gives us an undistorted behavior from typically
100mV below the negative rail and 10% higher than the V+
rail (0.5V higher than V+ when V+ equals 5V).
Input Protection
All input terminals have internal ESD protection diodes to
both positive and negative supply rails, limiting the input
voltage to within one diode beyond the supply rails. The
ISL28288 has additional back-to-back diodes across the
input terminals. For applications where the input differential
voltage is expected to exceed 0.5V , external series resistors
must be used to ensure the input currents never exceed
5mA.
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to
achieve the rail-to-rail output swing. The NMOS sinks
current to swing the output in the negative direction. The
PMOS sources current to swing the output in the positive
direction. The ISL28288 with a 100kΩ load will swing to
within 4mV of the positive supply rail and within 3mV of the
negative supply rail.
FIGURE 37. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input
impedance and low offset voltage of the ISL28288, care
should be taken in the circuit board layout. The PC board
surface must remain clean and free of moisture to avoid
leakage currents between adjacent traces. Surface coating
of the circuit board will reduce surface moisture and provide
a humidity barrier, reducing parasitic resistance on the
board. When input leakage current is a concern, the use of
guard rings around the amplifier inputs will further reduce
leakage currents. Figure38 shows a guard ring example for
a unity gain amplifier that uses the low impedance amplifier
output at the same voltage as the high impedance input to
eliminate surface leakage. The guard ring does not need to
be a specific width, but it should form a continuous loop
around both inputs. For further reduction of leakage
10
FN6339.0
September 20, 2006
ISL28288
currents, components can be mounted to the PC board
using PTFE standoff insulators.
HIGH IMPEDANCE INPUT
IN
FIGURE 38. GUARD RING EXAMPLE FOR UNITY GAIN
AMPLIFIER
V+
1/2 ISL28288
Example Application
Thermocouples are the most popular temperature-sensing
device because of their low cost, interchangeability, and
ability to measure a wide range of temperatures. The
ISL28288 (Figure 39) is used to convert the differential
thermocouple voltage into single-ended signal with 10X gain.
The ISL28288's rail-to-rail input characteristic allows the
thermocouple to be biased at ground and the amplifier to run
from a single 5V supply.
R
4
100kΩ
10kΩR
K TYPE
THERMOCOUPLE
FIGURE 39. THERMOCOUPLE AMPLIFIER
3
10kΩR
2
V+
+
ISL28288
V-
R
1
100kΩ
+
410µV/°C
5V
Current Limiting
The ISL28288 has no internal current-limiting circuitry. If the
output is shorted, it is possible to exceed the Absolute
Maximum Rating for output current or power dissipation,
potentially resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply
conditions. It is therefore important to calculate the
maximum junction temperature (T
to determine if power supply voltages, load conditions, or
package type need to be modified to remain in the safe
operating area. These parameters are related as follows:
xPD
T
JMAXTMAXθJA
()+=
MAXTOTAL
where:
•P
DMAXTOTAL
is the sum of the maximum power
dissipation of each amplifier in the package (PD
•PD
PD
for each amplifier can be calculated as follows:
MAX
MAX
2*VSI
( - V
SMAXVS
where:
•T
• θ
•PD
•V
•I
•V
= Maximum ambient temperature
MAX
= Thermal resistance of the package
JA
= Maximum power dissipation of 1 amplifier
MAX
= Supply voltage
S
= Maximum supply current of 1 amplifier
MAX
OUTMAX
= Maximum output voltage swing of the
application
= Load resistance
•R
L
) for all applications
JMAX
V
----------------------------
)
OUTMAX
×+×=
MAX
OUTMAX
R
L
(EQ. 1)
)
(EQ. 2)
11
FN6339.0
September 20, 2006
Mini SO Package Family (MSOP)
M
C
SEATING
PLANE
0.10 C
N LEADS
0.25C A B
E1E
B
L1
D
N
1
e
b
A
PIN #1
I.D.
(N/2)
H
0.08C A B
A
(N/2)+1
M
ISL28288
MDP0043
MINI SO PACKAGE FAMILY
SYMBOLMSOP8MSOP10TOLERANCENOTES
A1.101.10Max.A10.100.10±0.05A20.860.86±0.09-
b0.330.23+0.07/-0.08-
c0.180.18±0.05D3.003.00±0.101, 3
E4.904.90±0.15-
E13.003.00±0.102, 3
e0.650.50Basic-
L0.550.55±0.15-
L10.950.95Basic-
N810Reference-
Rev. C 6/99
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
A1
L
DETAIL X
PLANE
3° ±3°
0.25
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implicat ion or oth erwise u nde r any p a tent or p at ent r ights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
12
FN6339.0
September 20, 2006
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