Intersil ISL28117, ISL28217, ISL28417 User Manual

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Page 1

40V Precision Low Power Operational Amplifiers

OUTPUT

SALLEN-KEY LOW PASS FILTER (10kHz)

1.84k 4.93k

3.3nF

8.2nF

VS = ± 15V

-0.45 -0.30 -0.15 0 0.15 0.30 0.45

TC (µV/°C)

NUMBER OF AMPLIFIERS

ISL28117, ISL28217, ISL28417

The ISL28117, ISL28217 and ISL28417 are a family of very high precision amplifiers featuring low noise vs power consumption, low offset voltage, low I

current and low temperature drift

BIAS

making them the ideal choice for applications requiring both high DC accuracy and AC performance. The combination of precision, low noise, and small footprint provides the user with outstanding value and flexibility relative to similar competitive parts.

Applications for these amplifiers include precision active filters, medical and analytical instrumentation, precision power supply controls, and industrial controls.

The ISL28117 single and ISL28217 dual are offered in an 8 Ld SOIC, MSOP and TDFN packages. The ISL28417 is offered in 14 Ld SOIC, 14 Ld TSSOP packages. All devices are offered in standard pin configurations and operate over the extended temperature range from -40°C to +125°C.

Related Literature

•See AN1508 “ISL281X7SOICEVAL1Z Evaluation Board User’s Guide”

•See AN1509 User’s Guide”

“ISL282X7SOICEVAL2Z Evaluation Board

Features

• Low input offset . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50µV, Max.

• Superb offset TC. . . . . . . . . . . . . . . . . . . . . . . . 0.6µV/°C, Max.

• Input bias current . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1nA, Max.

• Input bias current TC . . . . . . . . . . . . . . . . . . . . .±5pA/°C, Max.

• Low current consumption . . . . . . . . . . . . . . . . . . . . . . . . 440µA

• Voltage noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8nV/Hz

• Wide supply range . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 40V

• Operating temperature range. . . . . . . . . . . .-40°C to +125°C

•Small package offerings in single, dual and quad

• Pb-Free (RoHS compliant)

• No phase reversal

Applications

• Precision instruments

• Medical instrumentation

• Spectral analysis equipment

• Active filter blocks

• Thermocouples and RTD reference buffers

• Data acquisition

• Power supply control

November 30, 2012 FN6632.10

FIGURE 1. TYPICAL APPLICATION FIGURE 2. VOS TEMPERATURE COEFFICIENT (VOSTC)

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

Page 2

ISL28117, ISL28217, ISL28417

Ordering Information

PART NU MB ER

(Notes 1, 2, 3)

ISL28117FBBZ 28117 FBZ 50 (B Grade) 8 Ld SOIC M8.15E

ISL28117FBZ 28117 FBZ -C 100 (C Grade) 8 Ld SOIC M8.15E

ISL28117FUBZ 8117Z 70 (B Grade) 8 Ld MSOP M8.118B

ISL28117FUZ 8117Z -C 150 (C Grade) 8 Ld MSOP M8.118B

ISL28117FRTBZ 8117 75 (B Grade) 8 Ld TDFN L8.3x3K

ISL28117FRTZ -C 8117 150 (C Grade) 8 Ld TDFN L8.3x3K

ISL28217FBBZ 28217 FBZ 50 (B Grade) 8 Ld SOIC M8.15E

ISL28217FBZ 28217 FBZ -C 100 (C Grade) 8 Ld SOIC M8.15E

Coming Soon

ISL28217FUBZ 8217Z TBD (B Grade) 8 Ld MSOP M8.118B

ISL28217FUZ 8217Z -C 150 (C Grade) 8 Ld MSOP M8.118B

ISL28217FRTBZ 8217 70 (B Grade) 8 Ld TDFN L8.3x3K

ISL28217FRTZ -C 8217 150 (C Grade) 8 Ld TDFN L8.3x3K

ISL28417FBBZ 28417 FBZ 120 (B Grade) 14 Ld SOIC MDP0027

ISL28417FBZ 28417 FBZ -C 200 (C Grade) 14 Ld SOIC MDP0027

ISL28417FVBZ 28417 FVZ 120 (B Grade) 14 Ld TSSOP M14.173

ISL28417FVZ 28417 FVZ-C 200 (C Grade) 14 Ld TSSOP M14.173

ISL28117SOICEVAL1Z Evaluation Board

ISL28217SOICEVAL2Z Evaluation Board

NOTES:

1. Add “-T*” suffix for tape and reel. Please refer to TB347

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28117 techbrief TB363

PART

MARKING

(MAX)

(µV)

for details on reel specifications.

, ISL28217, ISL28417. For more information on MSL please see

PACKAGE

(Pb-Free)

PKG.

DWG. #

November 30, 2012

FN6632.10

Page 3

Pin Configurations

-IN

+IN

V -

V+

OUT

-IN

+IN

V-

V+

OUT

-IN_A

+IN_A

V -

V+

OUT

-IN_B

+IN_B

OUT

-IN_A

+IN_A

V-

V+

OUT

-IN_B

+IN_B

-+ -+

-+ -+ BC

OUT

-IN_A

+IN_A

V +

+IN_B

-IN_B

OUT

V -

+IN_C

-IN_C

OUT

-IN_D

+IN_D

ISL28117

(8 LD SOIC, MSOP)

TOP VIEW

ISL28117, ISL28217, ISL28417

ISL28117

(8 LD TDFN)

TOP VIEW

ISL28217

(8 LD SOIC, MSOP)

TOP VIEW

ISL28217

(8 LD TDFN)

TOP VIEW

ISL28417

(14 LD SOIC, TSSOP)

TOP VIEW

November 30, 2012

FN6632.10

Page 4

Pin Descriptions

CIRCUIT 2

CIRCUIT 1

V+

V-

CIRCUIT 3

CAPACITIVELY

COUPLED

ESD CLAMP

IN-

V+

V-

IN+

500Ω 500Ω

V+

V-

OUT

ISL28117, ISL28217, ISL28417

ISL28117

(8 LD SOIC,

MSOP, TDFN)

ISL28217

(8 LD SOIC,

MSOP, TDFN)

ISL28417

(14 LD SOIC, TSSOP) PIN NAME EQUIVALENT CIRCUIT DESCRIPTION

3 - - +IN Circuit 1 Amplifier non-inverting input

-33+IN_A

-55+IN_B

- - 10 +IN_C

- - 12 +IN_D

4 4 11 V- Circuit 3 Negative power supply

2 - - -IN Circuit 1 Amplifier inverting input

-22-IN_A

-66-IN_B

--9-IN_C

--13-IN_D

7 8 4 V+ Circuit 3 Positive power supply

6- -V

-11V

-77V

--8V

--14V

OUT

Circuit 2 Amplifier output

1, 5, 8 - - NC - No internal connection

PD PD - PD - Thermal Pad - TDFN package only.

Connect thermal pad to ground or most negative potential.

November 30, 2012

FN6632.10

Page 5

ISL28117, ISL28217, ISL28417

Table of Contents

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Electrical Specifications V

Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Input Performance 19

Input ESD Diode Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Output Current Limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Output Phase Reversal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Unused Channels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

ISL28117, ISL28217 and ISL28417 SPICE Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

License Statement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Characterization vs Simulation Results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

± 15V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

± 5V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Package Outline Drawing (M8.15E). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Package Outline Drawing (M8.118B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Package Outline Drawing (L8.3x3K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

MDP0027 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Package Outline Drawing (M14.173). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

November 30, 2012

FN6632.10

Page 6

ISL28117, ISL28217, ISL28417

Absolute Maximum Ratings Thermal Information

Maximum Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...42V

Maximum Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA

Maximum Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42V

Min/Max Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V

Max/Min Input current for Input Voltage >V+ or <V-. . . . . . . . . . . . . . . . ±20mA

Output Short-Circuit Duration (1 output at a time). . . . . . . . . . . . . . . . Indefinite

ESD Rating

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5kV

Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V

Machine Model (ISL28217 MSOP only). . . . . . . . . . . . . . . . . . . . . . . 300V

Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5kV

ESD Rating (ISL28417 SOIC)

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6kV

Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450V

Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.

NOTES:

is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

4. θ

is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech

5. θ

Brief TB379

6. For θ

7. F or θ

, the “case temp” location is the center of the exposed metal pad on the package underside.

, the “case temp” location is taken at the package top center.

Thermal Resistance (Typical) θ

8 Ld SOIC ISL28117 (Notes 4, 7) . . . . . . . . 120 60

8 Ld SOIC ISL28217 (Notes 4, 7) . . . . . . . . 105 50

8 Ld MSOP ISL28117 (Notes 4, 7) . . . . . . . 155 50

8 Ld MSOP ISL28217 (Notes 4, 7) . . . . . . . 160 55

8 Ld TDFN ISL28117 (Notes 5, 6). . . . . . . . 48 7

8 Ld TDFN ISL28217 (Notes 5, 6). . . . . . . . 43 2

14 Ld SOIC (Notes 5, 7) . . . . . . . . . . . . . . . . 73 45

14 Ld TSSOP (Notes 4, 7) . . . . . . . . . . . . . . 90 32

Maximum Storage Temperature Range . . . . . . . . . . . .-65°C to +150°C

Maximum Junction Temperature (T

Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

JMAX

(°C/W) θ

) . . . . . . . . . . . . . . . . . . .+150°C

(°C/W)

Recommended Operating Conditions

Ambient Temperature Range (TA) . . . . . . . . . . . . . . . . . . .-40°C to +125°C

Electrical Specifications V

temperature range, -40°C to +125°C.

PARAMETER DESCRIPTION CONDITIONS

Input Offset Voltage, SOIC, TSSOP Package

Input Offset Voltage, MSOP Package ISL28117 B Grade -70 -10 70 µV

Input Offset Voltage, TDFN Package ISL28117 B Grade -75 -10 75 µV

± 15V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating

ISL28x17 B Grade -50 8 50 µV

ISL28x17 C Grade -100 4 100 µV

ISL28417 B Grade -70 10 70 µV

ISL28417 C Grade -110 10 110 µV

= -40°C to +85°C -160 160 µV

= -40°C to +125°C -200 200 µV

ISL28117 C Grade -150 4 150 µV

ISL28217 C Grade -150 10 150 µV

ISL28217 B Grade -70 10 70 µV

ISL28x17 C Grade -150 10 150 µV

MIN

(Note 8) TYP

-110 110 µV

-190 190 µV

-120 120 µV

-150 150 µV

-250 250 µV

-160 160 µV

-140 140 µV

-250 250 µV

MAX

(Note 8) UNIT

November 30, 2012

FN6632.10

Page 7

ISL28117, ISL28217, ISL28417

Electrical Specifications V

temperature range, -40°C to +125°C.

PARAMETER DESCRIPTION CONDITIONS

TCV

Input Offset Voltage Temperature Coefficient; SOIC, TSSOP Package

± 15V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating

(Continued)

MIN

(Note 8) TYP

MAX

(Note 8) UNIT

ISL28x17 B Grade -0.6 0.14 0.6 µV/°C

ISL28x17 C Grade -0.9 0.14 0.9 µV/°C

ISL28417 B Grade -0.75 0.2 0.75 µV/°C

ISL28417 C Grade -0.9 0.3 0.9 µV/°C

Input Offset Voltage Temperature Coefficient; MSOP Package

ISL28117 B Grade -0.8 0.1 0.8 µV/°C

ISL28117 C Grade -1 0.14 1 µV/°C

ISL28217 C Grade -1 0.14 1 µV/°C

Input Offset Voltage Temperature Coefficient; TDFN Package

ISL28117 B Grade -0.9 0.1 0.9 µV/°C

ISL28217 B Grade -0.7 0.1 0.7 µV/°C

ISL28x17 C Grade -1 0.1 1 µV/°C

Input Bias Current -1 0.08 1 nA

-1.5 1.5 nA

TCI

Input Bias Current Temperature

-5 1 5 pA/°C

Coefficient

Input Offset Current -1.5 0.08 1.5 nA

-1.85 1.85 nA

TCI

CMRR Common-Mode Rejection Ratio V

Input Offset Current Temperature Coefficient

ISL28417 SOIC, TSSOP B and C Grade -4.0 0.45 4.0 pA/°C

-3 0.42 3 pA/°C

Input Voltage Range Guaranteed by CMRR test -13 13 V

= -13V to +13V 120 145 dB

120 dB

PSRR Power Supply Rejection Ratio V

= ±2.25V to ±20V 120 145 dB

120 dB

VOL

Open-Loop Gain VO = -13V to +13V, RL=10kΩ to ground 130 143 dB

Output Voltage High RL = 10kΩ to ground 13.5 13.7 V

13.2 V

= 2kΩ to ground 13.3 13.55 V

13.1 V

Output Voltage Low RL = 10kΩ to ground -13.7 -13.5 V

-13.2 V

= 2kΩ to ground -13.55 -13.3 V

-13.1 V

Supply Current/Amplifier 0.44 0.53 mA

0.68 mA

SUPPLY

Short-Circuit 43 mA

Supply Voltage Range Guaranteed by PSRR ± 2.25 ± 20 V

AC SPECIFICATIONS

GBWP Gain Bandwidth Product AV = 1k, RL = 2kΩ 1.5 MHz

nVp-p

Voltage Noise V

P-P

0.1Hz to 10Hz 0.25 µV

Voltage Noise Density f = 10Hz 10 nV/√Hz Voltage Noise Density f = 100Hz 8.2 nV/√Hz Voltage Noise Density f = 1kHz 8 nV/√Hz Voltage Noise Density f = 10kHz 8 nV/√Hz

P-P

November 30, 2012

FN6632.10

Page 8

ISL28117, ISL28217, ISL28417

Electrical Specifications V

temperature range, -40°C to +125°C.

± 15V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating

(Continued)

MIN

PARAMETER DESCRIPTION CONDITIONS

(Note 8) TYP

(Note 8) UNIT

in Current Noise Density f = 1kHz 0.1 pA/√Hz

THD + N Total Harmonic Distortion 1kHz, G = 1, V

1kHz, G = 1, V

= 3.5V

, RL = 2kΩ 0.0009 %

RMS

, RL = 10kΩ 0.0005 %

RMS

TRANSIENT RESPONSE

SR Slew Rate, V

, tf,

Small Signal

Rise Time 10% to 90% of V

Fall Time 90% to 10% of V

Settling Time to 0.1% 10V Step; 10% to V

Settling Time to 0.01% 10V Step; 10% to V

Settling Time to 0.1% 4V Step; 10% to V

Settling Time to 0.01% 4V Step; 10% to V

Output Positive Overload Recovery Time AV = -100, VIN = 0.2

Output Negative Overload Recovery Time A

20% to 80% AV = 11, RL = 2kΩ, VO = 4V

OUT

AV = 1,

= 50mV

OUT

= 10k

OUT

AV = 1,

AV = -1,

Ω to V

OUT

= 50mV

= 10V

= 4V

P-P

= 4V

P-P

= -100, VIN = 0.2

P-P

, RL = 5k

P-P

, RL = 5k

P-P

, RL = 5k

RL = 2k

P-P,

RL = 2k

P-P,

P-P

, RL = 10k

Ω to V

Ω to V Ω to V

Ω to V

0.5 V/µs

130 ns

21 µs

24 µs

13 µs

18 µs

5.6 µs

10.6 µs

MAX

Electrical Specifications V

temperature range, -40°C to +125°C.

± 5V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating

PARAMETER DESCRIPTION CONDITIONS

Input Offset Voltage, SOIC, TSSOP

ISL28x17 B Grade -50 8 50 µV

Package

ISL28x17 C Grade -100 4 100 µV

ISL28417 B Grade -70 10 70 µV

ISL28417 C Grade -110 10 110 µV

= -40°C to +85°C -160 160 µV

= -40°C to +125°C -200 200 µV

Input Offset Voltage, MSOP Package ISL28117 B Grade -70 -10 70 µV

ISL28117 C Grade -150 4 150 µV

ISL28217 C Grade -150 10 150 µV

Input Offset Voltage, TDFN Package ISL28117 B Grade -75 -10 75 µV

ISL28217 B Grade -70 10 70 µV

ISL28x17 C Grade -150 10 150 µV

MIN

(Note 8)

TYP

MAX

(Note 8) UNIT

-110 110 µV

-190 190 µV

-120 120 µV

-150 150 µV

-250 250 µV

-160 160 µV

-140 140 µV

-250 250 µV

November 30, 2012

FN6632.10

Page 9

ISL28117, ISL28217, ISL28417

Electrical Specifications V

temperature range, -40°C to +125°C.

PARAMETER DESCRIPTION CONDITIONS

TCV

Input Offset Voltage Temperature Coefficient; SOIC, TSSOP Package

± 5V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating

(Continued)

MIN

(Note 8)

TYP

(Note 8) UNIT

ISL28x17 B Grade -0.6 0.14 0.6 µV/°C

ISL28x17 C Grade -0.9 0.14 0.9 µV/°C

MAX

ISL28417 B Grade -0.75 0.2 0.75 µV/°C

ISL28417 C Grade -0.9 0.3 0.9 µV/°C

Input Offset Voltage Temperature Coefficient; MSOP Package

ISL28117 B Grade -0.8 0.1 0.8 µV/°C

ISL28117 C Grade -1 0.14 1 µV/°C

ISL28217 C Grade -1 0.14 1 µV/°C

Input Offset Voltage Temperature Coefficient; TDFN Package

ISL28117 B Grade -0.9 0.1 0.9 µV/°C

ISL28217 B Grade -0.7 0.1 0.7 µV/°C

ISL28x17 C Grade -1 0.1 1 µV/°C

Input Bias Current -1 0.18 1 nA

-1.5 1.5 nA

TCI

Input Offset Current -1.5 0.3 1.5 nA

Input Bias Current Temperature Coefficient

-5 1 5 pA/°C

-1.85 1.85 nA

TCI

CMRR Common-Mode Rejection Ratio V

Input Offset Current Temperature Coefficient

ISL28417 SOIC, TSSOP B and C Grade -4.0 0.45 4.0 pA/°C

-3 0.42 3 pA/°C

Input Voltage Range -3 3 V

= -3V to +3V 120 145 dB

120 dB

PSRR Power Supply Rejection Ratio V

= ±2.25V to ±5V 120 145 dB

120 dB

VOL

Open-Loop Gain VO = -3.0V to +3.0V, RL = 10kΩ to ground 130 143 dB

Output Voltage High RL = 10kΩ to ground 3.5 3.7 V

3.2 V

= 2kΩ to ground 3.3 3.55 V

3.1 V

Output Voltage Low RL = 10kΩ to ground -3.7 -3.5 V

-3.2 V

= 2kΩ to ground -3.55 -3.3 V

-3.1 V

Supply Current/Amplifier 0.44 0.53 mA

0.68 mA

Short-Circuit 43 mA

AC SPECIFICATIONS

GBWP Gain Bandwidth Product AV = 1k, RL = 2kΩ 1.5 MHz

np-p

Voltage Noise 0.1Hz to 10Hz 0.25 µV

Voltage Noise Density f = 10Hz 12 nV/√Hz

Voltage Noise Density f = 100Hz 8.6 nV/√Hz

Voltage Noise Density f = 1kHz 8 nV/√Hz

P-P

November 30, 2012

FN6632.10

Page 10

ISL28117, ISL28217, ISL28417

VS = ±5V

100

120

140

-50 -30 -10 10 30 50 V

(µV)

NUMBER OF AMPLIFIERS

ISL28217FBBZ

VS = ±15V

100

120

140

-50 -30 -10 10 30 50 V

(µV)

NUMBER OF AMPLIFIERS

ISL28217FBBZ

Electrical Specifications V

temperature range, -40°C to +125°C.

PARAMETER DESCRIPTION CONDITIONS

Voltage Noise Density f = 10kHz 8 nV/√Hz

± 5V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply over the operating

(Continued)

MIN

(Note 8)

TYP

in Current Noise Density f = 1kHz 0.1 pA/√Hz

TRANSIENT RESPONSE

SR Slew Rate, V

, tf, Small Signal Rise Time

10% to 90% of V

Fall Time 90% to 10% of V

Settling Time to 0.1% 4V Step; 10% to V

Settling Time to 0.01% 4V Step; 10% to V

Output Positive Overload Recovery Time AV = -100, VIN = 0.2V

Output Negative Overload Recovery Time A

20% to 80% AV=11, RL = 2kΩ, VO=4V

OUT

AV = 1,

= 50mV

OUT

= 10k

OUT

Ω to V

AV = 1,

OUT

= 10k

Ω to V

AV = -1,

OUT

= 5k

Ω to V

AV = -1,

OUT

= 5k

Ω to V

RL = 2k

Ω to V

= -100, VIN = 0.2V

RL = 2k

Ω to V

= 50mV

= 4V

P-P

0.5 V/µs

130 ns

12 µs

19 µs

7µs

5.8 µs

NOTE:

8. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.

MAX

(Note 8) UNIT

Typical Performance Curves V

FIGURE 3. V

DISTRIBUTION FOR GRADE B

= ±15V, VCM = 0V, RL = Open, unless otherwise specified.

FIGURE 4. V

DISTRIBUTION FOR GRADE B

November 30, 2012

FN6632.10

Page 11

ISL28117, ISL28217, ISL28417

VS = ± 15V

100

150

200

250

300

-100 -60 -20 20 60 100 V

(µV)

NUMBER OF AMPLIFIERS

ISL28217FBZ

VS = ± 5V

100

150

200

250

300

-100 -60 -20 20 60 100 V

(µV)

NUMBER OF AMPLIFIERS

ISL28217FBZ

(µV)

TEMPERATURE (°C)

VS = ± 15V

-100

-50

100

-50 0 50 100 150

VS = ± 15V

-0.45 -0.30 -0.15 0 0.15 0.30 0.45

TC (µV/°C)

NUMBER OF AMPLIFIERS

(µV)

TEMPERATURE (°C)

VS = ± 5V

-100

-50

100

-50 0 50 100 150

VS = ±5V

-0.45 -0.30 -0.15 0 0.15 0.30 0.45

TC (µV/°C)

NUMBER OF AMPLIFIERS

Typical Performance Curves V

FIGURE 5. VOS DISTRIBUTION FOR GRADE C FIGURE 6. VOS DISTRIBUTION FOR GRADE C

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

FIGURE 7. V

FIGURE 9. V

RANGE vs TEMPERATURE FIGURE 8. TCVOS vs NUMBER OF AMPLIFIERS

RANGE vs TEMPERATURE FIGURE 10. TCVOS vs NUMBER OF AMPLIFIERS

November 30, 2012

FN6632.10

Page 12

ISL28117, ISL28217, ISL28417

VS = ± 15V

-500

-400

-300

-200

-100

100

200

300

400

500

-50 0 50 100 150

TEMPERATURE (°C)

B+

(pA)

VS = ±15V

-3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 MORE I

+TC (pA/°C)

NUMBER OF AMPLIFIERS

VS = ± 15V

-500

-400

-300

-200

-100

100

200

300

400

500

-50 0 50 100 150

TEMPERATURE (°C)

B-

(pA)

VS = ±15V

-3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 I

-TC (pA/°C)

NUMBER OF AMPLIFIERS

VS = ± 5V

-500

-400

-300

-200

-100

100

200

300

400

500

-50 0 50 100 150

TEMPERATURE (°C)

B+

(pA)

VS = ±5V

-3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5

+TC(pA/°C)

NUMBER OF AMPLIFIERS

Typical Performance Curves V

FIGURE 11. IB+ RANGE vs TEMPERATURE FIGURE 12. TCIB+ vs NUMBER OF AMPLIFIERS

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

FIGURE 13. I

FIGURE 15. I

- RANGE vs TEMPERATURE FIGURE 14. TCIB- vs NUMBER OF AMPLIFIERS

+ RANGE vs TEMPERATURE FIGURE 16. TCIB+ vs NUMBER OF AMPLIFIERS

November 30, 2012

FN6632.10

Page 13

ISL28117, ISL28217, ISL28417

VS = ± 5V

-500

-400

-300

-200

-100

100

200

300

400

500

-50 0 50 100 150

TEMPERATURE (°C)

B-

(pA)

VS = ±5V

-3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 I

-TC(pA/°C)

NUMBER OF AMPLIFIERS

VS = ± 15V

-500

-400

-300

-200

-100

100

200

300

400

500

-50 0 50 100 150

TEMPERATURE (°C)

(pA)

VS = ±15V

-3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5

TCI

(pA/°C)

NUMBER OF AMPLIFIERS

VS = ± 5V

-500

-400

-300

-200

-100

100

200

300

400

500

-50 0 50 100 150

TEMPERATURE (°C)

(pA)

VS = ±5V

100

-3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5

TCI

(pA/°C)

NUMBER OF AMPLIFIERS

Typical Performance Curves V

FIGURE 17. IB- RANGE vs TEMPERATURE FIGURE 18. TCIB- vs NUMBER OF AMPLIFIERS

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

FIGURE 19. I

FIGURE 21. I

RANGE vs TEMPERATURE FIGURE 20. IOSTC vs NUMBER OF AMPLIFIERS

RANGE vs TEMPERATURE FIGURE 22. IOSTC vs NUMBER OF AMPLIFIERS

November 30, 2012

FN6632.10

Page 14

ISL28117, ISL28217, ISL28417

±15V

0.3

0.4

0.5

0.6

0.7

-50 0 50 100 150 TEMPERATURE (°C)

Isupply (mA)

±2.25V

10000

15000

20000

-50 0 50 100 150 TEMPERATURE (°C)

(V/mV)

VO = ±13V

-155

-150

-145

-140

-50 0 50 100 150 TEMPERATURE (°C)

PSRR (dB)

VS = ±2.25V TO ±20V

-160

-155

-150

-145

-140

-135

-130

-50 0 50 100 150 TEMPERATURE (°C)

CMRR (dB)

VCM = ±13V

-50 0 50 100 150 TEMPERATURE (°C)

+ (mA)

ISC+ @ ±15V

-50 0 50 100 150 TEMPERATURE (°C)

- (mA)

ISC- @ ±15V

Typical Performance Curves V

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

FIGURE 23. SUPPLY CURRENT PER AMP vs TEMPERATURE FIGURE 24. AVOL vs TEMPERATURE

FIGURE 25. PSRR vs TEMPERATURE FIGURE 26. CMRR vs TEMPERATURE

FIG URE 27. POSITIVE SHORT CIRCUIT CURRENT vs T EMPERATURE FIGURE 28. NEGATIVE SHORT CIRCUIT CURRENT vs TEMPERATURE

November 30, 2012

FN6632.10

Page 15

ISL28117, ISL28217, ISL28417

-60

-40

-20

100

-15 -10 -5 0 5 10 15

VCM (V)

(µV)

VS = ±15V

+125°C

+25°C

-40°C

-60

-40

-20

100

-5 -3 -1 1 3 5 V

(V)

(µV)

VS = ±5V

+125°C

+25°C

-40°C

13.2

13.4

13.6

13.8

14.0

14.2

14.4

-50 0 50 100 150 TEMPERATURE (°C)

(V)

VS = ±15V R

= 10kΩ

-14.4

-14.2

-14.0

-13.8

-13.6

-13.4

-13.2

-50 0 50 100 150

TEMPERATURE (°C)

(V)

VS = ±15V R

= 10kΩ

13.2

13.4

13.6

13.8

14.0

14.2

14.4

-50 0 50 100 150

TEMPERATURE (°C)

(V)

VS = ±15V R

= 2kΩ

-14.4

-14.2

-14.0

-13.8

-13.6

-13.4

-13.2

-50 0 50 100 150

TEMPERATURE (°C)

(V)

VS = ±15V R

= 2kΩ

Typical Performance Curves V

FIGURE 29. INPUT VOS vs INPUT COMMON MODE VOLTAGE,

= ±15

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

FIGURE 30. INPUT V

vs INPUT CO MMON MODE VOLTAGE,

= ±5V

FIGURE 31. V

FIGURE 33. V

vs TEMPERATURE FIGURE 32. VOL vs TEMPERATURE,

vs TEMPERATURE FIGURE 34. VOL vs TEMPERATURE

November 30, 2012

FN6632.10

Page 16

ISL28117, ISL28217, ISL28417

TIME (s)

INPUT NOISE VOLTAGE (nV)

012345678910

-250

-200

-150

-100

-50

100

150

200

250

V+ = 36.4V

= 10, Rf = 100k

AV = 10,000

FREQUENCY (Hz)

100

1 10 100 1k 10k 100k

INPUT NOISE VOLTAGE (nV/√Hz)

VS = ±18.2V AV = 1

FREQUENCY (Hz)

1 10 100 1k 10k 100k

INPUT NOISE CURRENT (pA/√Hz)

0.1

VS = ±18.2V AV = 1

OPEN LOOP GAIN (dB)/PHASE (°)

FREQUENCY (Hz)

-100

-80

-60

-40

-20

100

120

140

160

180

200

0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M

RL = 10k

SIMULATION

= 10pF

GAIN

PHASE

OPEN LOOP GAIN (dB)/PHASE (°)

FREQUENCY (Hz)

-100

-80

-60

-40

-20

100

120

140

160

180

200

0.1m 1m 10m 100m 1 10 1 00 1k 10k 100k 1M 10M 100M

RL = 10k

SIMULATION

= 100pF

GAIN

PHASE

CMRR (dB)

FREQUENCY (Hz)

100

120

140

160

180

200

220

1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M

RL = INF

SIMULATION

= 10pF

VS = ±2.5V

VS = ±5V

VS = ±15V

Typical Performance Curves V

FIGURE 35. INPUT NOISE VOLTAGE 0.1Hz to 10Hz FIGURE 36. INPUT NOISE VOLTAGE SPECTRAL DENSITY

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

FIGURE 37. INPUT NOISE CURRENT SPECTRAL DENSITY FIGURE 38. OPEN-LOOP GAIN, PHASE vs FREQUENCY, R

FIGURE 39. OPEN-LOOP GAIN, PHASE vs FREQUENCY, R

= 100pF

= 10kΩ,

= 10pF

FIGURE 40. CMRR vs FREQUENCY, V

=10kΩ,

= ±2.25, ±5V, ±15V

November 30, 2012

FN6632.10

Page 17

ISL28117, ISL28217, ISL28417

PSRR (dB)

100 1k 10k 100k 1M

10M

FREQUENCY (Hz)

100

120

-10

110

RL = INF

AV = +1

= 1V

P-P

CL = 4pF

PSRR+ AND PSRR- VS = ±15V

PSRR+ AND PSRR- VS = ±2.25V

FREQUENCY (Hz)

GAIN (dB)

100k 1M 10M

10k

-10

100

AV = 1

AV = 100

AV = 1000

VS = ±20V

OUT

= 50mV

P-P

CL = 4pF

= 10k

Rg = 10k, Rf = 100k

AV = 1 0

Rg = 1k, Rf = 100k

Rg = OPEN, Rf = 0

Rg = 100, Rf = 100k

NORMALIZED GAIN (dB)

-10

-8

-6

-4

-2

-16

-14

-12

FREQUENCY (Hz)

100k 1M 10M

10k

100

Rf = Rg = 100k

Rf = Rg = 100

Rf = Rg = 10k

Rf = Rg = 1k

VS = ±20V R

= 10k

AV = +2

OUT

= 50mV

P-P

CL = 4pF

FREQUENCY (Hz)

100k 1M 10M

10k

100

GAIN (dB)

-8

-7

-6

-5

-4

-3

-2

-1

VS = ±20V

AV = +1

OUT

= 50mV

P-P

CL = 4pF

RL = 499

RL = 100

RL = 4.99k

RL = 10k

RL = 1k

FREQUENCY (Hz)

100k 1M 10M

10k

100

GAIN (dB)

-8

-6

-4

-2

VS = ±2.5V R

= 10k

AV = +1 V

OUT

= 50mV

P-P

CL = 0.01µF

CL = 270pF

CL = 47pF

CL = 1000pF

CL = 470pF

CL = 4pF

CL = 100pF

FREQUENCY (Hz)

100k 1M 10M

10k

100

GAIN (dB)

-8

-7

-6

-5

-4

-3

-2

-1

CL = 4pF R

= 10k

AV = +1

OUT

= 50mV

P-P

VS = ±5V

VS = ±20V

VS = ±2.25V

VS = ±15V

Typical Performance Curves V

FIGURE 41. PSRR vs FREQUENCY, VS = ±5V, ±15V FIGURE 42. FREQUENCY RESPONSE vs CLOSED LOOP GAIN

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

FIGURE 43. FREQUENCY RESPONSE vs FEEDBACK RESISTANCE

f/Rg

FIGURE 45. GAIN vs FREQUENCY vs C

FIGURE 44. GAIN vs FREQUENCY vs R

FIGURE 46. GAIN vs FREQUENCY vs SUPPLY VOLTAGE

November 30, 2012

FN6632.10

Page 18

ISL28117, ISL28217, ISL28417

100

120

140

160

180

10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

CROSSTALK (dB)

VS = ±15V

-DRIVER CH. = OPEN

AV = +1

SOURCE

= 1V

P-P

CL = 4pF

-RECEIVING CH. = 10k

TIME (µs)

LARGE SIGNAL (V)

-2.4

-2.0

-1.6

-1.2

-0.8

-0.4

0.4

0.8

1.2

1.6

2.0

2.4

0 102030405060708090100

AV = + 1

CL = 4pF

OUT

= 4V

P-P

VS = ±5V, RL = 2k, 10k

VS = ±15V, RL = 2k, 10k

TIME (µs)

SMALL SIGNAL (mV)

-10

0 5 10 15 20 25 30 35 40

RL = 10k

AV = +1

CL = 4pF

OUT

= 50mV

P-P

VS = ±15V

TIME (µs)

OUTPUT (V)

INPUT (V)

-0.28

-0.24

-0.20

-0.16

-0.12

-0.08

-0.04

0.04

0 102030405060708090100

-2

INPUT

OUTPUT @ VS = ±15V

RL = 2k

AV = -100

= 4pF

= 100k, Rg = 1k

= 200mV

P-P

OUTPUT @ VS= ±5V

TIME (µs)

OUTPUT (V)

INPUT (V)

0 102030405060708090100

-0.08

-0.04

0.04

0.08

0.12

0.16

0.20

0.24

-12

-10

-8

-6

-4

-2

INPUT

OUTPUT @ VS = ±15V

RL = 2k

AV = - 100

= 4pF

= 100k, Rg = 1k

= 200mV

P-P

OUTPUT @ VS = ±5V

CAPACITANCE (pF)

OVERSHOOT (%)

VS = ±15V R

= 10k

AV = 1 V

OUT

= 50mV

P-P

1 10 100 1k 10k 100k

Typical Performance Curves V

FIGURE 47. CROSSTALK, VS= ± 15V FIGURE 48. LARGE SIGNAL TRANSIENT RESPONSE vs RL VS = ±5V,

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

±15V

FIGURE 49. SMALL SIGNAL TRANSIENT RESPONSE, V

FIGURE 51. NEGATIVE OUTPUT OVERLOAD RESPONSE TIME,

= ±5V, ±15V

= ±5V, ±15V FIGURE 50. POSITIVE OUTPUT OVERLOAD RESPONSE TIME,

FIGURE 52. % OVERSHOOT vs LOAD CAPACITANCE, V

= ±5V, ±15V

= ±15V

November 30, 2012

FN6632.10

Page 19

ISL28117, ISL28217, ISL28417

100

10k

100k

10M

100M

1 10 100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

0.1

INPUT RESISTANCE (kΩ)

0.01

FIGURE 54. INPUT ESD DIODE CURRENT LIMITING- UNITY GAIN

OUT

V+

V-

500Ω

Typical Performance Curves V

FIGURE 53. COMMON MODE INPUT IMPEDANCE

= ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)

Applications Information

Functional Description

The ISL28117, ISL28217 and ISL28417 are single, dual and quad, low noise precision op amps. Both devices are fabricated in a new precision 40V complementary bipolar DI process. A super-beta NPN input stage with input bias current cancellation provides low input bias current (180pA typical), low input offset voltage (13µV typical), low input noise voltage (8nV/√Hz), and low 1/f noise corner frequency (~8Hz). These amplifiers also feature high open loop gain (18kV/mV) for excellent CMRR (145dB) and THD+N performance (0.0005% @ 3.5V into 2kΩ). A complimentary bipolar output stage enables high capacitive load drive without external compensation.

Operating Voltage Range

The devices are designed to operate over the 4.5V (±2.25V) to 40V (±20V) range and are fully characterized at 10V (±5V) and 30V (±15V). The Power Supply Rejection Ratio typically exceeds 140dB over the full operating voltage range and 120dB minimum over the -40°C to +125°C temperature range. The worst case common mode input voltage range over temperature is 2V to each rail. With ±15V supplies, CMRR performance is typically >130dB over-temperature. The minimum CMRR performance over the -40°C to +125°C temperature range is >120dB for power supply voltages from ±5V (10V) to ±15V (30V).

RMS

, 1kHz

also produces very low input offset current TC, which reduces DC input offset errors in precision, high impedance amplifiers.

The +25°C maximum input offset voltage (V

) for the “B” grade is

50µV and 100µV for the “C” grade. Input offset voltage temperature coefficients (VOSTC) are a maximum of ±0.6µV/°C for the “B” and ±0.9µV/°C for the “C” grade. Figures 3 through 6 show the typical gaussian-like distribution over the ±5V to ±15V supply range and over the full temperature range. The V

temperature behavior is smooth

(Figures 7 through 10) maintaining constant TC across the entire temperature range.

Input ESD Diode Protection

The input terminals (IN+ and IN-) have internal ESD protection diodes to the positive and negative supply rails, series connected 500Ω current limiting resistors and an anti-parallel diode pair across the inputs (Figure 54).

Input Performance

The super-beta NPN input pair provides excellent frequency

response while maintaining high input precision. High NPN beta (>1000) reduces input bias current while maintaining good frequency response, low input bias current and low noise. Input bias cancellation circuits provide additional bias current reduction to <1nA, and excellent temperature stabilization. Figures 11 through 18 show the high degree of bias current stability at ±5V and ±15V supplies that is maintained across the

-40°C to +125°C temperature range. The low bias current TC

The series resistors limit the high feed-through currents that can occur in pulse applications when the input dV/dT exceeds the

0.5V/µs slew rate of the amplifier. Without the series resistors, the input can forward-bias the anti-parallel diodes causing current to flow to the output resulting in severe distortion and possible diode failure. Figure 48 provides an example of distortion free large signal response using a 4V

input pulse with an input rise time of <1ns.

P-P

The series resistors enable the input differential voltage to be equal to the maximum power supply voltage (40V) without damage.

November 30, 2012

FN6632.10

Page 20

ISL28117, ISL28217, ISL28417

FIGURE 55. PREVENTING OSCILLATIONS IN UNUSED CHANNELS

JMAXTMAXθJA

xPD

MAXTOTAL

(EQ. 1)

MAXVSIqMAXVS

( - V

OUTMAX

)

OUTMAX

------------------------

×+×=

(EQ. 2)

In applications where one or both amplifier input terminals are at risk of exposure to high voltages beyond the power supply rails, current limiting resistors may be needed at the input terminal to limit the current through the power supply ESD diodes to 20mA max.

Output Current Limiting

The output current is internally limited to approximately ±45mA at +25°C and can withstand a short circuit to either rail as long as the power dissipation limits are not exceeded. This applies to only 1 amplifier at a time for the dual op amp. Continuous operation under these conditions may degrade long term reliability. Figures 27 and 28 show the current limit variation with temperature.

Output Phase Reversal

Output phase reversal is a change of polarity in the amplifier transfer function when the input voltage exceeds the supply voltage. The ISL28117, ISL28217 and ISL28417 are immune to output phase reversal, even when the input voltage is 1V beyond the supplies.

Unused Channels

The ISL28217 is a dual op-amp. If the application only requires one channel, the user must configure the unused channel to prevent it from oscillating. The unused channel oscillates if the input and output pins are floating. This results in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the inverting input and ground the positive input, as shown in Figure 55.

Power Dissipation

It is possible to exceed the +150°C maximum junction temperatures under certain load and power supply conditions. It is therefore important to calculate the maximum junction temperature (T

) for all applications to determine if power

JMAX

supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related using Equation 1:

where:

•P

DMAXTOTAL

each amplifier in the package (PD

•PD

MAX

is the sum of the maximum power dissipation of

)

MAX

for each amplifier can be calculated using Equation 2:

where:

•T

= Maximum ambient temperature

MAX

• θ

= Thermal resistance of the package

•PD

= Maximum power dissipation of 1 amplifier

MAX

•VS = Total supply voltage

•I

•V

= Maximum quiescent supply current of 1 amplifier

qMAX

OUTMAX

= Maximum output voltage swing of the application

ISL28117, ISL28217 and ISL28417 SPICE Model

Figure 56 shows the SPICE model schematic and Figure 57 shows the net list for the ISL28117, ISL28217 and ISL28417 SPICE model for a Grade “B” part. The model is a simplified version of the actual device and simulates important AC and DC parameters. AC parameters incorporated into the model are: 1/f and flatband noise, Slew Rate, parameters are VOS, IOS, total supply current and output voltage swing. The model uses typical parameters given in the “Electrical Specifications” Table beginning on page 6. The AVOL is adjusted for 155dB with the dominate pole at 0.02Hz. The CMRR is set (210dB, f

= 10Hz). The input stage models the actual device to

present an accurate AC representation. The model is configured for ambient temperature of +25°C.

Figures 58 through 68 show the characterization vs simulation results for the Noise Voltage, Closed Loop Gain vs Frequency, Closed Loop Gain vs RL, Large Signal Step Response, Open Loop Gain Phase and Simulated CMRR vs Frequency.

CMRR, Gain and Phase. The DC

November 30, 2012

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ISL28117, ISL28217, ISL28417

License Statement

The information in this SPICE model is protected under the United States copyright laws. Intersil Corporation hereby grants users of this macro-model hereto referred to as “Licensee”, a nonexclusive, nontransferable licence to use this model as long as the Licensee abides by the terms of this agreement. Before using this macro-model, the Licensee should read this license. If the Licensee does not accept these terms, permission to use the model is not granted.

The Licensee may not sell, loan, rent, or license the macromodel, in whole, in part, or in modified form, to anyone outside the Licensee’s company. The Licensee may modify the macromodel to suit his/her specific applications, and the Licensee may make copies of this macro-model for use within their company only.

This macro-model is provided “AS IS, WHERE IS, AND WITH NO WARRANTY OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUY NOT LIMITED TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.”

In no event will Intersil be liable for special, collateral, incidental, or consequential damages in connection with or arising out of the use of this macro-model. Intersil reserves the right to make changes to the product and the macro-model without prior notice.

November 30, 2012

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ISL28117, ISL28217, ISL28417

FIGURE 56. SPICE SCHEMATIC

VIN-

OUT

V+

V-

D12

R17

290

IOS

0.3nA

5E11

0.1V

In+

Vin-

VCM

SUPERB

CASCODE

4.45k

IEE1 96E-6

Mirror

IEE

200E-6

V++

VIN+

V++

Vmid

V--

VCM

VOS

13E-6

D3 DX

1.86V

V++

D4 DX

D5 DX

1.86V

1.99e10

400pF

2.1E3

R10

2.1E3

400pF

1.99e10

Vmid

R11

R12

15.9159E

VCM

EOS

ISY

0.44mA

V++

V-

V+

R15

R16

V--

VCM

D10 DY

D11 DY

D9 DX

V++

V--

1.12V

G10

VOUT

Voltage Noise Input Stage

Gain Stage

Mid Supply Ref

2nd Gain Stage

Common Mode Gain Stage

Supply Isolation Stage

Output Stage

1.2pF

2pF

November 30, 2012

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ISL28117, ISL28217, ISL28417

FIGURE 57. SPICE NET LIST

*ISL28117 Macromodel - covers following *products *ISL28117 *ISL28217 *ISL28417 **Revision History: *Revision C, LaFontaine January 31, 2012 *Model for Noise, quiescent supply currents, *CMRR 210dB, fcm=10Hz, AVOL 155dB *f=0.02Hz, SR = 0.5V/us, output voltage

*clamp and short ckt current limit. * *Copyright 2012 by Intersil Corporation Refer *to data sheet "LICENSE ST ATEMENT", Use *of this model indicates your acceptance with *the terms and provisions in the License *Statement.

*Intended use: *This Pspice Macromodel is intended to give *typical DC and AC performance *characteristics under a wide range of *external circuit configurations using *compatible simulation pla tforms - such as *iSim PE. ** *Device performance features supported by *this model *Typical, room temp., nominal power supply *voltages used to produce the following *characteristics: *Open and closed loop I/O impedances *Open loop gain and phase *Closed loop bandwidth and frequency *response *Loading effects on closed loop frequency *response *Input noise terms including 1/f effects *Slew rate *Input and Output Headroom limits to I/O *voltage swing *Supply current at nominal specified supply *voltages ** *Device performance features NOT *supported by this model: *Harmonic distortion effects *Disable operation (if any) *Thermal effects and/or over temperature *parameter variation *Limited performance variation vs. supply *voltage is modeled *Part to part performance variation due to *normal process parameter spread *Any performance difference arising from *different packaging * source : *+input * | -input * | | +Vsupply * | | | -Vsupply * | | | | output * | | | | |

.subckt ISL28117 Vin+ Vin- V+ V- VOUT * source ISL28107subckt * *Voltage Noise E_En IN+ VIN+ 25 0 1

R_R17 25 0 290 D_D12 24 25 DN V_V7 24 0 0.1 * *Input Stage I_IOS IN+ VIN- DC 0.08E-9 C_C6 IN+ VIN- 1.2E-12 R_R1 VCM VIN- 5e11 R_R2 IN+ VCM 5e11 Q_Q1 2 VIN- 1 SuperB Q_Q2 3 8 1 SuperB Q_Q3 V-- 1 7 Mirror Q_Q4 4 6 2 Cascode Q_Q5 5 6 3 Cascode R_R3 4 V++ 4.45e3 R_R4 5 V++ 4.45e3 C_C4 VIN- 0 2e-12 C_C5 8 0 2e-12 D_D1 6 7 DX I_IEE 1 V-- DC 200e-6 I_IEE1 V++ 6 DC 96e-6 V_VOS 9 IN+ 8e-6 E_EOS 8 9 VC VMID 1 * *1st Gain Stage G_G1 V++ 11 4 5 8.129384e-2 G_G2 V-- 11 4 5 8.129384e-2 R_R5 11 V++ 1 R_R6 V-- 11 1 D_D2 10 V++ DX D_D3 V-- 12 DX V_V1 10 11 1.86 V_V2 11 12 1.86 * *2nd Gain Stage G_G3 V++ VG 11 VMID 2.83e-3 G_G4 V-- VG 11 VMID 2.83e-3 R_R7 VG V++ 1.99e10 R_R8 V-- VG 1.99e10 C_C2 VG V++ 4e-10 C_C3 V-- VG 4e-10 D_D4 13 V++ DX D_D5 V-- 14 DX V_V3 13 VG 1.86 V_V4 VG 14 1.86 * *Mid supply Ref R_R9 VMID V++ 2.1E3 R_R10 V-- VMID 2.1E3 I_ISY V+ V- DC 0.44E-3 E_E2 V++ 0 V+ 0 1 E_E3 V-- 0 V- 0 1 * *Common Mode Gain Stage with Zero G_G5 V++ VC VCM VMID 3.162277 G_G6 V-- VC VCM VMID 3.162277 R_R11 VC 17 1 R_R12 18 VC 1 L_L1 17 V++ 15.9159E-3 L_L2 18 V-- 15.9159E-3

* *Output Stage with Correction Current Sources G_G7 VOUT V++ V++ VG 1.11e-2 G_G8 V-- VOUT VG V-- 1.11e-2 G_G9 22 V-- VOUT VG 1.11e-2 G_G10 23 V-- VG VOUT 1.11e-2 D_D6 VG 20 DX D_D7 21 VG DX D_D8 V++ 22 DX D_D9 V++ 23 DX D_D10 V-- 22 DY D_D11 V-- 23 DY V_V5 20 VOUT 1.12 V_V6 VOUT 21 1.12 R_R15 VOUT V++ 9E1 R_R16 V-- VOUT 9E1 * .model SuperB npn + is=184E-15 bf=30e3 va=15 ik=70E-3 rb=50 + re=0.065 rc=35 cje=1.5E-12 cjc=2E-12 + kf=0 af=0 .model Cascode npn + is=502E-18 bf=150 va=300 ik=17E-3 +rb=140 re=0.011 rc=900 cje=0.2E-12 +cjc=0.16E-12f kf=0 af=0 .model Mirror pnp + is=4E-15 bf=150 va=50 ik=138E-3 rb=185 + re=0.101 rc=180 cje=1.34E-12 +cjc=0.44E-12 kf=0 af=0 .model DN D(KF=6.69e-9 AF=1) .MODEL DX D(IS=1E-12 Rs=0.1) .MODEL DY D(IS=1E-15 BV=50 Rs=1)

.ends ISL28117

November 30, 2012

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ISL28117, ISL28217, ISL28417

FREQUENCY (Hz)

100

1 10 100 1k 10k 100k

INPUT NOISE VOLTAGE (nV/√Hz)

VS = ±18.2V AV = 1

1.0 10 100 1.0k 10k 100k

1.0

100

FREQUENCY (Hz)

INPUT NOISE VOLTAGE (nV/√Hz)

FREQUENCY (Hz)

GAIN (dB)

100k 1M 10M

10k

-10

100

AV = 1

AV = 100

AV = 1000

VS = ±20V

OUT

= 50mV

P-P

CL = 4pF R

= 10k

Rg = 10k, Rf = 100k

AV = 1 0

Rg = 1k, Rf = 100k

Rg = OPEN, Rf = 0

Rg = 100, Rf = 100k

10 100 1.0k 10k 100k 1.0M 10M

-10

FREQUENCY (Hz)

GAIN (dB)

AV = 1

AV = 100

AV = 1000

Rg = 10k, Rf = 100k

AV = 1 0

Rg = 100, Rf = 100k

VS = ±15V

OUT

= 50mV

P-P

CL = 4pF R

= 10k

Rg = OPEN, Rf = 0

Rg = 1k, Rf = 100k

FREQUENCY (Hz)

100k 1M 10M

10k

100

GAIN (dB)

-8

-7

-6

-5

-4

-3

-2

-1

VS = ±20V

AV = +1

OUT

= 50mV

P-P

CL = 4pF

RL = 499

RL = 100

RL = 4.99k

RL = 10k

RL = 1k

10 100 1.0k 10k 100k 1.0M 10M

-8

-6

-4

-2

FREQUENCY (Hz)

GAIN (dB)

VS = ±15V

AV = +1

OUT

= 50mV

P-P

CL = 4pF

RL = 499

RL = 10k

RL = 1k

RL =100

RL = 4.99k

Characterization vs Simulation Results

FIGURE 58. CHARACTERIZED INPUT NOISE VOLTAGE

FIGURE 59. SIMULATED INPUT NOISE VOLTAGE

FIGURE 60. CHARACTERIZED CLOSED LOOP GAIN vs FREQUENCY FIGURE 61. SIMULATED CLOSED LOOP GAIN vs FREQUENCY

FIGURE 62. CHARACTERIZED CLOSED LOOP GAIN vs R

FIGURE 63. SIMULATED CLOSED LOOP GAIN vs R

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ISL28117, ISL28217, ISL28417

TIME (µs)

LARGE SIGNAL (V)

-2.4

-2.0

-1.6

-1.2

-0.8

-0.4

0.4

0.8

1.2

1.6

2.0

2.4

0 102030405060708090100

AV = +1

CL = 4pF

OUT

= 4V

P-P

VS = ±15V, RL =10k

0 20406080100

-3

-2

-1

TIME (µs)

LARGE SIGNAL (V)

AV = +1

= 4pF

OUT

= 4V

P-P

INPUT

OUTPUT

OPEN LOOP GAIN (dB)/PHASE (°)

FREQUENCY (Hz)

-100

-80

-60

-40

-20

100

120

140

160

180

200

0.1m 1m 10m 100m 1 10 100 1k 10k 100k 1M 10M 100M

RL = 10k

SIMULATION

= 10pF

GAIN

PHASE

1.0m 10m

0.1

1 10 100 1k 10k 100k 1M 10M 100M

-40

120

160

200

OPEN LOOP GAIN (dB)/PHASE (°)

FREQUENCY (Hz)

GAIN

PHASE

CMRR (dB)

FREQUENCY (Hz)

1m 10m 0.1 1 10 100 1k 10k 100k 1M 10M 100M

100

150

200

250

Characterization vs Simulation Results (Continued)

FIGURE 64. CHARACTERIZED LARGE SIGNAL TRANSIENT

RESPONSE vs R

L VS

= ±15V

FIGURE 65. SIMULATED LARGE SIGNAL 10V STEP RESPONSE

FIGURE 66. SIMULATED OPEN-LOOP GAIN, PHASE vs FREQUENCY FIGURE 67. SIMULATED OPEN-LOOP GAIN, PHASE vs FREQUENCY

FIGURE 68. SIMULATED CMRR vs FREQUENCY

November 30, 2012

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ISL28117, ISL28217, ISL28417

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev.

DATE REVISION CHANGE

September 11, 2012 FN6632.10 Feature on Page 1: Added No phase reversal.

Removed from ordering information QFN parts ISL28417FRZ (not release part) on Page 2 . Removed all instances of QFN through document (front page, table of contents, thermal information, pin description and POD. Added to the typical performance curves table figure 53 on page 19: Common mode input impedance.

February 23, 2012 FN6632.9 “Ordering Information” on page 2:

Removed “Coming soon” from ISL28417FVZ and changed Part Marking column from "28417 FVZ" to 28417 FVZ-C". Changed "-40 to +125" to "200 C-grade” Added new Part Number ISL28417 FVBZ Electrical Spec changes: VOS Description Section: page 6 & page 8: Changed “Input Offset Voltage; SOIC Package” to Input Offset Voltage; SOIC, TSSOP Package”

TCVOS Description section: page 7 & page 9: Changed;Input Offset Voltage Temperature Coefficient; SOIC Package to Input Offset Voltage Temperature Coefficient; SOIC, TSSOP Package

TCIOS Conditions section: page 7 & page 9: Changed "ISL28417 SOIC B and C Grade” to "ISL28417 SOIC, TSSOP B and C Grade”.

February 10, 2012 “Ordering Information” on page 2:

Updated Pkg. Dwg. # for ISL28117FUBZ, ISL28117FUZ, ISL28217FUBZ & ISL28217FUZ from M8.118 to M8.118B Up dated Pkg. Dw g. # for ISL28 117FRT BZ, ISL 28117F RTZ , ISL28217FR TBZ & IS L28 217 FRT Z fr om L8. 3x3 A to L8.3x3K Updated Pkg. Dwg. # for ISL28417FRZ from L16.4x4 to L16.4x4E

“Thermal Information” on page 6: Added Θ

Figure 52, “% OVERSHOOT vs LOAD CAPACITANCE, VS = ±15V” on page 18: X-Axis (Capacitance pF) values 1k and 10k were shifted 1 decade to the right. Shifted 1 decade to the left and added new label "100k" at the extreme right (where the "10k" value was located).

Added dual and quad to the “SPICE NET LIST” on page 23.

“Package Outline Drawing (M8.118B)” on page 31: Changed from M8.118 to M8.118B Top Vi ew : Package width & height changed from 3.0±0.05 to 3.0±0.1 Package height from lead to lead changed from 4.9±0.15 to 4.9±0.2

Side View 2: Lead thickness changed from 0.09-0.20 to 0.15±0.05mm

Side View 1: Package height changed from 0.85±0.10 to 0.86±0.05 Changed lead width from 0.25-0.036 to 0.23-0.36

Detail X: Foot of lead length changed from 0.55±0.15 to 0.53±0.10

“Package Outline Drawing (L8.3x3K)” on page 32: Changed from L8.3x3A to L8.3x3K Bottom View: Changed lead height from 0.3±0.1 to 0.4±0.05 Changed lead width from 0.30±0.05 to 0.25±0.05

and ΘJC for 16 Ld QFN and 14 Ld TSSOP

Land Pattern: Changed lead width from 0.30 to 0.25

November 30, 2012

FN6632.10

Page 27

ISL28117, ISL28217, ISL28417

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. (Continued)

DATE REVISION CHANGE

October 11, 2011 FN6632.8 Figure 27 added “Positive” to Short Circuit Current title

October 7, 2011 1. Pg 2 Ordering Information:

July 12, 2011 FN6632.7 1. Releasing ISL28217FUZ MSOP Grade C package. Remove 'Coming Soon' from Order Information Table

December 2, 2010 FN6632.6 1. Updated “Ordering Information” table on page 2. Removed Coming Soon for ISL28117FRTBZ and

Figure 28 added “Negative” to Short Circuit Current title Figure 36 y axis label units changed from (nV/√Hz) to (nV/√Hz) Figure 37 y axis label units changed from pA/√hz to pA/√Hz Figure 31, 33 changed from VOUT vs Temperature to VOH vs Temperature Figure 32, 34 changed from VOUT vs Temperature to VOL vs Temperature Table of Contents on page 5 updated to list all package outline drawings Changed POD M14.15 to MDP0027 Changed TCIos for ISL28417 SOIC grade B and C on pages 7 and 9 from ±3.5pA/C to ±4.0pA/C

a.Added ordering information rows for ISL28417FBBZ (B grade) and ISL28417FBZ (C grade).

b. Add Table of Contents

2. Pg 5 Abs Max and Thermal Information Tables: a. Added HBM, MM, and CDM ESD levels for the ‘417 b. Added θ

3. Pg 6 ±15V electrical Specs a. Added ISL28417 B & C grade VOS and limits b. Added ISL28417 B & C grade TCVOS and limits c. Added ISL28417 B & C grade TCIOS and limits

4. Pg 7 a. Converted AVOL limits and units from 3kV/mV Min and 14kV/mV typ to 130dB and 143dB respectively

5. Pg 8 ±5V electrical Specs a. Added ISL28417 B & C grade VOS and limits

6. Pg 9 a. Added ISL28417 B & C grade TCVOS and limits b. Added ISL28417 B & C grade TCIOS and limits c. Converted AVOL limits and units from 3kV/mV Min and 14kV/mV Typ to 130dB and 143dB respectively

7. Pg 17 Applications Information a. Added Unused Channels paragraph and Figure 54.

2. Page 5, added: Machine Model (ISL28217 MSOP only). . . . . 300V

3. Under Electrical Spec ±15V and ±5V tables, changed Typical Rise Time and Fall Time from: Rise Time 100ns, Fall Time 120ns, to: Rise Time 130ns, Fall Time 130ns.

4. Under Electrical Spec ±15V and ±5V table for Vos and TCVos, added in row for ISL28217 MSOP Grade C package. Added Vos and TCVos limits for 25C and Full Temp.

5. For Typical performance curves for Vos Histograms, added note that histogram is based on ISL28217FBBZ for Grade B figures and ISL28217FBZ for Grade C figures. (Figures 3-6, added part number label to graph below Vs)

6. Under Electrical Spec ±15V and ±5V tables, changed TYP for Open Loop Gain from 18,000V/mV to 14,000V/mV

ISL28117FUBZ parts. Added in the Vos (MAX) numbers in those rows (75 and 70 respectively).

2. Corrected part marking in “Ordering Information” table on page 2 fo r ISL28117FR TZ from 8117 -C to -C 8117

3. Corrected part marking in “Ordering Information” table on page 2 for ISL28217FRTZ from 8217 -C to -C 8217

4. Updated Tape & Reel note in “Ordering Information” table on page 2 from “Add "-T7", "-T7A" or "-T13" suffix for tape and reel." to new standard "Add "-T*" suffix for tape and reel." The "*" covers all possible tape and reel options

5. Updated “Electrical Specifications” Table for “V a. Added data row for Offset Voltage; MSOP Grade B Package; ISL28117 b. Added data row for Offset Voltage; TDFN Grade B Package; ISL28117 c. Added data row for Input Offset Voltage Temperature Coefficient; MSOP Grade B Package; ISL28117 d. Added data row for Input Offset Voltage Temperature Coefficient; TDFN Grade B Package; ISL28117

6. Removed "Temperature data established by characterization" from common conditions of spec table. Removed note "Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested." from Min Max columns of spec table. Replaced with new standard note in Min Max columns, “Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.”

and θJC values for the 14 Ld SOIC

” on page 6 and “TCVOS” on page 7

November 30, 2012

FN6632.10

Page 28

ISL28117, ISL28217, ISL28417

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. (Continued)

DATE REVISION CHANGE

August 31, 2010 FN6632.5 1. General changes:

March 18, 2010 FN6632.4 1. Updated “Ordering Information” on page 2 by adding two rows for MSOP packages ISL28117FUBZ and

March 3, 2010 Added “Related Literature” on page 1.

January 21, 2010 Part marking in “Ordering Information” on page 2 changed as follows:

December 24, 2009 On page 10: Changed label in Figure 3 from “V

November 25, 2009 Changed Typical VOS spec from “13” to “8” (B Grade), “19” to “4” (C Grade), IB from “0.18” to “0.08, IOS from

November 12, 2009 FN6632.3 Updated Typical Performance Curves Figure 5, 7, 9, 11, 13, 15, 17 and 19. Added Spice Model and license

a. Added in Quad devices to the datasheet for SOIC, TSSOP and QFN packages. b. Added in TDFN packages for single and dual devices. c. Added in new VOS and TCVOS limits for TDFN packages d. Added Tja and Tjc Notes for TDFN Package which are “direct attach (Tja) ” and “bottom (Tjc)”

2. Specific changes: a. Added in ISL28417 to title and front page info on page 1 b. Added in ISL28117FRTZ, ISL28117FRTBZ, ISL28217FRTZ, ISL28217FRTBZ, ISL28417FBZ, ISL28417FVZ, and ISL28417FRZ packages to Ordering information on page 2 and page 2. Added in -T7 and -T7A tape and reel extensions where applicable. c. Added in TDFN, 14 Ld SOIC, 14 Ld TSSOP and 16 Ld QFN to pin configurations on page 3 and page 3. d. Updated Pin Descriptions tables with new added in packages on page 4. e. Abs Max Table added in thermal packaging info for TDFN packages on page 6. f. Electrical Specifications Table - Added two new line items for VOS spec. TDFN package ISL28217 Grade B limits ±70uV 25C and ±140uV full temp. TDFN package ISL28x17 Grade C limits ±150uV 25C and ±250uV full temp on page 6 and page 8. g. Electrical Specifications Table - Added two new line items for TCVOS spec. TDFN package ISL28217 Grade B limits ±0.7uV/C full temp. TDFN package ISL28x17 Grade C limits ±1uV/C on page 7 and page 9. h. Added in PODs for L8.3x3A, M14.15, M14.173, and L16.4x4

ISL28117FUZ, which are scheduled to release Q2 2010. Added Pinout accordingly.

2. Added POD for MSOP M8.118 to the end of datasheet

3. In “Ordering Information” on page 2, Separated each part number with it's own specific -T7 and -T13 suffix and removed “Add “-T7” or “-T13” suffix for Tape and Reel.” from Note 1.

4. Updated ±15 and ±5V Electrical Specification table with the following edits: A) Separated VOS specs for SOIC and MSOP Grade C packages. Added new VOS specs for MSOP Grade C package. B) Separated TCVOS specs for SOIC and MSOP Grade C packages. Added new TCVOS specs for MSOP Grade C package.

5. Added “Thermal Information” on page 6 for ISL28117 MSOP package.

Added Evaluation Boards to “Ordering Information” on page 2. Added Theta JC values to “Thermal Information” on page 6. Added applicable Theta JC Note 7. Updated Theta JA for ISL28217 8 Ld SOIC from 115°C/W to 105°C/W.

ISL28117FBBZ changed from "28117 FBZ -B" to "28117 FBZ" ISL28117FBZ changed from "28117 FBZ" to "28117 FBZ -C" ISL28217FBBZ changed from "28217 FBZ -B" to "28217 FBZ" ISL28217FBZ changed from "28217 FBZ" to "28217 FBZ -C"

= +5V” to “VS = ±5V”

On page 10: Changed label in Figure 4 from “V

“0.3” to “0.08”. Edited Spice Schematic - L1 from “95.4957” to “15.9159E”, R1 from “6k” to 1, R9 from “1” to “2.1E3”, R10 from “1” to “2.1E3, R12 from “6k” to “1”, L2 from “95.4957” to “15.9159E”. Edited Spice Net List

- Changed Revision from “A” to “B”, Date change from “October 29th 2009” to “November 20th 2009”, added after AOL “SR = 0.5V/µsec, Input Stage changed in I_IOS from “0.3E-9” to 0.08E-9”, V_VOS “13e-6” to “8e-6”, Mid supply Ref R_R9 and R_R10 changed “1” to “2.1E3”, Common Mode Gain Stage with Zero change in G_G5 and G_G6 “5.27046e-15” to “3.162277”, R_R11 and R_R12 “6.3” to “1”, L_L1 and L_L2 “95.4957” to “15.9159E-3”

statement. Replaced typical application schematic.

= +15V” to “VS = ±15V”

November 30, 2012

FN6632.10

Page 29

ISL28117, ISL28217, ISL28417

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. (Continued)

DATE REVISION CHANGE

October 16, 2009 FN6632.2 On page 2 “Ordering Information”, changed the following:

October 8, 2009 FN6632.1 1. Removed “very” from “...low noise..” 1st sentence, page 1.

September 3, 2009 FN6632.0 Initial Release

a) corrected part marking for ISL28117FBBZ from "28117 -B FBZ" to "28117 FBZ -B". Corrected part marking fo r I SL2 8217FB BZ f rom "2 8217 -B FBZ " to "2 8217 FBZ -B " B) Updated package outline drawing to most recent revision (no changes were made to package dimensions; land pattern was added and dimensions were moved from table onto drawing) c) Added "Add “-T7” or “-T13” suffix for tape and reel." to the tape and reel Note 1. d) added Note 3 callout to all parts (Note 3 reads: “For Moisture Sensitivity Level (MSL), please see device information page for ISL28117, ISL28217. For more information on MSL please see techbrief TB363.") e) removed "Coming Soon" from ISL28117FBBZ, ISL28117FBZ & ISL28217FBBZ devices

2. Removed “Low” from 6th bullet under features, page 1.

3. Modified typical characteristics curves to show conservative performance. Specific channel designations removed. On temperature curves, changed formatting to indicate range from typical value. Changes include:

a. Removed former Figures 1, 3, 5, 7, 9, 10, 13, 14, 17, 18, 21, 22, 25, 26, 29, 30, 33, 34, 37 & 38 (all

Channel A curves)

b. Replaced former Figures 19, 20, 23, 24, 27, 28, 31, 32, 35, 36, 39 & 40 with new Figures 9 thru 20 (all

“conservative channels”)

c. Added Figures 30, 31, 32

4. Updated TCVos histogram on page 1 to match TCVos histogram Figure 6 on page 7 (same graphic)

5. Added temp labels to Figures 28 & 29

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For a complete listing of Applications, Related Documentation and Related Parts, please see the respective product information page. Also, please check the product information page to ensure that you have the most updated datasheet: ISL28117, ISL28217, ISL28417

To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff

Reliability reports are available from our website at: http://rel.intersil.com/reports/search.php

November 30, 2012

FN6632.10

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ISL28117, ISL28217, ISL28417

Unless otherwise specified, tolerance : Decimal ± 0.05

The pin #1 identifier may be either a mold or mark feature.

Interlead flash or protrusions shall not exceed 0.25mm per side.

Dimension does not include interlead flash or protrusions.

Dimensions in ( ) for Reference Only.

Dimensioning and tolerancing conform to AMSE Y14.5m-1994.

Dimensions are in millimeters.1.

NOTES:

DETAIL "A"

SIDE VIEW “A

TYPICAL RECOMMENDED LAND PATTERN

TOP VIEW

0.25 AMC B

0.10 C

ID MARK

PIN NO.1

(0.35) x 45°

SEATING PLANE

GAUGE PLANE

0.25

(5.40)

(1.50)

4.90 ± 0.10

3.90 ± 0.10

1.27

0.43 ± 0.076

0.63 ±0.23

4° ± 4°

DETAIL "A"

0.22 ± 0.03

0.175 ± 0.075

1.45 ± 0.1

1.75 MAX

(1.27)

(0.60)

6.0 ± 0.20

Reference to JEDEC MS-012.

SIDE VIEW “B”

Package Outline Drawing (M8.15E)

M8.15E

8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 0, 08/09

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ISL28117, ISL28217, ISL28417

DETAIL "X"

SIDE VIEW 2

TYPICAL RECOMMENDED LAND PATTERN

TOP VIEW

PIN# 1 ID

0.23 - 0.36mm

DETAIL "X"

0.10 ± 0.05mm

(4.40) (3.00)

(5.80)

1.10 MAX

3°±3°

GAUGE PLANE

0.25

0.95 REF

0.53 ± 0.10mm

3.0±0.10mm

0.86±0.05mm

SEATING PLANE

0.65mm BSC

3.0±0.10mm

(0.40)

(1.40)

(0.65)

0.15±0.05mm

SIDE VIEW 1

0.08 C A-B

0.10 C

Dimensioning and tolerancing conform to JEDEC MO-187-AA

Plastic interlead protrusions of 0.15mm max per side are not

Dimensions in ( ) are for reference only.

Dimensions are measured at Datum Plane "H".

Plastic or metal protrusions of 0.15mm max per side are not

Dimensions are in millimeters.

NOTES:

2. and AMSEY14.5m-1994.

included.

4.9±0.20mm

Package Outline Drawing (M8.1 18B)

M8.118B

8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE

Rev 1, 3/12

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ISL28117, ISL28217, ISL28417

BOTTOM VIEW

DETAIL "X"

SIDE VIEW

TYPICAL RECOMMENDED LAND PATTERN

TOP VIEW

C 0 . 203 REF

0 . 05 MAX.

0 . 02 NOM.

3.00

(4X) 0.15

PIN 1

INDEX AREA

PIN #1

6X 0.65

1.50 ±0.10

0.40 ± 0.05

0.75 ±0.05

SEE DETAIL "X"

0.08

0.10CC

( 2.90 )

(1.50)

( 8 X 0.25)

( 8X 0.50)

( 1.95)

2.30 ±0.10

0.10

8X 0.25 ±0.05

AMC B

2X 1.95

(6x 0.65)

INDEX AREA

PIN 1

located within the zone indicated. The pin #1 identifier may be

Unless otherwise specified, tolerance : Decimal ± 0.05

Tiebar shown (if present) is a non-functional feature.

The configuration of the pin #1 identifier is optional, but must be

between 0.15mm and 0.20mm from the terminal tip.

Dimension applies to the metallized terminal and is measured

Dimensions in ( ) for Reference Only.

Dimensioning and tolerancing conform to AMSE Y14.5m-1994.

either a mold or mark feature.

Dimensions are in millimeters.1.

NOTES:

Compliant to JEDEC MO-229 WEEC-2 except for the foot length.

( 2.30)

Package Outline Drawing (L8.3x3K)

L8.3x3K

8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE

Rev 1, 9/11

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ISL28117, ISL28217, ISL28417

GAUGE PLANE

DETAIL X

4° ±4°

SEATING PLANE

0.010 BM CA

0.004 C

0.010 BM CA

(N/2)

(N/2)+1

PIN #1 I.D. MARK

h X 45°

SEE DETAIL “X”

0.010

Small Outline Package Family (SO)

MDP0027

SMALL OUTLINE PACKAGE FAMILY (SO)

INCHES

SO16

SYMBOL

(0.150”)

A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -

b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -

c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3 E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -

E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3

e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -

L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -

h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference N 8 14 16 16 20 24 28 Reference -

NOTES:

1. Plastic or metal protrusions of 0.006” maximum per side are not included.

2. Plastic interlead protrusions of 0.010” maximum per side are not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994

SO16 (0.300”)

(SOL-16)

SO20

(SOL-20)

SO24 (SOL-

24)

SO28 (SOL-

28)

TOLERANCE NOTESSO-8 SO-14

Rev. M 2/07

November 30, 2012

FN6632.10

Page 34

ISL28117, ISL28217, ISL28417

DETAIL "X"

SIDE VIEW

TYPICAL RECOMMENDED LAND PATTERN

TOP VIEW

PLANE

SEATING

0.10 C

0.10 C B A

PIN #1

I.D. MARK

5.00 ±0.10

4.40 ±0.10

0.25 +0.05/-0.06

6.40

0.20 C B A

0.05

0°-8°

GAUGE PLANE

SEE

0.90 +0.15/-0.10

0.60 ±0.15

0.09-0.20

1.00 REF

0.65

1.20 MAX

0.25

0.05 MIN

0.15 MAX

(1.45)

(5.65)

(0.65 TYP) (0.35 TYP)

DETAIL "X"

1. Dimension does not include mold flash, protrusions or gate burrs.

Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.

2. Dimension does not include interlead flash or protrusion. Interlead

flash or protrusion shall not exceed 0.25 per side.

3. Dimensions are measured at datum plane H.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.

5. Dimension does not include dambar protrusion. Allowable protrusion

shall be 0.80mm total in excess of dimension at maximum material

condition. Minimum space between protrusion and adjacent lead is 0.07mm.

6. Dimension in ( ) are for reference only.

7. Conforms to JEDEC MO-153, variation AB-1.

NOTES:

END VIEW

Package Outline Drawing (M14.173)

M14.173

14 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) Rev 3, 10/09

November 30, 2012

FN6632.10

Page 35

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