intersil ISL23710 DATA SHEET

®

www.BDTIC.com/Intersil

ISL23710

Volatile Digitally Controlled Potentiometer (XDCP™)

Data Sheet August 22, 2005

Terminal Voltage ±3V or ±5V, 128 Taps
Up/Down Interface

The Intersil ISL23710 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, and a control section. The wiper position is
controlled by a Up/Down interface.

The potentiometer is implemented by a resistor array
composed of 127 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS

, U/D, and INC inputs.
The wiper register is volatile and is reset to midscale on
power up. The wiper position can be locked while powered
up to prevent inadvertent changes.

The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including:

• Industrial and Automotive Control

• Parameter and Bias Adjustments

• Amplifier Bias and Control

Ordering Information

TEMP

PAR T N UMBER

(BRAND)

ISL23710WIU10Z
(AOG) (Notes 1, 2)

ISL23710UIU10Z
(AOF) (Notes 1, 2)

NOTES:

1. Add “-T” suffix for tape and reel.

2. Intersil Pb-free plus anneal products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

RESISTANCE

OPTION (Ω)

10K -40 to +85 10 Ld MSOP

50K -40 to +85 10 Ld MSOP

RANGE

(°C) PACKAGE

PKG.

DWG. #

M10.118

(Pb-Free)

M10.118

(Pb-Free)

FN6126.0

Features

• Up/Down Interface with Chip Select Enable

• DCP Terminal Voltage from ±2.7V to ±5V

• 127 Resistive Elements

- Typical R

tempco ±50ppm/°C

TOTAL

- Ratiometric tempco ±4ppm/°C

- End to end resistance range ±20%

- Wiper resistance = 70Ω typ at V

CC

= 3.3V

• Low Power CMOS

- V- = -2.7V to -5.5V
= 2.7V to 5.5V

-V

CC

- Active current, 1mA max

- Standby current, 500nA max

•R

Values = 10kΩ, 50kΩ

TOTAL

• Volatile Wiper Storage with Wiper Locking

• Packages

-10 Ld MSOP

• Pb-Free Plus Anneal Available (RoHS Compliant)

Pinout

ISL23710

(10 LD MSOP)

TOP VIEW

U/D

GND

CS
NC

1

V-

2
3

4
5

INC

10

VCC

9

R

8

L

7

R

W

R

6

H

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

XDCP is a trademark of Intersil, Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

Block Diagram

www.BDTIC.com/Intersil

ISL23710

UP/DOWN

(U/D

INCREMENT

(INC

DEVICE SELECT

(CS

V

V-

)

INTERFACE

)

)

AND

CONTROL

GND

SIMPLE BLOCK DIAGRAM

CC

U/D

INC

CS

R

H

R

W

R

L

7-BIT
UP/DOWN
COUNTER

RECALL

CONTROL

CIRCUITRY

DECODER

DETAILED BLOCK DIAGRAM

Pin Descriptions

PIN NUMBER SYMBOL DESCRIPTION

1U/D

2 V- Negative supply voltage for the potentiometer wiper control.

3 GND Ground. Should be connected to a digital ground.

4CS

5 NC No Connect. Pin is to be left unconnected.

6R

7R

8R

H

W

L

9 VCC Positive logic supply voltage.

10 INC

Controls the direction of wiper movement and whether the counter is incremented or decremented.

Chip Select. The device is selected when the CS input is LOW.

A fixed terminal for one end of the potentiometer resistor.

The wiper terminal which is equivalent to the movable terminal of a potentiometer.

A fixed terminal for one end of the potentiometer resistor.

Increment input; negative edge triggered.

ONE

OF

128

127

126

125

124

R

H

TRANSFER

GATES

2

1

0

RESISTOR

ARRAY

R

L

R

W

2

FN6126.0

August 22, 2005

ISL23710

www.BDTIC.com/Intersil

Absolute Maximum Ratings Thermal Information

Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Voltage on CS

with Respect to GND . . . . . . . . . . . . . . . . . . . . -0.3V to VCC+0.3V

Voltage on V- (Referenced to GND) . . . . . . . . . . . . . . . . . . . . . . -6V

∆V = |V

Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . . 300°C

(10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA

I

W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V

V

CC

, RL, RW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V

R

H

ESD Rating (MIL-STD-883, Method 3015.7) . . . . . . . . . . . . . . .>2kV

CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

NOTE:

1. θ

JA

Analog Specifications Over recommended operating conditions unless otherwise stated.

SYMBOL PARAMETER TEST CONDITIONS MIN

R

TOTALRH

V

RH,VRLRH, Rl

R

C

H/CL/CW

I

LkgDCP

VOLTAGE DIVIDER MODE (0V @ RL; V+ @ RH; measured at RW, unloaded)

INL

(Note 6)

DNL

(Note 5)

ZSerror

(Note 3)

FSerror

(Note 4)

TC

(Note 7,13)

RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected)

RINL

(Note 11)

RDNL

(Note 10)

Roffset

(Note 9)

TC

(Notes 12,13)

, INC, U/D and V

(RH)-V(RL)

is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

W

V

R

| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V

to RL Resistance W option 10 kΩ

R

to RL Resistance Tolerance -20 +20 %

H

Terminal Voltage V- V

Wiper Resistance V- = -5.5V; VCC = +5.5V,

Potentiometer Capacitance (Note 13) 10/10/

Leakage on DCP Pins Voltage at pin from V- to V

Integral Non-linearity -1 1 LSB

Differential Non-linearity W, U options -0.5 0.5 LSB

Zero-Scale Error W option 0 1 4 LSB

Full-Scale Error W option -4 -1 0 LSB

Ratiometric Temperature Coefficient DCP register set to i = 16 to 120d,

Integral Non-linearity DCP register set between 16 and 127d Monotonic

Differential Non-linearity -0.5 0.5 MI

Offset DCP register set to 0d, W option 0 2 5 MI

Resistance Temperature Coefficient DCP register set to i = 16 to 127d,

CC

CC

U option 50 kΩ

wiper current = (V

U option 0 0.5 2

U option -2 -0.5 0

T = -40°C to 85°C

over all tap positions

DCP register set to 0d, U option 0 0.5 2 MI

T = -40°C to +85°C

Thermal Resistance (Typical, Note 1) θ

MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170

Recommended Operating Conditions

Temperature Range (Industrial). . . . . . . . . . . . . . . . . -40°C to +85°C

V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V

CC

V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.7V to -5.5V

TYP

(Note 1) MAX UNIT

70 200 Ω

- V-)/R

CC

TOTAL

CC

25

-1 0.1 1 µA

±4 ppm/°C

-1 1 MI

±50 ppm/°C

CC

(°C/W)

JA

V

pF

(Note 2)

(Note 2)

(Note 2)

(Note 2)

(Note 8)

(Note 8)

(Note 8)

(Note 8)

3

FN6126.0

August 22, 2005