intersil ISL21032 DATA SHEET

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ISL21032

ADVANCED

Data Sheet February 13, 2006

INFORMATION

Precision 0.600V Low Voltage FGA™
References

The ISL21032 FGA™ voltage references are very high
precision analog voltage references specifically designed to
meet the rigorous performance requirements of high current,
low voltage VRM and POL modules.

Fabricated in Intersil's proprietary Floating Gate Analog
technology, these references and feature guaranteed
performance over the -40°C to 130°C operating temperature
range.

Additional features include guaranteed absolute accuracy as
low as ±0.5% over the operating temperature range of -40°C
to +130°C. Long-term stability is 10ppm/√1,000Hrs

.

The absolute accuracy and thermal performance of the
ISL21032 family are ideal fit for the next generation of high
current, low voltage VRM and POL modules.

Ordering Information

FN6239.0

Features

• Reference Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6V

• Initial Accuracy Options @ 25°C

. . . . . . . . . . . . . . . . . . . . . . . . ±1.0mV, ±2.5mV, & ±5.0mV

• Absolute Accuracy Options Over Operating Temp Range
. . ±0.5% (±3.0mV), ±0.75% (±4.5mV), & ±1.0% (±6.0mV)

• Supply Voltage Range . . . . . . . . . . . . . . . . . . 2.7V to 5.5V

• Low Quiescent Current . . . . . . . . . . . . . . . . . . . .12µA typ

• Long Term Stability. . . . . . . . . . . . . . . . 10ppm/√1,000Hrs

• Thermal Hysteresis . . . . . . . . . . . 100ppm @

• Source & Sink Current . . . . . . . . . . . . . . . . . . . . . . . . 7mA

• ESD Protection. . . . . . . . . . . . . 5kV (Human Body Model)

• Standard 3 Ld SOT-23 Packaging

• Extended Temperature Range . . . . . . . . . .-40°C to 130°C

• Pb-Free Plus Anneal Available (RoHS Compliant)

∆TA = 170°C

.

V

OUT

OPTION

PAR T N UMBE R

ISL21032BPH306Z
(Note)

ISL21032BPH306Z-TK
(Note)

ISL21032CPH306Z
(Note)

ISL21032CPH306Z-TK
(Note)

ISL21032DPH306Z
(Note)

ISL21032DPH306Z-TK
(Note)

NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

(V) GRADE

0.6 ±0.5%

∆TA =
170°C

0.6 ±0.5%

∆TA =
170°C

0.6 ±0.75%

@ ∆T

170°C

0.6 ±0.75%

@ ∆T

170°C

0.6 ±1.0%

∆TA =
170°C

0.6 ±1.0%

∆TA =
170°C

TEMP.

RANGE

(°C) PACKAGE

-40 to 130 3 Ld SOT-23

@

-40 to 130 3 Ld SOT-23

@

-40 to 130 3 Ld SOT-23

=

A

-40 to 130 3 Ld SOT-23

=

A

-40 to 130 3 Ld SOT-23

@

-40 to 130 3 Ld SOT-23

@

(Pb-free)

(Pb-free)
T&R

(Pb-free)

(Pb-free)
T&R

(Pb-free)

(Pb-free)
T&R

Applications

• Low Voltage, High Current VRM & POL Modules

• Accurate Reference for Low Voltage DC/DC Converters

Pinout

ISL21032

(3 LD SOT-23)

TOP VIEW

1

V

IN

3

GND

V

2

OUT

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or1-888-468-3774

FGA is a trademark of Intersil Corporation. Copyright Intersil Americas Inc. 2006. All Rights Reserved

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ISL21032

Absolute Maximum Ratings Thermal Information

Storage Temperature Range . . . . . . . . . . . . . . . . . -65°C to + 150°C

Max Voltage V
Max Voltage V
ISL21032, V
Voltage on “DNC” Pins. . . No Connections Permitted to These Pins.

to Gnd. . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.5V

IN

to Gnd*:

OUT

= 0.6V. . . . . . . . . . . . . . . . . . . . . . . -0.5V to +1.6V

OUT

ESD Ratings

MIL-STD 883, Method 3015. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5kV

ESD Rating (Machine Model) . . . . . . . . . . . . . . . . . . . . . . . . . .500V

CAUTION: Absolute Maximum Ratings are limits which may result in impaired reliability and/or permanent damage to the device. These are stress ratings provided for
information only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not
implied.

For guaranteed specifications and test conditions, see Electrical Characteristics.

The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.

Thermal Resistance θ

JA

(°C/W)

3 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 400

Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C

Lead Temperature, Soldering* . . . . . . . . . . . . . . . . . . . . . . . . +225°C

*Note: Maximum Duration = 10s

Electrical Specifications (VOUT = 0.600V) Operating Conditions: V

unless otherwise specified.

= 3.0V, I

IN

OUT

= 0mA, C

= 0.001µF, TA = -40 to +130°C,

OUT

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OUT

VOA V

Output Voltage 0.600 V

Accuracy @ TA = 25°C ISL21032B06 -1.0 +1.0 mV

OUT

ISL21032C06 -2.5 +2.5 mV

ISL21032D06 -5.0 +5.0 mV

VOA V

Accuracy Over Op Temp

OUT

Range (-40° < T

< 130°C)

A

ISL21032B06 -3.0 +3.0 mV

ISL21032C06 -4.5 +4.5 mV

ISL21032D06 -6.0 +6.0 mV

VIN Input Voltage Range 2.7 5.5 V

IIN Supply Current 12 25 µA

∆V

∆V

OUT

OUT

/∆V

/∆I

Line Regulation +2.7V ≤ VIN ≤ +5.5V 50 200 µV/V

IN

Load Regulation Sourcing: 0mA ≤ ISOURCE ≤ 7mA 20 70 µV/mA

OUT

Sinking: -7mA ≤ ISINK ≤ 0mA 20 70 µV/mA

∆V

/∆t Long Term Stability (Note 3) TA = 25°C 10 ppm/

OUT

∆V

/∆TA Thermal Hysteresis (Note 1) ∆TA = 170°C 100 ppm

OUT

ISC Short Circuit Current (Note 2) T

= 25°C, V

A

tied to Gnd 50 80 mA

OUT

√1kHrs

VN Output Voltage Noise 0.1Hz ≤ f ≤ 10Hz 30 µVp-p

NOTES:

1. Thermal Hysteresis is the change in V
V

is read initially at TA = 25°C for the device under test. The device is temperature cycled and a second V

OUT

25°C. The difference between the initial V

measured @ TA = 25°C after temperature cycling over a specified range, ∆TA.

OUT

reading and the second VOUT reading is then expressed in ppm. For ∆TA = 170°C, the device

OUT

measurement is taken at

OUT

under is cycled from +25°C to +130°C to -40°C to +25°C.

2. Guaranteed by device characterization and/or correlation to other device tests.

3. FGA™ voltage reference long term drift is a logarithmic characteristic. Changes that occur after the first few hundred hours of operation are
significantly smaller with time, asymptotically approaching zero beyond 2000 hours. Because of this decreasing characteristic, long-term drift is
specified in ppm/

√1kHr.

2

ISL21032

Typical Performance Curves, ISL21032 Low Voltage Output Reference

VIN = 3.0V, I

= 0mA, TA = 25°C Unless Otherwise Specified

OUT

20
18
16

UNIT 3

14
12

(µA)

10

IN

I

0.6010

0.6005

0.6000

(V)

OUT

V

0.5995

0.5990

0.5985

UNIT 2

8

UNIT 1

6
4
2

2.5 3.0 3.5 4.0 4.5 5.0 5.5

FIGURE 1. I

-40 -15 10 35 60 85 110 135

IN

vs V

FIGURE 3. V

V

(V)

IN

(3 REPRESENTATIVE UNITS) FIGURE 2. IIN vs VIN - 3 TEMPS

IN

UNIT 2

TEMPERATURE (°C)

vs TEMP

OUT

UNIT 3

UNIT 1

14

13

12

11

+85°C

10

(µA)

IN

I

9

8

7

6

2.5 3.0 3.5 4.0 4.5 5.0 5.5

= 3V)

IN

(V)

OUT

V

(NORMAILIZED TO 0.6V AT V

-40°C

0.60008

0.60006

0.60004

0.60002

0.60000

0.59998

0.59996

0.59994

0.59992

2.5 3 3.5 4 4.5 5 5.5

+25°C

(V)

V

IN

UNIT 3

UNIT 2

UNIT 1

V

(V)

IN

FIGURE 4. LINE REGULATION

125
100

= 3.0V)

75

IN

50
25

0

-25

-50

-75

(µV) (NORMALIZED TO V

O

-100

∆ V

-125

2.5 3 3.5 4 4.5 5 5.5
V

-40°C

IN

85°C

25°C

100mV/DIV

DV

= -0.3V

IN

1ms/DIV

FIGURE 5. LINE REGULATION - 3 TEMPS FIGURE 6. LINE TRANSIENT RESPONSE, C

3

DV

= +0.3V

IN

= 0nF

L

ISL21032

Typical Performance Curves, ISL21032 Low Voltage Output Reference

VIN = 3.0V, I

= 0mA, TA = 25°C Unless Otherwise Specified (Continued)

OUT

0

100mV/DIV

CL = 500pF

DV

IN

= -0.3V

1ms/DIV

DV

= +0.3V

IN

-10

-20

-30

-40

-50

-60

PSRR (dB)

-70

-80

-90

-100
1 10 100 1k 10k 100k 1M 10M

10nF LOAD

1nF LOAD

100nF LOAD

FREQUENCY (Hz)

FIGURE 7. LINE TRANSIENT RESPONSE, CL = 1nF FIGURE 8. PSRR vs f vs C

0.60

0.50

0.40

0.30

0.20

0.10

(mV)

0.00

OUT

-0.10

∆ V

-0.20

-0.30

-0.40

-0.50

-0.60

-7-6-5-4-3-2-101234567
SINKING OUTPUT CURRENT SOURCING

FIGURE 9. LOAD REGULATION vs TEMP

-40°C

130°C

25°C

200mV/DIV

IL = -50µA

20µs/DIV

FIGURE 10. LOAD TRANSIENT RESPONSE @ I

C

=1nF

L

NO LOAD

L

IL = +50µA

L

= 50µA,

100mV/DIV

DVIN = -7mA

DV

IN

1ms/DIV

FIGURE 11. LOAD TRANSIENT RESPONSE @ I

C

=1nF

L

4

= +7mA

=7mA,

L

3.2

3.0

2.8

2.6

2.4

2.2

2.0

(V)

1.8

OUT

1.6

1.4

& V

1.2

IN

V

1.0

0.8

0.6

0.4

0.2

0.0

0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50

FIGURE 12. TURN-ON TIME @ T

V

IN

V

OUT

TIME (ms)

, IIN=10µA

= 25°C

A

ISL21032

Typical Performance Curves, ISL21032 Low Voltage Output Reference

VIN = 3.0V, I

= 0mA, TA = 25°C Unless Otherwise Specified (Continued)

OUT

120

100

80

(Ω)

60

OUT

Z

40

20

0

1 10 100 1K 10K 100K 1M

FREQUENCY (Hz)

FIGURE 13. Z

1nF LOAD

10nF LOAD

100nF LOAD

vs f vs C

OUT

NO LOAD

L

FGA Technology

The ISL21032 series of voltage references use the floating
gate technology to create references with very low drift and
supply current. Essentially the charge stored on a floating
gate cell is set precisely in manufacturing. The reference
voltage output itself is a buffered version of the floating gate
voltage. The resulting reference device has excellent
characteristics which are unique in the industry: very low
temperature drift, high initial accuracy, and almost zero
supply current. Also, the reference voltage itself is not limited
by voltage bandgaps or zener settings, so a wide range of
reference voltages can be programmed (standard voltage
settings are provided, but customer-specific voltages are
available).

The process used for these reference devices is a floating
gate CMOS process, and the amplifier circuitry uses CMOS
transistors for amplifier and output transistor circuitry. While
providing excellent accuracy, there are limitations in output
noise level and load regulation due to the MOS device
characteristics. These limitations are addressed with circuit
techniques discussed in other sections.

Board Mounting Considerations

For applications requiring the highest accuracy, board
mounting location should be reviewed. Placing the device in
areas subject to slight twisting can cause degradation of the
accuracy of the reference voltage due to die stresses. It is
normally best to place the device near the edge of a board,
or the shortest side, as the axis of bending is most limited at
that location. Obviously mounting the device on flexprint or
extremely thin PC material will likewise cause loss of
reference accuracy.

5µV/DIV

10s/DIV

FIGURE 14. V

OUT

NOISE

Noise Performance and Reduction

The output noise voltage in a 0.1Hz to 10Hz bandwidth is
typically 30µV

. The noise measurement is made with a

P-P

bandpass filter made of a 1 pole high-pass filter with a corner
frequency at 0.1Hz and a 2-pole low-pass filter with a corner
frequency at 12.6Hz to create a filter with a 9.9Hz
bandwidth. Wideband noise is reduced by adding capacitor
to the output, but the value should be limited to 1nF or less
to insure stability.

Temperature Drift

The limits stated for output accuracy over temperature are
governed by the method of measurement. For the -40°C to
130°C temperature range, measurements are made at 25°C
and the two extremes. This measurement method combined
with the fact that FGA references have a fairly linear
temperature drift characteristic insures that the limits stated
will not be exceeded over the temperature range.

VIN = 5V

R = 200Ω

2N2905

V

IN

ISL21032

GND

V

OUT

0.6V/50mA

0.001µF

FIGURE 15. PRECISION LOW NOISE, LOW DRIFT, 0.6V, 50mA

REFERENCE

5

Packaging Information

0.046 (1.18) BSC

0.055 (1.40)

0.047 (1.20)

4X

0.35 HA-BD

3-Lead, SOT23, Package Code H3

0.093 (2.35) BSC

0.007 (0.20)

B

0.0003 (0.08)

C

L

B

0.35 CA-BD
2X N/2 TIPS

0.034 (0.88)

0.047 (1.02)

0.0004 (0.01)

0.0040 (0.10)

0.035 (0.89)

0.044 (1.12)

1

0.075 (1.90) BSC

0.120 (3.04)

0.110 (2.80)

0.038 (0.95)
BSC

2

Parting Line

Seating Plane

0.10 R MIN.

0.20 in

0–8°C

12° REF.
TYP.

0.10 R MIN.

SEATING PLANE

.024 (0.60)
.016 (0.40)

0.575 REF.

NOTES:

1. All dimensions in inches (in parentheses in millimeters).

2. Package dimensions exclude molding flash.

3. Die and die paddle is facing down towards seating plane.

4. This part is compliant with JEDEC Specification TO-236AB.

5. Dimensioning and tolerances per ASME, Y14.5M-1994.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

6