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ISL21009
Data Sheet September 12, 2007
High Voltage Input Precision, Low Noise
FGA™ Voltage References
The ISL21009 FGA™ voltage references are extremely low
power, high precision, and low noise voltage references
fabricated on Intersil’s proprietary Floating Gate Analog
technology. The ISL21009 features very low noise (4.5µV
P-P
for 0.1Hz to 10Hz), low operating current (180µA, Max), and
3ppm/°C of temperature drift. In addition, the ISL21009
family features guaranteed initial accuracy as low as
±0.5mV.
This combination of high initial accuracy, low power and low
output noise performance of the ISL21009 enables versatile
high performance control and data acquisition applications
with low power consumption.
Available Options
V
OUT
OPTION
PART NUMBER
ISL21009BFB812Z 1.250 ±0.5 3
ISL21009CFB812Z 1.250 ±1.0 5
ISL21009DFB812Z 1.250 ±2.0 10
ISL21009BFB825Z 2.500 ±0.5 3
ISL21009CFB825Z 2.500 ±1.0 5
ISL21009DFB825Z 2.500 ±2.0 10
ISL21009BFB841Z 4.096 ±0.5 3
ISL21009CFB841Z 4.096 ±1.0 5
ISL21009DFB841Z 4.096 ±2.0 10
ISL21009BFB850Z 5.000 ±0.5 3
ISL21009CFB850Z 5.000 ±1.0 5
ISL21009DFB850Z 5.000 ±2.0 10
(V)
ACCURACY
INITIAL
(mV)
TEMPCO.
(ppm/°C)
FN6327.6
Features
• Output Voltages . . . . . . . .1.250V, 2.500V, 4.096V, 5.000V
• Initial Accuracy. . . . . . . . . . . . . .±0.5mV, ±1.0mV, ±2.0mV
• Input Voltage Range. . . . . . . . . . . . . . . . . . .3.5V to 16.5V
• Output Voltage Noise. . . . . . . . .4.5µV
(0.1Hz to 10Hz)
P-P
• Supply Current. . . . . . . . . . . . . . . . . . . . . . . .180µA (Max)
• Temperature Coefficient. . .3ppm/°C, 5ppm/°C, 10ppm/°C
• Output Current Capability. . . . . . . . . . . . . . .Up to ±7.0mA
• Operating Temperature Range. . . . . . . . .-40°C to +125°C
• Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Ld SOIC
• Pb-free available (RoHS compliant)
Applications
• High Resolution A/Ds and D/As
• Digital Meters
• Bar Code Scanners
• Basestations
• Battery Management/Monitoring
• Industrial/Instrumentation Equipment
Pinout
ISL21009
(8 LD SOIC)
TOP VIEW
GND or NC
VIN
DNC
GND
1
2
3
4
8
DNC
7
DNC
6
VOUT
5
TRIM or NC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
FGA is a trademark of Intersil Corporation. Copyright Intersil Americas Inc. 2007. All Rights Reserved
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Pin Descriptions
PIN NUMBER PIN NAME DESCRIPTION
1 GND or NC Can be either Ground or No Connect
2 VIN Power Supply Input Connection
4 GND Ground Connection
5 TRIM Allows user trim typically ±2.5%. Leave Unconnected when unused.
6 VOUT Voltage Reference Output Connection
3, 7, 8 DNC Do Not Connect; Internal Connection – Must Be Left Floating
Ordering Information
ISL21009
PART NUMBER
(Notes 1, 2)
ISL21009BFB812Z 21009BF Z12 1.250 ±0.5mV, 3ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009CFB812Z 21009CF Z12 1.250 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009DFB812Z 21009DF Z12 1.250 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009BFB825Z 21009BF Z25 2.500 ±0.5mV, 3ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009CFB825Z 21009CF Z25 2.500 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009DFB825Z 21009DF Z25 2.500 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009BFB841Z 21009BF Z41 4.096 ±0.5mV, 3ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009CFB841Z 21009CF Z41 4.096 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009DFB841Z 21009DF Z41 4.096 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009BFB850Z 21009BF Z50 5.000 ±0.5mV, 3ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009CFB850Z 21009CF Z50 5.000 ±1.0mV, 5ppm/°C -40 to +125 8 Ld SOIC M8.15
ISL21009DFB850Z 21009DF Z50 5.000 ±2.0mV, 10ppm/°C -40 to +125 8 Ld SOIC M8.15
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte
tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
2. Add “-TK” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
PART
MARKING
V
OPTION
OUT
(V) GRADE
TEMP.
RANGE (°C)
PACKAGE
(Pb-Free) PKG. DWG. #
2
FN6327.6
September 12, 2007
ISL21009
SPI BUS
1
+5V
C1
10µF
X79000
1
SCK
2
A0
3
A1
4
A2
5
SI
6
SO
7
RDY
8
UP
9
DOWN
10
OE
VOUT
VBUF
CS
CLR
VCC
VH
VL
VREF
VSS
VFB
20
19
18
17
16
15
14
13
12
11
LOW NOISE DAC OUTPUT
GND
2
VIN
3
NC
4
GND
ISL21009-25
VOUT
FIGURE 1. TYPICAL APPLICATION PRECISION 12-BIT SUB-RANGING DAC
NC
NC
NC
8
7
6
5
C1
0.001µF
3
FN6327.6
September 12, 2007
ISL21009
Absolute Voltage Ratings Recommended Operating Conditions
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Max Voltage V
Max Voltage V
to GND . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +18V
IN
to GND (10s) . . . . . . . . . . . . . -0.5V to V
OUT
OUT
+1V
Voltage on “DNC” pins. . . . No connections permitted to these pins.
ESD Ratings
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6kV
Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORT ANT NOTE: A ll p arameters having Min/Max specificati ons are gua ranteed. Typ values are for information purposes only. Unless otherwise note d, all test s ar e at
the specified temperature and are pulsed tests, theref ore: T
= TC = T
J
A
NOTE:
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3. θ
JA
Temperature Range (Industrial) . . . . . . . . . . . . . . . -40°C to +125°C
Thermal Information
Continuous Power Dissipation (Note 3) . . . . . . . . . . . . . TA = +70°C
8 Ld SOIC derate 5.88mW/°C above +70°C. . . . . . . . . . . . . 471mW
Pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Common Electrical Specifications (ISL21009-12, -25, -41, -50) T
= -40°C to +125°C, I
A
= 0, unless otherwise specified.
OUT
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
OA
V
Accuracy @ TA = +25°C ISL21009B -0.5 +0.5 mV
OUT
ISL21009C -1.0 +1.0 mV
ISL21009D -2.0 +2.0 mV
TC V
OUT
Output Voltage Temperature
Coefficient (Note 4)
ISL21009B 3 ppm/°C
ISL21009C 5 ppm/°C
ISL21009D 10 ppm/°C
I
IN
ΔV
I
SC
t
R
OUT
/ V
Supply Current 95 180 µA
Trim Range ±2.0 ±2.5 %
OUT
Short Circuit Current TA = +25°C, V
Turn-on Settling Time V
= ±0.1% 100 µs
OUT
tied to GND 10 mA
OUT
Ripple Rejection f = 10kHz 60 dB
e
N
V
N
Electrical Specifications (ISL21009-12, V
Output Voltage Noise 0.1Hz ≤ f ≤ 10Hz 4.5 µV
Broadband Voltage Noise 10Hz ≤ f ≤ 1kHz 2.2 µV
= 1.250V) V
OUT
= 5.0V, TA = -40°C to +125°C, I
IN
= 0, unless otherwise specified.
OUT
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
OUT
V
IN
ΔV
/ΔV
OUT
ΔV
/ΔI
OUT
/ΔT
ΔV
OUT
ΔV
/Δt Long Term Stability (Note 6) TA = +25°C 50 ppm
OUT
Output Voltage 1.250 V
Input Voltage Range 3.5 16.5 V
Line Regulation 3.5V < VIN < 5.5V 50 150 µV/V
IN
VIN < 16.5V 10 50 µV/V
5.5V <
Load Regulation Sourcing: 0mA ≤ I
OUT
Sinking: -7mA ≤ I
Thermal Hysteresis (Note 5) ΔTA = +165°C 50 ppm
A
≤ 7mA 10 50 µV/mA
OUT
≤ 0mA 20 100 µV/mA
OUT
P-P
RMS
4
FN6327.6
September 12, 2007
ISL21009
Electrical Specifications (ISL21009-25, V
= 2.50V) V
OUT
= 5.0V, TA = -40°C to +125°C, I
IN
= 0, unless otherwise specified.
OUT
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
OUT
V
IN
ΔV
/ΔV
OUT
ΔV
/ΔI
OUT
ΔV
/ΔT
OUT
ΔV
/Δt Long Term Stability (Note 6) TA = +25°C 50 ppm
OUT
Electrical Specifications (ISL21009-41, V
Output Voltage 2.500 V
Input Voltage Range 3.5 16.5 V
Line Regulation 3.5V < VIN < 5.5V 50 150 µV/V
IN
VIN < 16.5V 10 50 µV/V
5.5V <
Load Regulation Sourcing: 0mA ≤ I
OUT
Sinking: -7mA ≤ I
Thermal Hysteresis (Note 5) ΔTA = +165°C 50 ppm
A
= 4.096V) V
OUT
≤ 7mA 10 50 µV/mA
OUT
≤ 0mA 20 100 µV/mA
OUT
= 5.0V, TA = -40°C to +125°C, I
IN
specified.
= 0 unless otherwise
OUT
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
OUT
V
IN
ΔV
/ΔV
OUT
ΔV
/ΔI
OUT
ΔV
/ΔT
OUT
ΔV
/Δt Long Term Stability (Note 6) TA = +25°C 50 ppm
OUT
Output Voltage 4.096 V
Input Voltage Range 4.5 16.5 V
Line Regulation 4.5V < VIN < 16.5V 50 200 µV/V
IN
Load Regulation Sourcing: 0mA ≤ I
OUT
Sinking: -5mA ≤ I
Thermal Hysteresis (Note 5) ΔTA = +165°C 50 ppm
A
≤ 5mA 20 100 µV/mA
OUT
≤ 0mA 20 150 µV/mA
OUT
Electrical Specifications (ISL21009-50, V
= 5.0V) V
OUT
= 10.0V, TA = -40°C to +125°C, I
IN
= 0 unless otherwise specified.
OUT
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
OUT
V
IN
ΔV
/ΔV
OUT
ΔV
/ΔI
OUT
/ΔT
ΔV
OUT
ΔV
/Δt Long Term Stability (Note 6) TA = +25°C 50 ppm
OUT
Output Voltage 5.000 V
Input Voltage Range 5.5 16.5 V
Line Regulation 5.5V < VIN < 16.5V 20 90 µV/V
IN
Load Regulation Sourcing: 0mA ≤ I
OUT
Sinking: -7mA ≤ I
Thermal Hysteresis (Note 5) ΔTA = +165°C 50 ppm
A
≤ 7mA 10 100 µV/mA
OUT
≤ 0mA 20 150 µV/mA
OUT
NOTES:
4. Over the specified temperature range. Temperature coefficient is measured by the box method whereby the change in V
temperature range; in this case, -40°C to +125°C = +165°C.
5. Thermal Hysteresis is the change of V
at T
= +25°C for the device under test. The device is temperature cycled and a second V
A
between the initial V
reading and the second V
OUT
measured @ TA = +25°C after temperature cycling over a specified range, ΔTA. V
OUT
reading is then expressed in ppm. For Δ TA = +165°C, the device under test is cycled
OUT
measurement is taken at +25°C. The difference
OUT
is divided by the
OUT
is read initially
OUT
from +25°C to +125°C to -40°C to +25°C.
6. Long term drift is logarithmic in nature and diminishes over time. Drift after the first 1000 hours will be approximately 10ppm/sqrt(1kHrs).
5
FN6327.6
September 12, 2007
ISL21009
Typical Performance Curves (ISL21009-12) (R
110
105
100
95
(µA)
IN
I
90
85
80
57911131517
UNIT 2
FIGURE 2. IIN vs VIN, 3 UNITS FIGURE 3. IIN vs VIN, 3 TEMPERATURES
60
40
= 5V
IN
20
(µV)
0
OUT
ΔV
-20
-40
NORMALIZED TO V
-60
3.5 5.5 7.5 9.5 11.5 13.5 15.5
UNIT 1
UNIT 3
VIN (V)
UNIT 3
V
(V)
IN
UNIT 1
UNIT 2
= 100kΩ)
EXT
(µV)
OUT
ΔV
100
95
90
(µA)
IN
I
85
80
57911131517
60
40
20
= 5.0V)
IN
0
-20
-40
-60
-80
(NORMALIZED TO V
-100
3.50 5.50 7.50 9.50 11.5 13.5 15.5
+125°C
+25°C
+25°C
+125°C
VIN (V)
(V)
V
IN
-40°C
-40°C
FIGURE 4. LINE REGULATION, 3 UNITS FIGURE 5. LINE REGULATION OVER-TEMPERATURE
0.08
0.06
0.04
0.02
0.00
(mV)
-0.02
OUT
-0.04
ΔV
-0.06
-0.08
-0.10
-0.12
-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7
SINKING OUTPUT CURRENT (mA) SOURCING
+125°C
+25°C
-40°C
FIGURE 6. LOAD REGULATION FIGURE 7. V
1.25020
1.25015
1.25010
1.25005
1.25000
1.24995
1.24990
(V) NORMALIZED TO 1.250V
1.24985
OUT
V
1.24980
UNIT 2
UNIT 3
-40 -15 10 35 60 85 110
OUT
UNIT 1
TEMPERATURE (°C)
vs TEMPERATURE, 3 UNITS
6
FN6327.6
September 12, 2007
ISL21009
Typical Performance Curves (ISL21009-12) (R
0
500kHz PEAK
-10
(DC) = 10V
V
IN
-20
-30
-40
-50
-60
PSRR (dB)
-70
-80
-90
-100
1 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
NO LOAD
10nF
100nF
1nF
= 100kΩ) (Continued)
EXT
X = 10µs/DIV
Y = 200mV/DIV
FIGURE 8. PSRR AT DIFFERENT CAPACITIVE LOADS FIGURE 9. LINE TRANSIENT RESPONSE, NO CAPACITIVE
LOAD
X = 5µs/DIV
Y = 20mV/DIV
V
IN
V
REF
FIGURE 10. LINE TRANSIENT RESPONSE, 0.001µF LOAD
CAPACITANCE
200
180
160
140
120
( Ω)
100
OUT
80
Z
60
40
20
0
1 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
FIGURE 12. Z
1nF LOAD
NO LOAD
10nF LOAD
vs FREQUENCY FIGURE 13. V
OUT
X = 100µs/DIV
Y = 1V/DIV
2mV/DIV
FIGURE 11. TURN-ON TIME
GAIN IS x1000,
NOISE IS 4.5µV
NOISE, 0.1Hz TO 10Hz
OUT
P-P
7
FN6327.6
September 12, 2007
V
(V)
ISL21009
Typical Performance Curves (ISL21009-12) (R
X = 5µs/DIV
Y = 50mV/DIV
+50µA
-50µA
FIGURE 14. LOAD TRANSIENT RESPONSE FIGURE 15. LOAD TRANSIENT RESPONSE
Typical Performance Curves (ISL21009-25) (R
140
UNIT 1
120
100
80
(µA)
IN
60
I
40
20
0
3.5 5.5 7.5 9.5 11.5 13.5 15.5
FIGURE 16. IIN vs VIN, 3 UNITS FIGURE 17. IIN vs VIN, 3 TEMPERATURES
UNIT 2
UNIT 3
V
(V)
IN
= 100kΩ) (Continued)
EXT
X = 10µs/DIV
Y = 500mV/DIV
= 100kΩ)
EXT
120
110
(µA)
100
IN
I
90
80
3.5 5.5 7.5 9.5 11.5 13.5 15.5
-7mA
+25°C
+125°C
-40°C
V
+7mA
(V)
IN
OUT
2.50010
= 5V)
IN
2.50005
2.50000
2.49995
2.49990
2.49985
2.49980
(NORMALIZED TO 2.50V AT V
3.50 5.50 7.50 9.50 11.5 13.5 15.5
UNIT 2
UNIT 1
UNIT 3
(V)
V
IN
FIGURE 18. LINE REGULATION
8
60
40
20
= 5.0V)
IN
0
(µV)
-20
OUT
-40
ΔV
-60
-80
(NORMALIZED TO V
-100
3.50 5.50 7.50 9.50 11.5 13.5 15.5
+25°C
+125°C
-40°C
(V)
V
IN
FIGURE 19. LINE REGULATION OVER-TEMPERATURE
September 12, 2007
FN6327.6
0
ISL21009
Typical Performance Curves (ISL21009-25) (R
0.10
0.08
0.06
0.04
0.02
0.00
(mV)
-0.02
OUT
ΔV
-0.04
-0.06
-0.08
-0.10
-7 -6 -5 -4 -3 -2 -1 0
SINKING OUTPUT CURRENT (mA) SOURCING
0
500kHz PEAK
-10
VIN (DC) = 10V
-20
-30
-40
-50
-60
PSRR (dB)
-70
-80
-90
-100
1 10 100 1k 10k 100k 1M 10M
+125°C
-40°C
+25°C
1234567
FIGURE 20. LOAD REGULATION FIGURE 21. V
NO LOAD
10nF
100nF
FREQUENCY (Hz)
1nF
= 100kΩ) (Continued)
EXT
2.5002
2.5001
2.5000
2.4999
2.4998
(V)
2.4997
OUT
V
2.4996
2.4995
2.4994
2.4993
-40 -20 0 20 40 60 80 100 120 140
UNIT 3
UNIT 2
UNIT 1
TEMPERATURE (°C)
vs TEMPERATURE
OUT
FIGURE 22. PSRR AT DIFFERENT CAPACITIVE LOADS FIGURE 23. LINE TRANSIENT RESPONSE, NO CAPACITIVE
LOAD
5.2
4.8
FIGURE 24. LINE TRANSIENT RESPONSE, 0.001µF LOAD
(V)
OUT
AND V
IN
V
4.4
4.0
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
V
IN
HIGH I
IN
MEDIUM I
LOW I
0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.4
IN
IN
TIME (ms)
FIGURE 25. TURN-ON TIME
CAPACITANCE
9
FN6327.6
September 12, 2007
ISL21009
Typical Performance Curves (ISL21009-25) (R
160
140
120
100
(Ω)
80
OUT
Z
60
40
20
0
1 10 100 1k 10k 100k 1M
FIGURE 26. Z
NO OUTPUT CAPACITANCE
FREQUENCY (Hz)
vs FREQUENCY FIGURE 27. V
OUT
10nF
1nF
NO LOAD
100nF
= 100kΩ) (Continued)
EXT
GAIN IS x1000, NOISE
IS 4.5µV
2mV/DIV
NO OUTPUT CAPACITANCE
P-P
NOISE, 0.1Hz TO 10Hz
OUT
7mA
+50µA
-50µA
FIGURE 28. LOAD TRANSIENT RESPONSE FIGURE 29. LOAD TRANSIENT RESPONSE
Typical Performance Curves (ISL21009-41) (R
110
105
100
95
(µA)
IN
I
90
85
80
57911131517
UNIT 2
FIGURE 30. IIN vs VIN, 3 UNITS FIGURE 31. IIN vs VIN, 3 TEMPERATURES
UNIT 3
UNIT 1
VIN (V)
= 100kΩ)
EXT
-7mA
100
95
90
(µA)
IN
I
85
80
5 7 9 11 13 15 17
+25°C
-40°C
+125°C
VIN (V)
10
FN6327.6
September 12, 2007
ISL21009
Typical Performance Curves (ISL21009-41) (R
4.0963
4.0962
= 5.0V
IN
4.0962
4.0961
4.0961
(V)
4.0960
OUT
V
4.0960
4.0959
4.0959
4.0958
NORMALIZED TO 4.096V AT V
4.50 6.50 8.50 10.5 12.5 14.5 16.5
UNIT 1
UNIT 3
FIGURE 32. LINE REGULATION, 3 UNITS FIGURE 33. LINE REGULATION OVER-TEMPERATURE
0.10
0.05
0.00
(mV)
-0.05
OUT
ΔV
-0.10
-0.15
-0.20
-7 -6 -5 -4 -3 -2 -1 0
SINKING OUTPUT CURRENT (mA) SOURCING
-40°C
UNIT 2
V
(V)
IN
+25°C
+125°C
1234567
= 100kΩ) (Continued)
EXT
300
= 5.0V
250
IN
200
150
100
50
0
-50
-100
(µV) NORMALIZED TO V
-150
OUT
-200
4.50 6.50 8.50 10.5 12.5 14.5 16.5
ΔV
4.0970
4.0965
4.0960
4.0955
4.0950
(V) NORMALIZED TO 4.096V
OUT
V
4.0945
-40 -25 -10 5 20 35 50 65 80 95 110 125
UNIT 1
+25°C
UNIT 3
TEMPERATURE (°C)
+125°C
V
(V)
IN
-40°C
UNIT 2
FIGURE 34. LOAD REGULATION FIGURE 35. V
0
0
VIN (DC) = 5V
-10
-10
V
(AC) RIPPLE = 50mV
IN
-20
-20
-30
-30
-40
-40
-50
-50
PSRR (dB)
PSRR (dB)
-60
-60
-70
-70
-80
-80
1 10 100 1k 10k 100k 1M 10M
P-P
100nF LOAD
100nF LOAD
1nF LOAD
1nF LOAD
FREQUENCY (Hz)
NO LOAD
NO LOAD
10nF LOAD
10nF LOAD
FIGURE 36. PSRR AT DIFFERENT CAPACITIVE LOADS
vs TEMPERATURE
OUT
X = 10µs/DIV
Y = 200mV/DIV
FIGURE 37. LINE TRANSIENT RESPONSE, NO CAPACITIVE
LOAD
11
FN6327.6
September 12, 2007
ISL21009
Typical Performance Curves (ISL21009-41) (R
X = 10µs/DIV
Y = 200mV/DIV
FIGURE 38. LINE TRANSIENT RESPONSE, 0.001µF LOAD
CAPACITANCE
200
180
160
140
120
( Ω)
100
OUT
80
Z
60
40
20
0
1 10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
FIGURE 40. Z
1nF LOAD
NO LOAD
10nF LOAD
vs FREQUENCY FIGURE 41. V
OUT
= 100kΩ) (Continued)
EXT
GAIN IS x10,000
NOISE IS 4.5µV
20mV/DIV
V
IN
V
REF
FIGURE 39. TURN-ON TIME
P-P
1s/DIV
NOISE, 0.1Hz TO 10Hz
OUT
X = 50µs/DIV
Y = 2V/DIV
7mA
+50µA
-50µA
NO OUTPUT CAPACITANCE
X = 5µs/DIV
Y = 50mV/DIV
-7mA
NO OUTPUT CAPACITANCE
X = 5µs/DIV
Y = 500mA/DIV
FIGURE 42. LOAD TRANSIENT RESPONSE FIGURE 43. LOAD TRANSIENT RESPONSE
12
September 12, 2007
FN6327.6
ISL21009
Typical Performance Curves (ISL21009-50) (R
140
112µA
120
100
80
(µA)
IN
60
I
40
20
0
5.50 6.50 7.50 8.50 9.50 10.5 11.5 12.5 13.5 14.5 15.5 16.5
FIGURE 44. IIN vs VIN, 3 UNITS FIGURE 45. IIN vs VIN, 3 TEMPERATURES
5.0001
5.0000
4.9999
4.9998
(V)
V
OUT
4.9997
4.9996
4.9995
4.9994
(NORMALIZED TO 5.0V AT VIN = 10V)
5.50 6.50 7.50 8.50 9.50 10.5 11.5 12.5 13.5 14.5 15.516.5
104µA
95µA
112µA
FIGURE 46. LINE REGULATION FIGURE 47. LINE REGULATION OVER-TEMPERATURE
104µA
95µA
V
(V)
IN
V
(V)
IN
= 100kΩ)
EXT
110
+25°C
100
V
IN
V
IN
+125°C
(V)
-40°C
(V)
(µA)
IN
I
90
-40°C
80
5.50 6.50 7.50 8.50 9.50 10.5 11.5 12.5 13.5 14.5 15.5 16.5
100
0
-100
= 10.0V)
IN
-200
(µV)
-300
OUT
-400
ΔV
-500
-600
(NORMALIZED TO V
-700
5.50 6.50 7.50 8.50 9.50 10.5 11.5 12.5 13.5 14.5 15.5 16.5
+25°C
+125°C
13
0.10
0.05
0.00
+25°C
-0.05
(mV)
-0.10
OUT
ΔV
-0.15
-0.20
-0.25
-7 -6 -5 -4 -3 -2 -1 0
SINKING SOURCING
-40°C
+125°C
1234567
OUTPUT CURRENT (mA)
FIGURE 48. LOAD REGULATION
FN6327.6
September 12, 2007
ISL21009
Typical Performance Curves (ISL21009-50) (R
5.001
NORMALIZED TO +25°C
5.001
5.000
(V)
5.000
OUT
V
4.999
4.999
4.998
UNIT 3
-40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
FIGURE 49. V
VIN = 10V
DV
= 1V
IN
UNIT 2
vs TEMPERATURE FIGURE 50. PSRR AT DIFFERENT CAPACITIVE LOADS
OUT
UNIT 1
= 100kΩ) (Continued)
EXT
0
VIN (DC) = 10V
-10
V
-20
IN
-30
-40
-50
-60
PSRR (dB)
-70
-80
-90
-100
1 10 100 1k 10k 100k 1M 10M
(AC) RIPPLE = 50mV
FREQUENCY (Hz)
VIN = 10V
DV
= 1V
IN
P-P
NO LOAD
10nF
100nF
1nF
FIGURE 51. LINE TRANSIENT RESPONSE, NO CAPACITIVE
LOAD
12
10
(V)
8
OUT
6
4
(V) AND V
IN
V
2
0
0 50 100 150 200 250 300
270nA
V
IN
450nA
340nA
TIME (µs)
FIGURE 53. TURN-ON TIME
14
FIGURE 52. LINE TRANSIENT RESPONSE, 0.001µF LOAD
CAPACITANCE
120
100
80
(W)
60
OUT
Z
40
20
0
1 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
FIGURE 54. Z
10nF
vs FREQUENCY
OUT
1nF
NO LOAD
September 12, 2007
FN6327.6
ISL21009
Typical Performance Curves (ISL21009-50) (R
GAIN IS x1000
NOISE IS 4.5µV
2mV/DIV
FIGURE 55. V
P-P
NOISE, 0.1Hz TO 10Hz
OUT
= 100kΩ) (Continued)
EXT
FIGURE 56. LOAD TRANSIENT RESPONSE
50µA
-50µA
-7mA
FIGURE 57. LOAD TRANSIENT RESPONSE
Applications Information
FGA Technology
The ISL21009 voltage reference uses floating gate
technology to create references with very low drift and supply
current. Essentially the charge stored on a floating gate cell is
set precisely in manufacturing. The reference volta ge output
itself is a buffered version of the floating gate voltage. The
resulting reference device has excellent characteristics, which
are unique in the industry: very low temperature drift, hig h
initial accuracy, and almost zero supply current. Also, the
reference voltage itself is not limited by volta ge ban dgap s or
zener settings, so a wide range of reference voltages can be
programmed (standard voltage settings are provided, but
customer-specific voltages are available).
7mA
The process used for these reference devices is a floating
gate CMOS process and the amplifier circuitry uses CMOS
transistors for amplifier and output transistor circuitry. While
providing excellent accuracy, there are limitations in output
noise level and load regulation due to the MOS device
characteristics. These limitations are addressed with circuit
techniques discussed in other sections.
Micropower Operation
The ISL21009 consumes extremely low supply current due
to the proprietary FGA technology. Low noise performance is
achieved using optimized biasing techniques. Supply current
is typically 95µA and noise is 4.5µV
low noise portable applications such as handheld meters
and instruments.
benefitting precision,
P-P
15
FN6327.6
September 12, 2007
ISL21009
Data Converters in particular can utilize the ISL21009 as an
external voltage reference. Low power DAC and ADC
circuits will realize maximum resolution with lowest noise.
Board Mounting Considerations
For applications requiring the highest accuracy, board
mounting location should be reviewed. The device uses a
plastic SOIC package, which will subject the die to mild
stresses when the PC board is heated and cooled, slightly
changing the shape. Placing the device in areas subject to
slight twisting can cause degradation of the accuracy of the
reference voltage due to these die stresses. It is normally
best to place the device near the edge of a board, or the
shortest side, as the axis of bending is most limited at that
location. Mounting the device in a cutout also minimizes flex.
Obviously mounting the device on flexprint or extremely thin
PC material will likewise cause loss of reference accuracy.
Noise Performance and Reduction
The output noise voltage in a 0.1Hz to 10Hz bandwidth is
typically 4.5µV
bandpass filter made of a 1-pole high-pass filter with a corner
frequency at 0.1Hz and a 2-pole low-pass filter with a corner
frequency at 12.6Hz to create a filter with a 9.9Hz bandwidth.
Noise in the 10kHz to 1MHz bandwidth is approximately
40µV
with no capacitance on the output. This noise
P-P
measurement is made with a 2 decade bandpass filter made
of a 1-pole high-pass filter with a corner frequency at 1/10 of
the center frequency and 1-pole low-pass filter with a corner
frequency at 10x the center frequency. Load capacitance up
to 1000pF can be added but will result in only marginal
improvements in output noise and transient response. The
output stage of the ISL21009 is not designed to drive heavily
capactive loads, so for load capacitances above 0.001µF, the
noise reduction network shown in Figure 58 is recommended.
This network reduces noise significantly over the full
bandwidth. Noise is reduced to less than 20µV
1MHz using this network with a 0.01µF capacitor and a 2kΩ
resistor in series with a 10µF capacitor . Also, tra nsient
response is improved with higher value output capacitor. The
0.01µF value can be increased for better load transient
response with little sacrifice in output stability.
.
VIN = 5.0V
0.1µF
. The noise measurement is made with a
P-P
from 1Hz to
P-P
10µF
V
IN
ISL21009-25
GND
V
O
0.01µF
2kΩ
10µF
Turn-On Time
The ISL21009 devices have low supply current and thus the
time to bias up internal circuitry to final values will be longer
than with higher power references. Normal turn-on time is
typically 100µs. This is shown in Figure 25. Circuit design
must take this into account when looking at power-up delays
or sequencing.
Temperature Coefficient
The limits stated for temperature coefficient (tempco) are
governed by the method of measurement. The overwhelming
standard for specifying the temperature drift of a reference is to
measure the reference voltage at two temperatures, take the
total variation, (V
extremes of measurement (T
HIGH
– V
), and divide by the temperature
LOW
HIGH–TLOW
). The result is
divided by the nominal reference voltage (at T = +25°C) and
multiplied by 10
6
to yield ppm/°C. This is the “Box” method for
specifying temperature coefficient.
Output Voltage Adjustment
The output voltage can be adjusted up or down by 2.5% by
placing a potentiometer from V
wiper to the TRIM pin. The TRIM input is high impedance so no
series resistance is needed. The resistor in the potentiometer
should be a low tempco (<50ppm/°C) and the resulting voltage
divider should have very low tempco <5ppm/°C. A digital
potentiometer such as the ISL95810 provides a low tempco
resistance and excellent resistor and tempco matching for trim
applications.
to GND and connecting the
OUT
FIGURE 58. HANDLING HIGH LOAD CAPACITANCE
16
FN6327.6
September 12, 2007
Typical Application Circuits
VIN = +5.0V
ISL21009
R = 200Ω
V
IN
2N2905
+3.5V TO 16.5V
ISL21009
V
= 2.50V
OUT
V
OUT
2.5V/50mA
0.001µF
GND
FIGURE 59. PRECISION 2.5V, 50mA REFERENCE
V
IN
V
ISL21009-25
V
= 2.50V
OUT
GND
0.1µF
OUT
10µF
0.001µF
V
R
2-WIRE BUS
SDA
SCL
CC
X9119
V
SS
H
R
L
+
EL8178
–
V
OUT
(UNBUFFERED)
V
(BUFFERED)
OUT
FIGURE 60. 2.5V FULL SCALE LOW-DRIFT, LOW NOISE, 10-BIT ADJUSTABLE VOLTAGE SOURCE
17
FN6327.6
September 12, 2007
Typical Application Circuits (Continued)
+3.5V TO 16.5V
V
IN
V
OUT
ISL21009-25
GND
FIGURE 61. KELVIN SENSED LOAD
0.1µF
ISL21009
10µF
+
–
EL8178
V
OUT
SENSE
LOAD
+3.5V TO 16.5V
10µF
0.1µF
V
IN
V
2.5V ±2.5%
OUT
ISL21009-25
TRIM
GND
2
C BUS
I
V
SDA
SCL
ISL95810
V
SS
CC
R
H
R
L
FIGURE 62. OUTPUT ADJUSTMENT USING THE TRIM PIN
18
FN6327.6
September 12, 2007
Small Outline Plastic Packages (SOIC)
ISL21009
N
INDEX
AREA
123
-A-
E
-B-
SEATING PLANE
D
A
-C-
0.25(0.010) BM M
H
L
h x 45°
α
e
B
0.25(0.010) C AM BS
M
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
A1
C
0.10(0.004)
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
SYMBOL
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9
C 0.0075 0.0098 0.19 0.25 D 0.1890 0.1968 4.80 5.00 3
E 0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC H 0.2284 0.2440 5.80 6.20 -
h 0.0099 0.0196 0.25 0.50 5
L 0.016 0.050 0.40 1.27 6
N8 87
a
0° 8° 0° 8° -
NOTESMIN MAX MIN MAX
Rev. 1 6/05
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Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
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reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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19
FN6327.6
September 12, 2007
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