Datasheet IRFPG40 Datasheet (Intersil)

IRFPG40

Data Sheet July 1999

4.3A, 1000V, 3.500 Ohm, N-Channel
Power MOSFET

This N-Channel enhancementmode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdownavalanchemodeof operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA09850.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFPG40 TO-247 IRFPG40

NOTE: When ordering, include the entire part number.

File Number

Features

• 4.3A, 1000V

•r

• UIS SOA Rating Curve (Single Pulse)

• -55

= 3.500Ω

DS(ON)

o

C to 150oC Operating and Storage Temperature

Symbol

D

G

S

2879.2

Packaging

JEDEC STYLE TO-247

SOURCE

DRAIN

GATE

DRAIN
(TAB)

4-365

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFPG40

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFPG40 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DSS

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

D

DM

GS

D

1000 V
1000 V

4.3 A
17 A

±20 V

150 W

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

490 mJ

-55 to 150

300

260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V

GS(TH)VDS

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I
Drain to Source On Resistance (Note 2) r

DS(ON)ID

Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge Q

g(TOT)ID

Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

fs

r

f

θJC
θJA

= 250µA, VGS = 0V (Figure 9) 1000 - V

= VGS, ID = 250µA 2.0 4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV

, VGS = 0V - 25 µA

DSS

, VGS = 0V, TJ = 150oC - 250 µA

DSS

VGS = ±20V - ±100 nA

= 2.5A, VGS = 10V (Figures 7, 8) - 3.5 Ω
ID = 2.5A, VDS = 100V (Figure 11) 3.5 - S
VDD = 500V, I = 3.9A, RGS = 9.1Ω, RL = 120Ω

VGS = 10V

-30ns

-50ns

- 170 ns

-50ns

= 3.9A, VDS = 800V, VGS = 10V (Figure 13) - 120 nC

- 0.83

Free Air Operation - 40

o
o

C/W
C/W

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN MAX UNITS

Source to Drain Diode Voltage V
Reverse Recovery Time t

SD

rr

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature.

4. VDD = 25V, starting TJ = 25oC, L = 640µH, RG = 25Ω, peak IAS = 9.2A (Figure 3).

4-366

ISD = 4.3A (Figure 12) - 1.8 V
ISD = 3.9A, dlSD/dt = 100A/µs - 1000 ns

IRFPG40

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 25 50 75 100 125 150

, CASE TEMPERATURE (oC)

T

C

Unless Otherwise Specified

FIGURE 1. NORMALIZED POWERDISSIPATION vs CASE

TEMPERATURE

100

If R = 0

I

DM

= (L)(IAS)/(1.3 RATED BV

t

AV

If R ≠ 0

= (L/R) In[(Ias x R)/(1.3 RATED BV

t

AV

10

STARTING TJ= 25oC

DSS

- VDD)

DSS

- VDD) + 1]

100

TJ = MAX RATED, TC = 25oC
SINGLE PULSE

10

1

, DRAIN CURRENT (A)

0.10

D

I

0.01

OPERATION IN THIS AREA
LIMITED BY r

1 1000

V

DS

DS(ON)

10 100

, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 2. FORWARD BIAS SAFE OPERATING AREA

10

VGS = 10V

8

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

6

4

VGS = 6V

VGS = 5V

10µs

100µs

1ms

10ms

DC

, DRAIN CURRENT (A)

D

I

STARTING TJ = 150oC

1

0.01 10.00

0.10 1.00

TIME IN AVALANCHE (ms)

DRAIN CURRENT (A)

2

0

0 100 200 300 400 500

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

FIGURE 3. UNCLAMPED INDUCTIVE SWITCHING SOA FIGURE 4. OUTPUT CHARACTERISTICS

10

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
T

= 25oC

C

8

6

4

, DRAIN CURRENT (A)

D

I

2

0

0

10 20 30 40 50

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS= 10V

VGS= 6V

VGS= 5V

VGS= 4V

5

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS= 7V

4

3

2

DRAIN CURRENT (A)

1

0

024 68

150oC

V

, GATE TO SOURCE VOLTAGE (V)

GS

25oC

FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS

VGS= 4V

4-367

IRFPG40

Typical Performance Curves

6

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
V

= 10V

GS

5

4

3

2

RESISTANCE (Ω)

DRAIN TO SOURCE ON

1

0

048

26 1210

ID, DRAIN CURRENT (A)

Unless Otherwise Specified (Continued)

FIGURE 7. DRAIN TOSOURCEONRESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

1.3
ID= 250µA

1.2

1.1

1.0

BREAKDOWN VOLTAGE

0.9

NORMALIZED DRAIN TO SOURCE

0

-60 0 60 120 150

-40 -20 20 40 80 100 140
TJ, JUNCTION TEMPERATURE (oC)

3.0

PULSE DURATION = 80µs

2.7

DUTY CYCLE = 0.5% MAX
I

= 2.5A, VGS = 10V

D

2.5

2.2

2.0

1.7

1.5

ON RESISTANCE

1.3

1.0

NORMALIZED DRAIN TO SOURCE

0.8
0

-50 0 50 100 150
, JUNCTION TEMPERATURE (oC)

T

J

FIGURE 8. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

3000

2500

2000

1500

1000

C, CAPACITANCE (pF)

C

ISS

C

OSS

C

RSS

500

0

1 100

V

, DRAIN TO SOURCE VOLTAGE (V)

DS

10

VGS= 0V, f = 1MHz
C

= CGS + C

ISS

C

= C

RSS

C

≈ C

OSS

GD
DS

+ C

GD

GD

FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN

FIGURE 10. CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE

VOLTAGE vs. JUNCTION TEMPERATURE

8

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

V

≥ 70V

DS

6

4

2

FORWARD TRANSCONDUCTANCE (S)

fs,

g

0

0123

ID, DRAIN CURRENT (A)

25oC

150oC

45

6

100

PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX

10

1

, SOURCE TO DRAIN CURRENT (A)

SD

I

0.1
0

0.3

150oC

0.6 0.9 1.2 1.5

SOURCE TO DRAIN VOLTAGE (V)

25oC

FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE

4-368

IRFPG40

Typical Performance Curves

GATE TO SOURCE VOLTAGE (V)

FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Test Circuits and Waveforms

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

Unless Otherwise Specified (Continued)

16

14

12

10

8

6

4

2

0

0102030

V

DS

L

DUT

VDS = 100V
V

= 200V

DS

VDS = 400V

40 50

Qg, GATE CHARGE (nC)

+

V

DD

-

60 70 80

I

AS

BV

DSS

t

P

V

DS

V

DD

0V

P

I

AS

0.01Ω

0

t

AV

t

FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS

t

ON

R

G

V

GS

FIGURE 16. SWITCHING TIME TEST CIRCUIT

t

d(ON)

t

R

L

+

V

DD

-

DUT

V

DS

0

V

GS

0

90%

10%

r

10%

50%

PULSE WIDTH

FIGURE 17. RESISTIVE SWITCHING WAVEFORMS

t

d(OFF)

90%

t

OFF

50%

t

f

90%

10%

4-369

IRFPG40

Test Circuits and Waveforms

CURRENT

REGULATOR

12V

BATTERY

0

0.2µF

50kΩ

I

G(REF)

0.3µF

G

IG CURRENT

SAMPLING

RESISTOR RESISTOR

FIGURE 18. GATE CHARGE TEST CIRCUIT

(Continued)

V

DS

(ISOLATED
SUPPLY)

SAME TYPE
AS DUT

D

DUT

S

CURRENT

I

D

SAMPLING

V

DD

Q

g(TOT)

Q

gd

Q

gs

V

DS

0

V

DS

0

I

G(REF)

V

GS

FIGURE 19. GATE CHARGE WAVEFORMS

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Intersil semiconductor products are sold by description only.Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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