Intersil IRFF420 Datasheet

IRFF420

Data Sheet March 1999

1.6A, 500V, 3.000 Ohm, N-Channel
Power MOSFET

This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.

Formerly developmental type TA17405.

Ordering Information

PART NUMBER PACKAGE BRAND

IRFF420 TO-205AF IRFF420

NOTE: When ordering, include the entire part number.

File Number 1891.4

Features

• 1.6A, 500V

•r

DS(ON)

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount

= 3.000Ω

Components to PC Boards”

Symbol

D

G

Packaging

DRAIN
(CASE)

S

JEDEC TO-205AF

SOURCE

GATE

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

IRFF420

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

IRFF420 UNITS

Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

DS

D

DM

GS

D

500 V
500 V

1.6 A

6.5 A

±20 V

20 W

Linear Derating Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.16 W/oC

Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

AS

STG

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

L

pkg

210 mJ

-55 to 150

300
260

o

C

o

C

o

C

NOTE:

1. TJ= 25oC to 125oC.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate to Threshold Voltage V
Zero-Gate Voltage Drain Current I

On-State Drain Current (Note 2) I
Gate to Source Leakage I
Drain to Source On Resistance

r

DS(ON)VGS

DSSVGS

GS(TH)VGS

DSS

D(ON)

GSS

= 0V, ID = 250µA (Figure 10) 500 - - V

= VDS, ID = 250µA 2.0 - 4.0 V
VDS = Rated BV
VDS = 0.8 x Rated BV
VDS> I

D(ON) xrDS(ON)MAX,VGS

, VGS = 0V - - 25 µA

DSS

, VGS = 0V, TJ = 125oC - - 250 µA

DSS

= 10V (Figure 7) 1.6 - - A

VGS = ±20V - - ±100 nA

= 10V, ID = 1.0A (Figures 8, 9) - 2.5 3.000 Ω

(Note 2)
Forward Transconductance (Note 2) g
Turn-On Delay Time t

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge

Q

g(TOT)VGS

(Gate to Source + Gate to Drain)
Gate to Source Charge Q
Gate to Drain “Miller” Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Internal Drain Inductance L

Internal Source Inductance L

Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

OSS
RSS

VDS≥ 10V, ID = 2.0A (Figure 12) 1.5 2.5 - S

fs

VDD= 0.5 x Rated BV
ID≈ 1.6A (Figures 17,18), RL=152Ω for V

r

RL = 137Ω for V

DSS,RG

= 225V, MOSFET Switching

DSS

Times are Essentially Independent of Operating
Temperature

f

= 10V, ID = 1.6A, VDS = 0.8 x Rated BV
I

= 1.5mA (Figures 14, 19, 20) Gate Charge is

G(REF)

Essentially Independent of Operating Temperature.

gs
gd

VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 300 - pF

ISS

= 9.1Ω,VGS= 10V,

=250V,

DSS

DSS

-3060ns

-2550ns

-3060ns

-1530ns

,

-1115nC

- 5.0 - nC

- 6.0 - nC

-75-pF

-20-pF

Measured from the Drain

D

Lead, 5mm (0.2in) from
Header to Center of Die

Measured from the

S

SourceLead,5mm(0.2in)
from Header and Source
Bonding Pad

θJC

Free Air Operation - - 175oC/W

θJA

Modified MOSFET
Symbol Showing the
Internal Device
Inductances

D

L

D

G

L

S

S

- 5.0 - nH

-15-nH

- - 6.25oC/W

2

IRFF420

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I
Pulse Source to Drain Current (Note 3) I

SD
SM

Source to Drain Diode Voltage (Note 2) V
Reverse Recovery Time t
Reverse Recovered Charge Q

NOTES:

2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. V

= 50V, start TJ = 25oC, L = 143.5mH, RG = 25Ω, peak IAS = 1.6A (Figures 15,16).

DD

Modified MOSFET
Symbol Showing the

D

Integral Reverse P-N
Junction Rectifier

TJ = 25oC, ISD= 1.6A, VGS = 0V (Figure 13) - - 1.4 V

SD

TJ = 150oC, ISD = 1.6A, dISD/dt = 100A/µs - 600 - ns

rr

TJ = 150oC, ISD = 1.6A, dISD/dt = 100A/µs - 3.5 - µC

RR

G

S

- - 1.6 A

- - 6.5 A

Typical Performance Curves

1.2

1.0

0.8

0.6

0.4

0.2

POWER DISSIPATION MULTIPLIER

0

0 50 100 150

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE

TEMPERATURE

2

1.0

0.5

2.0

1.6

1.2

0.8

, DRAIN CURRENT (A)

D

I

0.4

0

50 75 10025 150

TC, CASE TEMPERATURE (oC)

125

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs

CASE TEMPERATURE

0.2

0.1

0.1

, NORMALIZED

θJC

Z

THERMAL IMPEDANCE

0.01
10

0.05

0.02

0.01

-5

NOTES:
DUTY FACTOR: D = t

SINGLE PULSE

-4

10

-3

10

t

, RECTANGULAR PULSE DURATION (s)

1

-2

10

0.1

PEAK TJ= PDM x Z

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

3

P

DM

t

1

t

2

1/t2

x R

θJC

+ T

C

θJC

110

Typical Performance Curves (Continued)

IRFF420

10

1.0
OPERATION IN THIS

AREA IS LIMITED
BY r

DS(ON)

0.05

, DRAIN CURRENT (A)

D

I

TC = 25oC
TJ = MAX RATED

0.01
110

VDS, DRAIN TO SOURCE VOLTAGE (V)

100

100µs

1ms

10ms

100ms

DC

10µs

1000

5

VGS = 7V

4

VGS = 7.5V

3

2

, DRAIN CURRENT (A)

D

I

1

0

50 100 150 2000 250

VDS, DRAIN TO SOURCE VOLTAGE (V)

80µs PULSE TEST

VGS = 4V

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

5

80µs PULSE TEST

4

3

VGS = 10V

VGS = 7V

VGS = 6.5V

VGS = 6V

5

VDS > I

D(ON)

80µs PULSE TEST

4

3

x r

DS(ON) MAX

VGS = 6.5V

VGS = 6V

VGS = 5.5V

VGS = 5V

VGS = 4.5V

2

, DRAIN CURRENT (A)

D

I

1

0

4 8 12 16020

VDS, DRAIN TO SOURCE VOLTAGE (V)

VGS = 4V

VGS = 5.5V

VGS = 5V

VGS = 4.5V

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

9

8

7

6

5

, DRAIN TO SOURCE

4

ON RESISTANCE (Ω)

DS(ON)

r

3

2

2µs PULSE TEST

= 25oC

T

J

2468010

ID, DRAIN CURRENT (A)

VGS = 10V

VGS = 20V

NOTE: Heating effect of 2µs pulse is minimal.

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE

VOLTAGE AND DRAIN CURRENT

12 14

2

1

, ON-STATE DRAIN CURRENT (A)

D

I

0

0246810

2.6

2.2

1.8

1.4

1.0

ON RESISTANCE

0.6

NORMALIZED DRAIN TO SOURCE

0.2

TJ = 125oC

TJ = -25oC
TJ = -55oC

VGS, GATE TO SOURCE VOLTAGE (V)

ID = 1A

VGS = 10V

-40 40 120

0 160

, JUNCTION TEMPERATURE (oC)

T

J

80

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

RESISTANCE vs JUNCTION TEMPERATURE

4

Typical Performance Curves (Continued)

IRFF420

1.25
ID = 250µA

1.15

1.05

0.95

BREAKDOWN VOLTAGE

0.85

NORMALIZED DRAIN TO SOURCE

0.75

-40 40 80 120

0 160
TJ, JUNCTION TEMPERATURE (oC)

FIGURE 10. NORMALIZED DRAIN TOSOURCE BREAKDOWN

VOLTAGE vs JUNCTION TEMPERATURE

5

80µs PULSE TEST

4

TJ = -50oC

3

2

TJ = 25oC

TJ = 125oC

1000

800

600

400

C, CAPACITANCE (pF)

200

0

C

ISS

C

C

RSS

10 20 30 40 50
VDS, DRAIN TO SOURCE VOLTAGE (V)

OSS

VGS = 0V, f = 1MHz
C

= CGS + C
C
C

ISS
RSS
OSS

= C

GD

≈ CDS + C

GD

GD

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

100

80µs PULSE TEST

TJ = 25oC

TJ = 150oC

10

TJ = 150oC

, TRANSCONDUCTANCE (S)

1

fs

g

0

, SOURCE TO DRAIN CURRENT (A)

SD

I

1

123405

ID, DRAIN CURRENT (A)

01 34

TJ = 25oC

2

VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20

ID = 1.6A

15

10

5

, GATE TO SOURCE VOLTAGE (V)

GS

V

0

VDS = 100V
VDS = 250V
V

= 400V

DS

4 8 12 16020

Q

, TOTAL GATE CHARGE (nC)

g(TOT)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

5

IRFF420

Test Circuits and Waveforms

V

DS

BV

DSS

L

VARY t

TO OBTAIN

P

REQUIRED PEAK I

V

GS

AS

R

G

+

V

DD

-

DUT

0V

P

I

AS

0.01Ω

0

t

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

t

P

I

AS

t

AV

V

DS

V

DD

t

ON

t

d(ON)

t

R

L

+

V

R

G

DD

-

V

DS

0

r

90%

10%

DUT

V

GS

V

GS

10%

0

50%

PULSE WIDTH

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

V

DS

(ISOLATED
SUPPLY)

SAME TYPE
AS DUT

V

DD

Q

g(TOT)

Q

gd

Q

gs

12V

BATTERY

0.2µF

50kΩ

CURRENT

REGULATOR

0.3µF

t

d(OFF)

90%

V

GS

t

OFF

50%

t

f

90%

10%

D

G

I

0

G(REF)

IG CURRENT

SAMPLING

RESISTOR RESISTOR

DUT

S

CURRENT

I

D

SAMPLING

0

V

DS

I

G(REF)

0

V

DS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

6

IRFF420

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